JP6362480B2 - 半導体バックプレーンを製造するための方法およびシステム - Google Patents

半導体バックプレーンを製造するための方法およびシステム Download PDF

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JP6362480B2
JP6362480B2 JP2014173705A JP2014173705A JP6362480B2 JP 6362480 B2 JP6362480 B2 JP 6362480B2 JP 2014173705 A JP2014173705 A JP 2014173705A JP 2014173705 A JP2014173705 A JP 2014173705A JP 6362480 B2 JP6362480 B2 JP 6362480B2
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substrate
semiconductor
layer
support member
semiconductor particles
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JP2015053481A5 (https=
JP2015053481A (ja
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ダグラス ダイカー
ダグラス ダイカー
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ディフテック レーザーズ インコーポレイテッド
ディフテック レーザーズ インコーポレイテッド
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2922—Materials being non-crystalline insulating materials, e.g. glass or polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0428—Apparatus for mechanical treatment or grinding or cutting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment

Landscapes

  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Photovoltaic Devices (AREA)
  • Recrystallisation Techniques (AREA)
  • Wire Bonding (AREA)
  • Laminated Bodies (AREA)
  • Electrostatic, Electromagnetic, Magneto- Strictive, And Variable-Resistance Transducers (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
JP2014173705A 2013-09-05 2014-08-28 半導体バックプレーンを製造するための方法およびシステム Active JP6362480B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/019,131 2013-09-05
US14/019,131 US9209019B2 (en) 2013-09-05 2013-09-05 Method and system for manufacturing a semi-conducting backplane

Publications (3)

Publication Number Publication Date
JP2015053481A JP2015053481A (ja) 2015-03-19
JP2015053481A5 JP2015053481A5 (https=) 2017-08-03
JP6362480B2 true JP6362480B2 (ja) 2018-07-25

Family

ID=51492169

Family Applications (1)

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JP2014173705A Active JP6362480B2 (ja) 2013-09-05 2014-08-28 半導体バックプレーンを製造するための方法およびシステム

Country Status (4)

Country Link
US (1) US9209019B2 (https=)
EP (1) EP2846354B1 (https=)
JP (1) JP6362480B2 (https=)
CN (1) CN104576404B (https=)

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EP2953158A3 (en) * 2014-06-04 2016-02-17 Diftek Lasers, Inc. Method of fabricating crystalline island on substrate
US9843024B2 (en) * 2014-12-03 2017-12-12 Universal Display Corporation Methods for fabricating OLEDs
EP3244453A1 (en) * 2015-10-09 2017-11-15 Diftek Lasers, Inc. An electronic device and method of making thereof
US10312310B2 (en) 2016-01-19 2019-06-04 Diftek Lasers, Inc. OLED display and method of fabrication thereof
US10199255B2 (en) * 2016-03-10 2019-02-05 Infineon Technologioes AG Method for providing a planarizable workpiece support, a workpiece planarization arrangement, and a chuck
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DE102017213065B3 (de) * 2017-04-13 2018-07-05 Christian-Albrechts-Universität Zu Kiel Verfahren zur Herstellung von plankonvexen Linsenelementen und zur Herstellung eines gehäusten Bauelements auf Waferebene

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Also Published As

Publication number Publication date
US20150064883A1 (en) 2015-03-05
EP2846354A2 (en) 2015-03-11
CN104576404A (zh) 2015-04-29
JP2015053481A (ja) 2015-03-19
EP2846354A3 (en) 2015-08-12
US9209019B2 (en) 2015-12-08
EP2846354B1 (en) 2019-05-22
HK1207207A1 (en) 2016-01-22
CN104576404B (zh) 2019-08-09

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