JP6332091B2 - Electronic control unit - Google Patents

Description

  The present invention relates to an electronic control device that executes arithmetic operations.

  In general, an electronic control unit (ECU) controls an object to be controlled by a microcomputer including peripheral circuits such as an A / D converter, a timer, and a PWM waveform generation circuit in addition to a CPU and a memory. Various operations are performed. Recently, it has become common for a microcomputer to include a floating-point arithmetic processor (FPU). This is because by providing the FPU, it is possible to perform an operation using floating point type data, and an operation result can be obtained with a finer precision than the fixed point type data. In such floating point type data, an operation result that cannot be expressed as a numerical value is expressed as a non-number. In a calculation using floating point type data, when a non-number occurs, all the calculation results using the non-number become non-number. For this reason, when a non-number occurs, it is necessary to rewrite the non-number to a normal value.

  Patent Document 1 describes a technique for initializing a region where a non-number has occurred in a RAM when it is detected that the non-number has occurred.

JP 2011-164814 A

  By the way, the CPU provided in the microcomputer as described above can cope with an interrupt in many cases. Interrupts include hardware interrupts based on requests from peripherals and software interrupts based on CPU instruction execution. In any interrupt, when an interrupt occurs, the CPU suspends processing currently being executed and saves (stacks) processing information necessary for restarting the processing in an external storage medium such as a RAM. Specifically, the processing information is information representing the processing state such as the contents of the program counter and flags. The CPU executes an interrupt process. After the interrupt process is completed, the CPU reads the saved process information from the external storage medium, and resumes the previously interrupted process based on the information.

  However, if a non-number occurs in the operation in the interrupt process, even if the area where the non-number occurs in the RAM is initialized as described in Patent Document 1, it is initialized in the process resumed after the end of the interrupt. An operation that rewrites the area may be executed. For example, when an operation for overwriting the initialized area is executed based on the information saved as the processing information after the interruption is completed. Here, as an example, consider a case where control of a control target is performed using the recorded contents of the area. This control is performed on the assumption that the value of the area is a predetermined initialization value if a non-number occurs in the area. In such a case, if the area is rewritten to an unexpected value different from the initialization value that is a value to be initialized, there is a risk of unexpectedly affecting the control of the control target. For this reason, when a predetermined error in the operation such as a non-number occurs in the operation result in the interrupt processing, it is desirable to reliably initialize the operation result to a predetermined initialization value.

  An object of the present invention is to provide a technique for more reliably initializing a calculation result to a predetermined initialization value when an error occurs in the calculation result.

  One aspect of the present invention is a microcomputer as described above, which sequentially executes a plurality of operations in accordance with the priority assigned to each operation. The microcomputer includes order changing means, determination means, and initialization means. When an interrupt request for an operation having a higher priority than the operation being executed is input, the order changing means interrupts the operation before the interrupt that is being executed and executes the operation corresponding to the interrupt request. The operation order is changed so that the pre-interrupt operation is resumed after the operation ends. The determination means determines whether or not a predetermined error has occurred in the calculation result of each calculation. If it is determined by the determination means that an error has occurred, the initialization means has completed at least the calculation result that caused the error in the recording unit after completion of all the pre-interrupt calculations that were interrupted when the error occurred. Initialization is performed by assigning a predetermined initialization value to the area to be recorded.

  In such a configuration, when a predetermined error occurs in the calculation, after all of the interrupted pre-interrupt calculations are completed, at least the value of the area where the calculation result in which the error has occurred is a predetermined value. Initialized to the initialization value. According to this, since all the pre-interrupt operations interrupted by the interrupt request have been completed, the initialized area is a value that should be initialized by resuming such pre-interrupt operations. Rewriting to a value different from the value is suppressed. For this reason, it is possible to reliably initialize the area where the calculation result in error is recorded to a predetermined initialization value.

  In addition, the code | symbol in the parenthesis described in the claim shows the correspondence with the specific means as described in embodiment mentioned later as one aspect, Comprising: The technical scope of this invention is limited is not.

The block diagram which shows an example of a structure of an electronic controller. The figure which shows an example of a priority table. The figure explaining an example of the storage area of RAM. (A) is a figure which shows an example of the data format of floating point type data, (b) is a figure showing the meaning of the numerical value of floating point type data. The flowchart which shows an example of a 1st task process. The flowchart which shows an example of a 2nd task process. The flowchart which shows an example of an initialization process. The figure which shows an example of the initialization area | region identification table. The figure which shows an example of the action | operation of this embodiment. The figure which shows an example of the operation | movement at the time of replacing with a 2nd task process and performing a comparative example process. The flowchart which shows an example of the 2nd task process in other embodiment. The figure which shows an example of the action | operation at the time of the multiple interruption in other embodiment.

Embodiments to which the present invention is applied will be described below with reference to the drawings.
[1. Constitution]
FIG. 1 is a diagram showing a configuration of an electronic control device 1 to which the present invention is applied. The electronic control device 1 includes a microcomputer 2 including a CPU 10, a ROM 20, a RAM 30, an FPU 40, an interrupt controller 50, and a peripheral circuit 60.

The CPU 10 is a well-known CPU that executes a predetermined program in accordance with a predetermined calculation order, and can cope with an interrupt. The CPU 10 will be described later.
The ROM 20 stores a program (process) executed by the CPU 10. The ROM 20 stores a priority table that defines the priority of these programs executed by the CPU 10. As an example, the priority order table shown in FIG. 2 represents the priority order of programs that execute the initialization process, the first task process to the third task process. Here, the priority order of the program that executes the initialization process is set to the lowest order, and the priority order is set to increase in the order of the first task process, the second task process, and the third task process.

  In the RAM 30, the calculation result by the CPU 10 is recorded. As an example, the RAM 30 includes a data recording area 301 for recording a calculation result of a predetermined variable and a stack area 302 as shown in FIG. In the data recording area 301, a storage area for floating point type data is secured. Here, as an example, the variable RamA and the variable RamB are recorded as floating point type data.

  The FPU 40 executes floating point arithmetic among arithmetic operations based on the program. The floating point calculation is an operation using floating point type data, and the floating point type data of the calculation result is recorded in the data recording area 301 (floating point type data storage area) of the RAM 30 described above. The FPU 40 represents floating point type data, for example, in a data format according to the IEEE754 standard.

  That is, single-precision floating-point data conforming to the IEEE 754 standard includes a 1-bit sign part, an 8-bit exponent part, and a 23-bit mantissa part, as shown in FIG. In the floating-point data of this standard, for example, an operation result that cannot be expressed as a numerical value can be expressed as “not a number”. An operation result such as an operation that divides by 0 or an operation that uses ∞ (infinity) is an example of an operation result that cannot be expressed as a numerical value. For example, in this standard, as shown in FIG. 4B, when the 8 bits of the exponent part are all “1”, that is, when the exponent part is “255” in decimal notation and the mantissa part is other than “0”, This floating point type data represents “not a number”. In the above-mentioned standard, when all 8 bits of the exponent part are “1” and the mantissa part is “0”, this floating-point type data represents “infinity”. In the following, an operation that results in an operation result that cannot be expressed as a numerical value, such as an operation that divides by 0 or an operation that uses infinity, is referred to as an invalid operation.

  The CPU 10 executes fixed-point arithmetic among arithmetic operations based on the program, and causes the FPU 40 to execute floating-point arithmetic. As described above, the CPU 10 can cope with interrupts. Note that the interrupt includes a hardware interrupt based on a request from the peripheral circuit 60 (interrupt controller 50) and a software interrupt based on instruction execution of the CPU 10 itself. In the present embodiment, a case where the CPU 10 supports hardware interruption will be described. Of course, the CPU 10 may correspond to a software interrupt, or may correspond to both of them.

  Based on the program, the CPU 10 executes at least flag processing, interrupt CPU processing, priority output processing, first task processing to third task processing, and initialization processing. The first task process to the third task process and the initialization process will be described later.

  The flag process is a process of setting an error flag when a predetermined error occurs in the calculation result of the floating point calculation by the FPU 40. In the flag processing, the CPU 10 determines that the calculation result by the FPU 40 represents a non-number (including a case where an invalid calculation is performed in the FPU 40 when the calculation result is a non-number), and that the calculation result by the FPU 40 is ± Set the error flag to indicate ∞. The CPU 10 records the contents of the PC when the error flag is set in the RAM 30 as error program specifying information. The error flag is reset at the start of the program for each program.

  The interrupt CPU process is a process executed by the CPU 10 when an interrupt occurs. An example will be briefly described. In the interrupt CPU process, when an interrupt occurs, specifically, when a CPU interrupt request signal is input, the CPU 10 interrupts the currently executing process and processes information required to restart the process. Are saved (stacked) in the stack area 302 of the RAM 30. In the present embodiment, the CPU interrupt request signal is output from the interrupt controller 50. The processing information is information representing the processing state such as the contents of the PC and flags. In the present embodiment, the processing information also includes information representing the contents of so-called local variables used in the interrupted program. The CPU 10 specifies an interrupt process to be executed based on the interrupt information acquired when the CPU interrupt request signal is input. In the present embodiment, the interrupt information is output from the interrupt controller 50. The CPU 10 executes the specified interrupt process. After the interrupt process is completed, the CPU 10 reads the saved information from the stack area 302 of the RAM 30 and restarts the previously interrupted process based on the information. In the following, processing for saving processing information to the stack area 302 is referred to as saving processing, and processing for reading the saved information from the stack area 302 is referred to as restoration processing.

  The priority order output process is a process for outputting the priority order of the program currently being executed by the CPU 10 to the interrupt controller 50. Specifically, the CPU 10 specifies the priority order corresponding to the currently executing program based on the priority order table recorded in the ROM 20, and outputs the specified priority order to the interrupt controller 50.

  When an interrupt request for a program having a higher priority than the program being executed in the CPU 10 is input, the interrupt controller 50 is called a program that is being executed when the interrupt request is input (referred to as a pre-interrupt program). ) Is interrupted by the CPU 10. Then, the interrupt controller 50 changes the program execution order (calculation order) in the CPU 10 so that the pre-interrupt program is resumed after the execution of the interrupt process by the program corresponding to the interrupt request is completed.

  Specifically, the interrupt request is generated in the peripheral circuit 60 and input from the peripheral circuit 60 to the interrupt controller 50. The priority order of programs being executed in the CPU 10 is input from the CPU 10 to the interrupt controller 50. The interrupt controller 50 compares the priority order of the program corresponding to the interrupt request and the program being executed by the CPU 10 based on the priority order table similar to the priority order table recorded in the ROM 20. When interrupting the pre-interrupt program being executed by the CPU 10, the interrupt controller 50 outputs a CPU interrupt request to the CPU 10. At this time, the interrupt controller 50 outputs to the CPU 10 interrupt information that can specify a program corresponding to the interrupt request.

  The peripheral circuit 60 includes I / O and various registers (not shown), an A / D converter, a timer, a PWM waveform generation circuit, and the like. The components of the peripheral circuit 60 output an interrupt request for performing a predetermined interrupt process to the interrupt controller 50.

[2. processing]
Next, the first task process to the third task process and the initialization process that the CPU 10 executes based on a program will be described. Each of the first task process to the third task process is a process for performing a floating point operation.

[2-1. First task processing]
The first task process is a process that is repeatedly executed at a predetermined cycle while power is supplied to the electronic control unit 1. An example of the first task process will be described with reference to the flowchart of FIG. In the following description, the CPU 10 is the subject in a sentence in which the subject is omitted.

In S110, the value of the variable RamA is assigned to the variable tp.
Next, in S120, a calculation (tp × 6) for multiplying the variable tp by six is executed, and the calculation result is substituted for the variable td.

  In subsequent S130, it is determined whether or not a non-number has occurred in the calculation result of S120. Specifically, when the calculation error flag is set, it is determined that a non-number has occurred. If a non-number has not occurred in the calculation result, the process proceeds to S140. If a non-number has occurred, the process proceeds to S150.

In S140, the value of the variable tp is substituted into the variable RamB, and the first task process is terminated.
In S150, an initialization process to be described later is started, and after the started initialization process is finished, the first task process is finished.

  That is, as an example, the first task process shown in FIG. 5 is a process of performing an operation of multiplying the value of the variable RamA by 6 and recording the operation result as the value of the variable RamB. The first task process is not limited to the above-described contents, and any process may be used as long as it performs a floating point calculation. The variable RamA and the variable RamB are variables that can be referred to in other than the first task process, so-called global variables, and the variables tp and td are variables that are referred to only in the first task process, so-called local variables. It shall be.

[2-2. Second task process, third task process]
The second task process and the third task process are interrupt processes executed when an interrupt request (hardware interrupt request) from the peripheral circuit 60 is generated. The second task process and the third task process are set to have a higher priority than the first task process, and the third task process is set to have a higher priority than the second task process. The second task process and the third task process may be any process as long as the process performs a floating-point operation. Here, an example of the second task process will be described with reference to the flowchart of FIG. The third task process is assumed to be the same process as the second task process except that the calculation process to be executed (S210) and the area when the calculation result is recorded in the RAM 30 (S220) are different. In the third task process, the calculation result is recorded in an area in the RAM 30 where variables other than the variables RamA and RamB are recorded. In the following description, the CPU 10 is the subject in a sentence in which the subject is omitted.

In S210, an arithmetic process using the variable RamA is executed. The arithmetic processing here may be any processing as long as it is processing for performing floating point arithmetic.
In S220, the calculation result of S210 is substituted into the variable RamA. Here, the reference and substitution of the variable RamA is performed only in the first task, the second task, and the initialization process.

  In S230, it is determined whether or not a non-number has occurred in the calculation result of S210. Specifically, when the calculation error flag is set, it is determined that a non-number has occurred. If a non-number has not occurred in the calculation result, the second task process is terminated. If a non-number has occurred, the process proceeds to S240.

In S240, an initialization process described later is started, and the second task process is terminated.
[2-3. Initialization process]
The initialization process started in S150 of the first task process and S240 of the second task process will be described with reference to the flowchart of FIG. This initialization process is a process of substituting a predetermined initialization value for at least a variable in which a non-number has occurred and a variable related thereto.

  In S300, an area in the RAM 30 where a variable to be initialized is recorded is specified as an initialization area. In this embodiment, as an example, an area in which a variable represented by floating-point type data that is being executed when the error flag is set is recorded is specified as an initialization area. . Furthermore, an area in which another variable in which the execution result of the floating point type operation using the variable is recorded is specified as an initialization area. These initialization areas are identified based on the error program identification information and the initialization area identification table recorded in the ROM 20. An example of the initialization area specification table is shown in FIG. Below, the case where the calculation result of the variable RamA becomes a non-number in the second task process will be described. That is, the case where the variable RamA and the variable RamB in which the execution result of the floating-point type operation using the variable RamA is recorded as the initialization area will be described.

In S310, an operation for calculating an initialization value to be substituted into the variable RamA is performed.
In S320, an operation for calculating an initialization value to be substituted into the variable RamB is performed.
In S330, the initialization value calculated in S310 is substituted into the variable RamA.

In S340, the initialization value calculated in S320 is substituted into the variable RamB. Then, the initialization process ends.
If the initialization value is not required to be calculated, for example, if the initialization value is 0, S310 and S320 are omitted, and the initialization value is set for each of the variables RamA and RamB in S330 and S340. (For example, 0) may be substituted.

[3. Operation]
An example of the operation of the CPU 10 in the electronic control device 1 of this embodiment will be described with reference to FIG. FIG. 9 is a diagram showing, in time series, processing executed by the CPU 10 when an interrupt request for requesting execution of the second task processing is generated from the peripheral circuit 60 during execution of the first task processing.

At time t1, the CPU 10 starts the first task process. Specifically, the CPU 10 substitutes the value of the variable RamA for the variable tp (S110).
At time t2, a CPU interrupt request is input to the CPU 10. Thereby, the CPU 10 executes the save process and starts executing the second task process as the interrupt process based on the interrupt information. Note that the variable tp is saved in the stack area 302 in a state where the value of the variable RamA before execution of the second task process is substituted by the save process.

  At times t2 to t3, the CPU 10 executes the second task process. Here, it is assumed that the CPU 10 determines that a non-number has occurred in the calculation result of the variable RamA based on the error flag during the execution of the second task process (S230; YES). The CPU 10 starts an initialization process. However, since the initialization process has the lowest priority, the initialization process is not yet started here.

  At time t3, the CPU 10 ends the second task process. Subsequently, the CPU 10 executes a return process and restarts the first task process. Here, the variable tp maintains a state where the value of the variable RamA before the second task process is executed is substituted. The CPU 10 assigns a value obtained by multiplying the value of the variable tp by 6 to the variable td (S120). Here, since it is determined that there is no non-number in the calculation of the variable td (S130; NO), the CPU 10 substitutes the value of the variable td into the variable RamB (S140). That is, a value obtained by multiplying the value of the variable RamA before the execution of the second task process by 6 is assigned to the variable RamB.

At time t4, the CPU 10 ends the first task process.
At time t <b> 5, the CPU 10 starts the initialization process because there is no interrupted pre-interrupt process. By the initialization process, the variable RamA and the variable RamB are initialized to predetermined initialization values (S330, S340).

[4. effect]
According to the embodiment detailed above, the following effects can be obtained.
[4A] When a predetermined error occurs in the calculation, after all interrupted pre-interrupt processing is completed, at least the value of the area in which the calculation result in error is recorded is a predetermined initialization value. It is initialized to. In other words, after all processing using the information saved in the RAM 30 (stack area 302) by the saving processing in the interrupt (in the above embodiment, the variable tp and the variable td) is completed, The area to be recorded (in the above embodiment, the variable RamA and the variable RamB) is initialized. According to this, since all the pre-interrupt operations interrupted by the interrupt request have been completed, the initialized area is a value that should be initialized by resuming such pre-interrupt operations. Rewriting to a value different from the value is suppressed. That is, it is possible to reliably initialize the area in which the error calculation result is recorded to a predetermined initialization value that is a normal value. As a result, for example, when a non-numeric value occurs in the variable RamA and the variable RamB, the control target is controlled on the assumption that the value of the area is a predetermined initialization value. Predetermined control based on a predetermined initialization value can be reliably performed on the target.

  FIG. 10 shows the processing of the CPU 10 in time series when the comparative example process as the comparative example is executed instead of the second task process by an interrupt request during the execution of the first task process. FIG. In the comparative example process, a floating-point operation is performed on the variable RamA, and when a non-number occurs in the operation result, the variable RamA and the variable RamB are initialized to initialization values. However, even when initialization is performed when an arithmetic result is generated in the interrupt process as in the comparative example process, when the first task process that is the pre-interrupt process is resumed, the variable RamB is Therefore, a value different from the initialization value is overwritten based on the variable tp and the variable td saved in the stack area 302 by the saving process.

  In contrast, in this embodiment, as described above, initialization is performed after all interrupted pre-interrupt processing is completed. The processing using the variable tp and the variable td saved in the stack area 302 is finished, and the variable RamA and the variable RamB are not rewritten by the variable tp and the variable td. Therefore, according to the present embodiment, it is possible to reliably initialize the area in which the calculation result in error is recorded to a predetermined initialization value.

  [4B] The initialization means is one of operations corresponding to the interrupt request, and the priority order is set at the lowest order. According to this, it is possible to reliably perform initialization after all interrupted pre-interrupt processing is completed.

  In the first embodiment, the electronic control device 1 corresponds to an example of the present invention, the interrupt controller 50 corresponds to an example of an order change unit, and the CPU 10 corresponds to an example of a determination unit, an initialization unit, and a recording unit. The RAM 30 corresponds to an example of a recording unit. S130 and S230 correspond to an example of processing as a determination unit, S150 and S240 correspond to an example of processing as an initialization unit, and S250 corresponds to an example of processing as a recording unit. Further, the pre-interrupt process corresponds to an example of a pre-interrupt calculation.

[5. Other Embodiments]
As mentioned above, although embodiment of this invention was described, it cannot be overemphasized that this invention can take a various form, without being limited to the said embodiment.

  [5A] In the above embodiment, when a predetermined error occurs in the operation, that is, when a non-number occurs in the operation result, when an invalid operation is performed, and when the operation result is infinite. In this case, the initialization process is activated, but the activation process is not limited to this. For example, the initialization process may be activated only when infinity occurs in the calculation result. Further, for example, the initialization process may be activated only when an invalid operation is performed. Also, the initialization process may be activated only when a non-number occurs in the calculation result. Moreover, when these are combined, the initialization process may be started. In either case, the variable in which the error has occurred can be restored to a predetermined initialization value that is a normal value.

  [5B] In the above embodiment, in the second task process shown in FIG. 6, the CPU 10 records the calculation result in the area of the variable RamA in the RAM 30 after the floating-point calculation for the variable RamA (global variable) is executed. Thereafter, it is determined whether or not the result of this calculation is non-numeric. Further, the variable RamA is limited to be used only in the first task, the second task, and the initialization process. On the other hand, after the floating point operation is performed on the variable RamA, the CPU 10 once records the operation result in an area different from the area of the variable RamA in the RAM 30 and determines whether or not the number is non-numeric. May be. When the CPU 10 determines that the number is not a non-numeric value, the CPU 10 may record the calculation result in the area of the variable RamA in the RAM 30. An example of an area different from the area of the variable RamA in the RAM 30 is a recording area that cannot be referred to when executing other operations, specifically, a register of the CPU 10 or an area where local variables are recorded in the RAM 30. . According to this, since the operation result of the variable RamA that is a global variable is written in the RAM 30 after it is determined that it is not a non-numeric value, it is referred to when the variable RamA that is a global variable is referred to in other operations. It is suppressed that the content is non-numeric. That is, it is possible to suppress the occurrence of non-numbers in other operations using the variable RamA that has become non-numbers. In this case, it is not necessary to limit the use of the variable RamA, which may generate an innumerable number, only in the first task process, the second task process, and the initialization process as in the above embodiment.

  FIG. 11 shows an example of a flowchart when the calculation result of the variable RamA is temporarily recorded in the register of the CPU 10 in the second task processing. In the second task process shown in FIG. 11, the CPU 10 records the calculation result of the variable RamA in the register of the CPU 10 in S210. Here, when the CPU 10 determines that a predetermined error (non-number) has not occurred in the calculation result recorded in the register (S230; NO), the CPU 10 writes the calculation result in the area of the variable RamA in the RAM 30. (S250). On the other hand, when it is determined that a predetermined error (not a number) has occurred in the operation result recorded in the register (S230; YES), the CPU 10 writes the initial value in the area of the variable RamA in the RAM 30 (S250). ). According to this, when a non-number occurs in the calculation result of the variable RamA, it is suppressed that the non-number is recorded in the area of the variable RamA in the RAM 30, and in other calculations using the non-number variable RamA. Generation of non-numbers can be suppressed.

  In this case, an area (register of the CPU 10) different from the area of the variable RamA in the RAM 30 corresponds to an example of the first recording unit, and an area of the variable RamA in the RAM 30 corresponds to an example of the second recording unit.

  [5C] The interrupt controller 50 may be configured to support multiple interrupts. That is, when a plurality of interrupt requests are simultaneously input from the peripheral circuits 60, the interrupt controller 50 selects an interrupt request with the highest priority from among them, and performs an interrupt process corresponding to the interrupt request. The CPU interrupt request signal may be output to the CPU 10 only when the CPU 10 has a higher priority than the interrupt process being executed by the CPU 10. For the remaining interrupt requests, similar processing may be repeated after completion of the interrupt processing corresponding to the interrupt request with the highest priority.

  As an example, FIG. 12 shows that when executing the first task process, an interrupt request for the second task process is generated (time t12), and after the start of the second task process, an interrupt request for the third task process is generated (time). It is the figure which showed the process of CPU10 in the time series at the time of t13). Even in such a case, since the priority order is the lowest, the initialization process is started after completion of the first task process to the third task process (time t17). Therefore, the same effect as that of the above embodiment is achieved.

  By the way, as shown in FIG. 12 as an example, when a non-number occurs in both the third task process and the second task process, the initialization process is also performed by the third task process (time t14). (Time t15). As described above, when the initialization process may be activated a plurality of times, it is desirable that the initialization process is performed only once as shown in FIG. 12 instead of performing the initialization process a plurality of times.

  [5D] In the above-described embodiment, the example in which the initialization processing function is executed by software has been described. However, part or all of the initialization processing function may be realized by hardware.

  [5E] The functions of one component in the above embodiment may be distributed as a plurality of components, or the functions of a plurality of components may be integrated into one component. Further, at least a part of the configuration of the above embodiment may be replaced with a known configuration having the same function. Moreover, you may abbreviate | omit a part of structure of the said embodiment as long as a subject can be solved. In addition, at least a part of the configuration of the above embodiment may be added to or replaced with the configuration of the other embodiment. In addition, all the aspects included in the technical idea specified from the wording described in the claims are embodiments of the present invention.

  [5F] The present invention is not limited to the electronic control device 1 described above, a system including the electronic control device 1 as a constituent element, a program for causing the electronic control device 1 to function, a medium storing the program, a calculation method, and the like. Can be realized in various forms.

  DESCRIPTION OF SYMBOLS 1 ... Electronic controller 2 ... Microcomputer 10 ... CPU 30 ... RAM 50 ... Interrupt controller.

Claims (6)

An electronic control device (1) that sequentially executes a plurality of operations in accordance with a priority assigned to each operation,
Recording means (10, S220, S250) for recording the calculation results of the respective calculations in the recording unit (30);
When an interrupt request for an operation having a higher priority than the operation being executed is input, the pre-interrupt operation that is the operation being executed is interrupted, and the execution of the operation corresponding to the interrupt request is completed Order changing means (50) for changing the calculation order so that the calculation before interruption is resumed later;
Judgment means (10, S130, S230) for judging whether or not a predetermined error has occurred in the calculation result of each calculation;
If it is determined by the determining means that an error has occurred, after all pre-interrupt operations that were interrupted when the error occurred have been completed, at least the operation that caused the error in the recording unit (30) Initialization means (10, S150, S240) for performing initialization by substituting a predetermined initialization value in an area where results are recorded;
An electronic control device comprising: The electronic control device according to claim 1,
The electronic control unit, wherein the determination unit determines that a predetermined error has occurred in the calculation when the calculation result represents a non-number. The electronic control device according to claim 1 or 2,
The electronic control device, wherein the determination unit determines that a predetermined error has occurred in the calculation when the calculation result represents infinity. The electronic control device according to any one of claims 1 to 3,
The electronic control device according to claim 1, wherein the determination unit determines that a predetermined error has occurred in the calculation when a predetermined invalid calculation is performed. The electronic control device according to any one of claims 1 to 4,
The electronic control device, wherein the initialization means is one of operations corresponding to the interrupt request, and the priority order is set at the lowest order. The electronic control device according to any one of claims 1 to 5,
The recording means records a calculation result of each calculation in a first recording unit of the recording units,
The determination means determines whether or not the error has occurred based on a calculation result by each calculation recorded in the first recording unit,
The initialization unit records the calculation result in a second recording unit different from the first recording unit in the recording unit when the determination unit determines that the error has not occurred. The electronic control device, wherein when the determination unit determines that the error has occurred, the initialization value is recorded in the second recording unit.