JP6325217B2 - CIRCUIT DEVICE AND CIRCUIT DEVICE RECOVERY METHOD - Google Patents

Description

  The present invention relates to a circuit device and a circuit device restoration method.

  A watchdog timer circuit is known as a circuit that monitors whether or not the program of the apparatus is operating abnormally and restarts when there is an abnormality. However, in a device that operates with an AC commercial power supply, if a program error occurs due to the primary latch-up phenomenon of the memory that constitutes the control circuit, etc., and the program does not operate normally even after restart by the watchdog timer circuit There is. In this case, it may be possible to continue the operation without any problem by temporarily stopping and re-inputting the AC commercial power supply. However, if there is no means for autonomously stopping the supply by the AC commercial power supply and re-inputting, the apparatus continues the program abnormal state and cannot perform the original function of the apparatus.

  Patent Document 1 discloses a computer system having a function of temporarily shutting off a computer for a certain period of time when a signal is not received from the computer for a predetermined time after the watchdog timer sends a reset signal to the computer. Is disclosed. It is described that the predetermined time needs to be longer than twice the period in which the reset signal is output from the computer to the watchdog timer.

JP2003-67220A

  However, the computer system described in Patent Document 1 has the following problems. That is, the time required for the computer to restart after receiving a reset signal from the watchdog timer, and the time required for outputting a signal to the watchdog timer after the restart is the operation of the program installed in the computer, etc. Varies by However, Patent Document 1 discloses that the time (predetermined time) from when the watchdog timer outputs a computer reset signal until it outputs a temporary power-off signal is a cycle in which the reset signal is output from the computer to the watchdog timer. It is described that it is necessary to set a time longer than twice the time. Therefore, even if the program is changed and the computer receives the reset signal from the watchdog timer and restarts, the time required to output a signal to the watchdog timer after restarting is changed. There is a problem that the predetermined time cannot be changed.

  An object of this invention is to provide the circuit apparatus which solves the subject mentioned above.

  The circuit device according to the present invention includes a power supply unit, a control circuit, a timer circuit, and an adjustment unit. The control circuit operates according to an output from the power supply unit, and the timer operates when the program operates normally. A timer circuit clear signal is output to the circuit, and the timer circuit stops the operation of the power supply unit for a predetermined time when the timer circuit clear signal is not input from the control circuit within the time limit, and the adjusting means adjusts the time limit. It is characterized by doing.

  In a circuit device having a power supply unit, a device recovery method according to the present invention includes a step of determining an input of a timer circuit clear signal output when a program is operating normally, and a timer circuit clear signal within a time limit. In the case where no power is input, the operation includes stopping the operation of the power supply unit for a predetermined time and restarting the operation, and adjusting the time limit.

  ADVANTAGE OF THE INVENTION According to this invention, the circuit apparatus which can adjust flexibly the time until it stops operation | movement of a power supply part according to the change of a program can be provided.

1 is a diagram illustrating a configuration of a circuit device 100 according to a first embodiment. FIG. 6 is a flowchart for explaining the operation of the timer circuit 30 according to the first embodiment. It is a figure which shows the structure of the circuit apparatus 200 concerning 2nd Embodiment. 3 is a diagram illustrating a configuration of a control circuit 21 in the circuit device 200. FIG. 10 is a timing chart for explaining the operation of the circuit device 200 according to the second embodiment. 10 is a timing chart for explaining the operation of the circuit device 200 according to the second embodiment. It is a figure which shows the structure of the circuit apparatus 300 concerning 3rd Embodiment. It is a figure which shows the structure of the circuit apparatus 400 concerning 4th Embodiment. It is a figure which shows the structure of the circuit apparatus 500 concerning 5th Embodiment. It is a figure which shows the structure of the circuit apparatus 600 concerning 6th Embodiment. It is a figure which shows the structure of the table 1 concerning 6th Embodiment.

[First Embodiment]
FIG. 1 is a diagram illustrating a configuration of a circuit device 100 according to the first embodiment. The circuit device 100 includes a power supply unit 10, a control circuit 20, a timer circuit 30, and adjustment means 40.

  The power supply unit 10 is supplied with power from an external power source such as an AC commercial power source or a DC power source.

  The control circuit 20 outputs a timer circuit clear signal to the timer circuit 30 described later when the program of the control circuit 20 is operating normally. When the program is not operating normally, the timer circuit clear signal is not output.

  The timer circuit 30 has a function of stopping the power supply by the power supply unit 10 when the timer circuit clear signal is not input within the time limit t by the adjusting unit 40 described later, and restarting the power supply unit 10 after a predetermined time elapses.

  The adjusting means 40 adjusts the time limit t at which the timer circuit 30 receives the input of the timer circuit clear signal.

  The operation of the circuit device 100 will be described focusing on the operation of the timer circuit 30. FIG. 2 is a flowchart for explaining the operation of the timer circuit 30.

  The timer circuit 30 determines whether there is an input of a timer circuit clear signal from the control circuit 20 (S1). If the timer circuit clear signal is not input (no in S1), it is determined whether or not the time limit t has passed (S2). When the time limit t elapses without receiving the timer circuit clear signal (yes in S2), the timer circuit 30 stops the operation of the power supply unit 10 and restarts after a predetermined time elapses (S3).

  According to the circuit device 100 according to the present embodiment, the operation of the power supply unit 10 can be automatically stopped and restarted when the program of the control circuit 20 is not operating normally. In this case, the adjustment means 40 adjusts the time limit t for the timer circuit to accept the input of the timer circuit clear signal. As a result, the time required for the device to restart after receiving a reset signal from the watchdog timer due to a change in the program installed in the device, and the time required to output a signal to the watchdog timer after the restart. Even if a change occurs, the time until the operation of the power supply unit is stopped can be flexibly adjusted according to the change.

[Second Embodiment]
FIG. 3 is a diagram illustrating a configuration of a circuit device 200 according to the second embodiment. FIG. 4 is a diagram illustrating a configuration of the control circuit 21.

  The circuit device 200 includes a power supply unit 10a, an internal circuit 20a, a timer circuit 30a, and capacitors 41 and 42.

  The power supply unit 10 a includes an AC / DC conversion circuit 11 and a DC / DC conversion circuit 12.

  The AC / DC conversion circuit 11 receives power supply from the AC commercial power supply 101 and outputs a DC power supply 111 to the timer circuit 30 a and the DC / DC conversion circuit 12.

  The DC / DC conversion circuit 12 converts the DC power supply 111 into a DC power supply 121 and outputs it to the internal circuit 20a.

  Internal circuit 20 a includes a control circuit 21 and a watchdog timer circuit 22.

  As shown in FIG. 4, the control circuit 21 includes a CPU (Central Processing Unit) 21a, a memory 21b, an I / O peripheral circuit 21c, and a CPU bus 21d that connects these components to each other. The control circuit 21 outputs a watchdog timer circuit clear signal 212 indicating that the program of the control circuit 21 is operating normally to the watchdog timer circuit 22 at regular intervals. Conversely, when the program is not operating normally, the watchdog timer circuit clear signal 212 is not output to the watchdog timer circuit 22. Further, the control circuit 21 outputs a timer circuit clear signal 211 to the timer circuit 30a. This will be described in detail when the operation of the circuit device 200 is described.

  The watchdog timer circuit 22 determines that the control circuit 21 is not operating normally when there is no input of the watchdog timer circuit clear signal 212 from the control circuit 21. In order to restart the control circuit 21, a control circuit clear signal 221 is output to the control circuit 21 and the timer circuit 30a.

  The timer circuit 30 a operates in response to the timer circuit clear signal 211 from the control circuit 21 and the control circuit clear signal 221 from the watchdog timer circuit 22. When the control circuit 21 cannot restart in response to the control circuit clear signal 221 from the watchdog timer circuit 22, the timer circuit 30a outputs the DC / DC conversion circuit Disable signal 301 to the DC / DC conversion circuit 12 for a predetermined time. To do. In other words, the DC / DC conversion circuit 12 is temporarily stopped and restarted. Since the timer circuit 30a operates with the DC power supply 111 from the AC / DC conversion circuit 11 instead of the DC power supply 121 from the DC / DC conversion circuit 12, the output of the DC power supply 121 from the DC / DC conversion circuit 12 stops. It is possible to operate even during the period.

  The capacitors 41 and 42 correspond to the adjusting unit 40 in the circuit device 100 of the first embodiment.

  The capacitor 41 adjusts the time when the timer circuit 30a accepts the input of the timer circuit clear signal 211 from the control circuit 21, that is, the time limit t4 when the control circuit 21 tries to restart by the control circuit clear signal 221.

  The capacitor 42 adjusts a time t5 from when the timer circuit 30a stops the DC / DC conversion circuit 12 until it is restarted.

  The operation of the circuit device 200 will be described. 5 and 6 are timing charts for explaining the operation of the circuit device 200. FIG. FIG. 5 shows the operation when the control circuit 21 is normally restarted by the operation of the watchdog timer circuit 22. FIG. 6 shows the operation when the control circuit 21 does not restart normally even when the watchdog timer circuit 22 is operated.

  First, FIG. 5 will be described. The control circuit 21 continuously outputs a watchdog timer circuit clear signal 212 indicating that the program of the control circuit 21 is operating normally to the watchdog timer circuit 22 every predetermined time t1.

  If the watchdog timer circuit clear signal 212 from the control circuit 21 cannot be detected within the predetermined time t2, the watchdog timer circuit 22 determines that the control circuit 21 is not operating normally. The watchdog timer circuit 22 outputs a low pulse (active) control circuit clear signal 221 to the control circuit 21 and the timer circuit 30a for the time t3 in order to restart the control circuit 21.

  The control circuit 21 enters a restart state in response to the control circuit clear signal 221 from the watchdog timer circuit 22. The control circuit 21 cannot control the control circuit clear signal terminal during the restart state. A terminal (for example, a three-state buffer, an open connector, and an open drain) that is in a high impedance state during the restart state is assigned to the timer circuit clear signal terminal, and the resistor R1 is connected. As a result, the control circuit 21 outputs a low pulse (active) timer circuit clear signal 211 to the timer circuit 30a during the restart state.

  The timer circuit 30a starts counting the time limit t4 adjusted based on the time constant of the capacitor 41 at the timing when both the control circuit clear signal 221 and the timer circuit clear signal 211 are at the low level.

  The control circuit 21 restored from the restart state to the normal state outputs a low pulse (active) timer circuit clear signal 211 to the timer circuit 30a.

  When the timer circuit 30a confirms the timer circuit clear signal 211 from the control circuit 21 within the time t4, the timer circuit 30a determines that the control circuit 21 has been restored to the normal state and stops its operation. That is, the DC / DC conversion circuit Disable signal 301 is not output to the DC / DC conversion circuit 12.

  Next, FIG. 6 will be described. The control circuit 21 continuously outputs a watchdog timer circuit clear signal 212 indicating that the program of the control circuit 21 is operating normally to the watchdog timer circuit 22 every predetermined time t1.

  If the watchdog timer circuit clear signal 212 from the control circuit 21 cannot be detected within the predetermined time t2, the watchdog timer circuit 22 determines that the control circuit 21 is not operating normally. The watchdog timer circuit 22 outputs a low pulse (active) control circuit clear signal 221 to the control circuit 21 and the timer circuit 30a for the time t3 in order to restart the control circuit 21.

  The control circuit 21 is restarted in response to the control circuit clear signal 221 from the watchdog timer circuit 22, and outputs a low pulse (active) timer circuit clear signal 211 to the timer circuit 30a.

  When the timer circuit 30a confirms that both the control circuit clear signal 221 and the timer circuit clear signal 211 are at the low level, the timer circuit 30a starts counting the time limit t4 adjusted based on the time constant of the capacitor 41. The operation so far is the same as in the case of FIG.

  The control circuit 21 that does not recover from the restart state to the normal state cannot output the low pulse (active) timer circuit clear signal 211 to the timer circuit 30a.

  When the timer circuit 30a cannot confirm the timer circuit clear signal 211 from the control circuit 21 within the time t4, the count expires. Then, the timer circuit 30a outputs a low pulse (active) DC / DC conversion circuit Disable signal 301 to the DC / DC conversion circuit 12 at time t5 adjusted based on the time constant of the capacitor 42. That is, the DC / DC conversion circuit 12 is stopped and restarted for t5 time.

  The DC / DC conversion circuit 12 stops the output of the DC power supply 121 to the internal circuit 20a while receiving the input of the DC / DC conversion circuit Disable signal 301.

  While the output from the DC power supply 121 is stopped, the internal circuit 20a becomes the same state as the state where the AC commercial power supply 101 is not input to the circuit device 200, and is in an operation stop state. When the DC / DC conversion circuit 12 is restarted, the control circuit 21 is in the same state as the state where the AC commercial power supply 101 is re-input to the circuit device 200 and continues to operate in a normal state.

  According to the circuit device 200 according to the present embodiment, when the control circuit 21 does not restart normally by the control circuit clear signal 221 from the watchdog timer circuit 22, the timer circuit 30a automatically activates the DC / DC conversion circuit 12. Can be stopped and restarted. Moreover, it has the capacitor | condenser 41 which adjusts the time limit t4 of restart. As a result, the time required for the device to restart after receiving a reset signal from the watchdog timer due to a change in the program installed in the device, and the time required to output a signal to the watchdog timer after the restart. Even if a change occurs, the time until the operation of the power supply unit is stopped can be flexibly adjusted according to the change.

  In some cases, the minimum power supply stop time of the DC / DC conversion circuit is determined in advance by the apparatus. The circuit device 200 according to the present embodiment includes the capacitor 42 that adjusts the time t5 from when the DC / DC conversion circuit 12 is stopped to when it is restarted. Thereby, even when the minimum power supply stop time of the DC / DC conversion circuit varies depending on the device, the power supply stop time can be flexibly adjusted according to the time.

  Furthermore, by using the discharge characteristics of the capacitors 41 and 42 to adjust the time limit and the power supply stop time, it is possible to suppress power consumption as compared with the case of counting using a counter circuit with a transmission source such as a vibrator. it can.

[Third Embodiment]
FIG. 7 is a diagram illustrating a configuration of a circuit device 300 according to the third embodiment. In the present embodiment, a counter circuit 30b1 is configured in the timer circuit 30b as a configuration corresponding to the capacitors 41 and 42 in the second embodiment. That is, the restart time limit t4 and the stop time t5 of the DC / DC conversion circuit 12 are adjusted based on the frequency of the AC commercial power supply 101. Other configurations are the same as those of the circuit device 200 according to the second embodiment.

  When the counter circuit 30b1 is configured in the timer circuit 30b using the frequency of the AC commercial power supply 101, a period before the control circuit clear signal 221 and the timer circuit clear signal 211 are input to the timer circuit 30b (of the control circuit 21). Even during the program's normal operation), power is consumed. In this case, the operation of the counter circuit 30b1 may be stopped during the period before the control circuit clear signal 221 and the timer circuit clear signal 211 are input to the timer circuit 30b to enter the low power saving mode. The counter operation is started when the control circuit clear signal 221 and the timer circuit clear signal 211 are input. Other operations are the same as those of the circuit devices in the first and second embodiments.

  The frequency of the AC commercial power supply 101 is stable at 50 Hz or 60 Hz. Therefore, the accuracy of the timer circuit 30b is improved by using the frequency of the AC commercial power supply 101. Furthermore, compared with the case where a capacitor is used, the component mounting area can be reduced, and the cost of circuit fabrication can be reduced.

[Fourth Embodiment]
FIG. 8 is a diagram illustrating a circuit device 400 according to the fourth embodiment. In this embodiment, instead of the frequency of the AC commercial power supply 101 in the third embodiment, the restart time limit t4 and the stop time t5 of the DC / DC conversion circuit 12 are set based on the DC input 102 from the external DC power supply. adjust.

  The circuit device 400 includes a ripple / spike noise extraction circuit 43 that extracts a constant frequency from the ripple / spike noise of the DC input 102. Other configurations and operations are the same as those of the circuit device according to the first to third embodiments.

  Generally, ripple / spike noise of a DC power supply has a constant frequency. Therefore, by providing the ripple / spike noise extraction circuit 43 and extracting a constant frequency from the ripple / spike noise of the DC input 102, the accuracy of the timer circuit 30c is improved as compared with the case of using a capacitor. Furthermore, compared with the case where a capacitor is used, the component mounting area can be reduced, and the cost of circuit fabrication can be reduced.

[Fifth Embodiment]
FIG. 9 is a diagram illustrating a circuit device 500 according to the fifth embodiment. The circuit device 500 has a configuration in which the watchdog timer 22 and the capacitor 41 in the second embodiment are omitted. In the present embodiment, at least one of the memory 21b ′ and the I / O peripheral circuit 21c ′ in the control circuit 21 ′ performs a self test. When the self test fails (for example, when the program abnormality cannot be recovered by the self test), the CPU 21a ′ outputs a timer circuit clear signal 211 ′ to the timer circuit 30d.

  Self-tests can be performed regularly, at power-on, or at any time of day.

  The timer circuit 30d outputs a low pulse (active) DC / DC conversion circuit Disable signal 301 to the DC / DC conversion circuit 12 at time t5 adjusted based on the time constant of the capacitor 42. That is, the DC / DC conversion circuit 12 is stopped for t5 time and restarted.

  In the circuit device 500 according to the present embodiment, the timer circuit clear signal is output based on the result of the self test performed by at least one of the memory 21b 'and the I / O peripheral circuit 21c'. As a result, the watchdog timer 22 and the capacitor 41 in the second embodiment are not required, and the component mounting area can be further reduced and the cost of circuit fabrication can be reduced.

[Sixth Embodiment]
FIG. 10 is a diagram illustrating a circuit device 600 according to the sixth embodiment. The circuit device 600 is obtained by adding reading means 50 to the circuit devices according to the first to fifth embodiments. In FIG. 10, an example in which the reading unit 50 is provided in the circuit device 100 according to the first embodiment will be described.

  The memory 20b ″ in the control circuit 20 includes an identifier of a program that the control circuit 20 has, a time required for the apparatus to receive a reset signal from the watchdog timer and restart (restart time). Table 1 is stored in which the time required for outputting a signal to the watchdog timer after restart (pulse output time) is associated (FIG. 11).

  When the program installed in the apparatus is changed, the reading unit 50 reads the restart time and the pulse output time corresponding to the changed program from the table 1, and the restart time limit t4 according to the read time. Set. Then, the adjustment unit is instructed to set t4.

  According to the circuit device 600 according to the present embodiment, by providing the reading unit 50, the program is changed, the time required for the device to restart after receiving the reset signal from the watchdog timer, and the watchdog timer after the restart. Even if the time required to output a signal is changed, the restart time limit can be automatically set according to the change.

  The table 1 can further store the time during which the timer circuit 30 stops the operation of the power supply unit 10 in association with each other. As a result, even when the program is changed and the minimum power supply stop time of the DC / DC conversion circuit is changed, the power supply stop time can be automatically set according to the change.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to the said embodiment, Of course, unless it deviates from the meaning of this invention, another modification and an application example are included. .

  Part or all of the above embodiments can be described as follows, but is not limited to the following.

(Appendix 1)
A power supply unit, a control circuit, a timer circuit, and adjustment means;
The control circuit operates by an output from the power supply unit, and outputs a timer circuit clear signal to the timer circuit when a program is operating normally,
The timer circuit stops the operation of the power supply unit for a predetermined time when the timer circuit clear signal is not input from the control circuit within a time limit,
The circuit device characterized in that the adjusting means adjusts the time limit.

(Appendix 2)
The circuit device according to appendix 1, wherein the adjustment unit further adjusts a time during which the timer circuit stops the operation of the power supply unit.

(Appendix 3)
A watchdog timer circuit;
The control circuit, when operating normally, outputs a watchdog timer circuit clear signal to the watchdog timer circuit,
The watchdog timer circuit outputs a control circuit clear signal to the control circuit and the timer circuit when the watchdog timer circuit clear signal is not input from the control circuit,
The control circuit attempts to restart in response to the input of the control circuit clear signal,
The timer circuit starts counting the time limit in response to the input of the control circuit clear signal,
The circuit device according to appendix 1 or 2, wherein the timer circuit clear signal is a signal output when the control circuit is restarted.

(Appendix 4)
The circuit device according to claim 1, further comprising a capacitor as the adjusting unit.

(Appendix 5)
The circuit device according to any one of appendices 1 to 3, wherein the adjustment unit uses a frequency of an AC commercial power supply connected to the power supply unit.

(Appendix 6)
A ripple / spike noise extraction circuit for extracting at least one of ripple noise and spike noise of a DC power supply connected to the power supply unit;
The circuit device according to any one of appendices 1 to 3, wherein the adjustment unit uses at least one frequency of the ripple noise and spike noise.

(Appendix 7)
The circuit device according to any one of appendices 1 to 3, wherein the control circuit performs a self test and outputs the timer circuit clear signal to the timer circuit in accordance with a result of the self test.

(Appendix 8)
A power supply unit, a control circuit, a watchdog timer circuit, a timer circuit, and a capacitor;
The control circuit outputs a watchdog timer circuit clear signal to the watchdog timer circuit when operating normally by an output from the power supply unit, and from the watchdog timer circuit when not operating normally. Attempting to restart according to the control circuit clear signal, and when restarting, output a timer circuit clear signal to the timer circuit,
The watchdog timer circuit outputs the control circuit clear signal to the control circuit and the timer circuit when the watchdog timer circuit clear signal is not input,
The timer circuit outputs a signal for stopping the power supply unit to the power supply unit when the timer circuit clear signal is not input from the control circuit within a time limit,
The circuit device, wherein the capacitor adjusts the time limit.

(Appendix 9)
In a circuit device having a power supply unit,
Determining the input of a timer circuit clear signal output when the program is operating normally;
When the timer circuit clear signal is not input within a time limit, the operation of the power supply unit is stopped for a predetermined time and restarted;
Adjusting the time limit and the time for which the timer circuit stops the operation of the power supply unit.

(Appendix 10)
The circuit device recovery method according to appendix 9, wherein the adjustment step further adjusts the time for stopping the operation of the power supply unit.

(Appendix 11)
Determining the input of the watchdog timer circuit clear signal;
Outputting a control circuit clear signal when the watchdog timer circuit clear signal is not input;
Restarting in response to the control circuit clear signal and outputting the timer circuit clear signal;
11. The circuit device recovery method according to appendix 9 or 10, including a step of starting counting the time limit in response to the control circuit clear signal.

(Appendix 12)
The circuit device restoration method according to any one of appendices 9 to 11, wherein a capacitor is used in the adjustment step.

(Appendix 13)
The restoration method for a circuit device according to any one of appendices 9 to 11, wherein a frequency of an AC commercial power source connected to the power source unit is used in the adjustment step.

(Appendix 14)
Extracting ripple / spike noise for extracting at least one of ripple noise and spike noise of a DC power supply connected to the power supply unit;
The circuit device restoration method according to any one of appendices 9 to 11, wherein at least one of the ripple noise and spike noise is used in the adjustment step.

(Appendix 15)
Self-testing steps,
The circuit device restoration method according to any one of appendices 9 to 11, further comprising a step of outputting the timer circuit clear signal to the timer circuit in accordance with a result of the self test.

DESCRIPTION OF SYMBOLS 1 Table 10, 10a, 10b Power supply part 11 AC / DC conversion circuit 12 DC / DC conversion circuit 20a Internal circuit 20, 21, 21 'Control circuit 21a, 21a' CPU
21b, 21b ′, 21b ″ Memory 21c, 21c ′ I / O peripheral circuit 21d, 21d ′ CPU bus 22 Watchdog timer circuit 30, 30a, 30b, 30c, 30d Timer circuit 30b1 Counter circuit 40 Adjustment means 41, 42 Capacitor 43 Ripple / Spike Noise Extraction Circuit 50 Reading Means R1 Resistance 100, 200, 300, 400, 500 Circuit Device 101 AC Commercial Power Supply 102 DC Input 111, 121 DC Power Supply 211, 211 ′ Timer Circuit Clear Signal 212 Watchdog Timer Circuit Clear Signal 221 Control circuit clear signal 301 DC / DC conversion circuit Disable signal

Claims (9)

A power supply unit, a control circuit, a timer circuit, adjustment means, and a watchdog timer circuit;
The control circuit is operated by an output from the power supply unit, and outputs a watchdog timer circuit clear signal to the watchdog timer circuit when a program is operating normally,
The watchdog timer circuit outputs a control circuit clear signal to the control circuit and the timer circuit when the watchdog timer circuit clear signal is not input from the control circuit,
The control circuit attempts to restart in response to the input of the control circuit clear signal,
The timer circuit starts counting the time limit in response to the input of the control circuit clear signal,
The control circuit outputs a timer circuit clear signal to the timer circuit when restarted,
The timer circuit stops the operation of the power supply unit for a predetermined time when the timer circuit clear signal is not input from the control circuit within the time limit,
The circuit device characterized in that the adjusting means adjusts the time limit.
  The circuit device according to claim 1, wherein the adjusting unit further adjusts a time for the timer circuit to stop the operation of the power supply unit. It has a capacitor as the adjusting means, the circuit device according to claim 1 or 2. The adjusting means uses the frequency of the AC commercial power source connected to the power supply unit, the circuit device according to claim 1 or 2. A ripple / spike noise extraction circuit for extracting at least one of ripple noise and spike noise of a DC power supply connected to the power supply unit;
It said adjusting means uses at least one of the frequency of the ripple noise and spike noise, the circuit device according to claim 1 or 2. Wherein the control circuit performs a self-test, the outputs of the timer circuit clear signal to said timer circuit in accordance with a result of the self test, circuit device according to claim 1 or 2. A power supply unit, a control circuit, a watchdog timer circuit, a timer circuit, and a capacitor;
The control circuit outputs a watchdog timer circuit clear signal to the watchdog timer circuit when operating normally by an output from the power supply unit, and from the watchdog timer circuit when not operating normally. Attempting to restart according to the control circuit clear signal, and when restarting, output a timer circuit clear signal to the timer circuit,
The watchdog timer circuit outputs the control circuit clear signal to the control circuit and the timer circuit when the watchdog timer circuit clear signal is not input,
The timer circuit outputs a signal for stopping the power supply unit to the power supply unit when the timer circuit clear signal is not input from the control circuit within a time limit,
The circuit device, wherein the capacitor adjusts the time limit. In a circuit device having a power supply unit and a control circuit ,
Determining an input of a control circuit clear signal output to the control circuit when a watchdog timer circuit clear signal output when the program is operating normally is not output;
Starting counting the time limit in response to the input of the control circuit clear signal;
Determining the input of a timer circuit clear signal to be output when the control circuit attempts to restart and restarts in response to the input of the control circuit clear signal ;
When the timer circuit clear signal is not input within the time limit, the operation of the power supply unit is stopped for a predetermined time and restarted;
Adjusting the time limit and the time for which the timer circuit stops the operation of the power supply unit. The circuit device recovery method according to claim 8 , further comprising adjusting a time during which the operation of the power supply unit is stopped in the adjusting step.

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