JP5407466B2 - Power control method - Google Patents

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JP5407466B2
JP5407466B2 JP2009071042A JP2009071042A JP5407466B2 JP 5407466 B2 JP5407466 B2 JP 5407466B2 JP 2009071042 A JP2009071042 A JP 2009071042A JP 2009071042 A JP2009071042 A JP 2009071042A JP 5407466 B2 JP5407466 B2 JP 5407466B2
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power supply
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隆紀 菅原
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Description

この発明は、停止時の電圧制御が必要となる場合に停止する順番を制御する回路と、停止する時間（電圧降下時間）を制御する回路とを有する、複数の電源で構成される電子装置において、要求される停止時の電圧制御を行うための電源制御回路および電源制御方法に関する。   The present invention relates to an electronic device including a plurality of power supplies, which includes a circuit that controls the order of stopping when voltage control at the time of stopping is necessary, and a circuit that controls the time to stop (voltage drop time). The present invention relates to a power supply control circuit and a power supply control method for performing required stop-time voltage control.

従来から、起動時の突入電流を分散させるために、各部を逐次起動する方式があったが、近年においては、負荷側のデバイスの仕様から、例えばコア電圧とＩ／Ｏ電圧の起動シーケンスの要求が生じている。
また、シーケンスに加え、時間規定（例えばコア電圧起動後、数ｍＳ以内にＩ／Ｏ電圧を起動する等）が追加されており、さらに停止時のシーケンス要求（時間，電圧差）が近年増加しているが、停止時のシーケンス要求を満足させることは困難であった。 Conventionally, there has been a method of sequentially starting each part in order to distribute the inrush current at the time of startup. However, in recent years, for example, a request for a startup sequence of a core voltage and an I / O voltage from the specifications of a device on the load side. Has occurred.
In addition to sequences, time rules (for example, I / O voltage activation within a few milliseconds after core voltage activation) have been added, and sequence requests (time and voltage differences) at the time of suspension have increased in recent years. However, it has been difficult to satisfy the sequence requirements at the time of stopping.

図４は、従来の電源制御方式の回路構成を示すブロック図、図５は、従来の電源制御方式における要求シーケンスの電圧遷移を示す図、図６は、従来の電源制御方式による動作タイムチャートと電圧遷移とを示す図である。
以下、図４乃至図６に基づいて、従来の電源制御方式を説明する。 4 is a block diagram showing a circuit configuration of a conventional power supply control system, FIG. 5 is a diagram showing voltage transition of a request sequence in the conventional power supply control system, and FIG. 6 is an operation time chart according to the conventional power supply control system. It is a figure which shows voltage transition.
Hereinafter, a conventional power control method will be described with reference to FIGS.

異なる電圧を必要とする負荷回路４２ａ，４２ｂと、負荷回路４２ａ，４２ｂに電圧を供給する電源回路４１ａ，４１ｂと、電源回路４１ａ，４１ｂの起動／停止を制御する起動／停止制御回路４３１と、電源回路４１ａ，４１ｂの出力電圧を監視する電圧監視回路４３２と、起動／停止制御回路４３１と電圧監視回路４３２を含むシーケンス制御回路４３とを有する電子回路において、起動時のシーケンスは、図５に示すように、シーケンス制御回路４３により、規定のシーケンスによって順次、電源回路４１ａ，電源回路４１ｂが起動し、起動時の電圧上昇時間は、各電源回路４１ａ，４１ｂが制御していた。   Load circuits 42a and 42b that require different voltages, power supply circuits 41a and 41b that supply voltages to the load circuits 42a and 42b, a start / stop control circuit 431 that controls start / stop of the power supply circuits 41a and 41b, In an electronic circuit having a voltage monitoring circuit 432 that monitors the output voltages of the power supply circuits 41a and 41b, and a sequence control circuit 43 that includes a start / stop control circuit 431 and a voltage monitoring circuit 432, the startup sequence is shown in FIG. As shown, the sequence control circuit 43 sequentially activates the power supply circuit 41a and the power supply circuit 41b according to a prescribed sequence, and the power supply circuits 41a and 41b controlled the voltage rise time at the time of activation.

また、停止のシーケンスは、起動シーケンスと同様に、シーケンス制御回路４３により、規定のシーケンスによって順次、電源回路４１ａ，電源回路４１ｂを停止していたが、負荷回路４２ａ，負荷回路４２ｂがそれぞれ有する容量成分に応じて、停止シーケンスにおいて、図６に示すように、電圧降下時間にばらつきがあり、そのため図５に示すように、電源回路４１ａ，電源回路４１ｂ間で、停止シーケンス時の電圧が逆転する場合があった。   In the stop sequence, the power supply circuit 41a and the power supply circuit 41b are sequentially stopped by the sequence control circuit 43 according to a prescribed sequence, as in the start sequence. However, the load circuit 42a and the load circuit 42b have their respective capacities. Depending on the components, the voltage drop time varies in the stop sequence as shown in FIG. 6, so that the voltage in the stop sequence is reversed between the power supply circuit 41a and the power supply circuit 41b as shown in FIG. There was a case.

また、装置不具合時に緊急停止が必要な場合、電源回路４１ａ，電源回路４１ｂを停止しても、負荷回路４２ａ，負荷回路４２ｂがそれぞれ有する容量成分に応じて図６に示すように、電圧降下時間が冗漫になり、電源出力を即時、断にすることができなかった。
一般に、起動シーケンスを制御する電源ＩＣや制御ＩＣは有していていても、異種電源ＩＣ間の制御や、停止時の電圧降下時間の制御はできない場合が多い。 Further, when an emergency stop is required at the time of a malfunction of the apparatus, even if the power supply circuit 41a and the power supply circuit 41b are stopped, the voltage drop time as shown in FIG. 6 according to the capacitance components of the load circuit 42a and the load circuit 42b. Became tedious and could not immediately turn off the power output.
In general, even if there are power supply ICs and control ICs that control the startup sequence, control between different power supply ICs and control of the voltage drop time at the time of stop are often not possible.

これに対して特許文献１においては、一次側駆動回路に、出力電圧に応じた制御パルス信号でＰＷＭ制御されるメインスイッチを備え、二次側出力回路に、整流スイッチ用ＭＯＳＦＥＴと、還流スイッチ用ＭＯＳＦＥＴと、還流スイッチ用ＭＯＳＦＥＴのゲートに接続されたダイオードと還流ゲートドライバ用スイッチ素子とを備えている。また、スイッチング電源装置は、動作停止時に還流スイッチ用ＭＯＳＦＥＴのゲート・ソース間容量の充電電荷を所定の時定数で放電する放電手段を備えていることによって、動作停止時に出力電圧のアンダーシュート現象の発生を防止できる、スイッチング電源装置が開示されている。   On the other hand, in Patent Document 1, the primary side drive circuit is provided with a main switch that is PWM-controlled by a control pulse signal corresponding to the output voltage, and the secondary side output circuit is provided with a rectifier switch MOSFET and a free wheel switch. A MOSFET, a diode connected to the gate of the return switch MOSFET, and a return gate driver switch element are provided. In addition, the switching power supply device includes discharge means that discharges the charge of the gate-source capacitance of the freewheeling switch MOSFET with a predetermined time constant when the operation is stopped, so that an undershoot phenomenon of the output voltage occurs when the operation is stopped. A switching power supply device that can prevent occurrence is disclosed.

しかしながら、特許文献１記載の技術では、ＭＯＳＦＥＴのゲート・ソース間容量の充電電荷を抜くことは記載されているが、電源の出力ラインに接続されている装置の有する容量成分を放電させることについては記載されていない。   However, in the technique described in Patent Document 1, it is described that the charge of the gate-source capacitance of the MOSFET is removed, but regarding the discharging of the capacitance component of the device connected to the output line of the power supply Not listed.

また、特許文献２においては、複数の電源を決められたシーケンスで停止する制御装置であって、直前に停止する電源の出力電圧と所定の電圧（例えば０．６Ｖ）を比較器で比較し、直前に停止する電源の出力電圧がこの所定の電圧以下になると電源を停止するようにした。負荷に応じて最適な停止シーケンスが自動的に設定できるので、停止時間が短くなり、また負荷に応じてオフタイマーのタイマー時間を再設定する必要がなくなるので、負荷の状態や負荷の容量成分の値によって電源の立ち下がり時間が異なるため、正しいシーケンスで複数の電源を停止させるときに、負荷に応じてオフタイマーのタイマー時間を再設定し、また停止シーケンスを検証しなければならなかったという課題を解決する、電源制御装置が開示されている。   Further, in Patent Document 2, a control device that stops a plurality of power supplies in a predetermined sequence, the output voltage of the power supply that stops immediately before is compared with a predetermined voltage (for example, 0.6 V) by a comparator, The power supply is stopped when the output voltage of the power supply that stops immediately before becomes below this predetermined voltage. Since the optimal stop sequence can be automatically set according to the load, the stop time is shortened and there is no need to reset the timer time of the off timer according to the load. Since the power supply fall time differs depending on the value, when stopping multiple power supplies in the correct sequence, the timer time of the off timer had to be reset according to the load, and the stop sequence had to be verified A power supply control device that solves the problem is disclosed.

しかしながら、特許文献１記載の技術では、複数の電源をオン／オフするタイマを有することは記載されているが、電源の出力ラインに接続されている装置の有する容量成分を放電させることについては記載されていない。   However, in the technique described in Patent Document 1, it is described that a timer for turning on / off a plurality of power supplies is described, but the discharge of the capacitive component of the device connected to the output line of the power supply is described. It has not been.

また、特許文献３においては、起動停止順序制御装置は、起動停止信号と比較信号とを入力信号とする論理和回路、電源装置、電源装置の出力電圧を検出して、検出信号を出力する電圧検出回路、基準電圧と検出信号とを比較して比較信号を出力する比較器からなる電源起動回路、および起動停止信号と比較信号とを入力信号とする論理積回路、電源装置、電源装置の出力電圧を検出して、検出信号を出力する電圧検出回路、基準電圧と検出信号とを比較して比較信号を出力する比較器からなる電源起動回路を含み、各負荷への電源供給をシーケンシャルにオンオフ制御する際、起動時間や停止時間の変動に確実に対処できるので、電源起動回路の起動停止順序を柔軟に制御できる起動停止順序制御装置を提供する、電源起動回路、起動停止順序制御装置、および起動停止順序制御方法が開示されている。   In Patent Document 3, the start / stop sequence control device detects an output voltage of a logical sum circuit, a power supply device, and a power supply device using the start / stop signal and the comparison signal as input signals, and outputs a detection signal. A power supply start circuit comprising a detection circuit, a comparator that compares a reference voltage and a detection signal and outputs a comparison signal, and a logical product circuit that receives the start / stop signal and the comparison signal as input signals, a power supply device, and an output of the power supply device Includes a voltage detection circuit that detects the voltage and outputs a detection signal, and a power supply startup circuit that consists of a comparator that compares the reference voltage and the detection signal and outputs a comparison signal. Power supply to each load is turned on and off sequentially. When controlling, it is possible to reliably deal with fluctuations in the start time and stop time, so it provides a start / stop order control device that can flexibly control the start / stop order of the power start circuit, power start circuit, start / stop Introduction controller, and start-stop sequence control method is disclosed.

しかしながら、特許文献３記載の技術では、複数の電源をオン／オフする制御回路を有することは記載されているが、電源の出力ラインに接続されている装置の有する容量成分を放電させる機能を備えることはは記載されていない。   However, although the technique described in Patent Document 3 describes that a control circuit for turning on / off a plurality of power supplies is provided, it has a function of discharging a capacitance component of a device connected to an output line of the power supply. That is not described.

また、特許文献４においては、電源投入／切断設定によって一以上の接続装置を電源投入および電源切断させる電源制御装置が、電源投入設定から接続装置すべてが電源投入起動処理を完了するまでの投入過程時間を超える時間が設定されて電源投入設定によってタイマ計時を開始する投入過程タイマ回路と、電源切断設定から接続装置すべてが電源切断停止処理を完了するまでの切断過程時間を超える時間が設定されて電源切断設定によってタイマ計時を開始する切断過程タイマ回路と、投入過程タイマ回路でのタイマ計時中の電源切断設定を無効化する切断入力無効化回路と、切断過程タイマ回路でのタイマ計時中の電源投入設定を無効化する投入入力無効化回路とを有する、情報処理システムの電源投入／切断を制御する電源制御装置および電源制御方法に関し、電源投入／切断シーケンス途中に発生する不測の電源切断／投入条件を回避させる、電源制御装置および電源制御方法が開示されている。   Further, in Patent Document 4, a power control device that powers on and off one or more connection devices by power on / off settings is a power-on process from power-on settings until all connected devices complete power-on startup processing. When the time exceeding the time is set and the power-on setting starts the timer process timer circuit, and the time exceeding the power-off setting time from the power-off setting until all connected devices complete the power-off stop processing is set Disconnection process timer circuit that starts timer timing by power-off setting, disconnection input invalidation circuit that invalidates power-off setting during timer timing in on-process timer circuit, and power supply during timer timing in disconnection process timer circuit Power supply control device for controlling power on / off of information processing system, having power input invalidation circuit for invalidating power input setting It relates and power control method, to avoid accidental power off / conditions that occur during power-on / off sequence, power supply control device and a power control method is disclosed.

しかしながら、特許文献４記載の技術では、複数の電源をオン／オフするタイマを有することは記載されているが、電源の出力ラインに接続されている装置の有する容量成分を放電させる機能を備えることはは記載されていない。   However, although the technique described in Patent Document 4 describes that a timer for turning on / off a plurality of power supplies is described, it has a function of discharging a capacitance component of a device connected to an output line of the power supply. Is not listed.

また、特許文献５においては、負荷の電源として大容量蓄電素子を内蔵した大容量蓄電素子内蔵機器の大容量蓄電素子と並列に強制放電手段を接続した。強制放電手段は、大容量蓄電素子が充電されたまま長時間放置されないように、大容量蓄電素子内の電荷を強制的に放電させる。大容量蓄電素子の充電は、充電装置からの充電電流によって行われるので、電源として用いる化学的な反応を伴わずに電荷の蓄積が可能で、かつ前記のように電荷の放電が可能な大容量蓄電素子の容量劣化が少ない大容量蓄電素子を提供する、大容量蓄電素子内蔵機器が開示されている。   Further, in Patent Document 5, forcible discharge means is connected in parallel with the large-capacity storage element of the large-capacity storage element built-in device having a large-capacity storage element as a load power source. The forced discharge means forcibly discharges the charge in the large-capacity storage element so that the large-capacity storage element is not left for a long time while being charged. Charging of the large-capacity storage element is performed by a charging current from the charging device, so that it is possible to accumulate charges without chemical reaction used as a power source, and to discharge the charges as described above A device with a built-in large-capacity storage element that provides a large-capacity storage element with less capacity deterioration of the storage element is disclosed.

しかしながら、特許文献５記載の技術では、大容量蓄電素子を負荷側の電源として内蔵した機器における強制放電手段については記載されているが、複数の電源の起動／停止を制御する電源制御装置とは異なっている。   However, the technique disclosed in Patent Document 5 describes forced discharge means in a device that incorporates a large-capacity storage element as a power supply on the load side. What is a power supply control device that controls start / stop of a plurality of power supplies? Is different.

特開２００２−１３６１１５号公報JP 2002-136115 A 特開２００３−２４８５１８号公報JP 2003-248518 A 特開２００５−２５３１２４号公報JP-A-2005-253124 特開２００７−２４４１６７号公報JP 2007-244167 A 特開平０９−２１５１９０号公報JP 09-215190 A

このように、停止時の電圧制御が必要となる場合に停止する順番を制御する回路と、停止する時間（電圧降下時間）を制御する回路とを有する、複数の電源で構成される電子装置における、従来の電源制御方式では、要求される停止時の電圧制御を行う際に、両電源回路間で電圧降下時間にばらつきがあり、停止シーケンス時の電圧が逆転したり、電圧降下時間が冗漫になって電源出力を即断することができなかったりすることがあるという問題があった。   As described above, in an electronic device including a plurality of power supplies, including a circuit that controls the order of stopping when voltage control at the time of stopping is necessary, and a circuit that controls the time to stop (voltage drop time) In the conventional power control method, when the required voltage control at the time of stop is performed, the voltage drop time varies between both power supply circuits, the voltage at the stop sequence is reversed, or the voltage drop time is tedious As a result, there was a problem that the power output could not be cut immediately.

この発明はこのような事情に鑑みてなされたものであって、負荷回路がそれぞれ放電回路を有し、停止時に放電回路が負荷の有する容量成分を強制的に放電することによって電圧降下を制御して、上記のような問題を起こさないようにする、電源制御方式を提供することを目的としている。   The present invention has been made in view of such circumstances, and each load circuit has a discharge circuit. When the circuit is stopped, the discharge circuit forcibly discharges the capacitive component of the load to control the voltage drop. Therefore, an object of the present invention is to provide a power supply control system that does not cause the above problems.

上記課題を解決するため、この発明の第１の構成は、並列に設けられた複数の電源回路の出力側に、前記各電源回路にそれぞれ接続された負荷回路が持つ容量成分の電荷を放電させて負荷回路の電圧を降下させる放電回路を設けて、各電源回路における停止時のシーケンスを制御することによって、要求される停止時の電源回路出力電圧変動を制御する電源制御回路に係り、各電源回路の起動停止を制御する起動停止制御回路と、各電源回路の出力電圧を監視する電圧監視回路と、各放電回路の放電動作を制御する放電制御回路と、前記各放電回路の放電電流を検出する放電電流検出回路とを備えてなることを特徴としている。 In order to solve the above-described problem, according to a first configuration of the present invention, a charge of a capacitive component of a load circuit connected to each of the power supply circuits is discharged to the output side of a plurality of power supply circuits provided in parallel. Te provided discharge circuit for lowering the voltage of the load circuit, by a control child sequence at stop in the power supply circuits, relates to a power control circuit for controlling the power supply circuit output voltage variation during stop required, the A start / stop control circuit that controls start / stop of the power supply circuit, a voltage monitoring circuit that monitors the output voltage of each power supply circuit, a discharge control circuit that controls the discharge operation of each discharge circuit, and a discharge current of each discharge circuit And a discharge current detection circuit for detection .

また、この発明の第２の構成は、並列に設けられた複数の電源回路の出力側に、前記各電源回路にそれぞれ接続された負荷回路が持つ容量成分の電荷を放電させて負荷回路の電圧を降下させる放電回路を設けて、各電源回路における停止時のシーケンスを制御することによって、要求される停止時の電源回路出力電圧変動を制御する電源制御方法に係り、さらに、起動停止制御回路と電圧監視回路と放電制御回路と放電電流検出回路とを設け、前記起動停止制御回路に各電源回路の起動停止を制御させ、前記電圧監視回路に各電源回路の出力電圧を監視する電圧監視回路させ、前記放電制御回路に各放電回路の放電動作を制御させ、かつ、前記放電電流検出回路に前記各放電回路の放電電流を検出させることを特徴としている。 According to the second configuration of the present invention, the charge of the capacitance component of the load circuit connected to each of the power supply circuits is discharged to the output side of the plurality of power supply circuits provided in parallel to provided discharge circuit for lowering, by the control child sequence at stop in the power supply circuits, it relates to a power control method for controlling the power supply circuit output voltage variation during stop required, further, start-stop control circuit And a voltage monitoring circuit, a discharge control circuit, and a discharge current detection circuit, causing the start / stop control circuit to control the start / stop of each power supply circuit, and causing the voltage monitoring circuit to monitor the output voltage of each power supply circuit The discharge control circuit controls the discharge operation of each discharge circuit, and the discharge current detection circuit detects the discharge current of each discharge circuit .

この発明によれば、両電源回路の停止シーケンスに合わせて、対応する両放電回路がそれぞれの電源回路の容量成分を放電し、規定時間内に出力電圧を降下させることによって、要求される電源降下のシーケンスを確保することが可能になる。
また、各放電回路の放電電流と放電時間を検出することによって、異常放電（例えば電源回路動作中に放電回路が起動したような場合）を判断して、緊急停止することが可能になる。
さらに、各放電回路内に放電時間の異なる複数の放電回路部を備えることによって、通常停止シーケンス時の停止時間と緊急停止時の停止時間を使い分けることが可能になる。 According to the present invention, in accordance with the stop sequence of both power supply circuits, the corresponding both discharge circuits discharge the capacity components of the respective power supply circuits and drop the output voltage within a specified time, whereby the required power supply drop It is possible to secure a sequence of
Further, by detecting the discharge current and discharge time of each discharge circuit, it is possible to determine an abnormal discharge (for example, when the discharge circuit is activated during the operation of the power supply circuit) and to make an emergency stop.
Furthermore, by providing a plurality of discharge circuit units having different discharge times in each discharge circuit, it is possible to use properly the stop time at the normal stop sequence and the stop time at the emergency stop.

この発明の電源制御方式の構成を示すブロック図である。It is a block diagram which shows the structure of the power supply control system of this invention. この発明の電源制御方式における放電回路の実施形態を示す図である。It is a figure which shows embodiment of the discharge circuit in the power supply control system of this invention. この発明の電源制御方式による起動／停止シーケンスのタイムチャートと電圧遷移の例を示す図である。It is a figure which shows the example of the time chart and voltage transition of the start / stop sequence by the power supply control system of this invention. 従来の電源制御方式の回路構成を示すブロック図である。It is a block diagram which shows the circuit structure of the conventional power supply control system. 従来の電源制御方式における要求シーケンスの電圧遷移を示す図である。It is a figure which shows the voltage transition of the request | requirement sequence in the conventional power supply control system. 従来の電源制御方式による動作タイムチャートと電圧遷移とを示す図である。It is a figure which shows the operation time chart and voltage transition by the conventional power supply control system.

実施形態Embodiment

以下、図１乃至図３に基づいてこの発明の実施形態を説明する。
この発明の電源制御方式は、図１に示すように、異なる電圧を必要とする負荷回路１２ａ，１２ｂに対して、両負荷回路にそれぞれ電圧を供給する電源回路１１ａ，１１ｂと、両電源回路の起動／停止時間を制御する起動／停止制御回路１３１と、電圧監視回路１３２と放電制御回路１３３を有するシーケンス制御回路１３と、各負荷回路１２ａ，１２ｂのそれぞれの容量成分の電荷を放電する放電回路１４ａ，１４ｂａを備えている。 Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 3.
As shown in FIG. 1, the power supply control system of the present invention includes power supply circuits 11a and 11b that supply voltages to both load circuits, respectively, for load circuits 12a and 12b that require different voltages. A start / stop control circuit 131 for controlling the start / stop time, a sequence control circuit 13 having a voltage monitoring circuit 132 and a discharge control circuit 133, and a discharge circuit for discharging the charge of each capacitive component of each load circuit 12a, 12b. 14a and 14ba are provided.

さらに図２に示すように、放電回路１４ａは、放電回路１４３ａと、放電電流検出回路１４１ａと、放電時間検出回路１４２ａを有している。
なお、図示省略されているが、放電回路１４ｂも、同様の構成を有している。 Further, as shown in FIG. 2, the discharge circuit 14a includes a discharge circuit 143a, a discharge current detection circuit 141a, and a discharge time detection circuit 142a.
Although not shown, the discharge circuit 14b has the same configuration.

以下、図１乃至図３を参照して、本発明の電源制御方式の動作を説明する。
負荷回路１２ａ，１２ｂを有する電子機器装置において、両負荷回路間の起動／停止シーケンスには、以下に示す要求があるものとする。
(1) 起動時：負荷回路１２ａは、負荷回路１２ｂよりも先に電圧が確定すること。
(2) 停止時：負荷回路１２ｂは、負荷回路１２ａよりも先に電圧が降下し、負荷回路１２ｂの電圧が負荷回路１２ａの電圧を下回ってから、負荷回路１２ａの電圧が降下すること。
負荷回路１２ｂの電圧は、負荷回路１２ａの電圧が完全に降下するまで、負荷回路１２ａの電圧を上回らないこと。 The operation of the power supply control system of the present invention will be described below with reference to FIGS.
In the electronic apparatus having the load circuits 12a and 12b, the start / stop sequence between the load circuits has the following requirements.
(1) At start-up: The voltage of the load circuit 12a is determined before the load circuit 12b.
(2) When stopped: The voltage of the load circuit 12b drops before the load circuit 12a, and the voltage of the load circuit 12a drops after the voltage of the load circuit 12b falls below the voltage of the load circuit 12a.
The voltage of the load circuit 12b should not exceed the voltage of the load circuit 12a until the voltage of the load circuit 12a has dropped completely.

まず、電源回路１１ａ，電源回路１１ｂと、シーケンス制御回路１３に電源が投入され、上位装置から起動信号１８がアサートされると、シーケンス制御回路１３が起動信号１５ａをアサートし、電源回路１１ａを起動させる。電源回路１１ａの出力電圧が規定値に達すると、電源回路１１ａは電圧監視信号１６ａをアサートする。   First, when power is turned on to the power supply circuit 11a, the power supply circuit 11b, and the sequence control circuit 13, and the activation signal 18 is asserted from the host device, the sequence control circuit 13 asserts the activation signal 15a and activates the power supply circuit 11a. Let When the output voltage of the power supply circuit 11a reaches a specified value, the power supply circuit 11a asserts the voltage monitoring signal 16a.

シーケンス制御回路１３は、電圧監視信号１６ａがアサートされると、起動信号１５ｂをアサートし、順次、電源回路を起動させる。このとき、放電制御信号１７ａ，放電制御信号１７ｂはディアサートされており、放電回路１４ａ，放電回路１４ｂは停止している。   When the voltage monitoring signal 16a is asserted, the sequence control circuit 13 asserts the activation signal 15b and sequentially activates the power supply circuit. At this time, the discharge control signal 17a and the discharge control signal 17b are deasserted, and the discharge circuit 14a and the discharge circuit 14b are stopped.

電源回路１１ａ，電源回路１１ｂと、シーケンス制御回路１３の電源電圧が規定値まで降下するか、上位装置から起動信号Ａ１８がディアサートされると、シーケンス制御回路１３が起動信号１５ｂをディアサートし、電源回路１１ｂが停止して電源回路１１ｂの出力電圧が降下する。
電源回路１１ｂの出力電圧が降下して規定の電圧を下回ると、電源監視信号１６ｂがディアサートされて、シーケンス制御回路１３内の放電制御回路１３３は、放電制御信号１７ｂをアサートする。 When the power supply voltage of the power supply circuit 11a, the power supply circuit 11b, and the sequence control circuit 13 drops to a specified value or when the activation signal A18 is deasserted from the host device, the sequence control circuit 13 deasserts the activation signal 15b, The power supply circuit 11b stops and the output voltage of the power supply circuit 11b drops.
When the output voltage of the power supply circuit 11b drops and falls below a specified voltage, the power supply monitoring signal 16b is deasserted, and the discharge control circuit 133 in the sequence control circuit 13 asserts the discharge control signal 17b.

放電制御信号１７ｂのアサートによって、放電回路１４ｂの有する放電回路１１３ａが電源回路１１ｂの容量成分の電荷を放電し、電源回路１４ｂの電圧を規定時間内に降下させる。
引き続き、電源回路１１ａの電圧を同様の停止シーケンスによって降下させる。 By the assertion of the discharge control signal 17b, the discharge circuit 113a included in the discharge circuit 14b discharges the charge of the capacitance component of the power supply circuit 11b, and drops the voltage of the power supply circuit 14b within a specified time.
Subsequently, the voltage of the power supply circuit 11a is lowered by a similar stop sequence.

また、図２に示すように、放電回路１４ａ内の放電回路１４３ａが放電されている場合、放電電流検出回路１４１ａと放電時間検出回路１４２ａによって、規定値以上の放電電流または放電時間が検出された場合は、アラーム信号１９ａがシーケンス制御回路１３に通知される。
放電回路１４ｂも同様の機能を有している。 As shown in FIG. 2, when the discharge circuit 143a in the discharge circuit 14a is discharged, the discharge current detection circuit 141a and the discharge time detection circuit 142a detect a discharge current or discharge time that is equal to or greater than a specified value. In this case, the alarm signal 19a is notified to the sequence control circuit 13.
The discharge circuit 14b has a similar function.

この発明は、複数の電源回路を持ち、停止時に規定のシーケンスに従うことが要求されるデバイスを有する電気機器装置において広く利用可能なものである。   The present invention can be widely used in an electrical apparatus having a plurality of power supply circuits and a device that is required to follow a prescribed sequence when stopped.

１１ａ 電源回路Ａ
１１ｂ 電源回路Ｂ
１２ａ 負荷回路Ａ
１２ｂ 負荷回路Ｂ
１３ シーケンス制御回路
１３１ 起動／停止制御回路
１３２ 電圧監視回路
１３３ 放電制御回路
１４ａ 放電回路Ａ
１４ｂ 放電回路Ｂ
１５ａ 電圧監視信号
１５ｂ 電圧監視信号
１６ａ 起動信号
１６ｂ 起動信号
１７ａ 放電信号
１７ｂ 放電信号
１８ 起動信号Ａ
１９ａ アラーム信号
１９ｂ アラーム信号
１４１ａ 放電電流検出回路
１４２ａ 放電時間検出回路
１４３ａ 放電回路 11a Power circuit A
11b Power supply circuit B
12a Load circuit A
12b Load circuit B
13 Sequence Control Circuit 131 Start / Stop Control Circuit 132 Voltage Monitoring Circuit 133 Discharge Control Circuit 14a Discharge Circuit A
14b Discharge circuit B
15a Voltage monitor signal 15b Voltage monitor signal 16a Start signal 16b Start signal 17a Discharge signal 17b Discharge signal 18 Start signal A
19a Alarm signal 19b Alarm signal 141a Discharge current detection circuit 142a Discharge time detection circuit 143a Discharge circuit

Claims (8)

並列に設けられた複数の電源回路の出力側に、前記各電源回路にそれぞれ接続された負荷回路が持つ容量成分の電荷を放電させて負荷回路の電圧を降下させる放電回路を設けて、各電源回路における停止時のシーケンスを制御することによって、要求される停止時の電源回路出力電圧変動を制御する電源制御回路であって、
各電源回路の起動停止を制御する起動停止制御回路と、
各電源回路の出力電圧を監視する電圧監視回路と、
各放電回路の放電動作を制御する放電制御回路と、
前記各放電回路の放電電流を検出する放電電流検出回路とを備えてなることを特徴とする電源制御回路。 Discharge circuits that discharge the charge of the capacitive component of the load circuit connected to each of the power supply circuits and drop the voltage of the load circuit are provided on the output side of the plurality of power supply circuits provided in parallel. by a control child sequence at stop in the circuit, a power supply control circuit for controlling the power supply circuit output voltage variation during stop required,
A start / stop control circuit for controlling the start / stop of each power supply circuit;
A voltage monitoring circuit for monitoring the output voltage of each power supply circuit;
A discharge control circuit for controlling the discharge operation of each discharge circuit;
A power supply control circuit comprising: a discharge current detection circuit that detects a discharge current of each discharge circuit. 前記放電電流検出回路で検出された放電電流の放電時間を検出する放電時間検出回路をさらに備えてなることを特徴とする請求項１記載の電源制御回路。 Power control circuit according to claim 1, characterized by being further provided with a discharge time detecting circuit for detecting the discharge time of the detected discharge current in the discharge current detection circuit. 前記放電電流検出回路と前記放電時間検出回路とを、前記放電回路ごとに設けたことを特徴とする請求項２記載の電源制御回路。 The power supply control circuit according to claim 2, wherein the discharge current detection circuit and the discharge time detection circuit are provided for each of the discharge circuits. 前記放電制御回路が、前記放電電流検出回路の検出結果または前記放電時間検出回路の検出結果に応じて放電動作の制御を行うように構成されていることを特徴とする請求項３記載の電源制御回路。 The power supply control according to claim 3 , wherein the discharge control circuit is configured to control a discharge operation in accordance with a detection result of the discharge current detection circuit or a detection result of the discharge time detection circuit. circuit. 並列に設けられた複数の電源回路の出力側に、前記各電源回路にそれぞれ接続された負荷回路が持つ容量成分の電荷を放電させて負荷回路の電圧を降下させる放電回路を設けて、各電源回路における停止時のシーケンスを制御することによって、要求される停止時の電源回路出力電圧変動を制御する電源制御方法であって、
さらに、起動停止制御回路と電圧監視回路と放電制御回路と放電電流検出回路とを設け、
前記起動停止制御回路に各電源回路の起動停止を制御させ、
前記電圧監視回路に各電源回路の出力電圧を監視する電圧監視回路させ、
前記放電制御回路に各放電回路の放電動作を制御させ、かつ、
前記放電電流検出回路に前記各放電回路の放電電流を検出させることを特徴とする電源制御方法。 Discharge circuits that discharge the charge of the capacitive component of the load circuit connected to each of the power supply circuits and drop the voltage of the load circuit are provided on the output side of the plurality of power supply circuits provided in parallel. by a control child sequence at stop in the circuit, a required power control method for controlling the power supply circuit output voltage fluctuation when stopped by,
Furthermore, a start / stop control circuit, a voltage monitoring circuit, a discharge control circuit, and a discharge current detection circuit are provided,
The start / stop control circuit controls the start / stop of each power supply circuit,
Let the voltage monitoring circuit monitor the output voltage of each power supply circuit,
Let the discharge control circuit control the discharge operation of each discharge circuit; and
A power supply control method comprising causing the discharge current detection circuit to detect a discharge current of each of the discharge circuits . 放電時間検出回路をさらに設け、該放電時間検出回路に前記放電電流検出回路が検出した放電電流の放電時間を検出させることを特徴とする請求項５記載の電源制御方法。 6. The power supply control method according to claim 5 , further comprising a discharge time detection circuit, and causing the discharge time detection circuit to detect a discharge time of the discharge current detected by the discharge current detection circuit. 前記放電電流検出回路と前記放電時間検出回路とを、前記放電回路ごとに設けることを特徴とする請求項６記載の電源制御方法。 The power supply control method according to claim 6, wherein the discharge current detection circuit and the discharge time detection circuit are provided for each of the discharge circuits. 前記放電制御回路に、前記放電電流検出回路の検出結果または前記放電時間検出回路の検出結果に応じて放電動作の制御を行わせることを特徴とする請求項７記載の電源制御方法。 Wherein the discharge control circuit, the discharge current detection result or the power control method according to claim 7, wherein the cause I line control of the discharge operation in accordance with a detection result of the discharge time detection circuit of the detection circuit.
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