JP6294540B1 - Manufacturing method and structure of lead frame with wiring - Google Patents
Manufacturing method and structure of lead frame with wiring Download PDFInfo
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- JP6294540B1 JP6294540B1 JP2017115126A JP2017115126A JP6294540B1 JP 6294540 B1 JP6294540 B1 JP 6294540B1 JP 2017115126 A JP2017115126 A JP 2017115126A JP 2017115126 A JP2017115126 A JP 2017115126A JP 6294540 B1 JP6294540 B1 JP 6294540B1
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 38
- 239000002184 metal Substances 0.000 claims abstract description 47
- 229910052751 metal Inorganic materials 0.000 claims abstract description 47
- 230000000149 penetrating effect Effects 0.000 claims abstract description 33
- 239000000758 substrate Substances 0.000 claims abstract description 13
- 238000003825 pressing Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 13
- 239000004033 plastic Substances 0.000 claims description 13
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 7
- 239000003822 epoxy resin Substances 0.000 claims description 6
- 229920000647 polyepoxide Polymers 0.000 claims description 6
- 239000003566 sealing material Substances 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 3
- FGUUSXIOTUKUDN-IBGZPJMESA-N C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 Chemical compound C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 FGUUSXIOTUKUDN-IBGZPJMESA-N 0.000 claims 1
- 230000035515 penetration Effects 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 4
- 238000007789 sealing Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229920006336 epoxy molding compound Polymers 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical group [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000010147 laser engraving Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/49524—Additional leads the additional leads being a tape carrier or flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4825—Connection or disconnection of other leads to or from flat leads, e.g. wires, bumps, other flat leads
Abstract
【課題】配線の設計を随時に変更可能であり、配線同士間の間隔を小さくし、製造コストを大幅に低下させて製造の歩留まりを向上させることが可能な配線付きリードフレームの製造方法及びその構造を提供する。【解決手段】本発明に係る配線付きリードフレームの製造方法は、金属基板を用意するステップと、金属基板をプレスして、サイドレールと、金属製チップホルダと、サイドレール及び金属製チップホルダに接続される複数のタイバーと、貫通領域とを有するリードフレームを少なくとも１つ形成するステップと、表面及び裏面を有する載置台を貫通領域内に形成するステップと、載置台の一側面に複数の溝を形成し、載置台の表面及び裏面を貫通する複数の貫通孔を複数の溝に形成するステップと、載置台の表面及び裏面を貫通する配線を載置台の複数の溝及び複数の貫通孔内に形成するステップと、を含む。【選択図】図２A method of manufacturing a lead frame with wiring capable of changing the design of wiring at any time, reducing the interval between the wirings, greatly reducing the manufacturing cost, and improving the manufacturing yield. Provide structure. A method of manufacturing a lead frame with wiring according to the present invention includes a step of preparing a metal substrate, and pressing the metal substrate to form a side rail, a metal chip holder, a side rail, and a metal chip holder. Forming at least one lead frame having a plurality of connected tie bars and a penetrating region; forming a mounting table having a front surface and a back surface in the penetrating region; and a plurality of grooves on one side of the mounting table Forming a plurality of through holes penetrating the front and back surfaces of the mounting table in the plurality of grooves, and wiring passing through the front and back surfaces of the mounting table in the plurality of grooves and the plurality of through holes of the mounting table. Forming. [Selection] Figure 2
Description
本発明は、リードフレームに関し、特に、クワッド・フラット・ノーリード・パッケージ（Ｑｕａｄ Ｆｌａｔ Ｎｏ ｌｅａｄｓ，ＱＦＮ）と呼ばれ、チップを固着させる（Ｃｈｉｐ−ｏｎ−Ｌｅａｄ）ための両面配線のリードフレームの製造方法及びその構造に関する。 BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame, and more particularly to a method of manufacturing a double-sided lead frame for fixing a chip, referred to as a quad flat no lead (QFN). And its structure.
既存のＩＣ半導体チップまたはＬＥＤの発光チップを封止する場合、以下の方法が知られている。既存の封止方法では、チップをリードフレームに固着した後、金線をボンディングしてチップをインナーリード配線に電気的に接続させる。次いで、樹脂によってチップ及びリードフレームにパッケージを形成する。その後、パッケージをダイシングして個々の半導体素子に分割する。 When sealing an existing IC semiconductor chip or LED light-emitting chip, the following methods are known. In the existing sealing method, after fixing the chip to the lead frame, a gold wire is bonded to electrically connect the chip to the inner lead wiring. Next, a package is formed on the chip and the lead frame with resin. Thereafter, the package is diced and divided into individual semiconductor elements.
リードフレームの製造は、上記半導体素子の製造コストや歩留まりに深く繋がっている。従来のリードフレーム２００（図１を参照）は、金属基板１００をプレス加工またはエッチング加工することで製造される。製造されたリードフレーム２００は、サイドレール２０１を有する。サイドレール２０１には、複数のタイバー（Ｔｉｅ ｂａｒ）２０２が接続される。また、これらタイバー２０２は、１つの金属製チップホルダ２０３に接続される。なお、これらタイバー２０２同士間及び金属製チップホルダ２０３の四辺には、サイドレール２０１で接続されるピン２０４が設けられる。プレス加工またはエッチング加工されたリードフレーム２００に電気めっき処理、粗化処理を順次に施すことで、後製造されるチップ及びプラスチックとリードフレーム２００との結合性が優れ、後工程のチップ固着やワイヤ・ボンディング、シール加工を容易に行うことができる。 The manufacture of the lead frame is deeply linked to the manufacturing cost and yield of the semiconductor element. A conventional lead frame 200 (see FIG. 1) is manufactured by pressing or etching the metal substrate 100. The manufactured lead frame 200 has side rails 201. A plurality of tie bars 202 are connected to the side rail 201. These tie bars 202 are connected to one metal tip holder 203. Note that pins 204 connected by the side rails 201 are provided between the tie bars 202 and on the four sides of the metal chip holder 203. By subjecting the lead frame 200 that has been press-processed or etched to an electroplating process and a roughening process in sequence, the bonding of the chip and plastic to be manufactured later and the lead frame 200 is excellent. -Bonding and sealing can be performed easily.
しかしながら、上記リードフレーム２００がプレス加工で金型により製造される場合、製造工程が長く、製造困難度が高く、製造の歩留まりが低いほか、ピン２０４同士間の間隔が規制されるため小さくすることができない。 However, when the lead frame 200 is manufactured by a die by pressing, the manufacturing process is long, the manufacturing difficulty is high, the manufacturing yield is low, and the interval between the pins 204 is restricted, so that the lead frame 200 is reduced. I can't.
したがって、本発明は上記従来技術の問題点を解消するために創案されたもので、その主な目的とするところは、ピンの金型の設計・製造が不要となり、リードフレームの設計の自由度が高く、ピンの配線の設計を任意に変更可能であり、ピン同士間の間隔を小さくし、製造コストを大幅に低下させて製造の歩留まりを向上させることが可能な配線付きリードフレームの製造方法及びその構造を提供することにある。 Therefore, the present invention was created to solve the above-mentioned problems of the prior art, and its main purpose is to eliminate the need for pin mold design / manufacturing and to provide freedom in lead frame design. Manufacturing method of lead frame with wiring, which can change the design of the wiring of the pins arbitrarily, reduce the distance between the pins, greatly reduce the manufacturing cost and improve the manufacturing yield And providing its structure.
上記目的を達成するために、本発明の一実施形態に係る配線付きリードフレームの製造方法は、金属基板を用意するステップと、前記金属基板をプレスして、サイドレールと、金属製チップホルダと、前記サイドレール及び前記金属製チップホルダに接続される複数のタイバーと、貫通領域とを有するリードフレームを少なくとも１つ形成するステップと、表面及び裏面を有する載置台を前記貫通領域内に形成するステップと、前記載置台の一側面に複数の溝を形成し、前記載置台の表面及び裏面を貫通する複数の貫通孔を複数の前記溝に形成するステップと、前記載置台の表面及び裏面を貫通する配線を前記載置台の複数の前記溝及び複数の前記貫通孔内に形成するステップと、を含む。 In order to achieve the above object, a method of manufacturing a lead frame with wiring according to an embodiment of the present invention includes a step of preparing a metal substrate, pressing the metal substrate, a side rail, a metal chip holder, Forming a lead frame having at least one lead frame having a plurality of tie bars connected to the side rail and the metal chip holder and a penetrating region, and forming a mounting table having a front surface and a back surface in the penetrating region. Forming a plurality of grooves on one side of the mounting table, forming a plurality of through holes penetrating the front and back surfaces of the mounting table in the plurality of grooves, and forming the front and back surfaces of the mounting table. Forming a penetrating wiring in the plurality of grooves and the plurality of through holes of the mounting table.
上記実施形態では、前記貫通領域は、前記金属製チップホルダの四辺に位置する第１貫通領域と、前記金属製チップホルダに位置する第２貫通領域と、前記サイドレールに位置する第３貫通領域とを含む。 In the said embodiment, the said penetration area | region is the 1st penetration area located in the four sides of the said metal chip holder, the 2nd penetration area located in the said metal chip holder, and the 3rd penetration area located in the said side rail. Including.
上記実施形態では、前記載置台は、プラスチックである。 In the above embodiment, the mounting table is made of plastic.
上記実施形態では、前記プラスチックは、エポキシ樹脂封止材料である。 In the above embodiment, the plastic is an epoxy resin sealing material.
上記実施形態では、複数の前記溝を形成する場合、複数の前記溝の底部及び壁面を粗面に形成する。 In the said embodiment, when forming the said some groove | channel, the bottom part and wall surface of the said some groove | channel are formed in a rough surface.
上記実施形態では、前記配線は、複数の導電線と、複数の前記導電線に電気的に接続され、前記載置台の表面から裏面まで貫通する複数の導電部と、を含む。 In the above embodiment, the wiring includes a plurality of conductive lines and a plurality of conductive portions that are electrically connected to the plurality of conductive lines and penetrate from the front surface to the back surface of the mounting table.
上記実施形態では、前記載置台の裏面にある複数の前記導電部の表面にスズ材を加工することで複数の導電端子を形成するステップをさらに含む。 In the said embodiment, the step which forms a some conductive terminal further by processing a tin material in the surface of the said some conductive part in the back surface of the mounting base is further included.
上記目的を達成するために、本発明の他の実施形態に係る配線付きリードフレーム構造は、リードフレームと、載置台と、配線とを含む。前記リードフレームは、サイドレールと、金属製チップホルダと、前記サイドレール及び前記金属製チップホルダに接続される複数のタイバーと、貫通領域とを有する。前記載置台は、前記貫通領域に設けられ、複数の溝が形成される表面と、裏面とを有する。各前記溝には、貫通孔が設けられる。複数の前記貫通孔は、前記載置台の前記表面及び前記裏面を貫通する。前記配線は、複数の前記溝及び複数の前記貫通孔内に設けられ、前記載置台の前記表面及び前記裏面を貫通する。 In order to achieve the above object, a lead frame structure with wiring according to another embodiment of the present invention includes a lead frame, a mounting table, and wiring. The lead frame includes a side rail, a metal chip holder, a plurality of tie bars connected to the side rail and the metal chip holder, and a through region. The mounting table is provided in the penetrating region and has a front surface on which a plurality of grooves are formed and a back surface. Each groove is provided with a through hole. The plurality of through holes penetrate the front surface and the back surface of the mounting table. The wiring is provided in the plurality of grooves and the plurality of through holes, and penetrates the front surface and the back surface of the mounting table.
上記実施形態では、前記貫通領域は、前記金属製チップホルダの四辺に位置する第１貫通領域と、前記金属製チップホルダに位置する第２貫通領域と、前記サイドレールに位置する第３貫通領域とを含む。 In the said embodiment, the said penetration area | region is the 1st penetration area located in the four sides of the said metal chip holder, the 2nd penetration area located in the said metal chip holder, and the 3rd penetration area located in the said side rail. Including.
上記実施形態では、複数の前記溝は、前記第１貫通領域の前記載置台の表面に位置する。複数の前記溝の底面及び壁面は、粗面である。 In the said embodiment, the said some groove | channel is located in the surface of the mounting base mentioned above of the said 1st penetration area | region. The bottom surfaces and wall surfaces of the plurality of grooves are rough surfaces.
上記実施形態では、前記載置台は、プラスチックである。 In the above embodiment, the mounting table is made of plastic.
上記実施形態では、前記プラスチックは、エポキシ樹脂封止材料である。 In the above embodiment, the plastic is an epoxy resin sealing material.
上記実施形態では、前記配線は、複数の前記溝内に設けられる複数の導電線と、複数の前記貫通孔内に設けられる複数の導電部と、を含む。 In the above embodiment, the wiring includes a plurality of conductive lines provided in the plurality of grooves and a plurality of conductive portions provided in the plurality of through holes.
上記実施形態では、前記載置台の裏面まで貫通する複数の前記導電部に電気的に固着される複数の導電端子をさらに含む。 In the said embodiment, the some conductive terminal electrically fixed to the said some conductive part penetrated to the back surface of the said mounting base is further included.
本発明に係る配線付きリードフレーム構造によれば、配線の設計を随時に変更可能であり、配線同士間の間隔を小さくし、製造コストを大幅に低下させて製造の歩留まりを向上させることができる。 According to the leadframe structure with wiring according to the present invention, the design of the wiring can be changed at any time, the distance between the wirings can be reduced, the manufacturing cost can be greatly reduced, and the manufacturing yield can be improved. .
以下、本発明の技術内容及び詳細な説明について、図面を参照しつつ説明する。
図２は、本発明に係る配線付きリードフレームの製造方法を示すフローチャートである。図２〜図１２を参照しながら、本発明に係る配線付きリードフレームの製造方法を詳しく説明する。図２〜図１２に示すように、本発明に係る配線付きリードフレームの製造方法では、金属基板１０を先にプレスしてリードフレーム１を成形し、次いでリードフレーム１内において封止剤を射出して載置台２を形成し、その後、載置台２上にリードフレーム１の配線３を製造する。こうすることで、リードフレーム１の設計の自由度を向上させ、配線３の設計を随時に変更することが可能であり、配線３同士間の間隔を小さくすることができるほか、ピンの製造が不要となり、製造を容易にし、製造コストを大幅に低下させて製造の歩留まりを向上させることができる。
The technical contents and detailed description of the present invention will be described below with reference to the drawings.
FIG. 2 is a flowchart showing a method for manufacturing a lead frame with wiring according to the present invention. A method for manufacturing a lead frame with wiring according to the present invention will be described in detail with reference to FIGS. As shown in FIGS. 2 to 12, in the method for manufacturing a lead frame with wiring according to the present invention, the metal substrate 10 is first pressed to form the lead frame 1, and then the sealant is injected into the lead frame 1. Then, the mounting table 2 is formed, and then the wiring 3 of the lead frame 1 is manufactured on the mounting table 2. In this way, the design flexibility of the lead frame 1 can be improved, the design of the wiring 3 can be changed at any time, the interval between the wirings 3 can be reduced, and the manufacture of pins can be reduced. It becomes unnecessary, facilitating the production, greatly reducing the production cost, and improving the production yield.
まず、ステップＳ１００では、金属基板１０を用意（提供）する。本実施形態において、金属基板１０は、銅金属材である。 First, in step S100, the metal substrate 10 is prepared (provided). In the present embodiment, the metal substrate 10 is a copper metal material.
次に、ステップＳ１０２では、リードフレームを製造する。具体的には、プレス加工により金属基板１０をプレスした後、サイドレール１１と、複数のタイバー（Ｔｉｅ ｂａｒ）１２と、金属製チップホルダ１３と、貫通領域１４とを有するリードフレーム１を少なくとも１つ形成する。複数のタイバー１２は、サイドレール１１及び金属製チップホルダ１３に接続される。貫通領域１４は、金属製チップホルダ１３の四辺に位置する第１貫通領域１４１と、金属製チップホルダ１３に位置する第２貫通領域１４２と、サイドレール１１に位置する第３貫通領域１４３とを含む。 Next, in step S102, a lead frame is manufactured. Specifically, after pressing the metal substrate 10 by pressing, at least one lead frame 1 having a side rail 11, a plurality of tie bars 12, a metal chip holder 13, and a through region 14 is provided. Form one. The plurality of tie bars 12 are connected to the side rail 11 and the metal tip holder 13. The penetrating region 14 includes a first penetrating region 141 located on the four sides of the metal tip holder 13, a second penetrating region 142 located on the metal tip holder 13, and a third penetrating region 143 located on the side rail 11. Including.
次に、ステップＳ１０４では、載置台を製造する。具体的には、プレス加工されたリードフレーム１において、射出法や熱プレス法によりプラスチックを用いて貫通領域１４の第１貫通領域１４１、第２貫通領域１４２及び第３貫通領域１４３内に載置台２を成型する。本実施形態において、プラスチックは、エポキシ樹脂封止材料（Ｅｐｏｘｙ Ｍｏｌｄｉｎｇ Ｃｏｍｐｏｕｎｄ，ＥＭＣ）である。 Next, in step S104, a mounting table is manufactured. Specifically, in the pressed lead frame 1, the mounting table is placed in the first through region 141, the second through region 142, and the third through region 143 of the through region 14 using plastic by an injection method or a hot press method. 2 is molded. In this embodiment, the plastic is an epoxy resin sealing material (Epoxy Molding Compound, EMC).
次に、ステップＳ１０６では、溝及び貫通孔を製造する。具体的には、レーザー彫刻機（未図示）で載置台２の一側面をフォトエッチングすることで、載置台２の一側面に複数の溝２１を形成するとともに各溝２１に貫通孔２２を形成する。これら貫通孔２２は、載置台２の表面及び裏面を貫通する。フォトエッチング時に、複数の溝２１の底面及び壁面を粗面２１１に形成する。粗面２１１は、金属と共に配線３を形成する場合に配線３と確実に結合することができる。 Next, in step S106, a groove and a through hole are manufactured. Specifically, a plurality of grooves 21 are formed on one side surface of the mounting table 2 and a through hole 22 is formed in each groove 21 by photoetching one side surface of the mounting table 2 with a laser engraving machine (not shown). To do. These through holes 22 penetrate the front surface and the back surface of the mounting table 2. At the time of photoetching, the bottom surfaces and wall surfaces of the plurality of grooves 21 are formed on the rough surface 211. The rough surface 211 can be reliably coupled to the wiring 3 when the wiring 3 is formed with metal.
次に、ステップＳ１０８では、配線を製造する。具体的には、載置台２の複数の溝２１及び複数の貫通孔２２を製造した後、薄膜形成法により、複数の溝２１及び複数の貫通孔２２内において金属材料を堆積させて配線３を形成する。配線３は、複数の導電線３１と、複数の導電線３１に電気的に接続される複数の導電部３２とを含む。複数の導電部３２は、載置台２の表面から載置台２の裏面まで貫通する。 Next, in step S108, a wiring is manufactured. Specifically, after the plurality of grooves 21 and the plurality of through holes 22 of the mounting table 2 are manufactured, a metal material is deposited in the plurality of grooves 21 and the plurality of through holes 22 by a thin film forming method to form the wiring 3. Form. The wiring 3 includes a plurality of conductive lines 31 and a plurality of conductive portions 32 that are electrically connected to the plurality of conductive lines 31. The plurality of conductive portions 32 penetrate from the surface of the mounting table 2 to the back surface of the mounting table 2.
最後に、ステップＳ１１０では、導電端子を製造する。具体的には、配線３を製造した後、載置台２の裏面まで貫通する複数の導電部３２の表面においてスズ材料を加工することで導電端子４を形成する。本実施形態では、導電端子４は、スズボールやスズパッドである。 Finally, in step S110, a conductive terminal is manufactured. Specifically, after the wiring 3 is manufactured, the conductive terminal 4 is formed by processing a tin material on the surface of the plurality of conductive portions 32 penetrating to the back surface of the mounting table 2. In the present embodiment, the conductive terminal 4 is a tin ball or a tin pad.
なお、上記各ステップを実行した後、半導体パッケージ技術において、金属製チップホルダ１３にチップを固着し、さらに、ワイヤ・ボンディングによりチップを配線３に電気的に接続するなどの加工を施す。 After executing the above steps, in the semiconductor package technology, the chip is fixed to the metal chip holder 13 and further processed such as electrically connecting the chip to the wiring 3 by wire bonding.
図３〜図１２は、それぞれ本発明に係る配線付きリードフレーム構造の各部分を示す図である。図３〜図１２に示すように、本発明に係る配線付きリードフレーム構造は、リードフレーム１、載置台２、配線３及び複数の導電端子４を含む。 3 to 12 are views showing respective parts of the lead frame structure with wiring according to the present invention. As shown in FIGS. 3 to 12, the lead frame structure with wiring according to the present invention includes a lead frame 1, a mounting table 2, wiring 3 and a plurality of conductive terminals 4.
リードフレーム１は、サイドレール１１、複数のタイバー１２、金属製チップホルダ１３及び貫通領域１４を有する。複数のタイバー１２は、サイドレール１１及び金属製チップホルダ１３に接続される。貫通領域１４は、金属製チップホルダ１３の四辺に位置する第１貫通領域１４１と、金属製チップホルダ１３に位置する第２貫通領域１４２と、サイドレール１１に位置する第３貫通領域１４３とを含む。 The lead frame 1 includes a side rail 11, a plurality of tie bars 12, a metal chip holder 13, and a through region 14. The plurality of tie bars 12 are connected to the side rail 11 and the metal tip holder 13. The penetrating region 14 includes a first penetrating region 141 located on the four sides of the metal tip holder 13, a second penetrating region 142 located on the metal tip holder 13, and a third penetrating region 143 located on the side rail 11. Including.
載置台２は、リードフレーム１の貫通領域１４に設けられ、第１貫通領域１４１の載置台２の表面に位置する複数の溝２１を有する。複数の溝２１の底面及び壁面は、粗面２１１に形成される。粗面２１１は、金属と共に配線３を形成する場合に配線３と確実に結合される。各溝２１には、載置台２の表面及び裏面を貫通する貫通孔２２が設けられる。本実施形態において、載置台２はプラスチックから成形される。なお、プラスチックは、エポキシ樹脂封止材料（Ｅｐｏｘｙ Ｍｏｌｄｉｎｇ Ｃｏｍｐｏｕｎｄ，ＥＭＣ）である。 The mounting table 2 is provided in the penetrating region 14 of the lead frame 1 and has a plurality of grooves 21 positioned on the surface of the mounting table 2 in the first penetrating region 141. The bottom surfaces and wall surfaces of the plurality of grooves 21 are formed on the rough surface 211. The rough surface 211 is securely coupled to the wiring 3 when the wiring 3 is formed with metal. Each groove 21 is provided with a through hole 22 that penetrates the front surface and the back surface of the mounting table 2. In the present embodiment, the mounting table 2 is molded from plastic. In addition, plastic is an epoxy resin sealing material (Epoxy Molding Compound, EMC).
配線３は、複数の溝２１内に設けられる複数の導電線３１と、複数の貫通孔２２内に設けられる複数の導電部３２とを含む。 The wiring 3 includes a plurality of conductive lines 31 provided in the plurality of grooves 21 and a plurality of conductive portions 32 provided in the plurality of through holes 22.
複数の導電端子４は、載置台２の裏面まで貫通する複数の導電部３２の表面に電気的に固着される。複数の導電端子４は、回路基板（未図示）に電気的に固着される。本実施形態では、導電端子４は、スズボールやスズパッドである。 The plurality of conductive terminals 4 are electrically fixed to the surfaces of the plurality of conductive portions 32 that penetrate to the back surface of the mounting table 2. The plurality of conductive terminals 4 are electrically fixed to a circuit board (not shown). In the present embodiment, the conductive terminal 4 is a tin ball or a tin pad.
これにより、上記載置台２に配線３を製造することで、リードフレーム１の設計の自由度を向上させ、配線３の設計を随時に変更可能であり、配線３同士間の間隔を小さくすることができるほか、ピンの製造が不要となり、製造を容易にし、製造コストを大幅に低下させて製造の歩留まりを向上させることができる。 Thus, by manufacturing the wiring 3 on the mounting table 2 described above, the design flexibility of the lead frame 1 can be improved, the design of the wiring 3 can be changed at any time, and the interval between the wirings 3 can be reduced. In addition, it is not necessary to manufacture pins, facilitating the manufacturing, greatly reducing the manufacturing cost, and improving the manufacturing yield.
以上、本発明の好適な実施形態を説明したが、本発明はこれらの実施形態に限定されるものではない。また、本発明の内容を応用してなされる均等な変更は、すべて本発明の範囲に含まれることはいうまでもない。 The preferred embodiments of the present invention have been described above, but the present invention is not limited to these embodiments. It goes without saying that all equivalent changes made by applying the contents of the present invention are included in the scope of the present invention.
＜従来技術＞
１００ 金属基板
２００ リードフレーム
２０１ サイドレール
２０２ タイバー
２０３ 金属製チップホルダ
２０４ ピン
＜本発明＞
１０ 金属基板
１ リードフレーム
１１ サイドレール
１２ タイバー
１３ 金属製チップホルダ
１４ 貫通領域
１４１ 第１貫通領域
１４２ 第２貫通領域
１４３ 第３貫通領域
２ 載置台
２１ 溝
２１１ 粗面
２２ 貫通孔
３ 配線
３１ 導電線
３２ 導電部
４ 導電端子
<Conventional technology>
100 Metal substrate 200 Lead frame 201 Side rail 202 Tie bar 203 Metal chip holder 204 Pin <Invention>
DESCRIPTION OF SYMBOLS 10 Metal substrate 1 Lead frame 11 Side rail 12 Tie bar 13 Metal chip holder 14 Through region 141 First through region 142 Second through region 143 Third through region 2 Mounting base 21 Groove 211 Rough surface 22 Through hole 3 Wiring 31 Conductive wire 32 Conductive part 4 Conductive terminal
Claims (14)
金属基板を用意するステップａ)と、
前記金属基板をプレスして、サイドレールと、金属製チップホルダと、前記サイドレール及び前記金属製チップホルダに接続される複数のタイバーと、貫通領域とを有するリードフレームを少なくとも１つ形成するステップｂ）と、
表面及び裏面を有する載置台を前記貫通領域内に形成するステップｃ）と、
前記載置台の一側面に複数の溝を形成し、前記載置台の表面及び裏面を貫通する複数の貫通孔を複数の前記溝に形成するステップｄ）と、
前記載置台の表面及び裏面を貫通する配線を前記載置台の複数の前記溝及び複数の前記貫通孔内に形成するステップｅ）と、を含むことを特徴とする、配線付きリードフレームの製造方法。 A method of manufacturing a lead frame with wiring,
A) preparing a metal substrate;
Pressing the metal substrate to form at least one lead frame having a side rail, a metal chip holder, a plurality of tie bars connected to the side rail and the metal chip holder, and a through region. b) and
C) forming a mounting table having a front surface and a back surface in the penetrating region;
A step d) of forming a plurality of grooves on one side surface of the mounting table and forming a plurality of through holes penetrating the front and back surfaces of the mounting table in the plurality of grooves;
And e) forming a wiring penetrating the front and back surfaces of the mounting table in the plurality of grooves and the plurality of through-holes of the mounting table. .
複数の導電線と、
複数の前記導電線に電気的に接続され、前記載置台の表面から裏面まで貫通する複数の導電部と、を含むことを特徴とする請求項１に記載の配線付きリードフレームの製造方法。 The wiring in step e) is
A plurality of conductive wires;
2. The method for manufacturing a lead frame with wiring according to claim 1, comprising: a plurality of conductive portions that are electrically connected to the plurality of conductive wires and penetrate from the front surface to the back surface of the mounting table.
サイドレールと、金属製チップホルダと、前記サイドレール及び前記金属製チップホルダに接続される複数のタイバーと、貫通領域とを有するリードフレームと、
前記貫通領域に設けられ、複数の溝が形成される表面と、裏面とを有し、各前記溝に貫通孔が設けられ、複数の前記貫通孔が前記表面及び前記裏面を貫通する載置台と、
複数の前記溝及び複数の前記貫通孔内に設けられ、前記載置台の前記表面及び前記裏面を貫通する配線と、を含むことを特徴とする配線付きリードフレーム構造。 A lead frame structure with wiring,
A lead frame having a side rail, a metal chip holder, a plurality of tie bars connected to the side rail and the metal chip holder, and a through region;
A mounting table provided in the through region, having a front surface on which a plurality of grooves are formed, and a back surface, each through groove being provided with a through hole, and the plurality of through holes penetrating the front surface and the back surface; ,
A lead frame structure with wiring, which is provided in the plurality of grooves and the plurality of through holes and includes the wiring penetrating the front surface and the back surface of the mounting table.
複数の前記溝の底面及び壁面は粗面であることを特徴とする請求項９に記載の配線付きリードフレーム構造。 The plurality of grooves are located on the surface of the mounting table of the first through region,
The lead frame structure with wiring according to claim 9, wherein bottom surfaces and wall surfaces of the plurality of grooves are rough surfaces.
複数の前記溝内に設けられる複数の導電線と、
複数の前記貫通孔内に設けられる複数の導電部と、を含むことを特徴とする請求項８に記載の配線付きリードフレーム構造。 The wiring is
A plurality of conductive lines provided in the plurality of grooves;
The lead frame structure with wiring according to claim 8, further comprising a plurality of conductive portions provided in the plurality of through holes.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06275765A (en) * | 1993-03-22 | 1994-09-30 | Matsushita Electric Ind Co Ltd | Manufacture of lead frame of semiconductor device |
| JPH08191123A (en) * | 1995-01-12 | 1996-07-23 | Matsushita Electric Ind Co Ltd | Manufacture of lead frame |
| JP2000332145A (en) * | 1999-05-18 | 2000-11-30 | Dainippon Printing Co Ltd | Circuit material for resin-sealed semiconductor device, the resin sealed semiconductor device using the same and manufacturing method for the circuit material |
| JP2014165486A (en) * | 2013-02-26 | 2014-09-08 | Itabashi Seiki Kk | Power device module and manufacturing method thereof |
| WO2016080520A1 (en) * | 2014-11-20 | 2016-05-26 | 日本精工株式会社 | Heat dissipation substrate for mounting electric component |
| JP6259900B1 (en) * | 2016-11-02 | 2018-01-10 | 復盛精密工業股▲ふん▼有限公司 | Lead frame manufacturing method |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0656872B2 (en) * | 1985-03-14 | 1994-07-27 | 九州日立マクセル株式会社 | Lead frame for semiconductor device |
| US5977615A (en) * | 1996-12-24 | 1999-11-02 | Matsushita Electronics Corporation | Lead frame, method of manufacturing lead frame, semiconductor device and method of manufacturing semiconductor device |
| TWI358807B (en) * | 2008-01-30 | 2012-02-21 | Chipmos Technologies Inc | Flip chip quad flat non-leaded package structure a |
| WO2011136236A1 (en) * | 2010-04-26 | 2011-11-03 | パナソニック電工株式会社 | Leadframe, wiring board, light emitting unit, and illuminating apparatus |
| JP6055279B2 (en) * | 2012-11-07 | 2016-12-27 | アピックヤマダ株式会社 | Semiconductor device, semiconductor chip mounting substrate, and manufacturing method thereof |
-
2017
- 2017-05-18 TW TW106116441A patent/TW201901894A/en unknown
- 2017-06-05 CN CN201710414896.1A patent/CN108962862B/en active Active
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Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06275765A (en) * | 1993-03-22 | 1994-09-30 | Matsushita Electric Ind Co Ltd | Manufacture of lead frame of semiconductor device |
| JPH08191123A (en) * | 1995-01-12 | 1996-07-23 | Matsushita Electric Ind Co Ltd | Manufacture of lead frame |
| JP2000332145A (en) * | 1999-05-18 | 2000-11-30 | Dainippon Printing Co Ltd | Circuit material for resin-sealed semiconductor device, the resin sealed semiconductor device using the same and manufacturing method for the circuit material |
| JP2014165486A (en) * | 2013-02-26 | 2014-09-08 | Itabashi Seiki Kk | Power device module and manufacturing method thereof |
| WO2016080520A1 (en) * | 2014-11-20 | 2016-05-26 | 日本精工株式会社 | Heat dissipation substrate for mounting electric component |
| JP6259900B1 (en) * | 2016-11-02 | 2018-01-10 | 復盛精密工業股▲ふん▼有限公司 | Lead frame manufacturing method |
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| CN108962862B (en) | 2020-05-15 |
| CN108962862A (en) | 2018-12-07 |
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