JP6274805B2 - 二重仕事関数半導体デバイスの製造方法 - Google Patents

二重仕事関数半導体デバイスの製造方法 Download PDF

Info

Publication number
JP6274805B2
JP6274805B2 JP2013206863A JP2013206863A JP6274805B2 JP 6274805 B2 JP6274805 B2 JP 6274805B2 JP 2013206863 A JP2013206863 A JP 2013206863A JP 2013206863 A JP2013206863 A JP 2013206863A JP 6274805 B2 JP6274805 B2 JP 6274805B2
Authority
JP
Japan
Prior art keywords
layer
stack
metal layer
work function
tin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2013206863A
Other languages
English (en)
Japanese (ja)
Other versions
JP2014078708A5 (enrdf_load_stackoverflow
JP2014078708A (ja
Inventor
トム・シュラム
クリスチャン・カイヤ
アレッシオ・スペソット
ピエール・ファザン
ラーシュ−アケ・ラグナーション
ロマン・リッツァンタレー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Interuniversitair Microelektronica Centrum vzw IMEC
Original Assignee
Interuniversitair Microelektronica Centrum vzw IMEC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Interuniversitair Microelektronica Centrum vzw IMEC filed Critical Interuniversitair Microelektronica Centrum vzw IMEC
Publication of JP2014078708A publication Critical patent/JP2014078708A/ja
Publication of JP2014078708A5 publication Critical patent/JP2014078708A5/ja
Application granted granted Critical
Publication of JP6274805B2 publication Critical patent/JP6274805B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28176Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the definitive gate conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • H10D84/0177Manufacturing their gate conductors the gate conductors having different materials or different implants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Composite Materials (AREA)
  • Materials Engineering (AREA)
JP2013206863A 2012-10-08 2013-10-02 二重仕事関数半導体デバイスの製造方法 Active JP6274805B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP12187571.0A EP2717308A1 (en) 2012-10-08 2012-10-08 A method for manufacturing a dual work function semiconductor device
EP12187571.0 2012-10-08

Publications (3)

Publication Number Publication Date
JP2014078708A JP2014078708A (ja) 2014-05-01
JP2014078708A5 JP2014078708A5 (enrdf_load_stackoverflow) 2016-11-17
JP6274805B2 true JP6274805B2 (ja) 2018-02-07

Family

ID=47010347

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2013206863A Active JP6274805B2 (ja) 2012-10-08 2013-10-02 二重仕事関数半導体デバイスの製造方法

Country Status (3)

Country Link
US (1) US9245759B2 (enrdf_load_stackoverflow)
EP (1) EP2717308A1 (enrdf_load_stackoverflow)
JP (1) JP6274805B2 (enrdf_load_stackoverflow)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9484427B2 (en) 2014-07-01 2016-11-01 Globalfoundries Inc. Field effect transistors having multiple effective work functions
JP2016054250A (ja) * 2014-09-04 2016-04-14 豊田合成株式会社 半導体装置、製造方法、方法
US9859392B2 (en) 2015-09-21 2018-01-02 Samsung Electronics Co., Ltd. Integrated circuit device and method of manufacturing the same
KR102664033B1 (ko) 2017-02-06 2024-05-07 삼성전자주식회사 반도체 장치 및 그 제조 방법
EP4053891A4 (en) 2021-01-11 2023-01-04 Changxin Memory Technologies, Inc. Method for manufacturing semiconductor structure, and semiconductor structure
EP4276894A4 (en) * 2021-01-11 2024-07-10 Changxin Memory Technologies, Inc. METHOD FOR PRODUCING A SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE
CN114765132A (zh) * 2021-01-11 2022-07-19 长鑫存储技术有限公司 半导体结构制作方法及半导体结构
US12009400B2 (en) 2021-02-14 2024-06-11 Taiwan Semiconductor Manufacturing Company, Ltd. Device providing multiple threshold voltages and methods of making the same

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6794234B2 (en) * 2002-01-30 2004-09-21 The Regents Of The University Of California Dual work function CMOS gate technology based on metal interdiffusion
US7291527B2 (en) * 2005-09-07 2007-11-06 Texas Instruments Incorporated Work function control of metals
JP2009194352A (ja) * 2008-01-17 2009-08-27 Toshiba Corp 半導体装置の製造方法
US20090286387A1 (en) * 2008-05-16 2009-11-19 Gilmer David C Modulation of Tantalum-Based Electrode Workfunction
JP4602440B2 (ja) * 2008-06-12 2010-12-22 パナソニック株式会社 半導体装置及びその製造方法
US7994036B2 (en) * 2008-07-01 2011-08-09 Panasonic Corporation Semiconductor device and fabrication method for the same
JP5314964B2 (ja) * 2008-08-13 2013-10-16 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2010177265A (ja) * 2009-01-27 2010-08-12 Fujitsu Semiconductor Ltd 半導体装置の製造方法
US8309419B2 (en) * 2009-02-04 2012-11-13 Freescale Semiconductor, Inc. CMOS integration with metal gate and doped high-K oxides
JP5329294B2 (ja) * 2009-04-30 2013-10-30 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2010272596A (ja) * 2009-05-19 2010-12-02 Renesas Electronics Corp 半導体装置の製造方法
JP5372617B2 (ja) * 2009-06-24 2013-12-18 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP5432621B2 (ja) * 2009-07-23 2014-03-05 富士通セミコンダクター株式会社 半導体装置の製造方法
DE102009047310B4 (de) * 2009-11-30 2013-06-06 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Austrittsarbeitseinstellung in Gate-Stapeln mit großem ε für Bauelemente mit unterschiedlichen Schwellwertspannungen
US8343865B2 (en) * 2010-01-21 2013-01-01 Renesas Electronics Corporation Semiconductor device having dual work function metal
US8643115B2 (en) * 2011-01-14 2014-02-04 International Business Machines Corporation Structure and method of Tinv scaling for high κ metal gate technology
JP2012186259A (ja) * 2011-03-04 2012-09-27 Renesas Electronics Corp 半導体装置の製造方法および半導体装置
JP5824661B2 (ja) * 2011-03-25 2015-11-25 パナソニックIpマネジメント株式会社 半導体装置及びその製造方法
US8729637B2 (en) * 2011-10-05 2014-05-20 International Business Machines Corporation Work function adjustment by carbon implant in semiconductor devices including gate structure

Also Published As

Publication number Publication date
EP2717308A1 (en) 2014-04-09
US20140106556A1 (en) 2014-04-17
JP2014078708A (ja) 2014-05-01
US9245759B2 (en) 2016-01-26

Similar Documents

Publication Publication Date Title
JP6274805B2 (ja) 二重仕事関数半導体デバイスの製造方法
US8232154B2 (en) Method for fabricating semiconductor device
US8012827B2 (en) Method for fabricating a dual workfunction semiconductor device and the device made thereof
EP2112687B1 (en) Method for fabricating a dual workfunction semiconductor device and the device made thereof
US8304842B2 (en) Interconnection structure for N/P metal gates
US7855134B2 (en) Semiconductor device and manufacturing method of the same
US20100219481A1 (en) Method for manufacturing a dual work function semiconductor device and the semiconductor device made thereof
CN102104061A (zh) 用于场效应晶体管的栅极电极以及场效应晶体管
WO2007009846A1 (en) Cmos transistors with dual high-k gate dielectric and methods of manufacture thereof
US10629713B2 (en) Bipolar junction transistor and method for fabricating the same
US9147679B2 (en) Method of semiconductor integrated circuit fabrication
US10332804B2 (en) Method for manufacturing CMOS structure
US7919379B2 (en) Dielectric spacer removal
US20210202308A1 (en) Semiconductor device
US20100301429A1 (en) Semiconductor device and method of manufacturing the same
US7755145B2 (en) Semiconductor device and manufacturing method thereof
US20090039440A1 (en) Semiconductor device and method of fabricating the same
US8937006B2 (en) Method of semiconductor integrated circuit fabrication
CN104979289A (zh) 一种半导体器件及其制作方法
TWI488240B (zh) 半導體元件的製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20160930

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20160930

A871 Explanation of circumstances concerning accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A871

Effective date: 20160930

A975 Report on accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A971005

Effective date: 20161019

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20161025

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20161102

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20170324

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20170523

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20170822

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20171018

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20171219

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20180109

R150 Certificate of patent or registration of utility model

Ref document number: 6274805

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250