JP6235298B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a trench gate type MOSFET suitable for applications requiring high voltage, large current, and low on-resistance.

  In recent years, MOSFETs having a trench gate structure have been used as switching semiconductor devices that require high voltage, large current, and low on-resistance. FIG. 9 is a cross-sectional view of a conventional trench gate type MOSFET. As shown in FIG. 9, in the transistor portion, a channel region 2 formed by adding p-type impurity ions is formed on a drain region 1 made of an n-type semiconductor region, and an n-type impurity ion is added in the channel region 2. On the semiconductor substrate on which the source region 3 is formed, a trench groove 4 is formed which penetrates the source region 3 and the channel region 2 from the surface to reach the drain region 1.

  In the trench 4, a gate electrode 6 made of polysilicon is buried via a gate insulating film 5 made of a thermal oxide film formed by thermally oxidizing the surface thereof. The gate electrode 6 is drawn to the surface side of the semiconductor device by the gate electrode drawing electrode 7 in the gate electrode drawing portion.

  In the trench gate type MOSFET formed in this way, it is known that the film thickness of the gate insulating film 5 at the corner portion 8 on the surface of the trench groove 4 becomes thin. Further, as schematically shown in FIG. 10, the trench groove 4 has a shape in which the opening dimension is once expanded in the depth direction and then becomes narrower. Therefore, the corner portion 8 has an acute angle, and the electric field concentration is reduced. This occurred and caused the dielectric breakdown of the gate insulating film 5.

  In order to solve such problems, it is necessary to form a thick gate insulating film. For this reason, methods have been proposed in which the gate oxide film is formed at a high temperature exceeding 1000 ° C. or a special process is applied to thicken the gate oxide film. As an example of the latter, Patent Document 1 describes a method of forming a gate oxide film by a hydrochloric acid diluted oxidation method when forming a gate oxide film on a trench groove surface. According to this method, the corner portion on the surface of the trench groove can be formed to be thicker than the gate insulating film inside the trench only by the effect of accelerated oxidation by highly doped impurities.

JP 2000-269499 A

  As a method of increasing the thickness of the gate oxide film, in the method of forming the gate oxide film at a high temperature exceeding 1000 ° C., the thermal diffusion of the channel region 2 occurs due to this heat treatment, and thus there is a problem that the characteristic variation of the semiconductor device increases. It was happening.

  Moreover, in the method described in Patent Document 1, it is necessary to add a special step for oxidation, which causes a problem of increasing the manufacturing cost. Furthermore, after forming a thick gate insulating film in the opening of the trench groove to narrow the opening size, it is necessary to fill the trench groove with polysilicon serving as a gate electrode.

  In recent years, as the miniaturization is required, the opening size of the thick gate insulating film becomes increasingly narrow, and there is a problem that the gate electrode cannot be filled in the trench groove. An object of the present invention is to solve such problems and to provide a trench gate type MOSFET that can be easily formed even in a trench groove having a narrow pitch, and a method for manufacturing the same.

In order to achieve the above object, the invention according to claim 1 of the present application includes a first conductivity type first semiconductor region, a second conductivity type second semiconductor region stacked on the first semiconductor region, A semiconductor substrate having a third semiconductor region of the first conductivity type stacked on the second semiconductor region, and the first semiconductor region penetrating from the third semiconductor region to the second semiconductor region; In a semiconductor device having a trench groove reaching the semiconductor region of the semiconductor device and a gate electrode filled in the trench groove via a gate insulating film formed on the trench groove surface, the semiconductor device is formed at a corner portion of the trench groove surface. The insulating film includes an insulating film in which a part of the gate electrode filled in the trench groove and a part of the surface of the semiconductor substrate are oxidized, and in the center direction of the trench groove upward from the gate insulating film Gradually thicker Characterized in that it comprises.

The invention according to claim 2 of the present application provides a semiconductor substrate provided with a first semiconductor region of the first conductivity type and a second semiconductor region of the second conductivity type stacked on the first semiconductor region. Forming a trench groove from the surface of the semiconductor substrate through the second semiconductor region to the first semiconductor region, oxidizing the trench groove surface to form a gate insulating film, Filling the trench groove with a gate insulating film through the gate insulating film; oxidizing a part of the gate electrode and a part of the second semiconductor region ; gate electrode connected to said gate electrode to remain without being oxidized gate lead portion to elicit a step of forming a thick insulating film gradually becomes thicker towards the center of the trench, the gate electrode on the semiconductor substrate surface toward the Forming an electrode out come, the second semiconductor region surface of the semiconductor substrate surface, characterized in that it comprises a step of forming a third semiconductor region of the first conductivity type, the.

According to a third aspect of the present invention, in the method of manufacturing a semiconductor device according to the second aspect , after the surface of the semiconductor substrate is coated with an oxidation resistant film, an oxidation resistant mask film that opens the trench trench formation region is formed. Using the oxidation-resistant mask film as an etching mask and forming the trench groove, using the oxidation-resistant mask film as a mask and forming a gate insulating film on the trench groove surface; A step of filling a gate electrode in the trench groove and between the oxidation-resistant mask films via a gate insulating film, a portion of the gate electrode between the oxidation-resistant mask films and in the trench groove, and the second oxidizing a portion of the semiconductor region, the corner portion of the trench surface, forming a thick insulating film gradually becomes thicker towards the center of the trench upwardly, the bets Characterized in that it comprises a step of forming the gate electrode lead-out electrode to which the connecting to the gate electrode remains without being oxidized to protrude from the wrench groove, the.

  In the semiconductor device of the present invention, since the insulating film formed at the corner portion of the trench groove surface is thicker than the gate insulating film inside the trench groove 4, the electric field concentration is reduced particularly in the gate electrode lead portion. In addition, the insulating film in the corner portion is prevented from being broken down. Further, in the transistor portion, when the source region 3 is formed, ions implanted obliquely into the side surface of the trench can be shielded, so that the depth of the channel region 3 is determined only by ions implanted from the semiconductor substrate surface, There is an advantage that variation in characteristics can be suppressed.

  The method for manufacturing a semiconductor device according to the present invention does not require high-temperature heat treatment exceeding 1000 ° C., so that there is no re-diffusion of impurities due to heat treatment, and a semiconductor device having no characteristic variation can be formed. There is. In addition, since the gate electrode is filled in the trench groove before the thick insulating film is formed, the gate electrode can be reliably filled in the trench groove even in a semiconductor device having a narrow pitch trench structure.

  Also, when forming the gate electrode, filling the trench groove beyond the semiconductor surface and performing thermal oxidation to form a thick insulating film, the gate electrode remaining unoxidized protrudes from the trench groove surface, The gate lead electrode can be reliably connected.

It is explanatory drawing of the semiconductor device of this invention. It is explanatory drawing of the manufacturing process of the semiconductor device of this invention. It is explanatory drawing of the manufacturing process of the semiconductor device of this invention. It is explanatory drawing of the manufacturing process of the semiconductor device of this invention. It is explanatory drawing of the manufacturing process of the semiconductor device of this invention. It is explanatory drawing of the manufacturing process of the semiconductor device of this invention. It is explanatory drawing of the manufacturing process of the semiconductor device of this invention. It is explanatory drawing of the manufacturing process of the semiconductor device of this invention. It is explanatory drawing of this kind of conventional semiconductor device. It is explanatory drawing of the trench groove | channel formed with the conventional manufacturing method.

  In the semiconductor device according to the present invention, the insulating film formed at the corner of the trench groove surface is an insulating film in which a part of the gate electrode filled in the trench groove and a part of the semiconductor region constituting the channel region 2 are oxidized. It includes a film and is thicker than the gate insulating film inside the trench groove 4. This thick insulating film alleviates electric field concentration in the gate electrode lead-out portion and prevents the insulating film in the corner portion from causing dielectric breakdown. Further, in the transistor portion, when the source region 3 is formed, ions implanted obliquely into the side surface of the trench can be shielded, so that the depth of the channel region 3 is determined only by ions implanted from the semiconductor substrate surface, Variations in characteristics can be suppressed. Examples of the present invention will be described in detail below.

  FIG. 1 is an explanatory view of a trench gate type MOSFET according to the present invention, and is a sectional view of a transistor portion and a gate electrode lead portion. As shown in FIG. 1, in the transistor portion, a channel region 2 made of a p-type semiconductor region is stacked on a drain region 1 made of an n-type semiconductor region, and a source region made of an n-type semiconductor region is formed on the surface thereof. 3 is laminated. A trench groove 4 that penetrates the source region 3 and the channel region 2 from the surface of the source region 3 and reaches the drain region 1 is formed. A gate insulating film 5 is formed on the surface of the trench groove 4, and the gate electrode 6 is filled via the gate insulating film 5. On the other hand, a gate electrode lead-out electrode 7 is formed in the gate electrode lead-out portion so as to be connected to the gate electrode 6. Here, as shown in FIG. 1, a thick insulating film 10 is formed as the insulating film in the corner portion 8 of the gate electrode extraction portion. The thick insulating film 10 is an insulating film formed by oxidizing part of the gate electrode 6 and part of the semiconductor region constituting the channel region 2. As a result, the semiconductor region constituting the channel region that remains without being oxidized has a structure in which the sharp corner portion 8 as described with reference to FIG. Hereinafter, a method for manufacturing the trench gate type MOSFET will be described.

  First, a semiconductor substrate is prepared in which a channel region 2 is formed on a drain region 1 made of an n-type semiconductor region by adding a p-type impurity by, for example, a diffusion method or an ion implantation method. Then, a silicon oxide film 9 having a thickness of 0.5 μm, for example, is formed on the surface of the source region 3 by a thermal oxidation method, and a trench groove formation planned region is opened by a normal photolithography method (FIG. 2). This silicon oxide film 9 becomes an oxidation resistant mask film.

  Next, using the silicon oxide film 9 as an etching mask, a trench groove 4 that penetrates the channel region 2 from the surface of the semiconductor substrate and reaches the drain region 1 is formed. Thereafter, a gate insulating film 5 is formed on the surface of the trench groove 4 in an oxidizing atmosphere at 800 ° C. to 900 ° C. Since this thermal oxidation is performed by a conventional method, the gate insulating film 5 at the corner 8 at the upper end of the trench is thinner than the side wall and bottom of the trench 4 (FIG. 3).

  On the gate insulating film 5 in the trench groove 4, for example, a gate electrode 6 doped with phosphorus as an impurity is formed thicker than the trench groove 4. As an example, the silicon oxide film 9 is formed to a thickness that is about 0.1 μm lower than the surface (FIG. 4).

  Next, the gate electrode 6 is thermally oxidized under the same conditions as those for forming the gate insulating film described above. By this thermal oxidation, a part of the gate electrode 6 and the channel region 2 is oxidized, and the corner portion 8 is also oxidized. As a result, the thin gate insulating film at the corner portion 8 described with reference to FIG. 3 disappears, and a thick insulating film 10 whose thickness gradually increases upward as shown in FIG. 5 is formed. Here, in order to form a gate lead portion in a later step, it is preferable to set the thermal oxidation time so that the gate electrode 6 that remains without being oxidized remains above the surface of the channel region 2.

  Next, the silicon oxide film 9 is etched back to the extent that, for example, a thickness of about 0.05 μm remains, and a part of the gate electrode 6 is exposed. Thereafter, a polysilicon film 11 doped with phosphorus as an impurity is formed on the entire surface and connected to at least the gate electrode 6 of the gate electrode lead portion (FIG. 6).

After the gate lead portion forming region is covered with a mask film (not shown), the exposed polysilicon film 11 is removed by etching, and the exposed gate electrode 6 is removed by etching until the surface of the gate electrode 6 reaches a predetermined depth described later ( FIG. 7).

  Thereafter, impurity ions are implanted into the exposed channel region 2 to form an n-type source region 3. Here, since the thick insulating film 10 remains on the surface of the channel region 2, the obliquely incident ions are blocked and only injection from the vertical direction with respect to the surface is performed. The depth of the source region 3 to be formed is set to be deeper than the surface of the previously formed gate electrode 6 and deeper than the thick insulating film 10.

  Thereafter, the source electrode connected to the source region 3 and the drain electrode connected to the drain region 1 are formed by a normal method, and the trench gate type MOSFET can be completed.

In the trench gate type MOSFET formed in this way, the heat treatment conditions for forming the gate insulating film remain the same as the conventional conditions, and the high temperature heat treatment is not required, but the corner portion of the gate electrode lead portion is not required. Can form a thick insulating film, and can prevent the gate breakdown voltage of the gate electrode lead portion from being lowered.

  In addition, by forming a thick insulating film, the opening size of the trench groove is narrowed, but the trench groove is filled with the gate electrode before the thick insulating film is formed, and the gate electrode into the trench groove is formed. No unfilling occurs.

  Further, when forming the source region, the obliquely incident ions are blocked by the thick insulating film, and can be formed at a predetermined depth from the surface of the semiconductor substrate.

1: drain region, 2: channel region, 3: source region, 4: trench groove, 5: gate insulating film, 6: gate electrode, 7: gate electrode lead electrode, 8: corner portion, 9: silicon oxide film, 10 : Thick insulating film, 11: Polysilicon film

Claims (3)

A first conductivity type first semiconductor region; a second conductivity type second semiconductor region stacked on the first semiconductor region; and a first conductivity type first semiconductor layer stacked on the second semiconductor region. A semiconductor substrate having three semiconductor regions, a trench groove extending from the third semiconductor region on the surface of the semiconductor substrate through the second semiconductor region to the first semiconductor region, and formed on the surface of the trench groove In a semiconductor device having a gate electrode filled in the trench groove through a gate insulating film,
The insulating film formed at the corner portion of the trench groove surface includes an insulating film in which a part of the gate electrode filled in the trench groove and a part of the surface of the semiconductor substrate are oxidized, and from the gate insulating film A semiconductor device characterized by gradually becoming thicker toward the center of the trench groove upward . Providing a semiconductor substrate comprising a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type stacked on the first semiconductor region;
Forming a trench groove from the surface of the semiconductor substrate to reach the first semiconductor region through the second semiconductor region;
Oxidizing the trench groove surface and forming a gate insulating film;
Filling the trench groove with the gate electrode through the gate insulating film;
A step of oxidizing a part of the gate electrode and a part of the second semiconductor region to form a thick insulating film that gradually increases in the direction of the center of the trench groove upward at the corner of the trench groove surface. When,
Forming a gate electrode lead electrode connected to the gate electrode remaining unoxidized in a gate lead portion for pulling out the gate electrode to the semiconductor substrate surface;
Forming a first semiconductor region of the first conductivity type on the surface of the second semiconductor region of the surface of the semiconductor substrate. The method of manufacturing a semiconductor device according to claim 2.
Forming an oxidation-resistant mask film that opens the trench groove formation planned region after coating the semiconductor substrate surface with an oxidation-resistant film;
Using the oxidation-resistant mask film as an etching mask and forming the trench groove;
Using the oxidation-resistant mask film as a mask, and forming a gate insulating film on the trench groove surface;
Filling a gate electrode in the trench groove and between the oxidation-resistant mask films through the gate insulating film;
A part of the gate electrode between the oxidation-resistant mask films and in the trench groove and a part of the second semiconductor region are oxidized, and the center of the trench groove is directed upward at a corner portion of the trench groove surface. Forming a thick insulating film that gradually increases in the direction,
Forming the gate electrode lead- out electrode connected to the gate electrode remaining unoxidized protruding from the trench groove .

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