JP6203935B2 - 加算比較選択命令 - Google Patents

加算比較選択命令 Download PDF

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Publication number
JP6203935B2
JP6203935B2 JP2016501437A JP2016501437A JP6203935B2 JP 6203935 B2 JP6203935 B2 JP 6203935B2 JP 2016501437 A JP2016501437 A JP 2016501437A JP 2016501437 A JP2016501437 A JP 2016501437A JP 6203935 B2 JP6203935 B2 JP 6203935B2
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result
register
value
instruction
vector
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Japanese (ja)
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JP2016517577A5 (enExample
JP2016517577A (ja
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ニコ・デ・ローレンティス
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クアルコム，インコーポレイテッド
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Probability & Statistics with Applications (AREA)
  • Mathematical Physics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Complex Calculations (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
JP2016501437A 2013-03-15 2014-03-12 加算比較選択命令 Expired - Fee Related JP6203935B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/841,878 2013-03-15
US13/841,878 US9389854B2 (en) 2013-03-15 2013-03-15 Add-compare-select instruction
PCT/US2014/024203 WO2014150778A1 (en) 2013-03-15 2014-03-12 Add-compare-select instruction

Publications (3)

Publication Number Publication Date
JP2016517577A JP2016517577A (ja) 2016-06-16
JP2016517577A5 JP2016517577A5 (enExample) 2017-01-05
JP6203935B2 true JP6203935B2 (ja) 2017-09-27

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Family Applications (1)

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JP2016501437A Expired - Fee Related JP6203935B2 (ja) 2013-03-15 2014-03-12 加算比較選択命令

Country Status (6)

Country Link
US (1) US9389854B2 (enExample)
EP (1) EP2972786B1 (enExample)
JP (1) JP6203935B2 (enExample)
KR (1) KR101746681B1 (enExample)
CN (1) CN105027076B (enExample)
WO (1) WO2014150778A1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107315563B (zh) * 2016-04-26 2020-08-07 中科寒武纪科技股份有限公司 一种用于执行向量比较运算的装置和方法
CN111857820B (zh) * 2016-04-26 2024-05-07 中科寒武纪科技股份有限公司 一种用于执行矩阵加/减运算的装置和方法
CN111651203B (zh) 2016-04-26 2024-05-07 中科寒武纪科技股份有限公司 一种用于执行向量四则运算的装置和方法
CN110275693B (zh) 2018-03-15 2023-08-22 华为技术有限公司 用于随机计算的多加数加法电路
CN116204612A (zh) * 2022-10-20 2023-06-02 超聚变数字技术有限公司 一种文本相似度计算方法及系统

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5151904A (en) * 1990-09-27 1992-09-29 The Titan Corporation Reconfigurable, multi-user viterbi decoder
JPH05206873A (ja) * 1992-01-29 1993-08-13 Sony Corp 再生装置
JP3198607B2 (ja) * 1992-03-31 2001-08-13 ソニー株式会社 磁気記録再生方法
JP3241210B2 (ja) 1994-06-23 2001-12-25 沖電気工業株式会社 ビタビ復号方法及びビタビ復号回路
US6163581A (en) * 1997-05-05 2000-12-19 The Regents Of The University Of California Low-power state-sequential viterbi decoder for CDMA digital cellular applications
US5987490A (en) * 1997-11-14 1999-11-16 Lucent Technologies Inc. Mac processor with efficient Viterbi ACS operation and automatic traceback store
US20020031195A1 (en) * 2000-09-08 2002-03-14 Hooman Honary Method and apparatus for constellation decoder
US6848074B2 (en) 2001-06-21 2005-01-25 Arc International Method and apparatus for implementing a single cycle operation in a data processing system
US7661059B2 (en) * 2001-08-06 2010-02-09 Analog Devices, Inc. High performance turbo and Viterbi channel decoding in digital signal processors
US7043682B1 (en) 2002-02-05 2006-05-09 Arc International Method and apparatus for implementing decode operations in a data processor
US8140947B2 (en) 2005-09-30 2012-03-20 Agere Systems Inc. Method and apparatus for storing survivor paths in a Viterbi detector using systematic pointer exchange
US7725516B2 (en) 2005-10-05 2010-05-25 Qualcomm Incorporated Fast DCT algorithm for DSP with VLIW architecture
US8356160B2 (en) * 2008-01-15 2013-01-15 International Business Machines Corporation Pipelined multiple operand minimum and maximum function
US8255780B2 (en) * 2009-02-18 2012-08-28 Saankhya Labs Pvt Ltd. Scalable VLIW processor for high-speed viterbi and trellis coded modulation decoding
CN102122275A (zh) * 2010-01-08 2011-07-13 上海芯豪微电子有限公司 一种可配置处理器
JP4856288B1 (ja) * 2010-08-10 2012-01-18 パイオニア株式会社 インピーダンス整合装置、制御方法
US8694878B2 (en) 2011-06-15 2014-04-08 Texas Instruments Incorporated Processor instructions to accelerate Viterbi decoding
US10120692B2 (en) 2011-07-28 2018-11-06 Qualcomm Incorporated Methods and apparatus for storage and translation of an entropy encoded instruction sequence to executable form

Also Published As

Publication number Publication date
US20140281420A1 (en) 2014-09-18
WO2014150778A1 (en) 2014-09-25
US9389854B2 (en) 2016-07-12
KR101746681B1 (ko) 2017-06-13
EP2972786A1 (en) 2016-01-20
CN105027076B (zh) 2018-07-20
EP2972786B1 (en) 2021-12-01
JP2016517577A (ja) 2016-06-16
CN105027076A (zh) 2015-11-04
KR20150132387A (ko) 2015-11-25

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