KR101746681B1 - 가산-비교-선택 명령 - Google Patents
가산-비교-선택 명령 Download PDFInfo
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- KR101746681B1 KR101746681B1 KR1020157029138A KR20157029138A KR101746681B1 KR 101746681 B1 KR101746681 B1 KR 101746681B1 KR 1020157029138 A KR1020157029138 A KR 1020157029138A KR 20157029138 A KR20157029138 A KR 20157029138A KR 101746681 B1 KR101746681 B1 KR 101746681B1
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- South Korea
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/3001—Arithmetic instructions
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
- G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Software Systems (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Probability & Statistics with Applications (AREA)
- Mathematical Physics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computational Mathematics (AREA)
- Error Detection And Correction (AREA)
- Executing Machine-Instructions (AREA)
- Complex Calculations (AREA)
- Advance Control (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/841,878 US9389854B2 (en) | 2013-03-15 | 2013-03-15 | Add-compare-select instruction |
| US13/841,878 | 2013-03-15 | ||
| PCT/US2014/024203 WO2014150778A1 (en) | 2013-03-15 | 2014-03-12 | Add-compare-select instruction |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20150132387A KR20150132387A (ko) | 2015-11-25 |
| KR101746681B1 true KR101746681B1 (ko) | 2017-06-13 |
Family
ID=50483523
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020157029138A Expired - Fee Related KR101746681B1 (ko) | 2013-03-15 | 2014-03-12 | 가산-비교-선택 명령 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US9389854B2 (enExample) |
| EP (1) | EP2972786B1 (enExample) |
| JP (1) | JP6203935B2 (enExample) |
| KR (1) | KR101746681B1 (enExample) |
| CN (1) | CN105027076B (enExample) |
| WO (1) | WO2014150778A1 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111857819B (zh) * | 2016-04-26 | 2024-05-03 | 中科寒武纪科技股份有限公司 | 一种用于执行矩阵加/减运算的装置和方法 |
| CN111176608B (zh) * | 2016-04-26 | 2025-03-11 | 中科寒武纪科技股份有限公司 | 一种用于执行向量比较运算的装置和方法 |
| CN111651203B (zh) | 2016-04-26 | 2024-05-07 | 中科寒武纪科技股份有限公司 | 一种用于执行向量四则运算的装置和方法 |
| CN116822537A (zh) | 2018-03-15 | 2023-09-29 | 华为技术有限公司 | 用于随机计算的多加数加法电路 |
| CN116204612A (zh) * | 2022-10-20 | 2023-06-02 | 超聚变数字技术有限公司 | 一种文本相似度计算方法及系统 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5946361A (en) * | 1994-06-23 | 1999-08-31 | Oki Electric Industry Co., Ltd. | Viterbi decoding method and circuit with accelerated back-tracing and efficient path metric calculation |
| US20030028844A1 (en) * | 2001-06-21 | 2003-02-06 | Coombs Robert Anthony | Method and apparatus for implementing a single cycle operation in a data processing system |
| US20090182990A1 (en) * | 2008-01-15 | 2009-07-16 | Muff Adam J | Method and Apparatus for a Pipelined Multiple Operand Minimum and Maximum Function |
| US8201064B2 (en) * | 2002-02-05 | 2012-06-12 | Synopsys, Inc. | Method and apparatus for implementing decode operations in a data processor |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5151904A (en) * | 1990-09-27 | 1992-09-29 | The Titan Corporation | Reconfigurable, multi-user viterbi decoder |
| JPH05206873A (ja) * | 1992-01-29 | 1993-08-13 | Sony Corp | 再生装置 |
| JP3198607B2 (ja) * | 1992-03-31 | 2001-08-13 | ソニー株式会社 | 磁気記録再生方法 |
| US6163581A (en) * | 1997-05-05 | 2000-12-19 | The Regents Of The University Of California | Low-power state-sequential viterbi decoder for CDMA digital cellular applications |
| US5987490A (en) * | 1997-11-14 | 1999-11-16 | Lucent Technologies Inc. | Mac processor with efficient Viterbi ACS operation and automatic traceback store |
| US20020031195A1 (en) * | 2000-09-08 | 2002-03-14 | Hooman Honary | Method and apparatus for constellation decoder |
| US7661059B2 (en) * | 2001-08-06 | 2010-02-09 | Analog Devices, Inc. | High performance turbo and Viterbi channel decoding in digital signal processors |
| US8140947B2 (en) | 2005-09-30 | 2012-03-20 | Agere Systems Inc. | Method and apparatus for storing survivor paths in a Viterbi detector using systematic pointer exchange |
| US7725516B2 (en) | 2005-10-05 | 2010-05-25 | Qualcomm Incorporated | Fast DCT algorithm for DSP with VLIW architecture |
| US8255780B2 (en) * | 2009-02-18 | 2012-08-28 | Saankhya Labs Pvt Ltd. | Scalable VLIW processor for high-speed viterbi and trellis coded modulation decoding |
| CN102122275A (zh) * | 2010-01-08 | 2011-07-13 | 上海芯豪微电子有限公司 | 一种可配置处理器 |
| WO2012020475A1 (ja) * | 2010-08-10 | 2012-02-16 | パイオニア株式会社 | インピーダンス整合装置、制御方法 |
| US8694878B2 (en) | 2011-06-15 | 2014-04-08 | Texas Instruments Incorporated | Processor instructions to accelerate Viterbi decoding |
| US10120692B2 (en) | 2011-07-28 | 2018-11-06 | Qualcomm Incorporated | Methods and apparatus for storage and translation of an entropy encoded instruction sequence to executable form |
-
2013
- 2013-03-15 US US13/841,878 patent/US9389854B2/en active Active
-
2014
- 2014-03-12 CN CN201480012927.5A patent/CN105027076B/zh active Active
- 2014-03-12 KR KR1020157029138A patent/KR101746681B1/ko not_active Expired - Fee Related
- 2014-03-12 EP EP14717293.6A patent/EP2972786B1/en active Active
- 2014-03-12 WO PCT/US2014/024203 patent/WO2014150778A1/en not_active Ceased
- 2014-03-12 JP JP2016501437A patent/JP6203935B2/ja not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5946361A (en) * | 1994-06-23 | 1999-08-31 | Oki Electric Industry Co., Ltd. | Viterbi decoding method and circuit with accelerated back-tracing and efficient path metric calculation |
| US20030028844A1 (en) * | 2001-06-21 | 2003-02-06 | Coombs Robert Anthony | Method and apparatus for implementing a single cycle operation in a data processing system |
| US8201064B2 (en) * | 2002-02-05 | 2012-06-12 | Synopsys, Inc. | Method and apparatus for implementing decode operations in a data processor |
| US20090182990A1 (en) * | 2008-01-15 | 2009-07-16 | Muff Adam J | Method and Apparatus for a Pipelined Multiple Operand Minimum and Maximum Function |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105027076A (zh) | 2015-11-04 |
| KR20150132387A (ko) | 2015-11-25 |
| JP6203935B2 (ja) | 2017-09-27 |
| JP2016517577A (ja) | 2016-06-16 |
| EP2972786B1 (en) | 2021-12-01 |
| US20140281420A1 (en) | 2014-09-18 |
| EP2972786A1 (en) | 2016-01-20 |
| US9389854B2 (en) | 2016-07-12 |
| CN105027076B (zh) | 2018-07-20 |
| WO2014150778A1 (en) | 2014-09-25 |
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| A201 | Request for examination | ||
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