JP6166715B2 - 磁界センサを自己較正または自己テストするための回路および方法 - Google Patents
磁界センサを自己較正または自己テストするための回路および方法 Download PDFInfo
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- 230000004044 response Effects 0.000 claims description 90
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- 230000005355 Hall effect Effects 0.000 claims description 42
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- 230000035945 sensitivity Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 9
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R33/00—Arrangements or instruments for measuring magnetic variables
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Description
Claims (26)
- 磁界センサであって、
少なくとも2つの磁界検出素子と、
前記少なくとも2つの磁界検出素子に接続された第1のスイッチング回路であって、前記第1のスイッチング回路が、前記少なくとも2つの磁界検出素子を被測定磁界検出構成および基準磁界検出構成に接続するように構成され、前記第1のスイッチング回路が、前記少なくとも2つの磁界検出素子を、前記被測定磁界検出構成に接続されるときに外部磁界の存在下で協働して応答するように並列に接続し、前記少なくとも2つの磁界検出素子を、前記基準磁界検出構成に接続されるときに前記外部磁界に対する応答が互いに反対になるように接続するように構成され、前記第1のスイッチング回路が、磁界信号を供給するように第1のスイッチング速度で前記被測定磁界検出構成と前記基準磁界検出構成との間で、時間分割多重化を用いて、交互に往復して切り替えるように動作可能であり、前記第1のスイッチング回路が、
前記被測定磁界検出構成で接続されたときに前記外部磁界に応答する被測定磁界応答信号部分、および
前記基準磁界検出構成で接続されたときに基準磁界に応答する基準磁界応答信号部分
を含む前記磁界信号を生成するように構成され、前記磁界信号は、第1の期間の間は前記被測定磁界応答信号部分のみを表し、前記第1のスイッチング速度に同期した速度で前記第1の期間とインターリーブされた第2の異なる期間の間は前記基準磁界応答信号部分のみを表す、第1のスイッチング回路と、
前記磁界信号を受け取るように接続された処理回路と、
前記基準磁界応答信号部分を表す信号を前記処理回路から受け取るように接続され、前記少なくとも2つの磁界検出素子を駆動するために印加されるバイアス信号、または前記処理回路の利得、のうちの少なくとも1つを制御するためにフィードバック信号を生成するように構成された、フィードバック回路と
を備える、磁界センサ。 - 前記基準磁界が、前記少なくとも2つの磁界検出素子のうちの選択されたものの場所で反対方向に向いた第1および第2の基準磁界を含み、前記磁界センサが、
前記第1および第2の基準磁界を生成するように動作可能な磁界生成器をさらに備える、請求項1に記載の磁界センサ。 - 前記磁界生成器が、
それぞれ前記少なくとも2つの磁界検出素子に近接した、少なくとも2つの基準磁界導体部分を備え、前記少なくとも2つの基準磁界導体部分が、前記基準磁界を生成するための基準電流を伝達するように構成される、請求項2に記載の磁界センサ。 - 前記基準電流を供給するように接続された第2のスイッチング回路であって、前記第1のスイッチング速度に同期して、第1の基準電流方向と第2の反対の基準電流方向との間で前記基準電流を交互に切り替えるように動作可能な、第2のスイッチング回路
をさらに備える、請求項3に記載の磁界センサ。 - 前記処理回路は、前記第1のスイッチング回路から前記磁界信号を受け取るように接続され、前記処理回路が、
前記第1の期間の間に前記被測定磁界応答信号部分を表す前記磁界信号を選択し処理して、前記被測定磁界応答信号部分を表す第1の信号を生成するように時間分割多重化された、第1の処理チャネルであって、前記第1の信号はセンサ出力信号を提供する、第1の処理チャネルと、
前記第2の異なる期間の間に前記基準磁界応答信号部分を表す前記磁界信号を選択し処理して、前記基準磁界応答信号部分を表す第2の信号を生成するように時間分割多重化された、第2の異なる処理チャネルと
を備える、請求項3に記載の磁界センサ。 - 前記フィードバック回路は、前記第2の信号を表す信号を前記フィードバック信号として使用するように動作可能である、請求項5に記載の磁界センサ。
- 前記被測定磁界検出構成が、前記少なくとも2つの磁界検出素子のチョッピングを表す、少なくとも2つの異なる交互の被測定磁界検出構成からなる、請求項5に記載の磁界センサ。
- 前記少なくとも2つの磁界検出素子が、基板によって支持され、前記少なくとも2つの基準磁界導体部分が、前記基板によって支持され前記磁界検出素子に近接した導体を含む、請求項5に記載の磁界センサ。
- 前記少なくとも2つの基準磁界導体部分が、前記基板によって支持される2つ以上の金属層にわたって広がる、請求項8に記載の磁界センサ。
- 前記少なくとも2つの磁界検出素子が、基板によって支持され、前記少なくとも2つの基準磁界導体部分が、前記基板から分離しているが前記基板に近接した導体を含む、請求項5に記載の磁界センサ。
- 前記外部磁界が、被測定電流導体によって伝達される被測定電流によって生成される、請求項5に記載の磁界センサ。
- 前記少なくとも2つの磁界検出素子が、少なくとも2つのホール効果素子を含む、請求項5に記載の磁界センサ。
- 前記少なくとも2つの磁界検出素子が、少なくとも2つの磁気抵抗素子を含む、請求項5に記載の磁界センサ。
- 磁界センサの較正または自己テストを生成する方法であって、
少なくとも2つの磁界検出素子を被測定磁界検出構成に接続するステップであって、前記少なくとも2つの磁界検出素子を、外部磁界の存在下で協働して応答するように並列に接続するステップを含む、ステップと、
前記少なくとも2つの磁界検出素子を基準磁界検出構成に接続するステップであって、前記少なくとも2つの磁界検出素子を、前記外部磁界に対する応答が互いに反対になるように接続するステップを含む、ステップと、
磁界信号を供給するために、第1のスイッチング速度で前記被測定磁界検出構成と前記基準磁界検出構成とを、時間分割多重化を用いて、交互に往復して切り替えるステップであって、前記切り替えるステップが、
前記被測定磁界検出構成で接続されたときに前記外部磁界に応答する被測定磁界応答信号部分、および
前記基準磁界検出構成で接続されたときに基準磁界に応答する基準磁界応答信号部分
を含む前記磁界信号を生成するように構成され、前記磁界信号は、第1の期間の間は前記被測定磁界応答信号部分のみを表し、前記第1のスイッチング速度に同期した速度で前記第1の期間とインターリーブされた第2の異なる期間の間は前記基準磁界応答信号部分のみを表す、切り替えるステップと、
前記基準磁界応答信号部分を表す信号をフィードバック信号として使用して、前記少なくとも2つの磁界検出素子を駆動するために印加されるバイアス信号、または前記少なくとも2つの磁界検出素子に接続された処理回路の利得、のうちの少なくとも1つを制御するステップと
を含む、方法。 - 前記基準磁界が、前記少なくとも2つの磁界検出素子のうちの選択されたものの場所で反対方向に向いた第1および第2の基準磁界を含む、請求項14に記載の方法。
- 前記基準磁界を生成するために基準電流を生成するステップをさらに含み、前記基準磁界は、それぞれの磁界方向が反対方向に向けられた少なくとも2つの基準磁界部分を含む、
請求項14に記載の方法。 - 前記第1のスイッチング速度に同期して、第1の基準電流方向と第2の反対の基準電流方向との間で交互に切り替えるステップ
をさらに含む、請求項16に記載の方法。 - 前記第1のスイッチング回路から前記磁界信号を受け取るステップと、
前記第1の期間の間に前記被測定磁界応答信号部分を表す前記磁界信号を選択し処理して、前記被測定磁界応答信号部分を表す第1の信号を生成するように時間分割多重化するステップであって、前記第1の信号はセンサ出力信号を提供する、ステップと、
前記第2の異なる期間の間に前記基準磁界応答信号部分を表す前記磁界信号を選択し処理して、前記基準磁界応答信号部分を表す第2の信号を生成するように時間分割多重化するステップと
をさらに含む、請求項16に記載の方法。 - 前記第2の信号を表す信号を前記フィードバック信号として使用するステップ
をさらに含む、請求項18に記載の方法。 - 前記被測定磁界検出構成が、前記少なくとも2つの磁界検出素子のチョッピングを表す少なくとも2つの異なる交互の被測定磁界検出構成からなる、請求項18に記載の方法。
- 前記少なくとも2つの磁界検出素子が、基板によって支持され、前記少なくとも2つの基準磁界部分が、前記基板によって支持され前記少なくとも2つの磁界検出素子に近接した導体を備えた、少なくとも2つの基準磁界導体部分によって生成される、請求項18に記載の方法。
- 前記少なくとも2つの基準磁界導体部分が、前記基板によって支持された2つ以上の金属層にわたって広がる、請求項21に記載の方法。
- 前記少なくとも2つの磁界検出素子が基板によって支持され、前記少なくとも2つの基準磁界部分が、前記基板から分離しているが前記基板に近接した導体を備えた、少なくとも2つの基準磁界導体部分によって生成される、請求項18に記載の方法。
- 前記外部磁界が、被測定電流導体によって伝達される測定電流によって生成される、請求項18に記載の方法。
- 前記少なくとも2つの磁界検出素子が、少なくとも2つのホール効果素子を含む、請求項18に記載の方法。
- 前記少なくとも2つの磁界検出素子が、少なくとも2つの磁気抵抗素子を含む、請求項18に記載の方法。
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EP2684064B1 (en) | 2015-05-20 |
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KR101906878B1 (ko) | 2018-10-11 |
JP2014517919A (ja) | 2014-07-24 |
WO2012148646A1 (en) | 2012-11-01 |
JP2017040658A (ja) | 2017-02-23 |
KR20140019821A (ko) | 2014-02-17 |
US20120274314A1 (en) | 2012-11-01 |
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