JP6123738B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device equipped with a power semiconductor element.

  In an inverter device, an uninterruptible power supply device, a machine tool, an industrial robot, and the like, a semiconductor device (power semiconductor module) is used independently of the main body device.

  FIG. 4 is a cross-sectional view of a main part of a conventional power semiconductor module 500 described in Patent Document 1. The power semiconductor module 500 includes an insulating substrate 54, a switching element 56, a printed circuit board 61, a conductive post 58, and a capacitor 67.

  The switching element 56 is a vertical power semiconductor element such as a power MOSFET or IGBT (insulated gate bipolar transistor). For example, when the switching element 56 is a power MOSFET, it has a gate electrode and a source electrode on the front surface and a drain electrode on the back surface. The drain electrode of the switching element 56 and the circuit board 52 of the insulating substrate 54 are electrically and mechanically connected using solder or the like. In addition, the gate electrode and the source electrode of the switching element 56 and the conductive post 58 provided on the printed circuit board 61 facing the insulating substrate 54 are electrically and mechanically connected using solder or the like. Further, the wiring layer 59 of the printed circuit board 61 and the conductive post 58 are electrically connected. That is, in the power semiconductor module 500, the drain wiring of the switching element 56 is mainly performed on the circuit board 52 of the insulating substrate 54, and the gate wiring and the source wiring are mainly wiring of the conductive posts 58 and the printed circuit board 61. This is done in layer 59.

  In the power semiconductor module 500, a capacitor 67 is provided between the insulating board 54 and the printed board 61, one end of the capacitor 67 is connected to the source wiring layer of the printed board 61, and the other end is the circuit board 52 of the insulating board 54. Connected to. That is, the capacitor 67 is connected between the source electrode and the drain electrode of the switching element 56.

Further, a semiconductor device has been proposed in which a capacitor is connected between a gate electrode and a source electrode of a switching element so that the switching element does not turn on unintentionally (Patent Document 2).

JP 2013-222950 A JP 2000-243905 A

  Based on the configuration of the power semiconductor module described in Patent Document 1, in order to realize the circuit configuration described in Patent Document 2, a capacitor is disposed between the gate electrode of the switching element and the source wiring layer of the printed circuit board. It is possible. FIG. 5 is a schematic sectional view of a power semiconductor module 600 having this configuration. As shown in this figure, it is conceivable to arrange a capacitor 67 between the source wiring layer 59b of the printed circuit board 61 and the gate electrode 56a of the switching element 56.

  However, the gate electrode 56a of the switching element 56 is very small compared to the circuit board 52 in which the capacitor 67 is arranged in Patent Document 1. Further, not only the capacitor 67 but also the gate conductive post 58a needs to be disposed on the gate electrode 56a. Therefore, when the capacitor 67 and the gate conductive post 58a are arranged side by side on the gate electrode 56a, the interval L between the capacitor 87 and the gate conductive post 79a must be narrowed as shown in FIG. Therefore, the bonding material 57 for fixing to the gate electrode crawls up between the gate conductive post 58a and the capacitor 67 by capillary action during the reflow process. As a result, as shown in FIG. 6, there is a problem that the bonding material 57 causes a short circuit between both ends of the capacitor 67 and between the gate wiring layer 59a and the source wiring layer 59b.

  Note that the above problem becomes more conspicuous in a wide band gap semiconductor such as SiC in which the chip area cannot be increased due to manufacturing reasons and therefore the gate electrode must be reduced.

  The object of the present invention is made by paying attention to the above-mentioned problem. When a circuit impedance reducing element such as a capacitor and a gate conductive post are arranged adjacent to a small gate electrode, a semiconductor with high reliability is provided. To provide an apparatus.

  To achieve the above object, according to one embodiment of the present invention, a semiconductor device includes an insulating substrate having a conductive plate fixed to a front surface, a gate electrode and a source electrode on the front surface, and a back surface. Has a switching element fixed to the conductive plate, a source wiring layer and a gate wiring layer, a printed circuit board facing the front surface of the insulating substrate, and one end electrically and mechanically connected to the gate electrode A gate conductive post connected to the gate wiring layer and having the other end electrically and mechanically connected to the gate wiring layer; one end electrically and mechanically connected to the source electrode; and the other end electrically connected to the source wiring layer. And a source conductive post mechanically connected, and a circuit impedance reducing element having one end electrically and mechanically connected to the gate electrode and the other end electrically and mechanically connected to the source wiring layer. Prepared, front Either an end face of the gate electrode post electrically and mechanically connected to the gate electrode or an end face of the circuit impedance reducing element electrically and mechanically connected to the gate electrode is separated from the electrode face of the gate electrode. It is assumed that the configuration is shifted.

  According to the present invention, it is possible to provide a highly reliable semiconductor device in which a circuit impedance reducing element such as a capacitor and a gate conductive post can be disposed adjacent to a small gate electrode.

It is a block diagram of the semiconductor device 100 of Example 1 which concerns on this invention. 1 is a circuit diagram of a semiconductor device 100. FIG. It is a block diagram of the semiconductor device 200 of Example 2 which concerns on this invention. It is a block diagram of the conventional power semiconductor module 500. FIG. It is principal part sectional drawing of the semiconductor device 600 which installed the capacitor in the gate electrode. It is the B section enlarged view of FIG.

  Embodiments will be described in the following examples. In addition, the same code | symbol as the past shows the same site | part.

  Note that the term “electrically and mechanically connected” used in the specification and claims of the present application is not limited to the case where the objects are directly connected to each other by soldering. In addition, a case where objects are connected to each other through a conductive bonding material such as a metal sintered material is also included.

  1 is a configuration diagram of a semiconductor device 100 according to a first embodiment of the present invention. FIG. 1A is an overall cross-sectional view of the main part, FIG. 1B is an enlarged cross-sectional view of part A, and FIG. 1C is an enlarged plan view of part A.

  The semiconductor device 100 has a configuration called a 2-in-1 module having an upper arm and a lower arm, and FIG. 1A shows the configuration of one of the arms. The semiconductor device 100 includes an insulating substrate 1, a switching element 10, a printed circuit board 5, a gate conductive post 9a, a source conductive post 9b, and a capacitor 17 as a circuit impedance reducing element. Furthermore, an external terminal 14 fixed to the insulating substrate 1 and a resin 16 that seals these internal members by exposing the back surface of the metal plate 4 are provided.

  The insulating substrate 1 includes a ceramic plate 2, a circuit plate 3, and a metal plate 4. A circuit board 3 is fixed to the front surface of the ceramic plate 2, and a metal plate 4 is fixed to the back surface.

  The switching element 10 is a vertical power semiconductor element such as a power MOSFET or IGBT (insulated gate bipolar transistor). In the present embodiment, the case where the switching element 10 is a power MOSFET will be described. The switching element 10 has a gate electrode 13 and a source electrode 12 on the front surface, and a drain electrode 11 on the back surface. The gate electrode 13 is an electrode for electrically and mechanically connecting a wiring member for gate signal input on the front surface of the switching element 10 and is also called a gate pad. The drain electrode 11 is electrically and mechanically connected to the circuit board 3 of the insulating substrate 1.

  The printed circuit board 5 is disposed to face the surface of the insulating substrate 1 on the circuit board 3 side. The printed circuit board 5 has an insulating plate 6 made of resin or the like, a gate wiring layer 8a used as a gate wiring, and a source wiring layer 8b used as a source wiring. The gate wiring layer 8a and the source wiring layer 8b are made of a metal such as copper. Further, a cylindrical gate conductive post 9a and a source conductive post 9b are fixed to the printed board by being inserted into a through hole. The gate conductive post 9a and the source conductive post 9b are made of metal such as copper.

  The wiring inductance value of the gate wiring of the semiconductor device 100 including the gate wiring layer 8a and the gate conductive post 9a is Lgo. Further, the gate wiring of the semiconductor device 100 is provided with a gate resistance (not shown), and the resistance value is Rg.

  One end of the gate conductive post 9a is electrically and mechanically connected to the gate wiring layer 8a. The other end of the gate conductive post 9a is electrically and mechanically connected to the gate electrode 13 using a conductive bonding material 40 such as solder.

  One end of the source conductive post 9b is electrically and mechanically connected to the source wiring layer 8b. The other end of the source conductive post 9b is electrically and mechanically connected to the source electrode 12.

  In the present embodiment, the circuit impedance reducing element 17 is disposed between the insulating substrate 1 and the printed board 5. Below, the case where a capacitor is applied as a circuit impedance reduction element is demonstrated. One end of the capacitor 17 is electrically and mechanically connected to the source wiring layer 8b. The other end of the capacitor 17 is electrically and mechanically connected to the gate electrode 13 using a conductive bonding material 40 such as solder. The capacity of the capacitor 17 is Cgs.

  As shown in FIGS. 1B and 1C, at least one of the end of the gate conductive post 9 a and the end of the capacitor 17 is arranged so as to be shifted from the electrode surface of the gate electrode 13. . In FIG. 1, the capacitor 17 is arranged so as to be shifted from the electrode surface of the gate electrode 13. By disposing at least one of the end portion of the gate conductive post 9a and the end portion of the capacitor 17 from the electrode surface of the gate electrode 13, the distance L between the gate conductive post 9a and the capacitor 17 can be increased. Therefore, no creeping due to the capillary phenomenon of the conductive bonding material 40 such as solder does not occur, and the aforementioned short-circuit phenomenon can be prevented. Even if at least one of the end of the gate conductive post 9a or the end of the capacitor 17 is shifted from the electrode surface of the gate electrode 13, the joint surface between the shifted end and the gate electrode 13 As shown in FIG. 1B, since the fillet is formed by the bonding material 40, electrical connection can be ensured.

  Further, by disposing the end portion away from the electrode surface of the gate electrode 13, the fillet of the bonding material 40 becomes asymmetric as shown in FIG. Can be prevented.

  Note that the side surface of the capacitor 17 may be covered with the insulating film 43 in order to prevent the creeping phenomenon of the bonding material 40 and the short circuit phenomenon between the ends of the capacitor 17 due to the phenomenon.

  In this embodiment, the switching element 10 is a switching element made of a wide band gap semiconductor such as SiC or GaN or a Si semiconductor. In particular, a wide band gap semiconductor cannot be increased in chip area due to manufacturing reasons, and therefore the gate electrode must be reduced. Therefore, the present invention applicable to a small gate electrode is very effective.

  The switching element 10 is not limited to the power MOSFET described in the embodiment, and may be an IGBT (insulated gate bipolar transistor) or a bipolar transistor. When an IGBT is applied to the switching element 10, the source electrode in the above embodiment may be replaced with an emitter electrode, and the drain electrode may be replaced with a collector electrode. When a bipolar transistor is applied to the switching element 10, the gate electrode may be replaced with a base electrode.

  FIG. 2 is a circuit diagram of the semiconductor device 100 which is a 2 in 1 module. When the switching element 10 is turned off, current oscillation occurs due to resonance between the current flowing through the gate wiring, the inductance Lgo of the gate wiring, and the gate resistance Rg. Then, due to the vibration of the current, the gate voltage rises above the threshold value, and the switching element 10 that is originally in the off state may turn on unintentionally.

  Further, when the upper arm switching element 10 is turned on while the lower arm switching element 10 is in the OFF state, the parasitic diode of the lower arm switching element 10 is reversely recovered, and the drain voltage of the lower arm rapidly increases. A current that is a value obtained by multiplying the slope of the voltage increase (dV / dt) by the feedback capacitance of the switching device 10 in the lower arm raises the gate potential of the switching device 10 in the lower arm. When the gate potential of the lower arm switching element 10 exceeds the threshold voltage, the lower arm switching element 10 may turn on unintentionally.

  In order to suppress such unintended turn-on, it is effective to connect a circuit impedance reducing element (here, capacitor 17) having a current bypass effect between the gate and the source of the switching element 10. Further, in order to exert a large current bypass effect in the circuit impedance reducing element, it is preferable to reduce the inductance Lgo of the gate wiring, and it is particularly effective to reduce the internal gate wiring inductance Lg as much as possible.

  When the gate conductive post and the gate wiring layer are used as the gate wiring as in the power semiconductor module 500 of the conventional example, Lgo can be reduced as compared with the gate wiring using the bonding wire. This is because the gate conductive post 9a has a larger diameter and the gate wiring layer 8a is wider than the bonding wire.

  Then, as in this embodiment, by connecting one end of the capacitor 17 to the gate electrode 13 of the switching element 10 electrically and mechanically, the wiring distance between the capacitor 17 and the gate electrode 13 becomes substantially zero. For this reason, the internal gate wiring inductance Lg can be made substantially zero. As a result, occurrence of unintended turn-on of the switching element 10 can be effectively suppressed. Since an unintended turn-on is likely to occur in a switching element having a high switching speed, such as an IGBT or SiC-MOSFET, the present invention is particularly effective.

  Moreover, in the said embodiment, although the capacitor is used as a circuit impedance reduction element, it is not limited to this, A diode and MOSFET can also be applied. In short, any element may be used as long as it is electrically connected between the gate wiring and the source wiring of the switching element 10 as necessary, and has a current bypass effect that suppresses fluctuations in the gate voltage.

  FIG. 3 is a configuration diagram of the semiconductor device 200 according to the second embodiment of the present invention. 2A corresponds to the cross-sectional view of FIG. 1B of the first embodiment, and FIG. 2B corresponds to the plan view of FIG. 1C of the first embodiment.

  In this embodiment, a conductive support plate 41 having an area larger than that of the gate electrode 13 is disposed between the end of the gate conductive post 9 a and the end of the capacitor 17 and the gate electrode 13. The gate electrode 13 is electrically and mechanically connected to the end of the gate conductive post 9 a and the end of the capacitor 17 via the support plate 41 and the conductive bonding materials 40 and 42. Thereby, even if at least one of the end portion of the gate conductive post 9 a or the end portion of the capacitor 17 is shifted from the small electrode surface of the gate electrode 13, electrical connection with the gate electrode 13 can be ensured.

  As in the first embodiment, at least one of the end portion of the gate conductive post 9a and the end portion of the capacitor 17 is arranged so as to be shifted from the electrode surface of the gate electrode 13, whereby the distance L between the gate conductive post 9a and the capacitor 17 is set. Can be greatly increased. Therefore, creeping up due to the capillary phenomenon of the conductive bonding material 40 such as solder can be prevented, and the above-described short-circuit phenomenon can be prevented.

  Note that the side surface of the capacitor 17 may be covered with the insulating film 43 in order to prevent the creeping phenomenon of the bonding material 40 and the short circuit phenomenon between the ends of the capacitor 17 due to the phenomenon.

  As mentioned above, although embodiment of the semiconductor device of this invention was described using drawing, the semiconductor device of this invention is not limited to description of embodiment and drawing, Many are in the range which does not deviate from the meaning of this invention. Can be modified.

DESCRIPTION OF SYMBOLS 1 Insulating board 2 Ceramic board 3 Circuit board 4 Metal board 5 Printed board 6 Insulating board 8a Gate wiring layer 8b Source wiring layer 9a Gate conductive post 9b Source conductive post 10 Switching element 11 Drain electrode 12 Source electrode 13 Gate electrode 14 External terminal 16 Resin 17 Circuit impedance reduction element (capacitor)
DESCRIPTION OF SYMBOLS 30 Reflux diode 40 Joining material 41 Support plate 42 Joining layer 43 Insulating film 100,200 Semiconductor device

Claims (7)

An insulating substrate with a circuit board fixed to the front surface;
A switching element having a gate electrode and a source electrode on the front surface, and a back surface fixed to the circuit board;
A printed circuit board having a source wiring layer and a gate wiring layer and facing the front surface of the insulating substrate;
A gate conductive post having one end electrically and mechanically connected to the gate electrode and the other end electrically and mechanically connected to the gate wiring layer;
A source conductive post having one end electrically and mechanically connected to the source electrode and the other end electrically and mechanically connected to the source wiring layer;
A circuit impedance reducing element having one end electrically and mechanically connected to the gate electrode and the other end electrically and mechanically connected to the source wiring layer;
Either an end of a gate electrode post electrically and mechanically connected to the gate electrode or an end of a circuit impedance reducing element electrically and mechanically connected to the gate electrode is connected to the gate electrode. A semiconductor device arranged so as to be shifted from the electrode surface. 2. The semiconductor according to claim 1, wherein a conductive support plate having a larger area than an electrode surface of the gate electrode is disposed between one end of the gate conductive post and one end of the circuit impedance element and the gate electrode. apparatus. 3. The semiconductor device according to claim 1, wherein a side surface of the circuit impedance reducing element having an end face arranged so as to be shifted from the electrode surface of the gate electrode is covered with an insulating film. The semiconductor device according to claim 1, wherein the circuit impedance reducing element is a capacitor, a diode, or a MOSFET. The semiconductor device according to claim 1, wherein the switching element is a MOSFET, an IGBT, or a bipolar transistor. 6. The semiconductor device according to claim 5, wherein the MOSFET or IGBT is made of a wide bandgap semiconductor or Si semiconductor. The semiconductor device according to claim 5, wherein the MOSFET or IGBT is made of a SiC semiconductor.