JP6394459B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device.

  The semiconductor device is used for a power module, for example. Some of such semiconductor devices supply power to a load by controlling a plurality of switching elements (transistors or the like) connected in parallel. When the load is short-circuited and a large short-circuit current flows through the switching element, the potential of the control electrode of each switching element connected in parallel may oscillate (see, for example, Patent Document 1).

  Patent Document 1 discloses that a main current (emitter electrode in an example of an IGBT) formed between a plurality of switching elements is positioned as close as possible to a main current (an emitter current in an IGBT example). We propose a method of connecting with a conductor that is not affected by According to this method, the reference potential is uniform among the plurality of switching elements, and the above-described expansion of oscillation is suppressed. The semiconductor device described in Patent Document 1 uses a conductor wire as a conductor that connects main electrodes of switching elements.

JP 2010-178615 A

  If a conductor (for example, a wire) is connected (bonded) to the electrode of the transistor functioning as a switching element, the transistor may be damaged. If a conductor is further connected to the main electrode of the transistor in order to suppress the expansion of the oscillation described above, the possibility of damaging the transistor is increased accordingly.

  One embodiment of the present invention provides a semiconductor device capable of reducing damage to a transistor when a conductor for suppressing a change in reference potential in a plurality of transistors is connected.

  A semiconductor device according to one embodiment of the present invention includes a substrate on which a wiring pattern is formed on a main surface, and K transistors (K is 2) provided on the main surface of the substrate and connected in parallel through the wiring pattern. Each of the transistors is for receiving a first electrode pad, a second electrode pad, and a control voltage for controlling conduction between the first electrode pad and the second electrode pad. K transistors having a third electrode pad, and the second electrode pad of each of the K transistors is electrically connected to the wiring pattern via the first conductor, and K The second electrode pads of the individual transistors are electrically connected via the second conductive wire, and the second conductive wire has a cross-sectional area smaller than the cross-sectional area of the first conductive wire.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to reduce the damage to the transistor at the time of the conducting wire for suppressing the fluctuation | variation of the reference potential in a some transistor being connected.

1 is a plan view schematically showing a semiconductor device according to a first embodiment. 1 is a side view schematically showing a semiconductor device according to a first embodiment. It is a figure which shows the equivalent circuit of the semiconductor device which concerns on 1st Embodiment. It is a top view which shows typically the semiconductor device which concerns on a modification. It is a top view which shows typically the semiconductor device which concerns on another modification. It is a top view which shows typically the semiconductor device which concerns on 2nd Embodiment. It is a figure which shows the equivalent circuit of the semiconductor device which concerns on 2nd Embodiment.

[Description of Embodiment of Present Invention]
First, the contents of the embodiments of the present invention will be listed and described.

  A semiconductor device according to one embodiment of the present invention includes a substrate on which a wiring pattern is formed on a main surface, and K transistors (K is 2) provided on the main surface of the substrate and connected in parallel through the wiring pattern. Each of the transistors is for receiving a first electrode pad, a second electrode pad, and a control voltage for controlling conduction between the first electrode pad and the second electrode pad. K transistors having a third electrode pad, and the second electrode pad of each of the K transistors is electrically connected to the wiring pattern via the first conductor, and K The second electrode pads of the individual transistors are electrically connected via the second conductive wire, and the second conductive wire has a cross-sectional area smaller than the cross-sectional area of the first conductive wire.

  In the semiconductor device, since K transistors provided on the main surface of the substrate are connected in parallel via the wiring pattern, a large current can flow through the semiconductor device. Each transistor functions as a switching element because conduction between the first and second electrodes is controlled by applying the control voltage to the third electrode. This control voltage is normally set with the potential of the second electrode pad as a reference potential. According to the semiconductor device, the second electrode pads of the K transistors are electrically connected through the second conductive wire. The second conducting wire functions as a conducting wire for suppressing the fluctuation of the reference potential in each transistor, and the reference potential of each transistor becomes uniform. For this reason, for example, when the semiconductor device is used in a power module, even if a load is short-circuited and a large short-circuit current flows through each transistor, expansion of oscillation that can occur in the third electrode pad can be suppressed.

  Here, in the semiconductor device, the second conducting wire has a cross-sectional area smaller than the cross-sectional area of the first conducting wire. By electrically connecting the second electrode pads with a second conductor wire having a small cross-sectional area, the conductor wires can be connected rather than electrically connecting the second electrode pads with a first conductor wire having a large cross-sectional area. It is possible to reduce the possibility of damaging the transistor at the time of connection. Therefore, it is possible to reduce damage to the transistor when the second conductor for suppressing the fluctuation of the reference potential in the K transistors is connected.

  The semiconductor device further includes a diode provided for the jth and kth transistors (j and k are any different integers from 1 to K) of the K transistors, and the diode is a cathode. The cathode electrode pad is electrically connected to the first electrode pad of the jth transistor, and the anode electrode pad is the second electrode pad of the kth transistor. The second electrode pads of the j-th and k-th transistors may be electrically connected to each other through a second conductor and a diode. In the above connection relation, the diode functions as a free-wheeling diode for the K transistors connected in parallel, so that each transistor can be protected. In the above configuration, the second electrode pads of the K transistors are electrically connected using a diode as a freewheeling diode.

  The second electrode pad of the jth transistor and the wiring pattern are directly connected by the first conductor, and the second electrode pad of the jth transistor and the anode electrode pad of the diode are The second electrode pad of the kth transistor and the anode electrode pad of the diode may be directly connected by the second conductor. Even in this case, each second electrode pad of the transistor can be electrically connected.

  The second electrode pad of the jth transistor and the anode electrode pad of the diode are directly connected by the first conductor, and the second electrode pad of the kth transistor and the anode electrode pad of the diode are The second conductive wire may be directly connected. Even in this case, each second electrode pad of the transistor can be electrically connected.

  Each of the K transistors is disposed concentrically around the first region of the wiring pattern on the main surface of the substrate, and the second electrode pad of each of the K transistors and the first region are You may be directly connected by the 1st conducting wire. Thereby, the length of the 1st conducting wire which connects each transistor and the 1st field can be made substantially uniform. In this case, since the influence of the impedance (inductance) of the first conductor is almost equal among the K transistors, the potential of the second electrode pad tends to be uniform. As a result, fluctuations in the reference potential of each transistor can be suppressed.

  The second electrode pads of the jth and kth transistors may be directly connected by a second conductor. Even in this case, each second electrode pad of the transistor can be electrically connected.

  The semiconductor device includes M additional transistors (M is an integer of 2 or more) provided in the main surface of the substrate and connected in parallel via the wiring pattern, and each additional transistor includes a fourth electrode pad. , A fifth electrode pad, and a sixth electrode pad for receiving a control voltage that controls conduction between the fourth electrode pad and the fifth electrode pad, and M additional transistors, The plurality of fourth electrode pads connected in parallel are electrically connected to the plurality of second electrode pads connected in parallel, so that the K transistors connected in parallel are connected in parallel. The M additional transistors are connected in series, and the fifth electrode pad of each of the M transistors and the wiring pattern are electrically connected to each other by the first conductor. 5th Electrode pads to each other may be electrically connected by a second conductor.

  Each additional transistor also functions as a switching element because conduction between the fourth and fifth electrodes is controlled by applying the control voltage to the sixth electrode. Therefore, each of the K transistors and the M additional transistors functions as a switching element. Since the transistors connected in parallel can be regarded as one transistor, as described above, when K transistors connected in parallel and M transistors connected in parallel are connected in series, K transistors are connected. One transistor represented by a transistor and one additional transistor represented by M additional transistors are connected in series. In such a configuration, for example, by controlling ON / OFF of one transistor represented by K transistors and one additional transistor represented by M additional transistors, for example, a semiconductor device It can function as a one-phase power conversion circuit (for example, an inverter circuit).

  The control voltage applied to the sixth electrode pad is usually set with the potential of the fifth electrode pad as a reference potential. In the above configuration, the fifth electrode pads of the M additional transistors are electrically connected by the second conductive wire having a smaller cross-sectional area than the first conductive wire. While suppressing, it is possible to reduce damage to the additional transistor when the second conductive wire is connected.

  Each of the K transistors is concentrically arranged around the first region of the wiring pattern on the main surface of the substrate, and the M additional transistors are arranged around the second region of the wiring pattern on the main surface of the substrate. The second electrode pad of each of the K transistors and the first region are directly connected by the first conductor, and the fifth electrode pad of each of the M transistors The second region may be directly connected to the second conductor. Thereby, the length of the 1st conducting wire which directly connects the 2nd electrode pad of each transistor and the 1st field of a wiring pattern can be made substantially uniform. As a result, the influence of the impedance (inductance) of the first conductor is almost equal among the K transistors, so that the potential of the second electrode pad tends to be uniform. As a result, fluctuations in the reference potential of each transistor can be suppressed. Similarly, the length of the second conducting wire connecting the fifth electrode pad of each additional transistor and the second region of the wiring pattern can be made substantially uniform. As a result, the influence of the impedance (inductance) of the first conducting wire becomes almost equal to each other by the M additional transistors, and therefore the potential of the fifth electrode pad tends to be uniform. As a result, fluctuations in the reference potential of each additional transistor can be suppressed.

  The semiconductor device further includes an additional diode provided for the m-th and n-th transistors (m and n are any different integers from 1 to M) of the M transistors. A cathode electrode pad and an anode electrode pad, and the cathode electrode pad of the additional diode is electrically connected to the fourth electrode pad of the mth transistor, and the anode electrode pad of the additional diode is nth The fifth electrode pads of the mth and nth transistors are electrically connected to each other through the second conductor and the additional diode. Good. In the above connection relationship, the additional diode functions as a free-wheeling diode for the M additional transistors connected in parallel, so that each additional transistor can be protected. In the above configuration, the fifth electrode pads of the M transistors are electrically connected using an additional diode as a freewheeling diode.

  The fifth electrode pad of the mth transistor and the anode electrode pad of the additional diode are directly connected by the second conductor, and the fifth electrode pad of the nth transistor and the anode electrode of the additional diode The pad may be directly connected by the second conductor. Even in this case, the second electrode pads of the additional transistors can be electrically connected.

  The first conducting wire may be a wire, and the second conducting wire may be a wire having a diameter that is ½ or less of the diameter of the first conducting wire. By using a conducting wire having a small diameter (small cross-sectional area) in this way, the possibility of damaging the semiconductor device can be sufficiently reduced.

[Details of the embodiment of the present invention]
Specific examples of the semiconductor device according to the embodiment of the present invention will be described below with reference to the drawings. The present invention is not limited to these exemplifications, but is defined by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims. In the description of the drawings, the same reference numerals are given to the same elements, and duplicate descriptions are omitted. The dimensional ratios in the drawings do not always coincide with those described.

[First Embodiment]
FIG. 1 is a plan view schematically showing the semiconductor device 10 according to the first embodiment. As shown in FIG. 1, the semiconductor device 10 includes a substrate 100, K (K is an integer of 2 or more) transistors 110, L (L is an integer of 2 or more) diodes 120, and a plurality of conductive wires W1. And a plurality of conductive wires W2.

FIG. 1 illustrates the case where K and L are two. When the K transistors 110 are described separately, they may be referred to as transistors 110 _i (i is an integer from 1 to K). Similarly, the components of the transistor 110 may be distinguished by adding “i” as a subscript to the reference numeral. In FIG. 1, two transistors 110 ₁ and 110 ₂ are illustrated as an example.

When the L diodes 120 are described separately, they may be referred to as diodes 120 _h (h is an integer from 1 to L). Similarly, the components of the diode 120 may be distinguished by adding “h” as a subscript to the reference numeral. In FIG. 1, two diodes 120 ₁ and 120 ₂ are illustrated as an example.

  The substrate 100 is an insulating substrate having a main surface 100a. A wiring pattern 150 is formed on the main surface 100a. In the example shown in FIG. 1, the wiring pattern 150 includes a source wiring pattern 150S, a drain wiring pattern 150D, and a gate wiring pattern 150G. Each pattern included in the wiring pattern 150 is electrically separated. A source terminal TS is provided in the source wiring pattern 150S. The drain wiring pattern 150D is provided with a drain terminal TD. The gate wiring pattern 150G is provided with a gate terminal TG.

  The source terminal TS, the drain terminal TD, and the gate terminal TG are, for example, elements outside the semiconductor device 10 such as the source wiring pattern 150S, the drain wiring pattern 150D, and the gate wiring pattern 150G and an external circuit (not shown). Are used for electrical connection.

  The transistor 110 is a semiconductor element used as a switching element in a power module or the like, for example. In the example shown in FIG. 1, the transistor 110 is realized as a semiconductor chip having a rectangular shape. Examples of the material of the transistor 110 include a wide band gap semiconductor and Si, and examples of the wide band gap semiconductor include SiC, GaN, and diamond. In this embodiment, the case where the transistor 110 is a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) will be described, but the type of the transistor 110 is not limited to this. The transistor 110 may be, for example, an IGBT (Insulated Gate Bipolar Transistor).

  The diode 120 is a semiconductor element used as a free-wheeling diode for the transistor 110. The diode 120 can also be realized as a semiconductor chip like the transistor 110. An example of the material of the diode 120 may be similar to the example of the material of the transistor 110.

The transistor 110 _i and the diode 120 _i will be described with reference to FIG. 2 together with FIG. FIG. 2 is a side view schematically showing the semiconductor device 10 viewed along the direction of the arrow AR in FIG. Therefore, the transistor 110 _i and the diode 120 _i when i = 1 are shown. In FIG. 2, only the substrate 100, the transistor 110 ₁ , the diode 120 _1, and the wiring pattern 150 among the elements included in the semiconductor device 10 are illustrated.

As shown in FIGS. 1 and 2, the transistor 110 _i includes a drain electrode pad 111 _i , a source electrode pad 112 _i, and a gate electrode pad 113 _i . The drain electrode pad 111 _i is a first electrode pad that is electrically connected to the source (not shown) of the transistor 110 _i . The source electrode pad 112 _i is a second electrode pad electrically connected to the drain (not shown) of the transistor 110 _i . The gate electrode pad 113 _i is a third electrode pad connected to the gate (not shown) of the transistor 110 _i . A large current handled in a power module or the like can flow between the drain electrode pad 111 _i and the source electrode pad 112 _i . The gate electrode pad 113 _i is an electrode pad for receiving a control voltage for controlling conduction between the drain electrode pad 111 _i and the source electrode pad 112 _i .

The drain electrode pad 111 _i is provided on one end surface (the back surface in FIG. 2) of the transistor 110 _i . The drain electrode pad 111 _i is bonded to the drain wiring pattern 150D by, for example, solder or a conductive adhesive. As a result, the drain electrode pad 111 _i and the drain wiring pattern 150D are electrically connected. Thus, in this embodiment, since the drain electrode pad 111 _i is arranged on the drain wiring pattern 150D side, in FIG. 1, for convenience of illustration, the drain electrode pad 111 _i is shown using a wavy lead line. ing. The same applies to the other drawings.

The source electrode pad 112 _i and the gate electrode pad 113 _i are electrically separated from each other and provided on the other end surface (the surface in FIG. 2) of the transistor 110 _i .

The diode 120 _i includes a cathode electrode pad 121 _i and an anode electrode pad 122 _i . The cathode electrode pad 121 _i is an electrode pad electrically connected to the cathode (not shown) of the diode 120 _i . The cathode electrode pad 121 _i is provided on one end surface (the back surface in FIG. 2) of the diode 120 _i . The cathode electrode pad 121 _i is bonded to the drain wiring pattern 150D by, for example, solder or a conductive adhesive. Thus, the cathode electrode pad 121 _i and the drain wiring pattern 150D are electrically connected. Further, the drain electrode pad 111 _i and the cathode electrode pad 121 _i are electrically connected via the drain wiring pattern 150D.

The anode electrode pad 122 _i is an electrode pad electrically connected to the anode (not shown) of the diode 120 _i . The anode electrode pad 122 is provided on the other end surface (surface in FIG. 2) of the diode 120.

  The conducting wire W1 is a first conducting wire for electrically connecting each element of the semiconductor device 10. The material of the conductive wire W1 is not particularly limited, and for example, aluminum or copper is used. Although the cross-sectional shape of the conducting wire W1 is not particularly limited, for example, it is a substantially circular cross-sectional shape. In the present embodiment, the conducting wire having a substantially circular cross-sectional shape is simply referred to as a wire. Other cross-sectional shapes include, for example, a substantially rectangular cross-sectional shape. The conducting wire having a substantially rectangular cross-sectional shape is also referred to as a ribbon. A connection relationship using the conductive wire W1 will be described.

The source electrode pad 112 of the transistor 110 and the source wiring pattern 150S are electrically connected by a conducting wire W1. Specifically, one end of the wire W1 is bonded to the source electrode pad 112 _1, by the other end is bonded to the source wiring pattern 150S, a source electrode pad 112 _1, is connected to the source wiring pattern 150S directly ing. In the example shown in FIG. 1, although the source electrode pad 112 ₁ and the source wiring pattern 150S is electrically connected by two conductors W1, limited number of wires W1 for electrically connecting both to this Not.

Similarly, the source electrode pad 112 _2, and the source wiring pattern 150S, are electrically connected through the conductive wires W1. Thus, the source electrode pad 112 _1, the source electrode pad 112 _2, are electrically connected through the wiring pattern 150S for wires W1 and the source.

Further, the anode electrode pad 122 of the diode 120 and the source wiring pattern 150S are electrically connected by a conductive wire W1. Specifically, one end of the wire W1 is bonded to the anode electrode pad 122 _1, by the other end is bonded to the source wiring pattern 150S, an anode electrode pad 122 _1, and the source wiring pattern 150S, direct connection Has been. Thus, the anode electrode pad 122 _1, and the source electrode pad 112 ₁ are electrically connected through the wiring pattern 150S for wires W1 and the source. In the example shown in FIG. 1, although the anode electrode pad 122 ₁ and the source wiring pattern 150S is electrically connected by three wires W1, limited number of wires W1 for electrically connecting both to this Not.

Similarly, an anode electrode pad 122 _2, and the source wiring pattern 150S is directly connected by wires W1. Thus, the anode electrode pad 122 _2, and the source electrode pad 122 _2, are electrically connected through the wiring pattern 150S for wires W1 and the source.

Further, the gate electrode pad 113 of the transistor 110 and the gate wiring pattern 150G are electrically connected by the conductive wire W1. Specifically, one end of the wire W1 is bonded to the gate electrode pad 113 _1, by the other end is bonded to the gate wiring pattern 150G, and a gate electrode pad 113 _1, and the gate wiring pattern 150G, direct connection Has been. Thus, a gate electrode pad 113 _1, and the gate wiring pattern 150G, are electrically connected via the conductor W1. In the example shown in FIG. 1, although the gate electrode pad 113 ₁ and the gate wiring pattern 150G are electrically connected by one conductor W1, not the number of wires W1 connecting the two is not limited to this.

Similarly, a gate electrode pad 113 _2, and the gate wiring pattern 150G, are electrically connected via the conductor W1.

  In the above wiring structure, the K transistors 110 are electrically connected in parallel, and the L diodes 120 are also electrically connected in parallel.

  The conducting wire W2 is a second conducting wire for electrically connecting the source electrode pads 112 of the K transistors 110. The material of the conducting wire W2 is not particularly limited, but may be the same as the material of the conducting wire W1, for example.

  The conducting wire W2 is a different type of conducting wire from the conducting wire W1 at least in the size of the cross-sectional area. Specifically, the conducting wire W2 has a cross-sectional area smaller than the cross-sectional area of the conducting wire W1. Examples of the conductive wire W2 include a wire and a ribbon.

  For example, when the conducting wire W1 and the conducting wire W2 are both wires, the conducting wire W2 may be a wire having a diameter equal to or less than ½ of the diameter of the conducting wire W1.

The wiring structure of the semiconductor device 10 using the conductive wire W2 will be described. In the embodiment including the L diodes 120, a transistor (jth transistor) 110 _j (j is an arbitrary integer from 1 to K) and The source electrode pads 112 _j and 112 _{k of the} transistor (k-th transistor) 110 _k (k is an arbitrary integer different from j among 1 to K) are connected to the two transistors 110 _j and 110 _k . It is electrically connected via a provided diode (hereinafter referred to as a first predetermined diode) and a conducting wire W2. In this case, since the two transistors 110 _j and 110 _k are bypass-connected by the conducting wire W2, the first predetermined diode also functions as a bypass-connecting diode.

FIG 1, j is illustrated cases is k is 2 and 1, the first predetermined diode is a diode 120 _1. In this case, the source electrode pad 112 ₁ of the transistor 110 _1, by the transistors ₁₁₀ 1, 110 diodes 120 ₁ of the anode electrode pad 122 ₁ and the conductor W2 provided for ₂ are bonded, a source electrode pad 112 _1, is directly connected to the anode electrode pad 122 _1.

Further, a source electrode pad 112 _{and second} transistor 110 _2, by the conductor W2 is bonded to the anode electrode pad 122 _first diode 120 _1, and the source electrode pad 112 _2, are connected the anode electrode pad 122 ₁ and is directly ing. Thereby, the source electrode pads 112 ₁ and 112 ₂ of the transistors 110 ₁ and 110 ₂ are electrically connected to each other via the anode electrode pad 122 ₁ and the conductive wire W 2 of the diode 120 ₁ .

Further, by wires W2 to the anode electrode pad 122 ₁ and the source wiring pattern 150S is bonded, and the anode electrode pad 122 ₁ and the source wiring pattern 150S may be connected directly.

As shown in FIG. 1, when a plurality of components are connected by a conductive wire W2 such as the transistor 112 ₁ , the diode 121 ₁ and the source wiring pattern 150S, they may be stitch-bonded by the conductive wire W2. Transistor 112 _2, The same applies to the diode 121 ₁ and the source wiring pattern 150S.

Since FIG. 1 specifically illustrates the case where K = 2, the case where (j, k) is (1, 2) is illustrated, and the diode 120 _{1 is used} as the first predetermined diode corresponding to them. Was illustrated. For example, when K is 3 or more, examples of the set of (j, k) include (1, 2), (2, 3), (3,4), ..., (K-2, K- 1) and (K-1, K), and the first predetermined diodes may be provided for each set.

  In the configuration of the semiconductor device 10 described above, the semiconductor device 10 is represented by the equivalent circuit shown in FIG. FIG. 3 is a diagram illustrating an equivalent circuit of the semiconductor device 10. In the example shown in FIG. 3, the case of K = L = 2 is shown to show the correspondence with the semiconductor device 10 illustrated in FIG.

  As shown in FIG. 3, the transistors Tr1 and Tr2 are connected in parallel. Specifically, the drain, source and gate of the transistor Tr1 are electrically connected to the drain, source and gate of Tr2, respectively.

  Diodes D1 and D2 are connected to the transistors Tr1 and Tr2, respectively.

  The anode of the diode D1 is connected to the source of the transistor Tr1, and the cathode of the diode D1 is connected to the drain of the transistor Tr1. The anode of the diode D2 is connected to the source of the transistor Tr2, and the cathode of the diode D2 is connected to the drain of the transistor Tr2. The diode D1 particularly functions as a free-wheeling diode for the transistor Tr1. The diode D2 particularly functions as a free-wheeling diode for the transistor Tr2. However, since the transistors Tr1 and Tr2 are connected in parallel as described above, the diodes D1 and D2 are also connected in parallel. Therefore, the diodes D1 and D2 can function as a free-wheeling diode for the transistors Tr1 and Tr2 as a whole.

  The terminal t1 is connected to the drains of the transistors Tr1 and Tr2. The terminal t2 is connected to the sources of the transistors Tr1 and Tr2. The terminal t3 is connected to the gates of the transistors Tr1 and Tr2.

The transistors Tr1 and Tr2 correspond to the transistors 110 ₁ and 110 ₂ (FIG. 1). The diodes D1 and D2 correspond to the diodes 120 ₁ and 120 ₂ (FIG. 1). The terminals t1, t2, and t3 correspond to the drain terminal TD, the source terminal TS, and the gate terminal TG (FIG. 1).

  The operation of the semiconductor device 10 will be described with reference to the equivalent circuit of FIG. When a control voltage is applied to the terminal t3 with a positive voltage applied to the terminal t1 and a negative voltage applied to the terminal t2, the drains and sources of the transistors Tr1 and Tr2 are brought into conduction. Thereby, a current flows between the terminal t1 and the terminal t2. Thus, the current flowing between the terminal t1 and the terminal t2 is referred to as a main current. For this reason, if the control voltage for the terminal t3 is ON / OFF controlled, for example, the semiconductor device 10 functions as one switching element. Therefore, the semiconductor device 10 can be used, for example, as an upper arm portion or a lower arm portion of a one-phase inverter circuit in a power module. The control voltage applied to the terminal t3 is usually set with reference to the potential at the terminal t2.

  Next, the effect of providing the conducting wire W2 in the semiconductor device 10 will be described in comparison with the case where the conducting wire W2 is not provided.

  As described above, the control voltage applied to the terminal t3 is usually set based on the potential of the terminal t2. This assumes that the potentials of the source electrode pads 112 of the transistors 110 are equal in the mounting state shown in FIG. However, when the conductive wire W2 is not considered, the length of the first current path from the source terminal TS to each of the source electrode pads 112 of the K transistors 110 is different. Due to the influence, the potential of the source electrode pad 112 of each transistor 110 is different. As a result, for example, in the equivalent circuit of FIG. 3, when the terminal t1 and the terminal t2 are short-circuited and a large current flows between the drain and the source, the potentials of the gates of the transistors Tr1 and Tr2 may oscillate. The terminal t1 and the terminal t2 are short-circuited, for example, when the semiconductor device 10 is applied to an inverter or the like and the load is short-circuited.

  In order to prevent this, the source electrode pads 112 of the K transistors 110 may be electrically connected by the shortest possible conductors so as not to be affected by the main current. Thereby, the reference potential becomes uniform among the K transistors 110, and the above-described expansion of oscillation is suppressed.

  In that case, in the semiconductor device 10, it is conceivable that the source electrode pads 112 of the transistors 110 are connected to each other by a conducting wire W1 for flowing a main current. That is, it is conceivable to use the conducting wire W1 as a conducting wire for suppressing the fluctuation of the reference potential of each transistor 110. However, the bonding of the conducting wire W1 may damage the transistor 110.

On the other hand, in the semiconductor device 10, the source electrode pads 112 (source electrode pads 112 ₁ and 112 _{2 in} FIG. 1) of the transistor 110 are electrically connected to each other by the conductive wire W2. As understood from FIG. 1, the path where the source electrode pad ₁₁₂ 1, 112 ₂ How to via conductor W2 is electrically connected to the source electrode pad 112 ₁ through the wiring pattern 150S for wires W1 and the source 1122 is shorter than the path through which the _two are electrically connected. Moreover, since the conducting wire W2 has a smaller cross-sectional area than the conducting wire W1, the main current hardly flows through the conducting wire W2.

  In this way, the source electrode pads 112 of the K transistors 110 are electrically connected to each other between the K transistors 110 by a short distance through the conductive wire W2 that is not affected by the main current. The potential of the pad 112 (reference potential) becomes uniform. For this reason, for example, when the semiconductor device 10 is used as a power module, even if a load is short-circuited and a large short-circuit current flows through each transistor 110, the expansion of oscillation that can occur in the gate electrode pad 113 of the transistor 110 can be suppressed. it can.

  Furthermore, since the conductive wire W2 has a cross-sectional area smaller than the cross-sectional area of the conductive wire W1, the transistor 110 and the source electrode pad 112 of each transistor 110 are electrically connected to each other by the conductive wire W1 having a large cross-sectional area. The possibility of damaging the diode 120 (hereinafter sometimes referred to as the transistor 110 or the like) can be reduced. This effect can be more advantageous when, for example, the lead wire W2 is stitch-bonded. This is because the power for stitch bonding can be reduced in the case of the conductive wire W2 having a small cross-sectional area.

The semiconductor device 10 includes L diodes 120 including a first predetermined diode provided for the transistors 110 _j and 110 _k , and the diode 120 functions as a free-wheeling diode. Therefore, K transistors 110 can be protected.

  When both the conducting wire W1 and the conducting wire W2 are wires, the conducting wire W2 may be a wire having a diameter equal to or less than ½ of the diameter of the conducting wire W1. By using the conductive wire W2 having a small diameter (small cross-sectional area) as described above, the possibility of damaging the transistor 110 and the like can be sufficiently reduced.

  Moreover, when the diameter of the conducting wire W2 is small, the electrical resistivity of the conducting wire W2 can be increased. By increasing the electrical resistivity of the conductive wire W2, the magnitude of the current that can flow through the conductive wire W2 can be suppressed, thereby making it less susceptible to the main current.

[First Modification]
FIG. 4 is a plan view schematically showing a semiconductor device 10A according to the first modification. The semiconductor device 10A differs from the semiconductor device 10 (FIG. 1) described above in the wiring structure using the conductive wire W2.

In the semiconductor device 10A, the source electrode pads 112 _j and 112 _{k of} the transistors 110 _j and 110 _k are directly connected to each other by a conducting wire W2. The transistors 110 _j and 110 _k in the semiconductor device 10A may be, for example, transistors arranged close to each other. Specifically, the source electrode pads 112 ₁ and 112 ₂ of the transistors 110 ₁ and 110 ₂ are directly connected to each other by a conducting wire W2.

  Even with such a wiring structure using the conductive wire W2, the source electrode pads 112 of the K transistors 110 can be electrically connected to each other.

Further, according to the semiconductor device 10A, the source electrode pads 112 _j and 112 _k can be electrically connected by a smaller number (only one) of conductive wires W2 than the semiconductor device 10 (FIG. 1). it can. Accordingly, the possibility of damaging the transistor 110 and the like can be further reduced. Furthermore, according to the semiconductor device 10A, the source electrode pads 112 _j and 112 _k are directly connected to each other by the conductive wire W2, so that, for example, as in the semiconductor device 10 (FIG. 1), both are anode electrodes of the first predetermined diode. pad than when it is electrically connected via and wire W2 (anode electrode pad 122 1 of FIG. 1 diode 120 _1), it is possible to connect them with a short distance. Therefore, the potential (reference potential) of the source electrode pad 112 can be made more uniform between the transistors 110 _j and 110 _k and thus between the K transistors 110.

[Second Modification]
FIG. 5 is a plan view schematically showing a semiconductor device 10B according to another modification. The semiconductor device 10B is different from the semiconductor device 10 (FIG. 1) described above in the wiring structure using the conductive wire W1 and the conductive wire W2.

In the semiconductor device 10B, the source electrode pad _112j of the transistor _110j and the anode electrode pad of the first predetermined diode are directly connected by the conducting wire W1. Specifically, the transistor 113 ₁ of the transistor 110 ₁ and the anode electrode pad 122 ₁ of the diode 120 ₁ are directly connected by a conducting wire W1.

And the source electrode pad 112 _k of the transistor 110 _k, and the anode electrode of the first predetermined diodes are connected directly by wire W2. Specifically, the source electrode pad 112 _{and second} transistor 110 _2, and the anode electrode pad 122 _first diode 120 ₁ is directly connected by wires W1.

  Even with such a wiring structure using the conductive wire W2, the source electrode pads 112 of the K transistors 110 can be electrically connected to each other.

[Second Embodiment]
FIG. 6 is a plan view schematically showing the semiconductor device 20 according to the second embodiment. As compared with the semiconductor device 10 (FIG. 1), the semiconductor device 20 includes a substrate 200 instead of the substrate 100, and further includes M (M is an integer of 2 or more) transistors (additional transistors) 130 and N transistors. It is different in that it includes a diode (additional diode) 140 (N is an integer of 2 or more), and the arrangement and connection relationship of each element.

FIG. 6 illustrates a case where K and M are 3 and L and N are 2. When the M transistors 130 are described separately, the transistor 130 _f (f is an integer from 1 to M) may be referred to. Similarly, the components of the transistor 130 may be distinguished from each other by adding “f” as a subscript. In FIG. 6, as an example, three transistors 110 ₁ , 110 _2, 110 ₃ and three transistors 130 ₁ , 130 ₂ , 130 ₃ are illustrated. When the N diodes 140 are described separately, they may be referred to as diodes 140 _g (g is an integer from 1 to N). Similarly, the components of the diode 140 may be distinguished from each other by adding “g” as a subscript. In FIG. 6, two diodes 120 ₁ and 120 ₂ and two diodes 140 ₁ and 140 ₂ are illustrated as an example.

  The substrate 200 is an insulating substrate having a main surface 200a. A wiring pattern 155 is formed on the main surface 200a. In the example shown in FIG. 6, the wiring pattern 155 includes a gate wiring pattern 155G, an auxiliary wiring pattern 155R, a drain wiring pattern 155D, a source / drain wiring pattern 155SD, a gate wiring pattern 156G, and an auxiliary wiring. A pattern 156R and a source wiring pattern 156S are included. Each pattern included in the wiring pattern 155 is electrically separated.

  A gate terminal TG is provided in the gate wiring pattern 155G. An auxiliary terminal TR is provided in the auxiliary wiring pattern 155R. The drain wiring pattern 155D is provided with a drain terminal TD. The source / drain wiring pattern 155SD is provided with an output terminal TO. In FIG. 6, the output terminal TO indicated by the alternate long and short dash line indicates a modification to the arrangement state of the output terminal TO indicated by the solid line. The gate wiring pattern 156G is provided with a gate terminal TG2. The auxiliary wiring pattern 156R is provided with an auxiliary terminal TR2. The source wiring pattern 156S is provided with a source terminal TS2. Each terminal is used to electrically connect each pattern and an element outside the semiconductor device 20 such as an external circuit (not shown).

In the transistor 110 _i , the drain electrode pad 111 _i is joined to the drain wiring pattern 155D so that the drain electrode pad 111 _i is electrically connected to the drain wiring pattern 155D, whereby the drain wiring pattern 155D. It is mounted on. Similarly, diode 120 _h, a cathode electrode pad 121 _h is, so as to be electrically connected to the drain wiring pattern 155D, by the cathode electrode pad 121 _h is bonded to the drain wiring pattern 155D, a drain It is mounted on the wiring pattern 155D. Thereby, the drain electrode pad 111 _i of the transistor 110 _i and the cathode electrode pad 121 _h of the diode 120 _h are electrically connected via the drain wiring pattern 155D.

The transistor 130 _f includes a drain electrode pad 131 _f (fourth electrode pad), a source electrode pad 132 _f (fifth electrode pad), and a gate electrode pad 133 _f (sixth electrode pad). For details of each electrode pad is similar to the corresponding portions of the transistor 110 _f, the description thereof is omitted here.

The diode 140 _g includes a cathode electrode pad 141 _g and an anode electrode pad 142 _g . The details of each electrode pad are the same as the corresponding portions of the diode 120 _h , and thus the description thereof is omitted here.

Transistor 130 _f, by the drain electrode pad 131 _f is, so as to be electrically connected to the source-drain wiring pattern 155SD, drain electrode pad 131 _f is joined to the wiring pattern 155SD for source-drain, source It is mounted on the drain wiring pattern 155SD. Similarly, the diode 140 _g has the cathode electrode pad 121 _g joined to the source / drain wiring pattern 155SD so that the cathode electrode pad 141 _g is electrically connected to the source / drain wiring pattern 155SD. Is mounted on the source / drain wiring pattern 155SD. Thus, the drain electrode pad 131 _f of the transistor 130 _f and the cathode electrode pad 141 _g of the diode 140 _g are electrically connected via the source / drain wiring pattern 155SD.

Also in the present embodiment, since the drain electrode pads 111 _i and 131 _f are located on the substrate 200 side, in FIG. 6, for convenience of illustration, the drain electrode pads 111 _i and 131 _f are shown using broken lead lines. ing.

  In the semiconductor device 20, each of the K transistors 110 is concentrically around the first region A 1 of the wiring pattern 155 (more specifically, the source / drain wiring pattern 155 SD) on the main surface 200 a of the substrate 200. Is arranged.

The K transistors 110 are arranged side by side with a predetermined relationship on one virtual circumference centered on the first region A1. Each of the L diodes 120 is disposed between, for example, K transistors 110. In that case, L = K-1. In the example illustrated in FIG. 6, the diode 120 ₁ is disposed between the transistor 110 ₁ and the transistor 110 ₂ . Diode 120 ₂ is disposed between the transistor 110 ₂ and the transistor 110 _3.

The transistor 110 _i source electrode pad 112 _i, and the source-drain wiring pattern 155SD, are connected directly by wire W1. Thus, the source electrode pad 112 _i and the source / drain wiring pattern 155SD are electrically connected.

And the source electrode pad 112 _i of the transistor 110 _i, and the auxiliary wiring pattern 155R, are connected directly by wire W1. Thus, the source electrode pad 112 _i and the auxiliary wiring pattern 155R are electrically connected.

In the semiconductor device 20, similarly to the semiconductor device 10 described above (FIG. 1), the transistor 110 _j source electrode pad 112 _j of one of the K transistor 110, with respect to transistors 110 _j and the transistor 110 _k The anode electrode pad of the provided first predetermined diode is directly connected by a conducting wire W2. Thereby, the source electrode pads 112 _i and 112 _k of the transistors 110 _i and 110 _k are electrically connected to each other through the conductive wire W2 and the diode 120.

Since FIG. 6 shows a form in which K is 3, there are two combinations of j and k when j is 1 and k is 2 and when j is 2 and k is 3. A first predetermined diode is provided for each. That is, the first predetermined diode for the _two transistors 110 ₁ and 110 ₂ when j is 1 and k is 2 is the diode 120 ₁ . The first predetermined diode for the _two transistors 110 ₂ , 110 ₃ when j is 2 and k is 3 is a diode 120 ₂ .

The wiring structure will be specifically described with reference to the example shown in FIG. A source electrode pad 112 ₁ of the transistor 110 _1, and the transistor ₁₁₀ 1, 110 anode electrode pad 122 ₁ of provided diodes 120 ₁ for _two, are connected directly by wire W2. A source electrode pad 112 _{and second} transistor 110 _2, and the anode electrode pad 122 _first diode 120 _1, are connected directly by wire W2. Further, a source electrode pad 112 _{and second} transistor 110 _2, transistors ₁₁₀ 2, 110 and the anode electrode pad 122 _{and second} diode 120 ₂ provided that with respect to _3, are connected directly by wire W2. A source electrode pad 112 _third transistor 110 _3, and the anode electrode pad 122 _{and second} diode 120 _2, are connected directly by wire W2.

  In this way, the source electrode pads 112 of the K transistors 110 are electrically connected via the anode electrode pads 122 of the L diodes 120 and the conductive wires W2. In the wiring structure of K transistors 110 and L diodes 120 by the conductive wire W2 shown in FIG. 6, they may be stitch-bonded by the conductive wire W2.

The M transistors 130 are connected in series to the K transistors 110. Specifically, the source electrode pads 112 of the K transistors 110 connected in parallel and the drain electrode pads 131 of the M transistors 130 connected in parallel are connected via the source / drain wiring pattern 155SD and the conductive wire W1. Electrically connected.

  Each of the M transistors 130 is concentrically arranged around the second region A2 of the wiring pattern 155 (more specifically, the source / drain wiring pattern 155SD) on the main surface 200a of the substrate 200. .

The M transistors 130 are arranged side by side with a predetermined interval in a virtual circumferential shape centering on the second region A2. Each of the N diodes 140 is disposed between, for example, M transistors 130. In that case, N = M-1. In the example illustrated in FIG. 6, the diode 140 ₁ is disposed between the transistor 130 ₁ and the transistor 130 ₂ . Diode 140 ₂ is disposed between the transistor 130 ₂ and the transistor 130 _3.

A transistor 130 _f source electrode pad 132 _f of the source wiring pattern 156S, are connected directly by wire W1. Thus, the source electrode pad 132 _f, and the source wiring pattern 156S, are electrically connected.

The transistor 130 _i source electrode pad 132 _i, and the auxiliary wiring pattern 156R, are connected directly by wire W1. Thus, the source electrode pad 132 _i and the auxiliary wiring pattern 156R are electrically connected.

  Similarly to the case of the K transistors 110, the source electrode pads 132 of the M transistors 130 are electrically connected by the conductive wire W2.

That is, as shown in FIG. 6, in the form in which N diodes 140 are provided for the M transistors 130, a transistor (m-th transistor) of the M transistors 130 (m-th transistor) 130 _m (m is , 1 to M) and a transistor (n-th transistor) 130 _n (n is an arbitrary integer different from m of 1 to M) source electrode pads 132 _m and 132 _n. The two transistors 130 _m and 130 _n are electrically connected via a diode (hereinafter referred to as a second predetermined diode) and a conducting wire W2. In this case, since the two transistors 130 _m and 130 _n are bypass-connected by the conducting wire W2, the second predetermined diode also functions as a bypass-connecting diode.

In the example shown in FIG. 6, m is the second predetermined diode for the two transistors ₁₃₀ m, 130 _n corresponding to the set of m and n is 2 is n 1 is a diode 140 _1. The second predetermined diode for the two transistors 130 ₂ , 130 ₃ corresponding to the set of m and n where m is 2 and n is 3 is the diode 140 ₂ . In this case, as shown in FIG. 6, the source electrode pad 132 _m of the transistor 130 _m of the M transistors 130 and the anode electrode pad of the second predetermined diode are directly connected by the conducting wire W2. . Thereby, the source electrode pads 112 _m and 112 _n of the transistors 130 _m and 130 _n are electrically connected to each other through the conductive wire W2 and the second predetermined diode.

Specifically, the source electrode pad 132 ₁ of the transistor 130 ₁ and the anode electrode pad 142 ₁ of the diode 140 ₁ are connected by a conducting wire W2. A source electrode pad 132 _{and second} transistor 130 _2, and the anode electrode pad 142 _first diode 140 _1, are connected by wires W2. Further, a source electrode pad 132 _{and second} transistor 130 _2, and transistors ₁₃₀ 2, 130 ₃ diode 140 _{and second} anode electrode pad 142 ₂ provided for are connected directly by wire W2. A source electrode pad 132 _third transistor 130 _3, and the anode electrode pad 142 _{and second} diode 140 _2, are connected directly by wire W2.

In this way, the source electrode pads 132 of the M transistors 130 are electrically connected via the anode electrode pads 142 ₁ and 142 _{2 of} the N diodes 140 and the conductive wire W2. In the wiring structure of M transistors 130 and N diodes 140 by the conductive wire W2 shown in FIG. 6, they may be stitch-bonded by the conductive wire W2.

  In the configuration of the semiconductor device 20 described above, the semiconductor device 20 is represented by the equivalent circuit shown in FIG. FIG. 7 is a diagram illustrating an equivalent circuit of the semiconductor device 20. In the example shown in FIG. 7, the case of K = 3, L = 2, M = 3, and N = 2 is shown to show the correspondence with the semiconductor device 20 shown in FIG.

  As shown in FIG. 7, a parallel circuit in which transistors Tr1 to Tr3 are connected in parallel and a parallel circuit in which transistors Tr4 to Tr6 are connected in parallel are connected in series. Here, the series connection means a relationship in which the sources of the transistors Tr1 to Tr3 and the drains of the transistors Tr4 to Tr6 are connected as shown in FIG. Diodes D1 and D2 are connected as free-wheeling diodes to the transistors Tr1 to Tr3. Diodes D3 and D4 are connected as free-wheeling diodes to the transistors Tr4 to Tr6.

  The terminal t1 is connected to the drains of the transistors Tr1 to Tr3. The terminal t2 is connected to a connection portion between the sources of the transistors Tr1 to Tr3 and the drains of the transistors Tr4 to Tr6. The terminal t3 is connected to the gates of the transistors Tr1 to Tr3. The terminal t4 is connected to the sources of the transistors Tr1 to Tr3. A control voltage for controlling conduction between the source and drain of the transistors Tr1 to Tr3 is applied between the terminal t3 and the terminal t4.

  The terminal t5 is connected to the sources of the transistors Tr4 to Tr6. The terminal t6 is connected to the sources of the transistors Tr4 to Tr6. The terminal t7 is also connected to the sources of the transistors Tr4 to Tr6. A control voltage for controlling conduction between the source and drain of the transistors Tr4 to Tr6 is applied between the terminal t5 and the terminal t6.

The transistors Tr1, Tr2, Tr3, Tr4, Tr5, Tr6 correspond to the transistors 110 ₁ , 110 ₂ , 110 ₃ , 130 ₁ , 130 ₂ , 130 ₃ (FIG. 6). The diodes D1, D2, D3, and D4 correspond to the diodes 120 ₁ , 120 ₂ , 140 ₁ , and 140 ₂ (FIG. 6). The terminals t1, t2, t3, and t4 correspond to the drain terminal TD, the output terminal TO, the gate terminal TG, and the auxiliary terminal TR (FIG. 6). Terminals t5, t6, and t7 correspond to the source terminal TS2, the gate terminal TG2, and the auxiliary terminal TR2 (FIG. 6).

  The operation of the semiconductor device 20 will be described with reference to the equivalent circuit of FIG. When a control voltage is applied between the terminal t3 and the terminal t4 in a state where a sex voltage is applied to the terminal t1 and a negative voltage is applied to the terminal t5, the drains and sources of the transistors Tr1, Tr2, and Tr3 are conducted, and the terminal t6 When a control voltage is applied between the transistor Tr4 and the terminal t7, the drains and the sources of the transistors Tr4, Tr5, Tr6 become conductive. As a result, a current (main current) flows between the terminal t1 and the terminal t2 or between the terminal t2 and the terminal t5. Therefore, if the control voltage applied between the terminal t3 and the terminal t4 and the control voltage applied between the terminal t6 and the terminal t7 are controlled, for example, by ON / OFF control, the semiconductor device 20 can be switched in two series connected. Functions as an element. Therefore, the semiconductor device 20 can be used as, for example, a one-phase inverter circuit (including an upper arm and a lower arm) in a power module.

  Next, functions and effects of the semiconductor device 20 will be described. First, also in the semiconductor device 20, as in the semiconductor device 10 described above, the source electrode pads 112 of the K transistors 110 are electrically connected by the conductive wire W2. In the semiconductor device 20, the source electrode pads 132 of the M transistors 130 are electrically connected to each other through the conductive wire W <b> 2. Therefore, the semiconductor device 20 has the same effect as the semiconductor device 10 described above. That is, it is possible to suppress the expansion of oscillation that can occur in the gate electrode pads 113 of the K transistors 110 and the gate electrode pads 133 of the M transistors 130.

Further, in the semiconductor device 20, each of the K transistors 110 is concentrically arranged around the first region A1 of the source / drain wiring pattern 155SD on the main surface 200a of the substrate 200. Then, a source electrode pad 112 _i of the transistor 110 _i, and the first region A1 are connected directly by wire W1.

Therefore, it source electrode pad 112 _i, the length of each wire W1 connecting the first region A1 substantially uniformly. As a result, the length of the first current path from the source terminal TS to the source electrode pad 112 of each transistor 110 is substantially uniform. As a result, the potentials of the source electrode pads 112 of the K transistors 110 are likely to be constant. This effect can be more advantageous when, for example, the output terminal TO is provided at or near the first region A1.

  However, even when the output terminal TO is arranged at a position away from the first region A1 as in the output terminal TO shown by the one-dot chain line in FIG. Almost uniform. This is because the output terminal TO is sufficiently separated from the first region A1, and in the first current path from the source terminal TS to each source electrode pad 112, the first region A to the source terminal TS. This is because the difference in the length of the path up to this point can be almost ignored, while the length of the conductive wire W1, which is the length of the current path from the first region A1 to each source electrode pad 112, can be made uniform.

Similarly, each of the M transistors 130 is disposed concentrically around the second region A2 of the source / drain wiring pattern 155SD. The source electrode pad 132 of each transistor 130 and the second region A2 are directly connected by the conductive wire W1. Therefore, it and the source electrode pad 132 _f, the length of each wire W1 which connects the second area A2 substantially uniformly. As a result, the length of the second current path from the source terminal TS2 to the source electrode pad 132 of each transistor 130 becomes substantially uniform. Therefore, the potentials of the source electrode pads 132 of the M transistors 130 are likely to be constant.

  As described above, in the semiconductor device 20, the potentials of the source electrode pads 112 of the K transistors 110 and the source electrode pads 132 of the M transistors 130 are likely to be constant, so that oscillation that may occur in the gate electrode pads 113 and 133 is generated. Expansion can be further suppressed.

  Although various embodiments have been described above, the present invention is not limited to the various embodiments described so far, and various modifications can be made without departing from the spirit of the present invention.

  For example, also in the first embodiment, as described in the second embodiment, the K transistors 110 are arranged concentrically around a predetermined region of the wiring pattern 150 and the source of each transistor 110 is The electrode pad 112 and the predetermined region may be directly connected by a conducting wire W1 having substantially the same length. In this case, as described in the second embodiment, the influence of the conductive wire W1 is likely to be uniform in each transistor 110, and the potentials of the source electrode pads 112 are likely to be uniform.

  In the second embodiment, the wiring structure of the K transistor 110 by the conductive wire W2 between the source electrode pads 112 and the wiring structure of the M transistor 130 by the conductive wire W2 between the source electrode pads 132 are the first embodiment. Various forms exemplified in (1) may be adopted.

  In the first embodiment, the gate electrode pad 113 of the transistor 110 and the wiring pattern 150, specifically, for example, the gate wiring pattern 150G is connected using the conductive wire W1, but the gate electrode pad 113 and the wiring pattern 150G The connection with the pattern 150 is not limited to the conducting wire W1. For example, the lead wire W2 can be used. This is because a large current does not flow through the gate electrode pad 113 as compared with the source electrode pad 112. The same applies to the gate electrode pad 133 of the transistor 130 in the second embodiment.

  In the first and second embodiments, the semiconductor device includes the diodes 120 and 140. However, the diodes 120 and 140 may not be provided. For example, in the form in which the transistors 110 and 130 are MOSFETs, the diodes 120 and 140 may not be provided separately from the transistors 110 and 130 when the diodes are built in due to the structure in the transistors 110 and 130. .

  In the description so far, the mode in which the transistors 110 and 130 are MOSFETs has been mainly described. However, as described above, the transistors 110 and 130 may be IGBTs. In the embodiment in which the transistors 110 and 130 are IGBTs, in the description of the MOSFET, “drain” may be read as “collector” and “source” may be read as “emitter”. For example, the drain electrode pad in the MOSFET corresponds to the collector electrode pad in the IGBT, and the source electrode pad corresponds to the emitter electrode pad in the IGBT. Similarly, the drain wiring pattern and the source wiring pattern correspond to the collector wiring pattern and the emitter wiring pattern when the transistors 110 and 130 are IGBTs.

  DESCRIPTION OF SYMBOLS 10,20 ... Semiconductor device, 100, 200 ... Substrate, 110, 130 ... Transistor, 111, 131 ... Drain electrode pad (first and fourth electrode pads), 112, 132 ... Source electrode pad (second, fifth) Electrode pads), 113, 133 ... gate electrode pads (third and sixth electrode pads), 120, 140 ... diodes, 121, 141 ... cathode electrode pads, 132, 142 ... anode electrode pads, 150, 155 ... wiring Pattern, W1 ... conducting wire (first conducting wire), W2 ... conducting wire (second conducting wire).

Claims (11)

A substrate having a wiring pattern formed on the main surface;
K transistors (K is an integer of 2 or more) provided on the main surface of the substrate and connected in parallel via the wiring pattern, each of which includes a first electrode pad, a first electrode, The K transistors having two electrode pads and a third electrode pad for receiving a control voltage for controlling conduction between the first electrode pad and the second electrode pad;
With
The second electrode pad of each of the K transistors is electrically connected to the wiring pattern via a first conductor.
The second electrode pads of the K transistors are electrically connected via a second conductor,
The second conductor has a cross-sectional area smaller than a cross-sectional area of the first conductor;
Semiconductor device. A diode provided for the j-th and k-th transistors of the K transistors (j and k are any different integers from 1 to K);
The diode has a cathode electrode pad and an anode electrode pad,
The cathode electrode pad is electrically connected to the first electrode pad of the jth transistor, and the anode electrode pad is electrically connected to the second electrode pad of the kth transistor. Has been
The second electrode pads of the jth and kth transistors are electrically connected via the second conductor and the diode;
The semiconductor device according to claim 1. The second electrode pad of the j-th transistor and the wiring pattern are directly connected by the first conductor;
The second electrode pad of the j-th transistor and the anode electrode pad of the diode are directly connected by the second conductor.
The second electrode pad of the kth transistor and the anode electrode pad of the diode are directly connected by the second conductor;
The semiconductor device according to claim 2. The second electrode pad of the j-th transistor and the anode electrode pad of the diode are directly connected by the first conductor;
The second electrode pad of the kth transistor and the anode electrode pad of the diode are directly connected by the second conductor;
The semiconductor device according to claim 2. Each of the K transistors is concentrically arranged around the first region of the wiring pattern on the main surface of the substrate.
The second electrode pad of each of the K transistors and the first region are directly connected by the first conductor;
The semiconductor device as described in any one of Claims 1-4. The second electrode pads of the j-th and k-th transistors (j and k are any different integers from 1 to K) of the K transistors are directly connected by the second conductor. Being
The semiconductor device according to claim 1. M additional transistors (M is an integer of 2 or more) provided in the main surface of the substrate and connected in parallel via a wiring pattern different from the wiring pattern , each of the additional transistors being A fourth electrode pad, a fifth electrode pad, and a sixth electrode pad for receiving a control voltage for controlling conduction between the fourth electrode pad and the fifth electrode pad, The M additional transistors;
The plurality of fourth electrode pads connected in parallel are electrically connected to the plurality of second electrode pads connected in parallel, so that the K transistors connected in parallel are connected in parallel. Connected in series to the M additional transistors,
The fifth electrode pad of each of the M additional transistors and the another wiring pattern are electrically connected by the first conductor.
5. The semiconductor device according to claim 1, wherein the fifth electrode pads of the M additional transistors are electrically connected to each other by the second conductive wire. Each of the K transistors is concentrically arranged around the first region of the wiring pattern on the main surface of the substrate.
The M additional transistors are arranged concentrically around the second region of the another wiring pattern on the main surface of the substrate.
The second electrode pad of each of the K transistors and the first region are directly connected by the first conductor;
The fifth electrode pad of each of the M additional transistors and the second region are directly connected by the first conductor.
The semiconductor device according to claim 7. An additional diode provided for the mth and nth additional transistors of the M additional transistors (m and n are any different integers from 1 to M);
The additional diode has a cathode electrode pad and an anode electrode pad,
The cathode electrode pad of the additional diode is electrically connected to the fourth electrode pad of the mth additional transistor, and the anode electrode pad of the additional diode is the fifth electrode of the nth additional transistor. Is electrically connected to the electrode pads of
9. The semiconductor device according to claim 7, wherein the fifth electrode pads of the m-th and n-th additional transistors are electrically connected via the second conductor and the additional diode. The fifth electrode pad of the mth transistor and the anode electrode pad of the additional diode are directly connected by the second conductor, and the fifth electrode pad of the nth transistor. And the anode electrode pad of the additional diode is directly connected by the second conductor.
The semiconductor device according to claim 9. The first conductor is a wire;
The second conductive wire is a wire having a diameter of ½ or less of the diameter of the first conductive wire.
The semiconductor device as described in any one of Claims 1-10.

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