JP6061068B2 - Switching circuit and medical device - Google Patents

Description

  The present invention relates to a switching circuit and a medical device.

  A plurality of rollers provided on concentric circles on the peripheral edge of the rotor and a tube that flows fluid between the tube receiving member and a rotor are rotated, so that the roller sequentially presses the tube and causes the fluid to flow. Medical devices that use fluid transport devices are known. Further, instead of a plurality of rollers, a medical device using a fluid transport device that presses a tube using a plurality of pressing elements (for example, piezoelectric elements) to flow a fluid, or a fluid ejecting apparatus using a piezoelectric element Medical devices used are known.

  For example, when a switching circuit such as a class D amplifier is used as a circuit for driving a plurality of piezoelectric elements, a bypass capacitor is disposed between the power supply potential and the ground potential in order to suppress ringing of the output voltage. It is generally performed (for example, Patent Document 1). For example, in a medical device using a fluid transport device or a fluid ejection device, occurrence of ringing leads to generation of EMI noise, which hinders the operation of the device itself and peripheral devices. Further, for example, as a result of generation of EMI noise due to ringing, in a medical device using a fluid ejecting apparatus, a variation in fluid ejection amount is caused.

JP 2011-187809 A

  In order to suppress ringing, it is important to reduce the parasitic inductance generated in the loop composed of two transistors and a bypass capacitor constituting the switching circuit. In order to reduce the parasitic inductance, it is necessary to reduce the area of the loop composed of the two transistors and the bypass capacitor constituting the switching circuit. Since the distance between the electrodes of the capacitor increases as the capacity of the capacitor increases, in the case of the arrangement of the capacitor described in Patent Document 1, the area of the loop tends to increase as the capacity of the capacitor increases. For this reason, there is a limit to ringing suppression, that is, stable fluid transport.

  The present invention has been made in view of the above problems, and according to some aspects of the present invention, a switching circuit that suppresses the occurrence of ringing, a medical device that can stably handle fluid, and the like Can be provided.

[Application Example 1]
A switching circuit according to an application example includes a multilayer wiring board having a first wiring layer and a second wiring layer, a first transistor, a second transistor, and a capacitor mounted on the first wiring layer side of the multilayer wiring board, The multilayer wiring board includes a first wiring, a second wiring, a third wiring, and a fourth wiring formed in the first wiring layer; a fifth wiring formed in the second wiring layer; A first via conductor that electrically connects a third wiring and the fifth wiring; and a second via conductor that electrically connects the fourth wiring and the fifth wiring; A drain electrode of the transistor is electrically connected to the first wiring, a source electrode of the first transistor is electrically connected to the second wiring, and a drain electrode of the second transistor is connected to the second wiring. Electrically connected with The source electrode of the second transistor is electrically connected to the third wiring, the first electrode of the capacitor is electrically connected to the first wiring, and the second electrode of the capacitor is the fourth wiring. It is a switching circuit electrically connected to the wiring.

  According to this application example, the first transistor, the second transistor, and the capacitor are all mounted on the first wiring layer side of the multilayer wiring board and electrically looped through the fifth wiring formed in the second wiring layer. Is forming. As a result, the area of the electrical loop including the first transistor, the second transistor, and the capacitor is increased even when the capacitor is larger than when the capacitor is mounted on the second wiring layer side of the multilayer wiring board. Can be suppressed. In addition, it is possible to suppress an increase in the area of the electrical loop including the first transistor, the second transistor, and the capacitor even when all the wirings are formed with the same wiring layer. That is, it is possible to suppress an increase in parasitic inductance. Thereby, ringing of the output voltage of the switching circuit can be suppressed.

  Further, since the first transistor, the second transistor, and the capacitor are all mounted on the first wiring layer side of the multilayer wiring board, they can be easily mounted.

  In addition, since no element is arranged on the second wiring layer side of the multilayer wiring board, for example, a heat sink is easily provided on the second wiring layer side of the multilayer wiring board, so that heat dissipation measures for the first transistor and the second transistor are easy. It becomes.

[Application Example 2]
In the switching circuit according to the application example described above, when the multilayer wiring board is viewed in plan, at least part of the first transistor, at least part of the second transistor, and at least part of the capacitor are on the same line. It is preferable to arrange | position.

  According to this application example, since at least a part of the first transistor, at least a part of the second transistor, and at least a part of the capacitor are arranged on the same straight line, the first transistor, the second transistor, and the capacitor are included. The area of the electrical loop can be reduced. As a result, the parasitic inductance can be reduced, and the ringing of the output voltage of the switching circuit can be suppressed.

[Application Example 3]
In the switching circuit according to the application example described above, it is preferable that the second wiring and the fifth wiring are formed at positions where at least a part of the second wiring and the fifth wiring overlap when the multilayer wiring board is viewed in plan.

  A reverse current normally flows through the second wiring and the fifth wiring. According to this application example, since the second wiring and the fifth wiring are formed at positions where at least a part thereof overlaps, the parasitic inductance is reduced by the effect of the mutual inductance. Thereby, ringing of the output voltage of the switching circuit can be suppressed.

[Application Example 4]
In the switching circuit according to the application example described above, the multilayer wiring board electrically connects the sixth wiring formed in a wiring layer other than the first wiring layer, and the first wiring and the sixth wiring. It is preferable to further have a third via conductor.

  According to this application example, since the sixth wiring electrically connected to the first wiring is formed in a wiring layer other than the first wiring layer (for example, the second wiring layer), the sixth wiring dissipates heat. Functions as a board. Therefore, the heat dissipation efficiency of the first transistor can be improved.

[Application Example 5]
In the switching circuit according to the application example described above, the multilayer wiring board electrically connects a seventh wiring formed in a wiring layer other than the first wiring layer, the second wiring, and the seventh wiring. It is preferable to further have a fourth via conductor.

  According to this application example, since the seventh wiring electrically connected to the second wiring is formed in a wiring layer other than the first wiring layer (for example, the second wiring layer), the seventh wiring is dissipated. Functions as a board. Therefore, the heat dissipation efficiency of the second transistor can be improved.

[Application Example 6]
In the switching circuit according to the application example described above, the multilayer wiring board includes: an eighth wiring formed in the first wiring layer; a ninth wiring formed in the second wiring layer; the second wiring; A fifth via conductor that is electrically connected to the ninth wiring, and a gate electrode of the first transistor is electrically connected to the eighth wiring, and the eighth wiring and the ninth wiring Is preferably formed at a position where at least a part thereof overlaps when the multilayer wiring board is viewed in plan.

  Normally, reverse currents flow through the eighth wiring and the ninth wiring. According to this application example, since the eighth wiring and the ninth wiring are formed at positions where at least a part thereof overlaps, the parasitic inductance is reduced by the effect of the mutual inductance. Thereby, ringing of the output voltage of the switching circuit can be suppressed.

[Application Example 7]
In the switching circuit according to the application example described above, the multilayer wiring board further includes a tenth wiring formed in the first wiring layer, and a gate electrode of the second transistor is electrically connected to the tenth wiring. It is preferable that the fifth wiring and the tenth wiring are connected and formed at a position where at least a part of the fifth wiring and the tenth wiring overlap when the multilayer wiring board is viewed in plan.

  A reverse current normally flows through the fifth wiring and the tenth wiring. According to this application example, since the fifth wiring and the tenth wiring are formed at positions where at least a part thereof overlaps, the parasitic inductance is reduced by the effect of the mutual inductance. Thereby, ringing of the output voltage of the switching circuit can be suppressed.

[Application Example 8]
A medical device according to an application example includes a drive waveform signal generation circuit that generates a drive waveform signal, a modulation circuit that generates a modulation signal by pulse-modulating the drive waveform signal, and the modulation signal that is a gate of the first transistor. By receiving the electrode and the gate electrode of the second transistor and generating a power amplification modulation signal that is a signal obtained by power amplification of the modulation signal, and by smoothing the power amplification modulation signal A medical device including a capacitive load driving circuit including a smoothing filter that generates a driving signal.

  According to this application example, since the switching circuit that suppresses the occurrence of ringing is included, a medical device that can stably handle fluid can be realized.

It is explanatory drawing which showed the detailed structure of the capacitive load drive circuit 200 using the switching circuit 230 of this embodiment. It is explanatory drawing which showed the outline | summary of the operation | movement in which the capacitive load drive circuit 200 using the switching circuit 230 of this embodiment produces | generates the drive signal 408. FIG. FIG. 3A and FIG. 3B are plan views illustrating an arrangement example of the switching circuit 230. It is sectional drawing in the AA line of FIG. 3 (A) and FIG. 3 (B). It is a figure for demonstrating a parasitic inductance. 6A is a graph showing an example of the output voltage waveform of the switching circuit 230 of the present embodiment, and FIG. 6B is a graph showing an example of the output voltage waveform of the switching circuit of the comparative example. It is explanatory drawing which showed the detailed structure of the capacitive load drive circuit 200 using the switching circuit 230 of a 1st modification. FIGS. 8A and 8B are plan views showing a first modification of the arrangement example of the switching circuit 230. FIG. 9A and 9B are plan views showing a second modification of the arrangement example of the switching circuit 230. FIG. 2 is an explanatory diagram illustrating a fluid ejection device 1. FIG. It is sectional drawing which shows the cut surface which cut | disconnected the pulsating flow generation part 21 concerning this embodiment along the injection direction of the fluid. It is a perspective view which shows the external appearance of 1 A of fluid transporters containing the fluid transport apparatus 20 of this embodiment. 4 is a diagram for explaining a mechanism of fluid transportation of the fluid transportation device 20. FIG.

  DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. The drawings used are for convenience of explanation. The embodiments described below do not unduly limit the contents of the present invention described in the claims. Also, not all of the configurations described below are essential constituent requirements of the present invention.

  Hereinafter, embodiments of the present invention will be described in the following order.

1. 1. Configuration example of switching circuit 2. Arrangement example of switching circuit 3. First modification example of arrangement of switching circuit 4. Second modification of arrangement example of switching circuit Medical equipment

1. Configuration Example of Switching Circuit FIG. 1 is an explanatory diagram showing a detailed configuration of a capacitive load driving circuit 200 using the switching circuit 230 of the present embodiment. As shown in the figure, the capacitive load drive circuit 200 includes a drive waveform signal generation circuit 210 that generates a drive waveform signal 402, and modulation that generates a modulation signal GH and a modulation signal GL by pulse-modulating the drive waveform signal 402. A circuit 220, a switching circuit 230 that receives the modulation signal GH and the modulation signal GL, generates a power amplification modulation signal 406 that is a signal obtained by power amplification of the modulation signal GH and the modulation signal GL, and smoothes the power amplification modulation signal 406 And a smoothing filter 240 that generates the drive signal 408.

  The drive waveform signal generation circuit 210 generates a drive waveform signal 402 serving as a reference for the drive signal 408 based on the control signal 400.

  The modulation circuit 220 performs PWM modulation (pulse width modulation) on the drive waveform signal 402 to generate a PWM modulation signal 404, and a gate for generating the modulation signal GH and the modulation signal GL based on the PWM modulation signal 404. And a driver circuit 222.

  The gate driver circuit 222 includes a level shifter 224 that adjusts the level of the PWM modulation signal 404, a high side driver 228H that switches ON / OFF of the first transistor M1 based on the PWM modulation signal 404 that has passed through the level shifter 224, and a level And a low-side driver 228L that switches ON / OFF of the second transistor M2 based on the PWM modulation signal 404 via the shifter 224.

  The signal output from the high-side driver 228H to switch ON / OFF of the first transistor M1 is a modulation signal GH, and the signal output from the low-side driver 228L to switch ON / OFF of the second transistor M2 is a signal. The modulation signal GL is used.

  The switching circuit 230 is configured as a digital power amplifier circuit (switching amplifier circuit) including a first transistor M1 and a second transistor M2 that generate a power amplification modulation signal 406, and a capacitor C1 that functions as a bypass capacitor. In the capacitive load driving circuit 200 according to the present embodiment, the first transistor M1 and the second transistor M2 are N-type MOSFETs, but other types of elements such as insulated gate bipolar transistors (IGBT) are used. May be used. The switching circuit to which the present invention is applied includes various switching circuits including a switching amplifier circuit, a switching power supply circuit, and an inverter circuit.

  As shown in FIG. 1, the first transistor M1 and the second transistor M2 are between a potential VDD (hereinafter simply referred to as VDD) supplied from a power source and a ground potential GND (hereinafter simply referred to as GND). Connected with. Then, the power amplification modulation signal 406 is generated by switching ON / OFF of the first transistor M1 and the second transistor M2. Note that a contact (node) where the first transistor M1 and the second transistor M2 are connected is defined as a first node N1. The first node N1 is on the wiring through which the power amplification modulation signal 406 is transmitted. The capacitor C1 is connected between VDD and GND.

  The smoothing filter 240 removes the high frequency component of the power amplification modulation signal 406 and generates the drive signal 408. In the example illustrated in FIG. 1, the smoothing filter 240 is configured as a low-pass filter including a coil LF and a capacitor CF.

  FIG. 2 is an explanatory diagram showing an outline of an operation in which the capacitive load driving circuit 200 using the switching circuit 230 of the present embodiment generates the driving signal 408. The drive waveform signal generation circuit 210 generates a drive waveform signal 402 as shown in FIG. 2 based on the control signal 400, for example. The drive waveform signal 402 is not limited to the analog signal as shown in FIG. 2, but may be a signal output at a DC level or a digital signal composed of multiple bits, for example.

  The drive waveform signal generation circuit 210 may include an arithmetic unit, for example, and may generate the drive waveform signal 402 by calculation based on the control signal 400. Further, for example, a waveform memory for storing a waveform may be provided, and the drive waveform signal 402 corresponding to the control signal 400 may be generated with reference to the waveform memory.

Upon receiving the drive waveform signal 402 from the drive waveform signal generation circuit 210, the modulation circuit 220 performs a predetermined modulation to generate a modulation signal GH and a modulation signal GL. The predetermined modulation is pulse-width modulation (PWM) in the present embodiment, but other modulation schemes such as pulse-density modulation (PDM) may be used.

  The switching circuit 230 receives the modulation signal GH and the modulation signal GL and performs power amplification. As shown in FIG. 1, the switching circuit 230 amplifies power using the first transistor M1 and the second transistor M2. In the example illustrated in FIG. 2, the switching circuit 230 generates a power amplification modulation signal 406 obtained by amplifying the voltage of the PWM modulation signal 404 to VDD.

  The smoothing filter 240 smoothes the power amplification modulation signal 406, and an analog drive signal having a high voltage value in a portion modulated to a wide pulse width and a low voltage value in a portion modulated to a narrow pulse width. 408 is generated. As shown in FIG. 1, the smoothing filter 240 can be easily realized by combining the coil LF and the capacitor CF.

  In the capacitive load driving circuit 200 of the present embodiment, the power is amplified by switching the first transistor M1 and the second transistor M2 on / off by the switching circuit 230, so that no extra power is consumed. Further, the smoothing filter 240 can also be configured with parts that do not consume power, such as the coil LF and the capacitor CF. For this reason, since the power loss can be significantly reduced as compared with the case where the analog drive waveform signal 402 is amplified in analog as in a so-called analog amplifier circuit, the power loss when generating the drive signal 408 can be reduced. It can be greatly reduced.

  In such a switching circuit 230, ringing of the output voltage may be a problem. In a medical device using a fluid transport device or a fluid ejection device, if ringing occurs in the switching circuit 230 that drives the fluid transport device, EMI noise is generated, which hinders the operation of the device itself and peripheral devices. Further, when the rise time of the switching waveform is lengthened in order to suppress ringing, the power efficiency is lowered and the accuracy of fluid control is lowered. In addition, when ringing occurs, the voltage applied to the first transistor M1 and the second transistor M2 increases, which causes element destruction and malfunction.

  Causes of ringing include resonance phenomenon due to parasitic inductance of the electrical loop including the first transistor M1, the second transistor M2, and the capacitor C1 and the parasitic capacitance between the drain / source of the first transistor M1 or the second transistor M2. , A resonance phenomenon caused by the parasitic inductance of the electrical loop including the high-side driver 228H and the first transistor M1 and the gate capacitance of the first transistor M1, and the parasitic inductance of the electrical loop including the low-side driver 228L and the second transistor M2. And a resonance phenomenon due to the gate capacitance of the second transistor M2.

  Therefore, when arranging elements and wirings constituting the switching circuit 230, it is particularly important to reduce the parasitic inductance of the electrical loop.

2. Switching Circuit Arrangement Example The switching circuit 230 in the present embodiment includes a multilayer wiring board 1000 having a first wiring layer and a second wiring layer, and a first transistor M1 mounted on the first wiring layer side of the multilayer wiring board 1000, The second transistor M2 and the capacitor C1 are included.

FIG. 3A and FIG. 3B are plan views illustrating an arrangement example of the switching circuit 230.
FIG. 3A mainly shows the configuration of the first wiring layer. FIG. 3B mainly shows the configuration of the second wiring layer. In FIGS. 3A and 3B, the solid polygon represents the wiring formed in the first wiring layer or the second wiring layer, and the solid circle represents the wiring of the first wiring layer and the second wiring layer. The position of the via conductor that electrically connects the wiring is shown. In FIG. 3A, the alternate long and short dash line indicates the mounting position of each transistor, capacitor, and coil, and the dotted line indicates the position of each transistor, capacitor, and coil electrode.

  FIG. 4 is a cross-sectional view taken along the line AA in FIGS. 3 (A) and 3 (B). As shown in FIG. 4, an insulating layer is provided between the first wiring layer and the second wiring layer of the multilayer wiring board 1000. That is, the wiring formed in the first wiring layer and the wiring formed in the second wiring layer are insulated from each other except when connected by via conductors. The thickness of the insulating layer is usually sufficiently smaller than the wiring width. The multilayer wiring board 1000 has three or more wiring layers, and two wiring layers arbitrarily selected from the three or more wiring layers may be used as the first wiring layer and the second wiring layer. The first wiring layer and the second wiring layer are preferably closest to each other. The multilayer wiring board 1000 may have a protective layer that protects the wiring layer.

  The multilayer wiring board 1000 in this embodiment includes a first wiring 1001, a second wiring 1002, a third wiring 1003, a fourth wiring 1004 formed in the first wiring layer, and a fifth wiring formed in the second wiring layer. 1005, a first via conductor 2001 that electrically connects the third wiring 1003 and the fifth wiring 1005, and a second via conductor 2002 that electrically connects the fourth wiring 1004 and the fifth wiring 1005. It is configured.

  Further, the drain electrode D of the first transistor M1 is electrically connected to the first wiring 1001, and the source electrode S of the first transistor M1 is electrically connected to the second wiring 1002. The drain electrode D of the second transistor M2 is electrically connected to the second wiring 1002, and the source electrode S of the second transistor M2 is electrically connected to the third wiring 1003. The first electrode + C1 of the capacitor C1 is electrically connected to the first wiring 1001, and the second electrode -C1 of the capacitor C1 is electrically connected to the fourth wiring 1004. That is, a part of the wiring path from the source electrode S of the second transistor M2 to the second electrode -C1 of the capacitor C1 is formed as the fifth wiring 1005 of the second wiring layer.

  According to the present embodiment, the first transistor M1, the second transistor M2, and the capacitor C1 are all mounted on the first wiring layer side of the multilayer wiring board 1000, and the fifth wiring 1005 formed in the second wiring layer is interposed therebetween. Therefore, the area of the electrical loop greatly depends on the distance between the first wiring layer and the second wiring layer, that is, the thickness of the insulating layer. As a result, as compared with the case where the capacitor C1 is mounted on the second wiring layer side of the multilayer wiring board 1000, the electrical circuit including the first transistor M1, the second transistor M2, and the capacitor C1 is included even if the capacitor C1 becomes larger. An increase in the area of the loop can be suppressed. Further, since the thickness of the insulating layer is sufficiently smaller than the wiring width, the electrical characteristics including the first transistor M1, the second transistor M2, and the capacitor C1 can be achieved even when all the wirings are formed of the same wiring layer. An increase in the area of the loop can be suppressed. That is, it is possible to suppress an increase in parasitic inductance. Thereby, ringing of the output voltage of the switching circuit 230 can be suppressed.

  In addition, since the first transistor M1, the second transistor M2, and the capacitor C1 are all mounted on the first wiring layer side of the multilayer wiring board 1000, they can be easily mounted.

In addition, since no element is arranged on the second wiring layer side of the multilayer wiring board 1000, for example, a heat sink is provided on the second wiring layer side of the multilayer wiring board 1000, and the first transistor M1 and the second transistor M2 are arranged. Easier heat dissipation measures.

  In the example shown in FIG. 3A, when the multilayer wiring board 1000 is viewed in plan, at least a part of the first transistor M1, at least a part of the second transistor M2, and at least a part of the capacitor C1 are on the same line. Is arranged. In the example shown in FIG. 3A and FIG. 4, the capacitor C1, the first transistor M1, and the second transistor M2 are arranged on the same straight line in this order.

  According to the present embodiment, since at least a part of the first transistor M1, at least a part of the second transistor M2, and at least a part of the capacitor C1 are arranged on the same straight line, the first transistor M1, the second transistor The area of the electrical loop including M2 and the capacitor C1 can be reduced. As a result, the parasitic inductance can be reduced, and the ringing of the output voltage of the switching circuit 230 can be suppressed.

  In the example shown in FIGS. 3A and 3B, the second wiring 1002 and the fifth wiring 1005 are formed at positions where at least a part thereof overlaps when the multilayer wiring board 1000 is viewed in plan. .

  FIG. 5 is a diagram for explaining the parasitic inductance. FIG. 5 shows two wirings provided apart from each other. When a current flows through one wiring, a back electromotive force is generated in a direction that cancels out the magnetic field that the current creates. When two wirings are provided close to each other, a back electromotive force is generated in the other wiring in a direction that cancels a magnetic field generated by a current flowing in one wiring (effect of mutual inductance). Therefore, by wiring so that the currents flowing through the two wirings are opposite to each other, the parasitic inductance of the wiring can be reduced.

  A reverse current normally flows through the second wiring 1002 and the fifth wiring 1005. According to the present embodiment, since the second wiring 1002 and the fifth wiring 1005 are formed at positions where at least a part thereof overlaps, the parasitic inductance is reduced by the effect of the mutual inductance described with reference to FIG. . Thereby, ringing of the output voltage of the switching circuit 230 can be suppressed.

  In the example shown in FIGS. 3A and 3B, the multilayer wiring board 1000 includes a sixth wiring 1006 formed in a second wiring layer that is a wiring layer other than the first wiring layer, and a first wiring 1001. And a third via conductor 2003 that electrically connects the first wiring 1006 and the sixth wiring 1006.

  According to the present embodiment, since the sixth wiring 1006 electrically connected to the first wiring 1001 is formed in the wiring layer other than the first wiring layer (for example, the second wiring layer), the sixth wiring 1006 functions as a heat sink. Therefore, the heat dissipation efficiency of the first transistor M1 can be improved.

  In the example shown in FIGS. 3A and 3B, the multilayer wiring board 1000 includes a seventh wiring 1007, a second wiring 1002, and a seventh wiring 1007 formed in a wiring layer other than the first wiring layer. And a fourth via conductor 2004 for electrically connecting the two.

  According to the present embodiment, since the seventh wiring 1007 electrically connected to the second wiring 1002 is formed in the wiring layer other than the first wiring layer (for example, the second wiring layer), the seventh wiring 1007 functions as a heat sink. Therefore, the heat dissipation efficiency of the second transistor M2 can be improved.

  In the example shown in FIGS. 3A and 3B, the multilayer wiring board 1000 includes an eighth wiring 1008 formed in the first wiring layer, a ninth wiring 1009 formed in the second wiring layer, A fifth via conductor 2005 for electrically connecting the second wiring 1002 and the ninth wiring 1009; the gate electrode G of the first transistor M1 is electrically connected to the eighth wiring 1008; The eight wirings 1008 and the ninth wiring 1009 are formed at positions where at least a part thereof overlaps when the multilayer wiring board 1000 is viewed in plan.

  In the eighth wiring 1008 and the ninth wiring 1009, a reverse current normally flows. According to the present embodiment, since the eighth wiring 1008 and the ninth wiring 1009 are formed at positions where at least a part thereof overlaps, the parasitic inductance is reduced by the effect of the mutual inductance described with reference to FIG. . Thereby, ringing of the output voltage of the switching circuit 230 can be suppressed.

  In the example shown in FIGS. 3A and 3B, the multilayer wiring board 1000 further includes a tenth wiring 1010 formed in the first wiring layer, and the gate electrode G of the second transistor M2 is the first wiring layer 1010. The fifth wiring 1005 and the tenth wiring 1010 are electrically connected to the 10 wiring 1010, and are formed at positions where at least a part thereof overlaps when the multilayer wiring board 1000 is viewed in plan.

  A reverse current normally flows through the fifth wiring 1005 and the tenth wiring 1010. According to the present embodiment, since the fifth wiring 1005 and the tenth wiring 1010 are formed at positions where at least a part thereof overlaps, the parasitic inductance is reduced by the effect of the mutual inductance described with reference to FIG. . Thereby, ringing of the output voltage of the switching circuit 230 can be suppressed.

  In the example shown in FIGS. 3A and 3B, the multilayer wiring board 1000 further includes an eleventh wiring 1011 electrically connected to the first electrode + CF (positive potential side electrode) of the capacitor CF. The fifth wiring 1005 and the eleventh wiring 1011 are formed at positions where at least a part thereof overlaps when the multilayer wiring board 1000 is viewed in plan.

  When common mode noise is added to the output signal of the capacitive load driving circuit 200, the common mode noise component appears as a current component in the same direction in the fifth wiring 1005 and the eleventh wiring 1011. According to the present embodiment, since the fifth wiring 1005 and the eleventh wiring 1011 are formed at positions where at least a part thereof overlaps, the common mode noise is canceled by the effect of the mutual inductance described with reference to FIG. Acts on direction. Therefore, common mode noise can be suppressed. Moreover, EMI noise resulting from common mode noise can be suppressed.

  6A is a graph showing an example of the output voltage waveform of the switching circuit 230 of the present embodiment, and FIG. 6B is a graph showing an example of the output voltage waveform of the switching circuit of the comparative example. The switching circuit of the comparative example is a circuit in which all the wirings constituting the electrical loop including the first transistor M1, the second transistor M2, and the capacitor C1 are formed in the first wiring layer, and the electrical connection is shown in FIG. It is the same as the circuit diagram shown. The output voltage waveform is a voltage waveform measured at a node corresponding to the first node N1.

  In the output voltage waveform example of the comparative example shown in FIG. 6B, large ringing occurs at the rise and fall of the voltage waveform. On the other hand, in the output voltage waveform example of the present embodiment shown in FIG. 6A, the occurrence of ringing is reduced by the above-described various actions.

3. First Modified Example of Switching Circuit Arrangement The same reference numerals are given to the same components as those in the above-described embodiment, and detailed description thereof is omitted.

  FIG. 7 is an explanatory diagram showing a detailed configuration of the capacitive load driving circuit 200 using the switching circuit 230 of the first modification. Compared with the example shown in FIG. 1, the example shown in FIG. 7 is different from the example shown in FIG. 7 only in that a capacitor C2 is added in parallel to the capacitor C1, and the other configuration is the same as that of the capacitive load driving circuit 200 shown in FIG. Are the same. The configuration shown in FIG. 7 is more advantageous than the configuration shown in FIG. 1 in that the capacity of the bypass capacitor can be increased.

  FIGS. 8A and 8B are plan views showing a first modification of the arrangement example of the switching circuit 230. FIG. FIG. 8A mainly shows the configuration of the first wiring layer. FIG. 8B mainly shows the configuration of the second wiring layer. In FIGS. 8A and 8B, the solid polygon represents the wiring formed in the first wiring layer or the second wiring layer, and the solid circle represents the wiring in the first wiring layer and the second wiring layer. The position of the via conductor that electrically connects the wiring is shown. In FIG. 8A, the alternate long and short dash line indicates the mounting position of each transistor, capacitor, and coil, and the dotted line indicates the position of each transistor, capacitor, and coil electrode.

  In the example shown in FIG. 8A, the first electrode + C2 of the capacitor C2 is electrically connected to the first wiring 1001, and the second electrode -C2 of the capacitor C2 is electrically connected to the third wiring 1003. . Other structures are similar to the example shown in FIGS. 3 (A) and 3 (B).

  Even in such a configuration, the same effect is obtained for the same reason as in the above-described embodiment.

4). Second Modification Example of Switching Circuit Arrangement The same reference numerals are given to the same components as those of the above-described embodiment and the first modification example, and detailed description thereof is omitted.

  9A and 9B are plan views showing a second modification of the arrangement example of the switching circuit 230. FIG. FIG. 9A mainly shows the configuration of the first wiring layer. FIG. 9B mainly shows the configuration of the second wiring layer. 9A and 9B, the solid polygons indicate the wirings formed in the first wiring layer or the second wiring layer, and the solid circles indicate the wirings of the first wiring layer and the second wiring layer. The position of the via conductor that electrically connects the wiring is shown. In FIG. 9A, the alternate long and short dash line indicates the mounting position of each transistor, capacitor, and coil, and the dotted line indicates the position of each transistor, capacitor, and coil electrode. The circuit configuration of the capacitive load driving circuit 200 in the second modification is the same as that shown in FIG.

  Comparing the first modification and the second modification, the arrangement of the electrodes of the first transistor M1 and the second transistor M2 is different, and the other configurations are the same.

  Even in such a configuration, the same effect is obtained for the same reason as in the above-described embodiment.

5. Medical Device The capacitive load driving circuit 200 using the switching circuit 230 can be mounted on various medical devices, and the reliability of the medical devices can be improved.

For example, the capacitive load driving circuit 200 can be applied as the fluid ejection device 1. FIG. 10 is an explanatory diagram illustrating the fluid ejecting apparatus 1. The fluid ejecting apparatus 1 can be used in various ways such as washing fine objects and structures, and a scalpel for operation. Here, the fluid ejecting apparatus 1 will be described as being a fluid ejecting apparatus 1 suitable for surgery and treatment of living tissue. Accordingly, the fluid here is a liquid such as water or physiological saline.

  In FIG. 10, the fluid ejecting apparatus 1 converts a fluid supply container 2 that contains fluid, a pump 14 as fluid supply means, and a fluid supplied from the pump 14 into a pulsating flow (hereinafter also referred to as a pulse flow). A pulsating flow generation unit 21, a pump 14, and a drive control unit 15 that controls driving of the pulsating flow generation unit 21 are provided. The pump 14 and the pulsating flow generation unit 21 are connected by a fluid supply tube 4.

  The pulsating flow generation section 21 is connected to a thin pipe-shaped connection flow path tube 90, and a nozzle 95 having a fluid ejection opening 96 having a reduced flow path diameter is inserted into the distal end portion of the connection flow path pipe 90. ing. The connection channel tube 90 has such a rigidity that it does not deform during fluid ejection.

  Further, the pulsating flow generation unit 21 includes an injection command switching unit 25. In this embodiment, the pulse command switch 26 that selects the pulse flow injection as the injection command switching unit 25 and the continuous flow that selects the continuous flow injection. A command switch 27 and an OFF switch 28 for stopping fluid ejection are provided.

  The flow of fluid in the fluid ejecting apparatus 1 configured as described above will be briefly described. The fluid stored in the fluid supply container 2 is sucked by the pump 14 and supplied to the pulsating flow generation unit 21 through the fluid supply tube 4 at a constant pressure. The pulsating flow generation unit 21 includes a fluid chamber 80 (see FIG. 11 described later), and a piezoelectric element 30 and a diaphragm 40 as volume changing means for changing the volume of the fluid chamber 80. The piezoelectric element 30 is driven to generate a pulsating flow in the fluid chamber 80, and the fluid is ejected from the fluid ejection opening 96 through the connection channel tube 90 and the nozzle 95 at a high speed, for example, in a pulse shape.

  When the pulsating flow generation unit 21 stops driving, the fluid supplied from the pump 14 passes through the fluid chamber 80 and is continuously ejected from the fluid ejection opening 96.

  Here, the pulsating flow means a fluid flow in which the fluid flow direction is constant and the fluid flow rate or flow velocity is accompanied by periodic or irregular fluctuations. The pulsating flow includes an intermittent flow in which the flow and stop of the fluid are repeated. However, since the flow rate or flow rate of the fluid only needs to change periodically or irregularly, the pulsating flow is not necessarily an intermittent flow.

  Similarly, ejecting fluid in a pulsed manner means ejecting fluid in which the flow rate or moving speed of the fluid to be ejected varies periodically or irregularly. An example of pulsed injection is intermittent injection in which fluid injection and non-injection are repeated. However, since the flow rate or moving speed of the fluid to be injected only needs to fluctuate periodically or irregularly, it is not always intermittent injection. Need not be.

  FIG. 11 is a cross-sectional view showing a cut surface obtained by cutting the pulsating flow generation unit 21 according to the present embodiment along the fluid ejection direction. For convenience of illustration, FIG. 11 is a schematic diagram in which the vertical and horizontal scales of members or portions are different from actual ones. The pulsating flow generation unit 21 includes an inlet channel 81 that supplies fluid from the pump 14 to the fluid chamber 80 via the fluid supply tube 4, a piezoelectric element 30 that serves as a volume changing unit that changes the volume of the fluid chamber 80, and the diaphragm 40. And an outlet channel 82 communicating with the fluid chamber 80. The fluid supply tube 4 is connected to the inlet channel 81.

  The diaphragm 40 is made of, for example, a disk-shaped thin metal plate, and is in close contact with the case 52 and the case 70. In the present embodiment, the piezoelectric element 30 is an example of a laminated piezoelectric element, and one of both end portions is fixed to the diaphragm 40 and the other is fixed to the bottom plate 60.

  The fluid chamber 80 is a space formed by a recess formed on the surface of the case 70 facing the diaphragm 40 and the diaphragm 40. An outlet channel 82 is opened at a substantially central portion of the fluid chamber 80.

  The case 70 and the case 52 are joined and integrated on opposite surfaces. In the case 70, a connection flow channel pipe 90 having a connection flow channel 91 communicating with the outlet flow channel 82 is fitted, and a nozzle 95 is inserted in the tip of the connection flow channel pipe 90. The nozzle 95 has a fluid ejection opening 96 having a reduced flow path diameter.

  The piezoelectric element 30 corresponds to the capacitive load Z1 of FIG. 1, and its deformation amount and deformation timing are controlled by a drive signal 408 (see FIG. 10) from the capacitive load drive circuit 200. Then, by pushing the fluid chamber 80 as indicated by an arrow A in FIG. 11, the fluid can be ejected in a pulse form from the nozzle 95 at the tip. The fluid ejection device 1 is used as a medical device, for example. Specifically, it can be used as a surgical apparatus that supplies liquid from the pump 14 to the fluid supply tube 4 introduced into the body cavity at high pressure, ejects the liquid from the nozzle 95 at the tip, and resects the tissue in the body cavity by fluid pressure. .

  Further, the capacitive load driving circuit 200 can be applied as the fluid transport device 20 that transports a liquid having a stable flow rate.

  FIG. 12 is a perspective view showing an external appearance of a fluid transporter 1A including the fluid transport device 20 of the present embodiment. In FIG. 12, the fluid transporter 1 </ b> A includes a fluid transport device 20 that transports fluid by a peristaltic motion, and a pack-like fluid storage container 94 that stores the fluid. The fluid transport device 20 and the fluid storage container 94 are communicated with each other by the tube 4A.

  The fluid storage container 94 is made of a synthetic resin having flexibility, and is formed of, for example, a silicon resin. A tube holding portion 92 is provided at one end of the fluid storage container 94, and the tube 4A is hermetically fixed so as not to leak fluid by means such as crimping, heat welding, or adhesion.

  One end of the tube 4 </ b> A communicates with the inside of the fluid container 94, passes through the fluid transport device 20, extends to the outside of the fluid transport device 20, and stores the fluid stored in the fluid container 94. It is transported to the outside by the fluid transport device 20.

  In the fluid transport device 20, a lower lid 84, a pump unit frame 31, a tube frame 32, and an upper lid 83 are sequentially stacked, and these are integrated by a fixing screw 97 (the figure shows an upper lid fixing screw). An extrusion mechanism for transporting fluid is stored inside the fluid transport device 20.

  The lower lid 84, the pump unit frame 31, the tube frame 32, the upper lid 83, and the fluid container 94 are materials having excellent biocompatibility, for example, polysulfone, urethane, when the fluid transporter 1A is mounted on a living body. It is preferable to employ a synthetic resin such as

FIG. 13 is a diagram for explaining a mechanism of fluid transportation of the fluid transportation device 20. A drive signal 408 that is a voltage applied to the piezo element 104 is generated by the capacitive load drive circuit 200 based on a control signal 400 from the extrusion control circuit 50A (not shown in FIG. 12). The generated drive signal 408 is supplied to the piezo element 104 via the gate unit 300. The gate unit 300 is a circuit unit in which a plurality of gate elements 302 are connected in parallel, and each gate element 302 can be individually turned on or off under the control of the extrusion control circuit 50A. It is. Therefore, the drive signal 408 output from the capacitive load drive circuit 200 is sequentially applied to the corresponding piezo element 104 by the extrusion control circuit 50A through the gate element 302, and pushes out the corresponding pressing shaft 106. The pressing shaft 106 is arranged in a direction substantially perpendicular to the direction in which the fluid of the tube 4A flows. The tube 4 </ b> A is sequentially pressed by a plurality of pressing shafts 106. Therefore, the fluid transport device 20 can transport the fluid in the tube 4A by a peristaltic motion.

  In addition, as fluid used by this invention, gas can be used besides fluid liquids, such as water, salt solution, a chemical | medical solution, oils, aromatic liquid, and ink. For example, when a chemical solution is used, the fluid transport device 20 can be used as a dosing pump.

  Thus, according to the medical device of this embodiment, since the switching circuit 230 which suppressed generation | occurrence | production of ringing is included, the medical device which can handle the fluid stably is realizable.

  In addition, embodiment mentioned above and a modification are examples, Comprising: It is not necessarily limited to these. For example, a plurality of embodiments and modifications can be combined as appropriate.

  The present invention is not limited to the above-described embodiments and modifications, and various modifications can be made. For example, the present invention includes configurations that are substantially the same as the configurations described in the embodiments (for example, configurations that have the same functions, methods, and results, or configurations that have the same objects and effects). In addition, the invention includes a configuration in which a non-essential part of the configuration described in the embodiment is replaced. In addition, the present invention includes a configuration that exhibits the same operational effects as the configuration described in the embodiment or a configuration that can achieve the same object. In addition, the invention includes a configuration in which a known technique is added to the configuration described in the embodiment.

DESCRIPTION OF SYMBOLS 1 ... Fluid injection apparatus, 1A ... Fluid transporter, 4 ... Fluid supply tube, 4A ... Tube, 14 ... Pump, 15 ... Drive control part, 20 ... Fluid transport apparatus, 21 ... Pulse flow generation part, 25 ... Injection command switching Means 26: Pulse flow command switch 27 ... Continuous flow command switch 28 ... OFF switch 30 ... Piezoelectric element 31 ... Pump unit frame 32 ... Tube frame 40 ... Diaphragm 50A ... Extrusion control circuit 52 ... Case , 60 ... Bottom plate, 70 ... Case, 80 ... Fluid chamber, 81 ... Inlet channel, 82 ... Outlet channel, 83 ... Upper lid, 84 ... Lower lid, 90 ... Connection channel tube, 91 ... Connection channel, 92 ... Tube holding part, 94 ... Fluid container, 95 ... Nozzle, 96 ... Fluid ejection opening, 97 ... Fixing screw, 104 ... Piezo element, 200 ... Capacitive load drive circuit, 210 ... Drive waveform signal generation circuit, 22 ... Modulation circuit, 221 ... PWM modulation circuit, 222 ... Gate driver circuit, 222 ... Modulation circuit, 224 ... Level shifter, 228H ... High side driver, 228L ... Low side driver, 230 ... Switching circuit, 240 ... Smooth filter, 300 ... Gate Unit: 302 ... Gate element 400 ... Control signal 402 ... Drive waveform signal 404 ... PWM modulation signal 406 ... Power amplification modulation signal 408 ... Drive signal 1000 ... Multilayer wiring board 1001 ... First wiring 1002 ... 2nd wiring, 1003 ... 3rd wiring, 1004 ... 4th wiring, 1005 ... 5th wiring, 1006 ... 6th wiring, 1007 ... 7th wiring, 1008 ... 8th wiring, 1009 ... 9th wiring, 1010 ... 10th Wiring, 1011 ... Eleventh wiring, 2001 ... First via conductor, 2002 ... Second via 2003, third via conductor, 2004, fourth via conductor, 2005, fifth via conductor, C1, condenser, C2, condenser, CF, condenser, GH, modulated signal, GL, modulated signal, LF, coil, M1 ... 1st transistor, M2 ... 2nd transistor, N1 ... 1st node, Z1 ... Capacitive load

Claims (7)

A multilayer wiring board having a first wiring layer and a second wiring layer;
A first transistor, a second transistor and a capacitor mounted on the first wiring layer side of the multilayer wiring board;
Including
The multilayer wiring board is
A first wiring, a second wiring, a third wiring, and a fourth wiring formed in the first wiring layer;
A fifth wiring formed in the second wiring layer;
An eighth wiring formed in the first wiring layer;
A ninth wiring formed in the second wiring layer;
A first via conductor that electrically connects the third wiring and the fifth wiring;
A second via conductor that electrically connects the fourth wiring and the fifth wiring;
A fifth via conductor that electrically connects the second wiring and the ninth wiring;
Have
A gate electrode of the first transistor is electrically connected to the eighth wiring;
A drain electrode of the first transistor is electrically connected to the first wiring;
A source electrode of the first transistor is electrically connected to the second wiring;
A drain electrode of the second transistor is electrically connected to the second wiring;
A source electrode of the second transistor is electrically connected to the third wiring;
A first electrode of the capacitor is electrically connected to the first wiring;
A second electrode of the capacitor is electrically connected to the fourth wiring ;
The eighth wiring and the ninth wiring are switching circuits formed at positions where at least a part thereof overlaps when the multilayer wiring board is viewed in plan . The switching circuit according to claim 1,
A switching circuit in which at least a part of the first transistor, at least a part of the second transistor, and at least a part of the capacitor are arranged on the same straight line when the multilayer wiring board is viewed in plan. The switching circuit according to claim 1 or 2,
The switching circuit, wherein the second wiring and the fifth wiring are formed at positions where at least a part thereof overlaps when the multilayer wiring board is viewed in plan. The switching circuit according to any one of claims 1 to 3,
The multilayer wiring board is
A sixth wiring formed in a wiring layer other than the first wiring layer;
A third via conductor that electrically connects the first wiring and the sixth wiring;
A switching circuit. The switching circuit according to any one of claims 1 to 4,
The multilayer wiring board is
A seventh wiring formed in a wiring layer other than the first wiring layer;
A fourth via conductor that electrically connects the second wiring and the seventh wiring;
A switching circuit. The switching circuit according to any one of claims 1 to 5 ,
The multilayer wiring board further includes a tenth wiring formed in the first wiring layer,
A gate electrode of the second transistor is electrically connected to the tenth wiring;
The switching circuit, wherein the fifth wiring and the tenth wiring are formed at a position where at least a part thereof overlaps when the multilayer wiring board is viewed in plan. A drive waveform signal generating circuit for generating a drive waveform signal;
A modulation circuit that generates a modulation signal by pulse-modulating the drive waveform signal;
Said modulated signal, received at the gate electrode of the gate electrode and the second transistor of the first transistor, to generate a power amplified modulated signal is power amplified signal said modulated signal, any one of claims 1 to 6 1 A switching circuit according to the section;
A smoothing filter that generates a drive signal by smoothing the power amplification modulation signal;
A medical device comprising a capacitive load drive circuit comprising:

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