JP5903816B2 - Control device for pulsation generator and liquid ejecting apparatus - Google Patents

Description

  The present invention relates to a technique for ejecting liquid by applying a drive signal to a piezoelectric element to pressurize the liquid in a liquid chamber.

  A liquid ejecting apparatus that ejects a liquid by applying a driving signal to a piezoelectric element and pressurizing a liquid such as ink, as in a so-called inkjet printer, is known (for example, Patent Document 1). There has also been proposed a liquid ejecting apparatus for incising or excising living tissue by pressurizing a liquid such as water or physiological saline and ejecting the liquid from a nozzle (Patent Document 2). These liquid ejecting apparatuses are equipped with a drive circuit, and drive the piezoelectric element by applying a drive signal generated by the drive circuit.

  As a technique capable of driving a capacitive load such as a piezoelectric element with high power efficiency, a so-called class D amplifier is known. In this technology, two switch elements are connected in a push-pull manner between the power supply and the ground, the voltage between the two switch elements is extracted and input to the smoothing filter, and then output to the outside as a drive signal. . If the switch element on the power supply side is turned on (conducting state) and the switch element on the ground side is turned off (disconnected state), the power supply voltage is input to the smoothing filter. Conversely, the switch element on the power supply side is turned off. If the switch element on the ground side is turned ON, the ground voltage is input to the smoothing filter. Therefore, if the drive waveform signal that is the reference of the drive signal to be output is pulse-modulated and the switch element is driven based on the obtained modulation signal, the power amplification modulation signal obtained by power-amplifying the modulation signal is converted to high power. It can be generated with efficiency. Then, if this power amplification modulation signal is smoothed by a smoothing filter, a drive signal corresponding to the drive waveform signal can be output. In addition, a technique for driving a piezoelectric element using a technique related to the class D amplifier has been proposed (Patent Document 3).

  Here, when the power of the modulated signal is amplified, if two switch elements connected in push-pull are turned on at the same time, a large inrush current flows from the power source to the ground at that moment, and the switch element Cause damage. Therefore, in order to avoid such a situation, when switching from one switch element ON and the other switch element OFF to one switch element OFF and the other switch element ON, both switch elements Is switched via an OFF state (dead time state). The time in the dead time state is called “dead time”.

  Further, when the voltage input to the smoothing filter is switched, a back electromotive force is generated by an inductive component constituting the smoothing filter. In order to prevent an excessive back electromotive force from being applied to the switch element during the dead time state, a diode (freewheeling diode) for bypassing the current is provided in parallel to each switch element.

Japanese Patent Laid-Open No. 10-81014 JP 2008-82202 A JP 2007-96364 A

  However, when switching ON / OFF of the two switch elements, charge / discharge occurs due to the parasitic capacitance of the switch elements, and current flows through the return diode due to the back electromotive force generated on the smoothing filter side during the dead time state. As a result, there is a problem that a large power loss occurs, and as a result, the power efficiency when operating the liquid ejecting apparatus may be lowered.

  The present invention has been made to solve at least a part of the above-described problems of the prior art, and operates a liquid ejecting apparatus that ejects liquid by applying a driving signal to a piezoelectric element with high power efficiency. The purpose is to provide a technology that can be applied.

In order to solve at least a part of the problems described above, the liquid ejecting apparatus of the present invention employs the following configuration. That is,
In a liquid ejecting apparatus that ejects the liquid by applying a driving signal to the piezoelectric element to pressurize the liquid in the liquid chamber,
A drive waveform signal generating circuit for generating a drive waveform signal which is a reference of the drive signal;
A modulation circuit for pulse-modulating the drive waveform signal to generate a modulation signal that repeats a high voltage state and a low voltage state;
A digital power amplifier that amplifies the modulated signal to generate a power amplified modulated signal;
A smoothing filter that generates the drive signal by smoothing the power amplification modulation signal;
With
The digital power amplifier is:
A first voltage source;
A first switch element connected in series with the first voltage source;
A second switch element connected in series with the first switch element;
A second voltage generation source connected in series with the second switch element and generating a voltage lower than the first voltage generation source;
A first diode provided in parallel to the first switch element and having a cathode side connected to the first voltage generation source;
A second diode provided in parallel to the second switch element and having an anode connected to the second voltage generation source;
With
The digital power amplifier has a duty ratio that is a time ratio at which the modulation signal is in the high voltage state, a voltage of the driving waveform signal, or a dead time determined according to any of the voltages of the driving signal, The first switch element and the second switch element are driven.

  In the liquid ejecting apparatus of the present invention having such a configuration, the voltage of the first voltage generation source is output as a power amplification modulation signal by switching ON / OFF of the first switch element and the second switch element. The state in which the voltage of the second voltage generation source is output as a power amplification modulation signal (hereinafter referred to as the second state) can be switched. At this time, charge and discharge are performed on the parasitic capacitances existing in the first diode and the second diode. As will be described later in detail, the current flowing through the switch element in association with charging and discharging of the electric charge causes power loss. Further, when switching between the first state and the second state, the switching is performed via a dead time state in which both the first switch element and the second switch element are in the OFF state. As will be described in detail later, in the dead time state, charge is regenerated and charged in the parasitic capacitance of the diode by the back electromotive force generated in the coil of the smoothing filter. When charge regeneration and charging are completed, the charge stored in the parasitic capacitance of the diode connected in parallel to the switch element that is going to be turned on is transferred to the parasitic capacitance of the other diode It becomes. If the first switch element or the second switch element is switched to ON from such a state, the charge stored in the parasitic capacitance does not flow through the ON switch element. Can be avoided. In addition, the time required to complete the regeneration and charging of the charge in the parasitic capacitance depends on the duty ratio of the modulation signal, and the duty ratio depends on the drive waveform signal and the voltage of the drive signal. Therefore, when switching ON / OFF of the first switch element and the second switch element, the dead time determined according to the duty ratio of the modulation signal, the voltage of the drive waveform signal, or the voltage of the drive signal In time, the first switch element and the second switch element are driven.

  If it carries out like this, a 1st switch element or a 2nd switch element can be switched to ON at the timing which the charge regeneration and charge by the parasitic capacitance of the 1st diode and the 2nd diode were completed. For this reason, it is possible to avoid a power loss due to the charge stored in the parasitic capacitance flowing through the switch element that is turned on. As a result, a drive signal applied to the piezoelectric element of the liquid ejecting apparatus can be generated with high power efficiency, and the liquid ejecting apparatus can be operated with high power efficiency.

Further, the liquid ejecting apparatus of the present invention can be grasped in a mode in which a power source is simply provided instead of the first voltage generation source and the second voltage generation source. The liquid ejecting apparatus of the present invention ascertained in this manner is
In a liquid ejecting apparatus that ejects the liquid by applying a driving signal to the piezoelectric element to pressurize the liquid in the liquid chamber,
A drive waveform signal generating circuit for generating a drive waveform signal which is a reference of the drive signal;
A modulation circuit for pulse-modulating the drive waveform signal to generate a modulation signal that repeats a high voltage state and a low voltage state;
A digital power amplifier that amplifies the modulated signal to generate a power amplified modulated signal;
A smoothing filter that generates the drive signal by smoothing the power amplification modulation signal;
With
The digital power amplifier is:
Power supply,
A first switch element connected in series to the high voltage side of the power source;
A second switch element connected in series between the first switch element and the low voltage side of the power source;
A first diode provided in parallel to the first switch element and having a cathode side connected to a high voltage side of the power source;
A second diode provided in parallel to the second switch element and having an anode connected to the low voltage side of the power supply;
With
The digital power amplifier has a duty ratio that is a time ratio at which the modulation signal is in the high voltage state, a voltage of the driving waveform signal, or a dead time determined according to any of the voltages of the driving signal, The first switch element and the second switch element are driven.

  In the liquid ejecting apparatus according to the aspect of the invention, the voltage on the high-voltage side of the power supply is output as the power amplification modulation signal by switching the first switch element and the second switch element ON / OFF. It is possible to switch between a state (corresponding to the first state described above) and a state (corresponding to the second state described above) in which the voltage on the low voltage side of the power supply is output as a power amplification modulation signal. At this time, charges are charged and discharged by the parasitic capacitances of the first diode and the second diode, and power loss occurs when a current flows through the switch element due to the charging and discharging. Therefore, when switching ON / OFF of the first switch element and the second switch element, the dead time determined according to the duty ratio of the modulation signal, the voltage of the drive waveform signal, or the voltage of the drive signal In time, the first switch element and the second switch element are driven.

  If it carries out like this, a 1st switch element or a 2nd switch element can be switched to ON at the timing which the charge regeneration and charge by the parasitic capacitance of the 1st diode and the 2nd diode were completed. For this reason, it is possible to avoid a power loss due to the charge stored in the parasitic capacitance flowing through the switch element. As a result, a drive signal applied to the piezoelectric element of the liquid ejecting apparatus can be generated with high power efficiency, and the liquid ejecting apparatus can be operated with high power efficiency.

  Further, in the liquid ejecting apparatus of the present invention described above, the following may be performed. First, dead time information in which the dead time is associated with any one of the duty ratio of the modulation signal, the voltage of the drive waveform signal, or the voltage of the drive signal is stored. Then, the digital power amplifier generates a power amplification modulation signal by driving the first switch element and the second switch element with a dead time determined based on the dead time information.

  In this way, when the digital power amplifier switches on / off of the first switch element and the second switch element, the first switch element or the second switch is generated at the timing when the charge regeneration and the charge in the parasitic capacitance are completed. Can be switched on. For this reason, it is possible to avoid power loss due to the charge stored in the parasitic capacitance flowing through the switch element that is turned on, and as a result, the liquid ejecting apparatus can be operated with high power efficiency. Note that the dead time stored in the dead time information is not necessarily the dead time itself, but may be information that specifies the dead time. For example, if the dead time is generated using an RC delay circuit, the dead time is specified when the resistance value R and the capacitor capacitance C of the RC delay circuit are determined. Information for specifying the dead time, such as the resistance value R and the capacitor capacitance C in this case, may be stored instead of the dead time.

  In addition, when dead time information in which the dead time is associated with the voltage of the drive waveform signal is stored, the dead time information is stored in the drive waveform signal generation circuit and the drive waveform signal is output to the modulation circuit. In doing so, a dead time corresponding to the drive waveform signal may be output to the digital power amplifier. The modulation circuit converts the drive waveform signal into a modulation signal and outputs the modulation signal to the digital power amplifier. The digital power amplifier switches the first switch element and the second switch element in accordance with the modulation signal. At this time, the first switch element and the second switch element may be switched with the determined dead time. Even if it does in this way, when the 1st switch element or the 2nd switch element is switched ON, the electric power stored in the parasitic capacitance can avoid the power loss by flowing through the switch element turned ON. It becomes possible.

  In the liquid ejecting apparatus of the present invention described above, the dead time is determined based on any one of the duty ratio of the modulation signal, the voltage of the driving waveform signal, or the voltage of the driving signal, and the digital power amplifier is determined. The first switch element and the second switch element may be driven with a dead time.

  As will be described in detail later, the time required for charge regeneration and charging in the parasitic capacitances of the first diode and the second diode depends on the duty ratio of the modulation signal, the voltage of the drive waveform signal, the voltage of the drive signal, and the like. Can be easily determined. Therefore, if the first switch element or the second switch element is switched with the dead time determined based on any of these, the power loss caused by the charge stored in the parasitic capacitance flowing through the switch element can be avoided. can do. As a result, the liquid ejecting apparatus can be operated efficiently. Note that the matter determined based on the duty ratio of the modulation signal, the voltage of the drive waveform signal, the voltage of the drive signal, or the like does not necessarily need to be the dead time itself, and may be any matter that can specify the dead time. For example, the resistance value R and the capacitor capacitance C of the RC delay circuit that generates the dead time may be determined instead of the dead time.

  Further, the digital power amplifier may determine the dead time by receiving any one of the modulation signal, the driving waveform signal, and the driving signal, instead of receiving the dead time. And you may make it switch a 1st switch element and a 2nd switch element with the determined dead time. Even in this case, it is possible to avoid a power loss due to the charge stored in the parasitic capacitance flowing through the switch element. As a result, the liquid ejecting apparatus can be operated efficiently.

  In addition, the above-described liquid ejecting apparatus of the present invention can generate a drive signal applied to the piezoelectric element with high power efficiency. For this reason, various medical devices that eject liquid by applying a driving signal to the piezoelectric element to pressurize the liquid can be operated with high power efficiency. The medical device for ejecting the liquid is not limited to a device for incising or excising a biological tissue by ejecting water or physiological saline, and may be a medical device or a medical device for pumping, for example.

It is explanatory drawing which showed the structure of the liquid ejecting apparatus carrying the piezoelectric element drive circuit of a present Example. It is explanatory drawing which showed the circuit structure of the piezoelectric element drive circuit of a present Example. It is explanatory drawing which showed a mode that the power consumption in the digital power amplifier at the time of a fixed voltage output increases according to a duty ratio. It is the circuit diagram which showed the detailed structure of the digital power amplifier. It is explanatory drawing which showed the reason which electric power loss generate | occur | produces at the time of the electric power amplification in a digital power amplifier. It is explanatory drawing which showed a mode that the electric current which flows into the coil of a smoothing filter at the time of the output of a fixed voltage changes substantially linearly. It is explanatory drawing which showed the reason for which the electric current which flows into the coil of a smoothing filter at the time of a fixed voltage output changes substantially linearly. It is explanatory drawing which showed a mode that the amplitude of the electric current which flows into the coil of a smoothing filter at the time of the output of a fixed voltage changes according to a duty ratio. It is explanatory drawing which showed the reason that the power loss at the time of power amplification falls on the conditions where a big electric current flows into the coil of a smoothing filter at the time of the output of a fixed voltage. It is explanatory drawing which showed the reason that the power loss at the time of power amplification falls on the conditions where a big electric current flows into the coil of a smoothing filter at the time of the output of a fixed voltage. It is explanatory drawing which showed operation | movement of the digital power amplifier at the time of the output of a fixed voltage according to the magnitude | size of the electric current which flows into the coil of a smoothing filter. It is explanatory drawing which showed the conditions which a power loss does not generate | occur | produce with a digital power amplifier at the time of the output of a fixed voltage. It is explanatory drawing which illustrated a part of piezoelectric element drive circuit of a present Example. It is a flowchart of the switch drive process which the digital power amplifier of a present Example performs in order to drive two switches. It is explanatory drawing which showed a mode that a voltage switched, when a switch was driven by switch drive processing. It is explanatory drawing which showed the detailed structure of the piezoelectric element drive circuit of a 1st modification. It is explanatory drawing which showed the detailed structure of the piezoelectric element drive circuit of a 2nd modification. It is explanatory drawing which showed the detailed structure of the piezoelectric element drive circuit of a 3rd modification. It is explanatory drawing which showed the detailed structure of the piezoelectric element drive circuit of a 4th modification. It is explanatory drawing which showed the detailed structure of the piezoelectric element drive circuit of a 5th modification. It is explanatory drawing which illustrated the ejection head of the printing apparatus driven using a piezoelectric element drive circuit. It is explanatory drawing which illustrated the voltage waveform of the drive signal output in order to drive an ejection head.

Hereinafter, in order to clarify the contents of the present invention described above, examples will be described in the following order.
A. Device configuration:
A-1. overall structure:
A-2. Overview of the piezoelectric element drive circuit:
A-3. Mechanism of power loss in digital power amplifier:
A-4. Mechanisms to avoid power loss in digital power amplifiers:
A-5. Details of the piezoelectric element drive circuit:
A-6. Switch drive method:
B. Variations:
B-1. First modification:
B-2. Second modification:
B-3. Third modification:
B-4. Fourth modification:
B-5. Fifth modification:
B-6. Sixth modification:

A. Device configuration :
A-1. overall structure :
FIG. 1 is an explanatory diagram showing a configuration of a liquid ejecting apparatus 100 equipped with a piezoelectric element driving circuit 200 of the present embodiment. As shown in the figure, the liquid ejecting apparatus 100 is roughly divided into a pulsation generator 110 for ejecting liquid, a liquid supply means 120 for supplying a liquid toward the pulsation generator 110, a pulsation generator 110, and The control unit 130 is configured to control the operation of the liquid supply unit 120. The liquid ejecting apparatus 100 functions as a surgical tool (water jet knife) used for excising or incising a living tissue by ejecting a pulsed liquid from the pulsation generating unit 110.

  The pulsation generator 110 has a structure in which a metal first case 114 is overlapped on a metal second case 113 and firmly joined by screws or the like, and a circular tube is provided on the front surface of the second case 113. A liquid ejection pipe 112 having a shape is erected, and a nozzle 111 is inserted at the tip of the liquid ejection pipe 112. A thin disk-shaped liquid chamber 115 is formed on the mating surface of the second case 113 and the first case 114, and the liquid chamber 115 is connected to the nozzle 111 via the liquid ejection pipe 112. A laminated piezoelectric element 116 is provided inside the first case 114. The pulsation generator 110 and the controller 130 are connected by a wiring cable 150, and a drive signal is supplied from the piezoelectric element driving circuit 200 in the controller 130 to the piezoelectric element 116 via the wiring cable 150. Further, the wiring cable 150 is attached to the pulsation generator 110 by a connector. For this reason, the distribution cable 150 can be replaced with various distribution cables 150 having different lengths and characteristics.

  The liquid supply means 120 sucks up the liquid from the liquid container 123 in which the liquid to be ejected (water, physiological saline, chemical liquid, etc.) is stored through the first connection tube 121, and then moves the second connection tube 122 through. Then, the liquid is supplied into the liquid chamber 115 of the pulsation generator 110. For this reason, the liquid chamber 115 is filled with the liquid. When a drive signal is applied from the control unit 130 to the piezoelectric element 116, the piezoelectric element 116 expands and the liquid chamber 115 is compressed, and as a result, the liquid filled in the liquid chamber 115 is pulsed from the nozzle 111. Is injected into the shape. The expansion amount of the piezoelectric element 116 depends on the voltage applied as the drive signal. The drive signal is generated by the piezoelectric element drive circuit 200 mounted in the control unit 130.

A-2. Overview of piezoelectric element drive circuit configuration:
FIG. 2 is an explanatory diagram showing a circuit configuration of the piezoelectric element driving circuit 200 mounted on the control unit 130. As shown in the drawing, the piezoelectric element drive circuit 200 includes a drive waveform signal generation circuit 210 that outputs a drive waveform signal (hereinafter referred to as WCOM) serving as a reference for the drive signal, a WCOM received from the drive waveform signal generation circuit 210, and a later-described drive waveform signal generation circuit 210. An arithmetic circuit 220 that outputs an error signal (hereinafter referred to as dWCOM) based on a feedback signal (hereinafter referred to as dCOM) to be transmitted, and a modulation circuit that performs pulse modulation on dWCOM from the arithmetic circuit 220 and converts it into a modulated signal (hereinafter referred to as MCOM). 230, a digital power amplifier 240 that digitally amplifies the power of MCOM from the modulation circuit 230 to generate a power amplified modulated signal (hereinafter referred to as ACOM), and after receiving the ACOM from the digital power amplifier 240 and removing the modulation component The smoothing signal supplied to the piezoelectric element 116 of the pulsation generator 110 as a drive signal (hereinafter referred to as COM). And terpolymers 250, and a phase lead compensation circuit 260 generates a compensation advancing the phase with respect to the COM output from the low pass filter 250 (phase-lead compensation) added dCOM (feedback signal). In the piezoelectric element driving circuit 200 of the first embodiment, dCOM obtained by adding phase lead compensation to COM is negatively fed back, but a configuration in which negative feedback is not provided is also possible. In this case, the arithmetic circuit 220 and the phase lead compensation circuit 260 are not necessary. As a result, the modulation circuit 230 performs pulse modulation on WCOM, not dWCOM.

  Of these, the drive waveform signal generation circuit 210 includes a waveform memory storing WCOM data and a D / A converter, and converts data read from the waveform memory into an analog signal by the D / A converter. To generate a WCOM (drive waveform signal). The arithmetic circuit 220 outputs a signal obtained by subtracting dCOM from the WCOM thus output as dWCOM (error signal).

  The modulation circuit 230 generates (pulse modulation) a pulse wave-like MCOM (modulation signal) by comparing dWCOM with a triangular wave having a constant period (modulation period). For example, the MCOM outputs a high voltage state (output is “H”) when dWCOM is larger than the triangular wave, and outputs a MCOM that is low voltage (output is “L”) when dWCOM is smaller than the triangular wave. Is done. The time ratio at which MCOM is “H” is called “duty ratio (or on-duty ratio)”. The MCOM obtained by the modulation circuit 230 is input to the digital power amplifier 240. Although the detailed configuration will be described later, in the digital power amplifier 240, a power source, two push-pull connected switch elements (such as a MOSFET), and a ground GND are connected in series in this order. When the output of MCOM is ON, the switch element on the power supply side is turned ON, the switch element on the ground GND side is turned OFF, and the power supply voltage Vdd is output as ACOM. When the output of MCOM is OFF, the switch element on the power supply side is turned OFF, the switch element on the ground GND side is turned ON, and the voltage 0 of the ground GND is output as ACOM. As a result, the MCOM that changes in a pulse waveform between the operating voltage of the modulation circuit 230 and the ground GND is power amplified to an ACOM that changes in a pulse waveform between the voltage Vdd of the power supply and the voltage 0 of the ground GND. In this amplification, since only the ON / OFF of the two switch elements connected in a push-pull manner is switched, it is possible to suppress power loss as compared with the case of amplifying an analog waveform. In this embodiment, the voltage on the high voltage side of one power source is Vdd and the voltage on the low voltage side is ground GND. However, the voltage Vdd and ground GND are set using two power sources having different voltages. It may be generated. In other words, the voltage on the high voltage side of the power supply that generates the high voltage may be Vdd, and the voltage on the high voltage side or the voltage on the low voltage side of the power supply that generates the low voltage may be the ground GND. If two power supplies are used in this way, a negative COM can be applied to the piezoelectric element 116, so that a situation in which the displacement amount of the piezoelectric element 116 decreases due to the residual strain of the piezoelectric element 116 is avoided. Is possible.

  The power-amplified ACOM (power amplification modulation signal) is converted into COM (driving signal) by passing through a smoothing filter 250 constituted by an LC circuit and applied to the piezoelectric element 116. Further, COM is negatively fed back to the arithmetic circuit 220, but the phase of COM is delayed with respect to WCOM by passing through the smoothing filter 250. Therefore, instead of simply negatively feeding back COM, compensation (phase lead compensation) is performed to advance the phase through a phase lead compensation circuit 260 constituted by a capacitor and a resistor, and the obtained signal is set as dCOM and the arithmetic circuit 220. Negative feedback.

A-3. Mechanism of power loss in digital power amplifier:
As described above, the digital power amplifier 240 can generate the ACOM by power-amplifying the modulation signal (MCOM) without a large power loss. However, even in the digital power amplifier 240, if a certain condition is satisfied, a large power loss may occur during power amplification.

  FIG. 3 is an explanatory diagram showing how power loss occurs in the digital power amplifier 240. As shown in the figure, for example, when a constant voltage is output to the load, the power loss rapidly increases when the duty ratio of the modulation signal is near the upper limit. Even when the duty ratio of the modulation signal is near the lower limit, the power loss increases rapidly. When such a phenomenon occurs, the meaning of the amplification after the WCOM is modulated and converted to the MCOM is lost, so a countermeasure is required. To that end, the mechanism by which this phenomenon occurs must be clarified.

  FIG. 4 is a circuit diagram showing the internal configuration of the digital power amplifier 240. As shown in the figure, the digital power amplifier 240 is configured around two switch elements S1 and S2 that are push-pull connected. The power switch Vdd is connected to one switch element S1, and the other switch element S1 is connected. A ground GND is connected to S2. The switch element S1 corresponds to the “first switch element” of the present invention, and the switch element S2 corresponds to the “second switch element” of the present invention.

  Furthermore, the switching element S1 is connected in parallel with a free-wheeling diode D1 in a direction that allows current to flow from the ground GND side toward the power supply Vdd side. The switching element S2 also connects from the ground GND side to the power supply Vdd side. A free-wheeling diode D2 is connected in parallel in a direction that allows current to flow in the direction of the current. Accordingly, the freewheeling diode D1 corresponds to the “first diode” of the present invention, and the freewheeling diode D2 corresponds to the “second diode” of the present invention. Further, the free-wheeling diodes D1 and D2 have a parasitic capacitance between the terminals. In FIG. 4, the parasitic capacitance existing in the free wheeling diode D1 is represented as a parasitic capacitance C1, and the parasitic capacitance existing in the freewheeling diode D2 is represented as a parasitic capacitance C2. Note that elements such as MOSFETs and IGBTs can be used as the switch elements S1 and S2.

  Based on the MCOM supplied from the modulation circuit 230, the gate driver 242 outputs a drive signal Vg1 for driving the switch element S1 and a drive signal Vg2 for driving the switch element S2. When the drive signal Vg1 in the high voltage state (hereinafter referred to as “H”) is output, the switch element S1 is turned on (conductive state), and the low voltage state (hereinafter referred to as “L”). When the drive signal Vg1 is output, the switch element S1 is turned off (non-conductive state). Similarly, for the switch element S2, the switch element S2 is turned on when the drive signal Vg2 becomes “H”, and the switch element S2 is turned off when the drive signal Vg2 becomes “L”. Details of the process in which the gate driver 242 outputs the drive signals Vg1 and Vg2 will be described later.

  FIG. 5 is an explanatory diagram showing the operation of the digital power amplifier 240 for power amplification. FIG. 5A shows a state in which the voltage 0 is output as ACOM because the switch element S1 is OFF and the switch element S2 is ON. FIG. 5D shows a state where the voltage Vdd is output as ACOM because the switch element S1 is ON and the switch element S2 is OFF. When the digital power amplifier 240 outputs ACOM to the smoothing filter 250, these two states are switched alternately. Hereinafter, a state in which the switch element S1 is OFF and the switch element S2 is ON (a state in which a voltage 0 is output as ACOM) is referred to as “a state in which ACOM is L”, and conversely, the switch element S1 is ON. Thus, the state where the switch element S2 is OFF (the state where the voltage Vdd is output as ACOM) may be referred to as “the state where ACOM is H”.

  Further, when the two switch elements S1 and S2 are turned on at the same time, a large inrush current flows from the power supply Vdd toward the ground GND, thereby damaging the switch elements S1 and S2. Therefore, in order to avoid such a situation, when the ACOM is switched between the “H” state and the “L” state, the switch element S1 and the switch element S2 are both turned off (dead time state). Switch via. FIG. 5B shows a dead time state when ACOM switches from L to H, and FIG. 5E shows a dead time state when ACOM switches from L to H.

  Here, focusing on the state shown in FIG. 5A (the state in which ACOM is L), in this state, one terminal of the freewheeling diode D1 is connected to the voltage Vdd, and the other terminal is connected to the ground GND. ing. Accordingly, charges are accumulated (charged) in the parasitic capacitance C1 of the freewheeling diode D1. In addition, as for the parasitic capacitance C2 of the freewheeling diode D2, since any terminal is connected to the ground GND, no charge is accumulated. When the dead time state is reached from this state, the switch element S2 is turned off as shown in FIG.

  When the dead time state elapses, the switch element S1 is turned on this time. Here, when attention is paid to the high-side terminal (side closer to the power supply Vdd) of the parasitic capacitance C2 of the freewheeling diode D2, in the state shown in FIG. 5A, the high-side terminal of the parasitic capacitance C2 of the freewheeling diode D2 is It is connected to the ground GND, and is kept at the voltage of the ground GND even in the state of FIG. On the other hand, since the charge is stored in the parasitic capacitance C1 of the return diode D1, the charge stored in the parasitic capacitance C1 flows into the parasitic capacitance C2 of the return diode D2 at the moment when the switch element S1 is turned on. In FIG. 5D, the current flowing from the parasitic capacitance C1 toward the parasitic capacitance C2 is represented by a broken arrow. The current at this time causes resistance loss in the switch element S1. If the high-side terminal voltage of the parasitic capacitance C2 of the free-wheeling diode D2 cannot be increased to Vdd only by the charge stored in the parasitic capacitance C1 of the free-wheeling diode D1, the charge is supplied from the power supply Vdd. Is done. The current at this time also causes resistance loss in the switch element S1.

  When the charge flows into the parasitic capacitance C2 of the free-wheeling diode D2 in this way, the state finally becomes as shown in FIG. 5D (ACOM is in the H state). In this state, the high-side terminal of the parasitic capacitance C2 of the freewheeling diode D2 is connected to the power supply Vdd, and the low-side (opposite side to the high side) terminal is connected to the ground GND. Has been. In addition, since the terminals of the parasitic capacitance C1 of the free-wheeling diode D1 are all connected to the power supply Vdd, no charge is accumulated.

  In the above, the case of switching from the state of FIG. 5A (the state where ACOM is L) to the state of FIG. 5D (the state where ACOM is H) has been described, but this time, conversely, FIG. A case of switching from the state (ACOM is H state) to the state shown in FIG. 5A (ACOM is L state) will be described. When the dead time state is reached from the state shown in FIG. 5D, the switch element S1 is turned OFF as shown in FIG. In this state, charge is stored in the parasitic capacitance C2 of the freewheeling diode D2, and the high-side terminal voltage is Vdd. When the dead time state elapses, the switch element S2 is turned on. Then, since the high-side terminal of the parasitic capacitance C2 of the freewheeling diode D2 is connected to the ground GND, the charge stored in the parasitic capacitance C2 is discharged to the ground GND. In FIG. 5D, a current flowing from the parasitic capacitance C2 toward the ground GND is represented by a broken arrow. The current at this time causes resistance loss in the switch element S2.

  Further, since the high-side terminal of the parasitic capacitance C1 of the free-wheeling diode D1 is connected to the power supply Vdd, the charge stored in the parasitic capacitance C2 of the free-wheeling diode D2 is discharged to the ground GND, and the high-side of the parasitic capacitance C2 As the voltage at the terminal decreases, charges are accumulated (charged) in the parasitic capacitance C1 of the freewheeling diode D1, and finally the state shown in FIG.

  The above description has been made assuming that the smoothing filter 250 is not connected to the digital power amplifier 240. However, since the smoothing filter 250 is connected to the digital power amplifier 240 as shown in FIG. 1, it is necessary to consider the influence of this. Therefore, first, a behavior when a constant voltage is suddenly applied to a general smoothing filter and a behavior when the voltage applied to the smoothing filter is suddenly dropped to 0 will be examined.

  FIG. 6 shows a current flowing through a coil of a general smoothing filter when a voltage that switches between a voltage E and a voltage 0 at a constant period T is applied to a general smoothing filter composed of a coil and a capacitor. ing. Since the output (ACOM) of the digital power amplifier 240 of this embodiment repeats the voltage Vdd and the voltage of the ground GND, if the voltage E in FIG. 5 is read as the voltage Vdd, it is applied to the smoothing filter 250 of this embodiment. be able to.

If the time the application of the voltage E (corresponding to the voltage Vdd) in a constant period T and _{t on,} the duty ratio D _{becomes t on / T (100 × t} on / T in the case of percentages) . Further, the output voltage Vout (corresponding to COM) output from the smoothing filter 250 is substantially a voltage determined by D × E. At this time, during the period in which the voltage E is applied to the coil, the current increases almost linearly from minus (in a state of flowing backward to the power supply side) to plus (in a state of flowing toward the ground GND). During the period when the applied voltage is zero, a sawtooth current that decreases almost linearly from positive to negative will flow.

  In addition, since the target driven by the piezoelectric element driving circuit 200 is the piezoelectric element 116 of the capacitive load, the charge flowing into and out of the capacitor in one cycle under the condition that the output voltage (COM) of the smoothing filter 250 is constant. Are equal, and the maximum value of the amplitude to the plus side is equal to the maximum value of the amplitude to the minus side.

FIG. 7 shows a calculation formula for the current I flowing through the coil of the smoothing filter 250. FIG. 7A shows a period in which the voltage E (corresponding to the voltage Vdd) is applied, and FIG. 7B shows a period in which the applied voltage is dropped to the voltage 0. It is. A current I flowing through the coil during the period of applying the voltage E is shown in a circuit diagram in FIG. The inductance of the coil constituting the smoothing filter 250 is L, the capacitance of the capacitor is C, the initial current flowing through the coil (current that flows when the voltage E is applied) is I ₀ , and the initial voltage of the capacitor (the capacitor when the voltage E is applied) If the voltage between terminals of E) is E ₀ , the differential equation shown in the equation (1) is established between the voltage E and the current I. When this equation is solved, the current I is obtained by the equation (2). It is done. Here, ω ₀ is the resonance frequency (= 1 / √ (LC)) of the smoothing filter 250. And, since the time _{t on} the voltage E is applied sufficiently short compared to the resonance period of the low pass filter 250, cos .omega ₀ t can is considered almost 1, sin .omega ₀ t be regarded as substantially omega ₀ t Can do. Then, the equation (2) can be approximated by the equation (3), and it can be seen that the current I increases linearly with the passage of time t.

The same applies to the period during which the voltage applied to the smoothing filter 250 is reduced to zero. That is, the current I flowing through the coil during the period when the applied voltage is reduced to 0 can be shown by the circuit diagram in FIG. 7B. Since the applied voltage is 0, the current I is (4 The differential equation shown by the formula is established. When this equation is solved, the current I flowing during the period in which the applied voltage is 0 is obtained by the equation (5). Further, a sin .omega ₀ t is approximated with omega ₀ t, when approximating the cos .omega ₀ t 1 and the current I can be calculated by equation (6). Therefore, it can be seen that the current I decreases linearly with the passage of time t during the period in which the applied voltage is reduced to 0.

Further, as shown in FIG. 6, at the moment (t = 0) when the voltage E is applied, the current I = −IA, and therefore, I ₀ = −IA from the equation (3). Furthermore, since the initial voltage E ₀ is equal to the output voltage Vout (= D × E, which corresponds to COM of the piezoelectric element driving circuit 200) in FIG. 6, when these are substituted into the equation (3) and arranged, they flow through the coil. The amplitude IA of the current is expressed by the equation (7) shown in FIG. As shown in the equation (7), the current amplitude IA is a quadratic function of the duty ratio D, and as shown in FIG. 8B, when D = 0.5 (the duty ratio D is 50%). Maximum value.

  From the above, the following can be understood. When the ACOM of the digital power amplifier 240 is smoothed by the smoothing filter 250 and a constant COM is applied to the load (when the duty ratio is constant), the coil of the smoothing filter 250 has a saw blade as shown in FIG. Current flows. The amplitude of the current is maximized on the plus side at the moment when the ACOM of the digital power amplifier 240 is switched from the “H” to the “L” state, and the amplitude is maximized on the minus side when the ACOM is “L”. This is the moment when the state switches from “H” to “H”. The absolute value of the current I (that is, the amplitude IA) becomes maximum when the duty ratio D is 50%, and the amplitude IA decreases as the duty ratio D decreases from 50% or increases from 50%. In the above description, it is assumed that COM is constant. In this case, the current flowing into the piezoelectric element 116 during one cycle is equal to the current flowing out. On the other hand, when COM increases, more current flows into the piezoelectric element 116, and conversely when COM decreases, more current flows out of the piezoelectric element 116. Therefore, when COM changes, the current I flowing through the coil of the smoothing filter 250 is shifted upward (increased) or shifted downward (decreased) by an amount corresponding to the current flowing into and out of the piezoelectric element 116. .

  When the smoothing filter 250 is connected to the digital power amplifier 240, the current I flowing through the coil of the smoothing filter 250 behaves in this manner, and the digital power amplifier 240 in a state where the smoothing filter 250 is connected is considered. Think about the behavior.

  FIG. 9 shows a phenomenon that occurs during the dead time state when the state of FIG. 5A (the state of ACOM is L) is switched to the state of FIG. 5D (the state that ACOM is H). It is explanatory drawing. As shown in FIG. 9A, in the state where ACOM is L (the switch element S1 is OFF and the switch element S2 is ON), charges are stored in the parasitic capacitance C1 of the freewheeling diode D1. Further, as described above with reference to FIG. 8, a current of magnitude IA flows from the coil of the smoothing filter 250 toward the digital power amplifier 240 immediately before ACOM switches from L to H. In FIG. 9A, a state in which a current from the coil flows is represented by a dashed arrow.

  From this state, the switch elements S1 and S2 are both turned off in the dead time state. As a result, an electromotive force is generated in the coil of the smoothing filter 250 in a direction in which a current continues to flow as it is due to a self-induction phenomenon. However, since the switch element S2 is switched OFF, it cannot flow here. On the other hand, since no charge is stored in the parasitic capacitance C2 of the freewheeling diode D2, the parasitic capacitance C2 is charged by the back electromotive force of the coil. As for the parasitic capacitance C1 of the freewheeling diode D1, the terminal voltage on the low side (opposite side of the power supply Vdd) of the parasitic capacitance C1 increases as a result of the back electromotive force of the coil. The inter-voltage becomes smaller. As a result, the charge stored in the parasitic capacitance C1 of the freewheeling diode D1 is regenerated to the power supply Vdd. The broken-line arrow shown in FIG. 9B represents a state in which the charge is charged in the parasitic capacitance C2 of the freewheeling diode D2, and the charge stored in the parasitic capacitance C1 of the freewheeling diode D1 is regenerated.

  Then, as shown in FIG. 9 (c), all the charges stored in the parasitic capacitance C1 of the freewheeling diode D1 are regenerated, and the parasitic capacitance C2 is charged until the high-side terminal voltage of the switching element S2 reaches the voltage Vdd. Is stored, the switch element S1 is turned on. In this way, as described above with reference to FIG. 5, no power loss occurs when the output of the ACOM is switched from the L state to the H state. That is, if the state of FIG. 9A can be brought to the state of FIG. 9C during the dead time state, the occurrence of power loss can be avoided. The same applies when switching the output of ACOM from H to L state.

  FIG. 10 shows a phenomenon that occurs during the dead time state when switching from the state of FIG. 5D (ACOM is H state) to the state of FIG. 5A (ACOM is L state). It is explanatory drawing. As shown in FIG. 10A, when ACOM is H (switch element S1 is ON and switch element S2 is OFF), electric charge is stored in the parasitic capacitance C2 of the free wheel diode D2. Also, as described above with reference to FIG. 6, immediately before the output of the ACOM switches from H to L, a current having a magnitude of IA flows from the digital power amplifier 240 toward the coil of the smoothing filter 250. Yes. In FIG. 10A, a state in which a current flows from the power source Vdd of the digital power amplifier 240 toward the coil is represented by a dashed arrow.

  From this state, the switch elements S1 and S2 are both turned off in the dead time state. Then, a counter electromotive force is generated in a direction in which a current continues to flow through the coil of the smoothing filter 250 due to a self-induction phenomenon. However, since the switch element S1 is switched OFF, the charge cannot be supplied from the power supply Vdd. On the other hand, the charge having the terminal voltage Vdd is stored in the parasitic capacitance C2 of the freewheeling diode D2. Therefore, this electric charge is supplied toward the coil. As a result, the high-side terminal voltage of the switching element S2 decreases, so that the voltage across the parasitic capacitance C1 of the freewheeling diode D1 increases, and as a result, charges are stored in the parasitic capacitance C1. The broken line arrow shown in FIG. 10B represents a state in which the charge stored in the parasitic capacitance C2 of the free-wheeling diode D2 is regenerated, and the charge is charged in the parasitic capacitance C1 of the free-wheeling diode D1. .

  Then, as shown in FIG. 10C, all the charges stored in the parasitic capacitance C2 of the freewheeling diode D2 are regenerated, and the charges are stored in the parasitic capacitance C1 until the voltage between the terminals of the switch element S1 reaches the voltage Vdd. After that, the switch element S2 is turned on. In this way, as described above with reference to FIG. 5, no power loss occurs when the ACOM is switched from H to L. That is, if the state of FIG. 10A can be brought to the state of FIG. 10C during the dead time state, the occurrence of power loss can be avoided.

  As described above, when the output of ACOM is switched, a large back electromotive force is generated in the coil of the smoothing filter 250, and charge regeneration and charging in the parasitic capacitors C1 and C2 are completed during the dead time state. For example, the power loss generated in the digital power amplifier 240 can be significantly suppressed. The phenomenon shown in FIG. 3, that is, when the duty ratio is near the lower limit, or conversely near the upper limit, the phenomenon that the power loss in the piezoelectric element driving circuit 200 increases abruptly has a sufficiently large back electromotive force. It is considered that this is caused by the fact that charge regeneration and charging in the parasitic capacitance could not be completed within the dead time state because electric power could not be generated.

A-4. Mechanism to avoid power loss in digital power amplifier:
FIG. 11 shows how the operation of the digital power amplifier 240 is switched between when the charge regeneration and charging in the parasitic capacitance can be completed within the dead time state and when it cannot be completed. Yes. FIG. 11A shows a case where charge regeneration and charging are completed with a margin within the dead time state, and FIG. 11B shows that charge regeneration and charging are in time just during the dead time state. FIG. 11C shows a case where charge regeneration and charging are not completed within the dead time state.

  First, the case of FIG. 11B, which is the simplest case, will be described. Immediately before the MCOM output from the digital power amplifier 240 switches from the L state to the dead time state, as shown in FIG. 6, the coil current I is in the minus direction (the direction of reverse flow toward the digital power amplifier 240). Flowing. The voltage of ACOM output from the digital power amplifier 240 is zero. This state is referred to as state [A]. Subsequently, when the switch element S2 is switched to OFF to shift to the dead time state, as described above with reference to FIG. 9B, the parasitic capacitance C2 of the freewheeling diode D2 is charged by the back electromotive force of the coil. Thus, when the ACOM output from the digital power amplifier 240 rises and the dead time state ends, the voltage Vdd is just reached. A state in which the parasitic capacitance C2 of the freewheeling diode D2 is charged by the back electromotive force of the coil and ACOM is increasing will be referred to as a state [B].

  When the dead time state is terminated and the ACOM output from the digital power amplifier 240 is in the H state, as described above with reference to FIG. 6, the coil initially has a negative direction (the reverse flow from the coil to the digital power amplifier 240). Current flows in the middle direction, but the direction of the current reverses in the middle, and the current flows in the positive direction (the direction from the digital power amplifier 240 toward the coil). A state where ACOM is a voltage Vdd and a negative current flows through the coil is referred to as a state [C]. A state where the coil current is reversed and a positive current flows is a state [D]. I will call it.

  Thereafter, when the switching element S1 is switched off from the state where ACOM is H to shift to the dead time state, as described above with reference to FIG. 10B, the parasitic capacitance C2 of the freewheeling diode D2 is caused by the back electromotive force of the coil. Is regenerated, and the parasitic capacitance C1 of the freewheeling diode D1 is charged, and ACOM decreases accordingly. And when the dead time state ends, the voltage just drops to zero. A state in which the charge is regenerated from the parasitic capacitance C2 of the return diode D2 by the back electromotive force of the coil and the ACOM is lowered is referred to as a state [E].

  When the dead time state is terminated and ACOM is in the L state, as described above with reference to FIG. 6, a positive current flows through the coil at first, but the current direction is reversed in the middle. As a result, current flows in the negative direction. A state in which ACOM is 0 and a positive current flows through the coil is referred to as a state [F]. The state in which a negative current flows through the coil is the state [A] described above.

  In the above, the state in which the operation of the digital power amplifier 240 is switched when the charge regeneration and charging in the parasitic capacitors C1 and C2 are just completed within the period of the dead time state has been described. On the other hand, when the charge regeneration and charging in the parasitic capacitances C1 and C2 are completed with a margin within the dead time period, the operation of the digital power amplifier 240 is as shown in FIG. Switch as shown.

  First, when the ACOM output from the digital power amplifier 240 is in the L state, the state is the state [A] described above, and when switching to the dead time state, the state [B] (that is, the return by the back electromotive force of the coil) The parasitic capacitance C2 of the diode D2 is charged, and ACOM increases). If a sufficiently large back electromotive force is generated in the coil, the charging of the free-wheeling diode D2 to the parasitic capacitance C2 is completed before the dead time state is completed (that is, the parasitic capacitance is reduced). After that, the terminal voltage on the high side reaches the voltage Vdd), and thereafter, the charge passes through the freewheeling diode D1 and the charge flows back to the power supply Vdd. Such a state is referred to as a state [G]. In the state [G], ACOM output from the digital power amplifier 240 becomes higher than the voltage Vdd by the voltage drop of the freewheeling diode D1.

  Thereafter, in the state where ACOM is H, from the state [C] described above (ACOM is voltage Vdd and the coil current is negative), the state [D] (ACOM is voltage Vdd and the coil current is positive). When the dead time state is reached after transitioning to the state of (5), the state [E] described above (the state in which the charge of the parasitic capacitance C2 of the freewheeling diode D2 is regenerated by the back electromotive force of the coil and the ACOM decreases) It becomes. Also in this case, if a sufficiently large back electromotive force is generated in the coil, the regeneration of charge from the parasitic capacitance C2 of the freewheeling diode D2 is completed before the dead time state ends. (That is, the terminal voltage on the high side of the parasitic capacitance decreases to a voltage of 0), and thereafter, the charge is sucked out from the ground side via the freewheeling diode D2. Such a state is referred to as a state [H]. In the state [H], ACOM becomes lower than the voltage 0 by the voltage drop of the freewheeling diode D2.

  On the other hand, if the back electromotive force generated in the coil is insufficient and the regeneration and charging of the charges in the parasitic capacitors C1 and C2 are not completed within the dead time period, the digital power The operation of the amplifier 240 is switched as shown in FIG. The operation from when the ACOM is switched from the L state to the dead time state until the dead time state is completed is the same as the operation described above with reference to FIG. 11A or FIG. That is, the state [A] is switched to the state [B].

  However, if the magnitude of the counter electromotive force generated in the coil is insufficient, charging of the free-wheeling diode D2 to the parasitic capacitance C2 is not completed even when the dead time state ends (that is, the high side of the parasitic capacitance C2). Terminal voltage does not reach the voltage Vdd). Similarly, the regeneration of charge from the parasitic capacitance C1 of the freewheeling diode D1 is not completed. For this reason, similarly to the case of switching from the state of FIG. 5A to the state of FIG. 5D, power loss due to resistance occurs in the switch element S1. In addition, since the ACOM output from the digital power amplifier 240 does not reach the voltage Vdd even after the dead time state ends, the ACOM increases to the voltage Vdd when the switch element S1 is turned on. Such a state is referred to as a state [I].

  In addition, if the magnitude of the counter electromotive force generated in the coil is insufficient, the same phenomenon occurs when the ACOM is switched from H to L. That is, when the ACOM is switched from the H state to the dead time state, the state [D] is switched to the state [E]. However, if the magnitude of the back electromotive force generated in the coil is insufficient, the regeneration of the charge from the parasitic capacitance C2 of the freewheeling diode D2 is not completed even when the dead time state ends (that is, the parasitic capacitance C2 The terminal voltage on the high side does not drop to 0). For this reason, similarly to the case of switching from the state of FIG. 5D to the state of FIG. 5A, power loss due to resistance occurs in the switch element S2. Further, even when the dead time state ends, ACOM does not decrease to 0, so that the ACOM pressure decreases to 0 after the switching element S2 is turned ON. Such a state is referred to as a state [J].

  As described above, power loss occurs when the digital power amplifier 240 enters the state [I] or the state [J]. These states occur every time ACOM switches from L to H, or from H to L (thus very frequently corresponding to the carrier frequency fc of the pulse modulation), and as a result, very much. Cause significant power loss. Therefore, in order to avoid such a power loss in the digital power amplifier 240, it is only necessary to prevent the state [I] and the state [J] from occurring. Therefore, conditions for preventing these states from occurring will be examined.

  FIG. 12A is a diagram for explaining conditions under which the state [I] and the state [J] do not occur. State [I] occurs when the output (ACOM) of digital power amplifier 240 has not reached voltage Vdd when the dead time state in state [B] has elapsed. In other words, the condition for preventing the state [I] from occurring is that the ACOM rises from the voltage 0 to the voltage Vdd or more within the dead time state. Here, if the capacitance of the parasitic capacitance C1 of the freewheeling diode D1 is Cd (H) and the capacitance of the parasitic capacitance C2 of the freewheeling diode D2 is Cd (L), the increase in the voltage V of the ACOM in the state [B] is as shown in FIG. It is displayed by the expression (8) shown in 12 (a). Note that IA in the equation (8) is the magnitude of the current flowing in the coil at the moment of switching to the dead time state, and is given by the equation (7) in FIG. Therefore, if the dead time state when ACOM switches from L to H is Td1, the condition for preventing the occurrence of the state [I] is that Td1 satisfies the equation (10) shown in FIG. Will be.

  Similarly, state [J] occurs when ACOM has not dropped from voltage Vdd to voltage 0 when the dead time state in state [E] has elapsed. The decrease in the ACOM voltage V in the state [E] is represented by the equation (9) shown in FIG. Therefore, when the dead time state when ACOM switches from H to L is Td2, and substituting the equation (7) in FIG. 8 and rearranging, the condition for not generating the state [J] is that Td2 The expression (11) shown in 12 (c) is satisfied.

  Here, Cd (H) and Cd (L) can be obtained in advance as the characteristic values of the free-wheeling diodes D1 and D2. L is an inductance of the coil of the smoothing filter 250, Vdd is a voltage generated by the power supply Vdd, and fc is a carrier frequency when the modulation circuit 230 performs pulse modulation. Therefore, if the duty ratio D corresponding to WCOM is known, Td1 and Td2 that satisfy the expressions (10) and (11) can be easily determined. If the switch elements S1 and S2 are driven in the dead time state determined in this way, even if the duty ratio becomes a value near the upper limit or near the lower limit, the power loss in the digital power amplifier 240 is not increased. It becomes possible to. Based on such a principle, the piezoelectric element driving circuit 200 of the present embodiment avoids an increase in power loss in the digital power amplifier 240.

A-5. Details of piezoelectric element drive circuit:
FIG. 13 is an explanatory diagram showing a method for avoiding an increase in power loss in the digital power amplifier 240 in the piezoelectric element driving circuit 200 of the present embodiment. As described above with reference to FIG. 2, the drive waveform signal generation circuit 210 outputs WCOM (drive waveform signal) that is the source of COM (drive signal), and stores the WCOM data in the built-in waveform memory 212. doing.

  FIG. 13B is an explanatory diagram showing a state in which WCOM data is stored in the waveform memory 212. As shown in the figure, the WCOM data stores an elapsed time from the start of WCOM output, a voltage value output at that time, and a dead time Td. The voltage value output as WCOM and the duty ratio D have a one-to-one relationship. In FIG. 12, the dead time state when the ACOM switches from L to H and the dead time state when the ACOM switches from H to L are distinguished from each other. As is clear from the comparison between the expression (11) and the expression (11), the necessary dead times Td1 and Td2 are the same in both cases. Therefore, in FIG. 13B, the dead time Td is simply stored without distinguishing between the case where ACOM switches from L to H and the case where ACOM switches from H to L.

  The drive waveform signal generation circuit 210 outputs the voltage value read from the waveform memory 212 to the arithmetic circuit 220 as WCOM, and outputs the dead time Td stored in association with the voltage value to the digital power amplifier 240. To do. Then, when the digital power amplifier 240 drives the switch elements S1 and S2 in accordance with the MCOM from the modulation circuit 230, the digital power amplifier 240 performs the following process so that the duration of the dead time state becomes the dead time Td.

A-6. Switch drive method:
FIG. 14 is a flowchart of a switch drive process performed for the gate driver 242 in the digital power amplifier 240 to drive the switch elements S1 and S2. In the switch driving process, first, it is determined whether or not the MCOM received from the modulation circuit 230 is “H” (step S100). As a result, if it is determined that MCOM is “H” (step S100: yes), the switch element S2 may be turned off regardless of whether or not the dead time state has ended, and thus the output of the drive signal Vg2 Is set to “L” (step S102).

  Subsequently, it is determined whether or not the drive signal Vg1 has already been “H”, in other words, whether or not the switch element S1 has already been switched on (step S104). If the drive signal Vg1 is not “H” (step S104: no), the MCOM is “H”, but the switch element S1 has not yet been turned on, so the drive waveform signal generation circuit Time measurement of the designated dead time Td is started from 210 (step S106). Then, it is determined whether or not the dead time Td has elapsed (step S108). If the dead time Td has not elapsed (step S108: no), the time measurement is continued as it is. As a result, if it is determined that the dead time Td has elapsed (step S108: yes), the drive signal Vg1 is set to “H” (step S110). As a result, the switch element S1 is switched ON, and the dead time state ends. On the other hand, if the drive signal Vg1 has already been “H” (step S104: yes), it is considered that the dead time state has already ended and the ACOM has switched to the “H” state. Then, the process returns to the top as it is, and it is determined whether or not the MCOM is “H” (step S100), and the series of processes described above are performed.

  As a result, when MCOM switches to “L”, it is determined as “no” in step S100. In this case, the switch element S1 may be turned off regardless of whether or not the dead time state has ended, so the output of the drive signal Vg1 is set to “L” (step S112). Subsequently, it is determined whether or not the drive signal Vg2 has already been “H”, in other words, whether or not the switch element S2 has already been switched on (step S114). As a result, when the drive signal Vg2 has already been “H” (step S114: yes), the switch element S2 has already been turned on in response to the MCOM being “L”. Therefore, the process returns to the top as it is to determine whether or not MCOM is “H” (step S100), and the series of processes described above are performed.

  On the other hand, when the drive signal Vg2 is not “H” (step S114: no), the MCOM is “L”, but the switch element S2 is not yet turned ON. Time measurement of the dead time Td designated by the drive waveform signal generation circuit 210 is started (step S116). Then, it is determined whether or not the dead time Td has elapsed (step S118). If the dead time Td has not elapsed (step S118: no), the time measurement is continued as it is. As a result, if it is determined that the dead time Td has elapsed (step S118: yes), the drive signal Vg2 is set to “H” (step S120). As a result, the switch element S2 is switched ON, and the dead time state ends.

  FIG. 15 is an explanatory diagram showing a state in which the switch elements S1 and S2 are switched by the switch driving process described above. As shown in the figure, when the MCOM is switched from L to H, the drive signal Vg2 is switched from H to L, and the switch element S2 is turned OFF. Immediately after the switch element S2 is switched OFF, the switch element S1 is still OFF, and a dead time state is started.

  In the dead time state, the parasitic capacitance C1 of the freewheeling diode D1 is regenerated and the parasitic capacitance C2 of the freewheeling diode D2 is charged by the back electromotive force of the coil of the smoothing filter 250. As a result, ACOM increases. . When the dead time Td designated from the drive waveform signal generation circuit 210 elapses, the switch element S1 is turned on by switching the drive signal Vg1 from L to H. The dead time Td is determined according to the equation (10) or (11) shown in FIG. For this reason, when the dead time Td elapses after the start of the dead time state, the regeneration and charging of the charges in the parasitic capacitors C1 and C2 are just completed, and when the ACOM just reaches the voltage Vdd, the switching element S1 Switches to ON.

  As a result, it can be avoided that the electric charge stored in the parasitic capacitance C1 flows through the switch element S1 and power is lost. Further, if it takes time for the switching element S1 to be turned on after the regeneration and charging of the charges in the parasitic capacitors C1 and C2 are completed, as described above with reference to FIG. In this case, a power loss corresponding to the forward effect voltage of the freewheeling diode D1 multiplied by the flowing current occurs. In the piezoelectric element driving circuit 200 of the present embodiment, the switch element S1 can be switched on at the timing when the charge regeneration and charging in the parasitic capacitances C1 and C2 are just completed. Can also be avoided.

  The same applies when MCOM switches from H to L. That is, as the MCOM is switched to L, the drive signal Vg1 is switched from H to L, and the switch element S1 is turned OFF. Since the switch element S2 remains OFF only when the switch element S1 is turned OFF, the dead time state is started.

  In the dead time state, the parasitic capacitance C2 of the return diode D2 is regenerated and the parasitic capacitance C1 of the return diode D1 is charged by the back electromotive force of the coil of the smoothing filter 250. As a result, ACOM decreases. . Then, when the dead time Td designated from the drive waveform signal generation circuit 210 elapses, the charge regeneration and charging in the parasitic capacitors C1 and C2 are just completed, and the ACOM drops just to the voltage 0. The switch element S2 is turned ON by switching the drive signal Vg2 from L to H. As a result, it is possible to avoid the loss of power due to the charge stored in the parasitic capacitance C2 flowing through the switch element S2. Further, in the piezoelectric element driving circuit 200, the switching element S2 can be switched ON at the timing when the charge regeneration and charging in the parasitic capacitors C1 and C2 are just completed, so that an extra power loss of the freewheeling diode D2 is also avoided. It becomes possible to do.

  In the above-described embodiment, when the drive signal Vg1 or the drive signal Vg2 is switched from “L” to “H”, the switching is performed after the dead time Td is measured using a timer. However, it is not always necessary to measure the dead time Td using a timer. For example, the timing at which the drive signal Vg1 or the drive signal Vg2 switches from “L” to “H” using an RC delay circuit in which the resistance value R or the capacitor capacitance C is adjusted so that the delay time becomes the dead time Td. The dead time Td may be delayed. In addition, when changing the dead time Td, the resistance value R or the capacitor capacitance C may be continuously variable so that an arbitrary dead time Td can be realized, but a plurality of types of resistance values R (or capacitors) A capacitance C) may be set, and an appropriate resistance value R (or capacitor capacitance C) may be selected from these. The switch elements S1 and S2 are turned on when the drive signal Vg1 or the drive signal Vg2 becomes “H” and a current (gate current) flows through the gate terminal. Accordingly, the drive signals Vg1 and Vg2 are connected to the gate terminal via the resistance (gate resistance), and the gate current is changed by changing the resistance value R of the gate resistance (or switching the resistance value R). The dead time Td may be adjusted by adjusting the current value.

B. Modified example:
There are several modifications of the piezoelectric element driving circuit 200 of the present embodiment described above. Hereinafter, these modified examples will be briefly described. In describing these modified examples, only the configuration different from the above-described piezoelectric element driving circuit 200 of the present embodiment will be described, and the same configurations as those of the present embodiment will be denoted by the same reference numerals and description thereof will be omitted.

B-1. First modification:
In the above-described embodiment, the dead time Td is stored in the waveform memory 212 of the drive waveform signal generation circuit 210, and the WCOM is output in accordance with the output of the WCOM toward the arithmetic circuit 220 by the drive waveform signal generation circuit 210. In the above description, the dead time Td corresponding to is output from the drive waveform signal generation circuit 210 to the digital power amplifier 240. However, as long as the dead time Td corresponding to WCOM can be output to the digital power amplifier 240, the dead time Td does not necessarily have to be output from the drive waveform signal generation circuit 210.

  FIG. 16 is an explanatory diagram illustrating a method in which the piezoelectric element driving circuit 200 according to the first modification avoids an increase in power loss in the digital power amplifier 240. As shown in the figure, in the piezoelectric element drive circuit 200 of the first modification, a dead time information storage memory 270 is provided outside the drive waveform signal generation circuit 210, and the dead time information storage memory 270 includes a WCOM signal. A table (dead time information) in which the voltage value is associated with the dead time Td is stored. Then, the drive waveform signal generation circuit 210 outputs WCOM toward the digital power amplifier 240 and refers to the dead time information storage memory 270 so as to output the dead time Td corresponding to WCOM to the digital power amplifier 240. Anyway.

  In the first modification described above, the dead time information storage memory 270 is described as having stored dead time information in which WCOM and dead time Td are associated with each other. However, the present invention is not limited to this, and dWCOM and A table associating the dead time Td or a table associating the duty ratio of the MCOM and the dead time Td may be stored in the dead time information storage memory 270. For example, when dead time information in which dWCOM is associated with dead time Td is stored, dead time information is output when the arithmetic circuit 220 outputs dWCOM or when the modulation circuit 230 receives dWCOM. The dead time Td may be output to the digital power amplifier 240 with reference to the dead time information in the storage memory 270. Further, when dead time information in which the duty ratio of MCOM is associated with dead time Td is stored, when the modulation circuit 230 outputs MCOM, the duty ratio of MCOM is detected and the duty ratio is supported. The attached dead time Td may be output to the digital power amplifier 240. Alternatively, the digital power amplifier 240 that has received the MCOM may detect the duty ratio of the MCOM and read the dead time Td associated with the duty ratio.

B-2. Second modification:
In the above-described embodiment or modification, the dead time Td is stored in advance, and an appropriate dead time Td is read according to the duty ratio of WCOM, dWCOM, MCOM, etc., and output to the digital power amplifier 240. explained. However, since the dead time Td can be easily calculated using the equation (10) or (11) shown in FIG. 12, the dead time Td may be calculated from WCOM.

  FIG. 17 is an explanatory diagram showing a detailed configuration of the piezoelectric element driving circuit 200 of the second modified example for calculating the dead time Td from WCOM. As shown in the figure, in the piezoelectric element drive circuit 200 of the second modification, when the drive waveform signal generation circuit 210 outputs WCOM to the digital power amplifier 240, the WCOM is also input to the dead time determination circuit 280. . The dead time determination circuit 280 converts the received WCOM into the duty ratio D, and calculates the dead time Td from the duty ratio D according to the equation (10) or (11) in FIG. Then, the obtained dead time Td is output to the digital power amplifier 240. Even in this case, since the switching elements S1 and S2 can be switched at the timing when the charge regeneration and charging in the parasitic capacitors C1 and C2 are just completed, it is possible to avoid power loss in the free-wheeling diodes D1 and D2. Thus, the piezoelectric element 116 can be driven with high power efficiency. The dead time determination circuit 280 corresponds to “dead time determination means” in the present invention.

B-3. Third modification:
In the above-described second modification, the duty ratio D is obtained from WCOM, and the dead time Td is calculated. However, the dead time Td may be calculated by obtaining the duty ratio D from dWCOM instead of from WCOM.

  FIG. 18 is an explanatory diagram showing a detailed configuration of the piezoelectric element driving circuit 200 of the third modified example for calculating the dead time Td from dWCOM. As shown in the figure, in the piezoelectric element drive circuit 200 of the third modification, dWCOM output from the arithmetic circuit 220 toward the modulation circuit 230 is also input to the dead time determination circuit 280. The dead time determination circuit 280 converts the received dWCOM into a duty ratio D, calculates the dead time Td according to the equation (10) or (11) in FIG. 12, and outputs the dead time Td to the digital power amplifier 240.

  The WCOM output from the drive waveform signal generation circuit 210 is negatively fed back to dCOM and converted into dWCOM. The MCOM obtained by pulse-modulating the dWCOM is supplied to the digital power amplifier 240. Therefore, the WCOM output from the drive waveform signal generation circuit 210 to the digital power amplifier 240 and the MCOM received by the digital power amplifier 240 do not correspond exactly. Therefore, it is possible to switch the switch elements S1 and S2 at an appropriate timing by calculating the duty ratio D from the dWCOM and calculating the dead time Td. As a result, the piezoelectric element 116 is driven more efficiently. It becomes possible.

B-4. Fourth modification:
Further, the dead time Td may be calculated using the duty ratio D measured from the MCOM instead of the duty ratio D obtained from the WCOM or dWCOM.

  FIG. 19 is an explanatory diagram showing a detailed configuration of the piezoelectric element driving circuit 200 of the fourth modified example for calculating the dead time Td from dWCOM. As shown in the figure, in the piezoelectric element driving circuit 200 of the fourth modified example, the MCOM output from the modulation circuit 230 toward the digital power amplifier 240 is also input to the dead time determination circuit 280. When the dead time determination circuit 280 receives the MCOM, the dead time determination circuit 280 measures the duty ratio D of the MCOM and calculates the dead time Td according to the equation (10) or (11) in FIG. The obtained dead time Td is output to the digital power amplifier 240.

  The modulation circuit 230 generates the MCOM by comparing the dWCOM with the triangular wave. If the triangular wave is distorted or drifts, the MCOM duty ratio D estimated from the dWCOM and the modulation circuit 230 actually The duty ratio D of the obtained MCOM does not match. The digital power amplifier 240 is supplied with MCOM obtained by the modulation circuit 230. Therefore, if the duty ratio D of the MCOM is not estimated from the dWCOM, the switch elements S1 and S2 can be switched at an appropriate timing by measuring from the MCOM. As a result, the piezoelectric element 116 is more power-efficient. It becomes possible to drive.

B-5. Fifth modification:
As in the above-described modification, a certain amount of time is required to calculate the dead time Td from WCOM. For this reason, when the dead time Td corresponding to the voltage value of WCOM is calculated, the ACOM corresponding to the voltage value may already be output from the digital power amplifier 240. Therefore, the timing for outputting ACOM may be adjusted by inserting a delay circuit 290 at any position between the drive waveform signal generation circuit 210 and the digital power amplifier 240.

  FIG. 20 is an explanatory diagram showing a detailed configuration of the piezoelectric element driving circuit 200 of the fifth modified example including the delay circuit 290. In the illustrated example, a delay circuit 290 is provided between the modulation circuit 230 and the digital power amplifier 240. Therefore, the ACOM corresponding to the WCOM is not output from the digital power amplifier 240 until the dead time determination circuit 280 calculates the dead time Td from the WCOM. In this way, the digital power amplifier 240 can switch the switch elements S1 and S2 at an appropriate timing based on the dead time Td output from the dead time determination circuit 280, so that the piezoelectric element 116 is driven efficiently. It becomes possible to do.

  Further, if the time taken for the modulation circuit to convert to MCOM after the drive waveform signal generation circuit outputs WCOM is longer than the time for calculating the dead time Td, the MCOM corresponding to the voltage value is still in the modulation circuit. There may be a case where the signal is not output from 230. Therefore, dead time is inserted by inserting a delay circuit between the drive waveform signal generation circuit 210 and the dead time determination circuit 280 or between the dead time determination circuit 280 and the digital power amplifier circuit 240. The timing to be adjusted may be adjusted.

  In the fifth modification described above, the dead time determination circuit 280 is described as calculating the dead time Td based on WCOM. However, the dead time Td may be calculated based on dWCOM or MCOM. Absent.

B-6. Sixth modification:
In the above-described embodiment or various modifications, it has been described that the piezoelectric element driving circuit 200 drives the piezoelectric element 116 of the liquid ejecting apparatus 100. However, since the ejection nozzle that ejects ink by the ink jet printer uses a piezoelectric element as an actuator, it can be suitably applied as the piezoelectric element drive circuit 200 that drives the piezoelectric element of the ejection nozzle.

  FIG. 21 is an explanatory diagram showing a rough internal structure of the ejection head 400 mounted on the inkjet printer. A plurality of ejection nozzles 402 that eject ink are provided on the bottom surface (the surface facing the print medium 2) of the ejection head 400. Each ejection nozzle 402 is connected to an ink chamber 404, and the ink chamber 404 is filled with ink supplied from an ink cartridge (not shown). A piezoelectric element 406 is provided on the ink chamber 404, and when COM (driving signal) is applied to the piezoelectric element 406, the piezoelectric element 406 is deformed and pressurizes the ink chamber 404, whereby ink is ejected from the ejection nozzle 402. Is injected.

  COM (drive signal) is generated by the piezoelectric element drive circuit 200 under the control of the control circuit 450 mounted on the inkjet printer. Further, the generated COM is supplied to the piezoelectric element 406 via the gate unit 460. The gate unit 460 is a circuit unit in which a plurality of gate elements 462 are connected in parallel. The gate elements 462 can be individually turned on or off under the control of the control circuit 450. . Therefore, the COM output from the piezoelectric element driving circuit 200 passes only through the gate element 462 that is set in a conductive state in advance by the control circuit 450 and is applied to the corresponding piezoelectric element 406, and ink is ejected from the ejection nozzle 402. Be injected.

  Here, as the COM applied to the piezoelectric element 406, a signal having a waveform as shown in FIG. 22 is used. That is, before the ink is ejected, the voltage of COM rises in order to temporarily contract the piezoelectric element 406 from the initial state, and then the COM drops greatly in order to greatly expand the piezoelectric element 406. As a result, after the voltage becomes lower than the initial voltage (initial voltage), the waveform rises again and returns to the initial voltage. Due to such a waveform, the piezoelectric element 406 has a relatively low initial voltage (that is, a voltage at which the duty ratio of the control signal Vc is a small value) even in a standby state in which the ejection head 400 is not ejecting ink. COM) is applied. Therefore, if the piezoelectric element driving circuit 200 according to this embodiment or various modifications described above is applied to the piezoelectric element driving circuit 200 that outputs such COM, it is possible to avoid the occurrence of power loss even in the standby state. It becomes possible to do.

  Although various piezoelectric element driving circuits 200 have been described above, the present invention is not limited to all the above-described embodiments and various modifications, and can be implemented in various modes without departing from the scope of the invention. It is. For example, the piezoelectric element driving circuit according to the present invention is also applied to a piezoelectric element driving circuit for driving various electronic devices including medical devices such as a liquid ejecting apparatus used for forming a microcapsule containing a medicine or a nutrient. The circuit 200 can be preferably applied.

  In the above-described embodiment and various modifications, the switch S1 and the free wheel diode D1, and the switch S2 and the free wheel diode D2 are described as different elements. However, one element includes the switch and the free wheel diode. It can also be applied in some cases. For example, when a MOSFET is used as a switch, a parasitic diode built in the MOSFET serves as a free wheel diode. In this case, the switch S1 and the freewheeling diode D1, and the switch S2 and the freewheeling diode D2 in the present invention exist in the same element. The present invention can also be applied to a device such as a MOSFET that functions as a switch and a free wheel diode with a single device.

DESCRIPTION OF SYMBOLS 100 ... Liquid injection apparatus, 110 ... Pulsation generating part, 111 ... Nozzle,
112 ... Liquid injection pipe, 113 ... Second case, 114 ... First case,
115 ... Liquid chamber, 116 ... Piezoelectric element, 120 ... Liquid supply means,
121 ... 1st connection tube, 122 ... 2nd connection tube, 123 ... Liquid container,
130 ... Control unit, 150 ... Wiring cable, 200 ... Piezoelectric element drive circuit,
210 ... Drive waveform signal generation circuit, 212 ... Waveform memory, 220 ... Calculation circuit,
230 ... modulation circuit, 240 ... digital power amplifier,
242 ... Gate driver 250 ... Smooth filter 260 ... Compensation circuit
270 ... Dead time information storage memory, 280 ... Dead time determination circuit,
290 ... Delay circuit, 400 ... Ejecting head, 402 ... Ejecting nozzle,
404 ... Ink chamber, 406 ... Piezoelectric element, 450 ... Control circuit,
460 ... Gate unit, 462 ... Gate element,
S1 ... switch element, C1 ... parasitic capacitance, D1 ... freewheeling diode,
S2 ... switch element, C2 ... parasitic capacitance, D2 ... reflux diode

Claims (4)

A control device for a pulsation generator that can be connected to a pulsation generator for ejecting liquid by applying a drive signal to a piezoelectric element to excise or incise a living tissue,
A drive waveform signal generating circuit for generating a drive waveform signal which is a reference of the drive signal;
A modulation circuit for pulse-modulating the drive waveform signal to generate a modulation signal that repeats a high voltage state and a low voltage state;
A digital power amplifier that amplifies the modulated signal to generate a power amplified modulated signal;
A smoothing filter that generates the drive signal by smoothing the power amplification modulation signal;
With
The digital power amplifier is:
A first voltage source;
A first switch element connected in series with the first voltage source;
A second switch element connected in series with the first switch element;
A second voltage generation source connected in series with the second switch element and generating a voltage lower than the first voltage generation source;
A first diode provided in parallel to the first switch element and having a cathode side connected to the first voltage generation source;
A second diode provided in parallel to the second switch element and having an anode connected to the second voltage generation source;
With
Each of the first diode and the second diode has a parasitic capacitance;
The digital power amplifier has a duty ratio that is a time ratio at which the modulation signal is in the high voltage state, a voltage of the driving waveform signal, or a dead time determined according to any of the voltages of the driving signal, A pulsation generator control device that drives the first switch element and the second switch element. In the pulsation generator control device according to claim 1 ,
The dead time is provided with dead time information storage means for storing dead time information associated with any one of the duty ratio of the modulation signal, the voltage of the drive waveform signal, or the voltage of the drive signal,
The pulsation generator control apparatus, wherein the digital power amplifier drives the first switch element and the second switch element with the dead time determined based on the dead time information. In the pulsation generator control device according to claim 1 ,
A dead time determining means for determining the dead time based on any one of the duty ratio of the modulation signal, the voltage of the drive waveform signal, or the voltage of the drive signal;
The pulsation generator control apparatus, wherein the digital power amplifier drives the first switch element and the second switch element with the determined dead time. A pulsation generator for ejecting liquid by applying a drive signal to the piezoelectric element to excise or incise biological tissue;
The pulsation generator control device according to any one of claims 1 to 3,
A liquid ejecting apparatus comprising:

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