JP6044277B2 - Manufacturing method of silicon single crystal wafer - Google Patents

Description

  The present invention relates to a silicon single crystal wafer used as a material for a semiconductor device such as a memory, a CPU, a system LSI, a power device, an image sensor, and a solar cell, a method for manufacturing a silicon single crystal for manufacturing the silicon single crystal wafer, and a silicon single crystal wafer Regarding the method.

  In recent years, the quality of wafers used for advanced semiconductor devices has been improved, and defect-free near the surface layer is becoming standard. As a method of satisfying these, there is a method of growing a defect-free crystal by precise control at the time of crystal growth, and at the time of crystal growth, there is a defect in which a vacancy type point defect called a void defect is gathered, but an epitaxial (EP ) Attempts to achieve defect-free by various methods such as a method of forming a layer, a method of high-temperature heat treatment of a wafer having a void defect, and a method of bonding a defect-free layer through an oxide film. Yes. Defect elimination of wafers manufactured by the above method is confirmed by various methods such as a particle counter, but with higher sensitivity, defect elimination at a higher level has come to be required. Yes.

  On the other hand, not only defect-free but also a precise control method of the resistivity of the wafer has been required. For example, image sensors used in mobile phones and digital cameras generate carriers by the photoelectric effect and store them in the energy barrier to recognize the intensity of light. The photoelectric effect and energy barrier characteristics depend on the resistivity. Change. In power devices where demand is increasing as energy-saving devices, On resistance when current is flowing and breakdown voltage when current is stopped are important characteristics, which are also affected by resistivity. Therefore, it is necessary to precisely control the resistivity, but in order to do so, it is also necessary to pay attention to the donor generated in the device.

  In general, a wafer cut from a crystal manufactured by the Czochralski (CZ) method contains oxygen, and this oxygen has a demerit that it becomes a donor and the resistivity changes. Therefore, if the oxygen concentration is lowered, the influence of this donor can be reduced. On the other hand, when oxygen is deposited during device heat treatment to form BMD (Bulk Micro Defect), there is a merit that it captures contaminating impurities (gettering). Conventionally, relatively high oxygen concentration crystals have been used. However, due to recent advances in device processes, gettering capability is no longer necessary, and there is a demerit that BMD causes breakdown voltage degradation and leakage, so reducing the oxygen concentration of the wafer is an effective option. It has been considered one.

A CZ single crystal is generally grown from a silicon raw material melted in a quartz crucible. At this time, oxygen is eluted from the quartz crucible. Most of the dissolved oxygen evaporates, but a very small portion reaches the crystal growth interface directly through the melt of the silicon raw material, so that the grown silicon single crystal contains oxygen. The contained oxygen moves and aggregates by heat treatment during device fabrication or the like to form oxygen precipitates called BMD. As described above, when the BMD is formed, there is an advantage that the impurities are gettered. On the other hand, there is a possibility that problems of leakage and breakdown voltage may occur. Generation of BMD can be extremely suppressed when the oxygen concentration is lowered. As a technique for reducing the oxygen concentration, Patent Document 1 discloses that the crystal rotation and the crucible rotation are slowed down by a magnetic field application CZ (MCZ) method, which is considerably low as 2 × 10 ¹⁷ (atoms / cm ³ ). It is known that oxygen concentrations can be achieved.

  Further, it is known that a crystal defect (Grown-in defect) formed during crystal growth exists in the CZ single crystal. Generally, silicon single crystals include vacancy and interstitial Si, which are intrinsic point defects. The saturation concentration of these intrinsic point defects is a function of temperature, and a supersaturation state of point defects occurs with a rapid decrease in temperature during crystal growth. The supersaturated point defect proceeds in the direction of mitigating the supersaturated state by pair annihilation, outward diffusion and slope diffusion. In general, this supersaturated state cannot be completely eliminated, and eventually either Vacancy or Interstitial Si remains as a dominant supersaturated point defect. It is known that when the crystal growth rate is high, vacancy is likely to be in a supersaturated state, and conversely, if the crystal growth rate is low, interstitial Si is likely to be in a supersaturated state. If the concentration of the supersaturated state becomes a certain level or more, they aggregate and form crystal defects (Grown-in defects) during crystal growth.

  OSF nuclei and void defects are known as grown-in defects in the case of a vacancy dominant region (V region). When the OSF nucleus is heat-treated at a high temperature of about 1100 ° C. in a wet oxygen atmosphere, Interstitial Si is injected from the surface, and stacking faults (SF) grow around the OSF nucleus, and this sample is selected. This is a defect observed as a stacking fault when selective etching is performed while rocking in the etching solution. This is called OSF (Oxygen Induced Stacking Fault) because stacking faults grow due to oxidation treatment.

  The void defect is a hollow defect formed by collecting vacancy, and it is known that an oxide film called an inner wall oxide film is formed on the inner wall. This defect has several names depending on how it is detected. When it is observed by a particle counter that irradiates the wafer surface with a laser beam and detects its reflected light, scattered light, etc., it is called COP (Crystal Originated Particle). When the sample is observed as a flow pattern after being left for a relatively long time without shaking in the selective etching solution, it is called FPD (Flow Pattern Defect). When an infrared laser beam is incident from the surface of the wafer and observed by an infrared scattering tomograph (LST) that detects the scattered light, it is called LSTD. Although these detection methods are different, they are all considered to be void defects.

  On the other hand, when Interstitial Si is dominant, crystal defects in which Interstitial Si is aggregated are formed. Although the identity of this is not clear, it is considered as a dislocation loop or the like, and a huge one is observed as a dislocation loop cluster by TEM (Transmission Electron Microscopy). This Inter-Si Grown-in defect is observed as a large shell-like pit when the sample is left for a relatively long time without shaking the sample in the selective etching solution, that is, the same etching method as FPD. This is called LEP (Large Etch Pit).

JP-A-5-155682 JP 2000-44389 A JP 2000-109396 A JP 2001-106594 A JP 2000-344598 A JP 2010-16099 A

As described above, the EP wafer is one of the wafers that can fill the surface-free defects because the EP wafer is filled when the EP layer is deposited even if there are void defects on the surface of the sub-wafer. Therefore, conventionally, a low-defective wafer or a non-defective wafer has not been used as a wafer used for the sub. However, the EP wafer has a problem that the wafer is subjected to a high-temperature thermal history during the deposition of the EP layer, so that it is difficult to precipitate oxygen and the gettering ability is lowered. To solve this problem, Patent Document 2 discloses a technique for improving gettering ability by doping nitrogen. However, nitrogen doping resulted in the generation of stable oxygen precipitates even at high temperatures, which further caused defects in the EP layer. In Patent Document 3, in order to prevent such a defect, the sub defect size is defined as 0.1 μm or more in terms of diameter and the defect density is 5 × 10 ⁴ / cm ³ or less. In order to solve this problem, Patent Document 4 discloses a method for reducing the oxygen concentration of a wafer. Nevertheless, these were not yet sufficiently low defect levels. In particular, recently, the EP layer has been thinned to reduce the cost of the EP wafer, and the sub-grown-in defect under the EP layer can be seen through due to the increased sensitivity of the evaluation equipment, etc. The problem that the EP layer is slightly depressed due to defects has become apparent, and this level is insufficient.

  Further, Patent Document 5 discloses a technique for stacking an EP layer on a wafer that has been made defect-free by doping nitrogen and carbon. However, when carbon is doped, there are problems such as abnormal diffusion of carriers, excessive precipitation of oxygen, or formation of a new donor composed of carbon and oxygen. The above-described inventions are all made with the expectation of gettering ability and aim to generate BMD. However, as described above, there are cases where gettering capability is not required due to recent improvements in device processes, and BMD may cause deterioration of breakdown voltage characteristics and leakage characteristics in such cases. There was a technology.

As a technique that can solve these problems, Patent Document 6 discloses a technique in which an EP layer is stacked on a sub-cut from a low oxygen defect-free crystal. However, there has been a problem that the wafer strength is reduced by reducing the oxygen concentration, and slipping occurs when the EP layer is stacked.
Under such circumstances, a low-defective wafer or a non-defective wafer that can be used as a sub of the EP wafer has been demanded.

  The present invention has been made in view of the above-mentioned problems, and is a method for producing a silicon single crystal by the CZ method, has excellent Grown-in defect characteristics, has slip resistance, and generates oxygen donors. It is difficult to clarify the growth conditions that can produce suitable crystals even when used in EP subs, etc., and further shows that the production margin can be expanded by decreasing the oxygen concentration, and that it can be efficiently produced, thereby It is an object of the present invention to provide a method for manufacturing a silicon single crystal that can be suitably used as a material for advanced semiconductor devices with high productivity (high growth rate) and high yield (high manufacturing margin).

In order to solve the above problems, the present invention provides:
A method for producing a silicon single crystal by the Czochralski method,
The nitrogen concentration [N] in the silicon single crystal is 1 × 10 ¹³ (/ cm ³ ) or more and 5 × 10 ¹⁵ (/ cm ³ ) or less, and the oxygen concentration [Oi] is 9.2 × 10 ¹⁷ (atoms / cm ³ ASTM'79) or less, the growth rate in growing the silicon single crystal is V (mm / min), and the temperature gradient in the vicinity of the crystal growth interface is G (K / mm). G grows a single crystal under the growth conditions satisfying 0.17 ≦ V / G ≦ −1.85 × 10 ⁻¹⁹ × [Oi] +0.36, so that FPD and LEP are not detected by selective etching. A method for producing a silicon single crystal, characterized by producing a crystal.

  According to such a method for producing a silicon single crystal, it is possible to produce a silicon single crystal that has excellent Grown-in defect characteristics, has slip resistance, and is unlikely to generate oxygen donors.

The oxygen concentration [Oi] in the silicon single crystal is 4.0 × 10 ¹⁷ (atoms / cm ³ ASTM′79) or less, and the growth condition is 0.17 ≦ V / G ≦ −1.25 ×. By satisfying 10 ⁻¹⁹ × [Oi] +0.24, it is preferable to manufacture a silicon single crystal in which LSTD is not detected.

  With such a silicon single crystal manufacturing method, a silicon single crystal with further improved Grown-in defect characteristics can be manufactured.

  Furthermore, the present invention provides a method for producing a silicon single crystal wafer in which an epitaxial layer is deposited on a silicon single crystal wafer cut out from the silicon single crystal produced by the method for producing a silicon single crystal.

  Such a manufacturing method is excellent in slip resistance because nitrogen is doped even at a low oxygen concentration, and the epitaxial layer can be easily deposited. Moreover, since the sub-Grown-in defect characteristic is excellent, an epitaxial wafer having no epi defect can be manufactured.

  Furthermore, the present invention provides a method for producing a silicon single crystal wafer, in which a silicon single crystal wafer cut out from the silicon single crystal produced by the method for producing a silicon single crystal is subjected to heat treatment.

  With such a manufacturing method, since nitrogen is doped even at a low oxygen concentration, the slip resistance during heat treatment can be enhanced, and the sub-row-in defect characteristics are excellent. Therefore, an annealed wafer in which defects near the surface have disappeared can be manufactured.

  Further, it is preferable to add an exogenous gettering capability to the back surface of the silicon single crystal wafer by performing any one of polysilicon film formation, sandblasting, and ion implantation.

  In this way, the silicon single crystal wafer manufactured by the above manufacturing method can be added with an exogenous gettering capability as required.

  Furthermore, the present invention provides a silicon single crystal wafer manufactured by the method for manufacturing a silicon single crystal wafer.

  Such a silicon single crystal wafer is excellent in defect characteristics and has a low oxygen concentration, so that the amount of oxygen donors generated by heat treatment of the device or the like is small, and can be suitably used as a material for advanced semiconductor devices.

  The method for producing a silicon single crystal according to the present invention clarifies the growth conditions that can produce a crystal having a low oxygen concentration, excellent growth-in defect characteristics by nitrogen doping, and excellent slip resistance and oxygen donor characteristics. By demonstrating that efficient manufacturing can be achieved by clarifying the point where the manufacturing margin widens due to the decrease, silicon single crystals that can be used favorably as materials for advanced semiconductor devices have high productivity (high growth rate) and high yield. It can be manufactured with (high manufacturing margin). Furthermore, when this silicon single crystal is used as a wafer, the slip resistance is also excellent. For example, it is easy to stack an EP layer, and the resistivity variation due to the oxygen donor is small, so that more precise resistivity control is required. It can also be suitably used for an imaging device or the like.

It is the schematic which shows an example of the CZ single crystal manufacturing apparatus. It is the graph which expressed the relationship between V / G and oxygen concentration in the case of nitrogen dope investigated by experiment, and plotted the crystal defect generation | occurrence | production situation. It is the graph which expressed the relationship between V / G and oxygen concentration in the case of no nitrogen dope investigated by experiment, and plotted the crystal defect generation condition. FIG. 3 is a schematic view showing an example in which particles of a polished wafer produced in Example 1 are observed. 6 is a schematic view showing an example of observing particles of an epi-wafer produced in Example 2. FIG.

As described above, a wafer used as a material for advanced semiconductor devices is desired to have few crystal defects and low oxygen concentration.
The sensitivity of the above-mentioned crystal defect detection method is influenced by the performance of the particle counter (wavelength and detection sensitivity), the performance of the infrared scattering tomograph (incident light intensity and detection sensitivity), and the oxygen concentration. Although not determined, from the results of experiments by the present inventors, it is considered that LSTD> COP to FPD at least in the low oxygen concentration region, and the sensitivity of LSTD is high. This difference in detection sensitivity is considered to be caused by changes such as the inner wall oxide film in the void defect becoming thinner due to the lower oxygen concentration. FPD is a detection method based on a chemical reaction called selective etching, and the detection sensitivity is affected by the inner wall oxide film, whereas LSTD is a detection method based on the physical phenomenon of light scattering due to the dielectric constant difference, and there is no inner wall oxide film. It is imagined that this is because the difference in dielectric constant increases.

  On the other hand, the present inventors can use a low-defect wafer having a low oxygen concentration and at least a void defect that is not detected as FPD, and can be used for a leading-edge product such as for power devices, and a defect formation temperature. It has been found that by quenching the band, a crystal having a low oxygen concentration and no FPD can be produced.

  Based on the above, the present inventors have further found that the upper limit of the ratio between the crystal growth rate and the temperature gradient in the vicinity of the crystal growth interface can be a function of the oxygen concentration in the crystal. It is found that a region in which crystal defects such as LSTD are not detected can be represented, and further, by setting the nitrogen concentration value in the crystal to a specific value and reducing the oxygen concentration, the region in which no crystal defects are detected expands. As a result, the present invention was completed.

That is, according to the present invention,
A method for producing a silicon single crystal by the Czochralski method,
The nitrogen concentration [N] in the silicon single crystal is 1 × 10 ¹³ (/ cm ³ ) or more and 5 × 10 ¹⁵ (/ cm ³ ) or less, and the oxygen concentration [Oi] is 9.2 × 10 ¹⁷ (atoms / cm ³ ASTM'79) or less, the growth rate in growing the silicon single crystal is V (mm / min), and the temperature gradient in the vicinity of the crystal growth interface is G (K / mm). G grows a single crystal under the growth conditions satisfying 0.17 ≦ V / G ≦ −1.85 × 10 ⁻¹⁹ × [Oi] +0.36, so that FPD and LEP are not detected by selective etching. A method for producing a silicon single crystal, characterized by producing a crystal.

Here, the CZ single crystal manufacturing apparatus will be described in advance.
The CZ single crystal manufacturing apparatus 20 of FIG. 1 is arranged around the main chamber 1, the quartz crucible 5 and the graphite crucible 6 that house the raw material melt 4 in the main chamber 1, and the quartz crucible 5 and the graphite crucible 6. A heating heater 7, a heat insulating member 8 around the outside of the heating heater 7, and a pulling chamber 2 connected to the upper portion of the main chamber 1 and containing the grown silicon single crystal rod 3 are configured. The pulling chamber 2 is provided with a gas inlet 10 for introducing a gas to be circulated in the furnace, and a gas outlet 9 for discharging the gas circulated in the furnace is provided at the bottom of the main chamber 1. Further, a heat shield member 13 for blocking heat radiation from the heater 7 and the raw material melt 4 can also be provided. The quartz crucible 5 and the graphite crucible 6 can be moved up and down in the direction of the crystal growth axis, and the quartz crucible 5 and the graphite crucible 6 are raised so as to compensate for the descending level of the raw material melt 4 that has been crystallized and decreased during crystal growth. . Thereby, the height of the liquid surface of the raw material melt 4 is kept substantially constant.

  Furthermore, according to manufacturing conditions, a magnetic field generator (not shown) is installed outside the main chamber 1, and a horizontal or vertical magnetic field is applied to the raw material melt 4 to convect the raw material melt 4. It can also be used as a so-called MCZ method apparatus that suppresses and achieves stable growth of a single crystal.

  Such a CZ single crystal manufacturing apparatus 20 extends from the ceiling of the main chamber 1 toward the surface of the raw material melt 4 accommodated in the quartz crucible 5 and surrounds the silicon single crystal rod 3 being grown. And a cooling auxiliary cylinder 14 attached to the inner side of the cooling cylinder 11. Further, the cooling cylinder 11 can be provided with a cooling medium inlet 12 for introducing the cooling medium.

The material of the cooling cylinder 11 is preferably iron, chromium, nickel, copper, titanium, molybdenum, tungsten, or an alloy containing any of these. Or it is also preferable that it is what was coat | covered with the metal in any one of titanium, molybdenum, tungsten, nickel, and a platinum group metal.
As the material of the cooling cylinder 11, SUS, which is an alloy of iron, chromium, and nickel, is particularly versatile and easy to use.

  The material of the auxiliary cooling cylinder 14 is preferably a material that is stable at high temperatures and has high thermal conductivity, and is preferably any one of graphite, carbon composite, stainless steel, molybdenum, and tungsten. In particular, in addition to good thermal conductivity, a graphite material that has high heat radiation rate and can easily absorb heat from the crystal is preferable.

Below, an example of the growth method of the silicon single crystal by the above-mentioned single crystal manufacturing apparatus 20 is demonstrated.
First, in a quartz crucible 5, a high-purity polycrystalline raw material of silicon is heated to a melting point (1412 ° C.) or higher to be melted to obtain a raw material melt 4. Next, by unwinding the wire, the tip of the seed crystal is brought into contact with or immersed in the approximate center of the surface of the raw material melt 4. Thereafter, the quartz crucible 5 and the graphite crucible 6 are rotated in appropriate directions, the wire is wound while being wound, and the seed crystal is pulled up to start growing the silicon single crystal rod 3.

  The method for producing a silicon single crystal according to the present invention includes a ratio V / G of the nitrogen concentration [N], the oxygen concentration [Oi], the growth rate V of the single crystal, and the temperature gradient G in the vicinity of the crystal growth interface. By adjusting to an appropriate value, a silicon single crystal having low or no defects can be obtained.

The nitrogen concentration [N] in the silicon single crystal can be prepared, for example, by doping nitrogen. By doping nitrogen so that [N] is 1 × 10 ¹³ (/ cm ³ ) or more and 5 × 10 ¹⁵ (/ cm ³ ) or less, the size of the grown-in defect can be reduced. When [N] is less than 1 × 10 ¹³ (/ cm ³ ), the defect reduction effect by nitrogen doping is weakened. On the other hand, if it exceeds 5 × 10 ¹⁵ (/ cm ³ ), it approaches the solid solution limit of nitrogen in silicon, and single crystallization becomes difficult.

The oxygen concentration [Oi] in the silicon single crystal is set to the low oxygen concentration side of 9.2 × 10 ¹⁷ (atoms / cm ³ ASTM'79) or less to widen the region where no defect is detected due to the low oxygen concentration. Because it can. The lower the [Oi] is, the greater the effect is. However, in the CZ method using a quartz crucible, [Oi] is never completely zero, so in reality it is 0.1 × 10 ¹⁷ (atoms). / Cm ³ ASTM '79) or more. Further, in a nitrogen-doped product, a NO donor composed of nitrogen and oxygen is formed, which may adversely affect the resistivity. Since the generation amount of this NO donor strongly depends on [Oi], this influence can be suppressed by reducing the oxygen concentration. Here, the oxygen concentration is expressed as [Oi], but the subscript “i” means Interstitial. Oxygen atoms exist in the interstitial (interstitial) in the silicon crystal, and when the FT-IR (infrared absorption) method is used, absorption at a specific wavelength by the interstitial oxygen Oi is observed. Desired. Since the oxygen concentration thus obtained is the concentration of interstitial oxygen Oi, it is expressed as [Oi].

The method for producing a silicon single crystal of the present invention has a ratio V / when the growth rate in growing a silicon single crystal is V (mm / min) and the temperature gradient near the crystal growth interface is G (K / mm). A single crystal is grown under growth conditions where G satisfies 0.17 ≦ V / G ≦ −1.85 × 10 ⁻¹⁹ × [Oi] +0.36. When V / G is less than 0.17 (mm ² / (K · min)), LEP is detected by selective etching, causing problems such as leakage during device fabrication. Further, when V / G exceeds −1.85 × 10 ⁻¹⁹ × [Oi] +0.36 (mm ² / (K · min)), FPD is detected by selective etching, and the breakdown voltage is deteriorated at the time of device fabrication. Cause problems.
Here, the reason why the upper limit value of V / G is used as a function of the oxygen concentration [Oi] is that the region in which no FPD is detected is found to expand as the oxygen concentration decreases, and can be expressed as a conditional expression. It is.

  Here, as a method for detecting FPD and LEP, for example, selective etching in which a sample cut from a silicon single crystal is left in a selective etching solution made of hydrofluoric acid, nitric acid, acetic acid, and water without shaking. A method can be mentioned. By such a detection method, defects called FPD that is a pit with a flow pattern and LEP that is a shell-like pit are observed.

The above conditions, that is, [N] is 1 × 10 ¹³ (/ cm ³ ) or more and 5 × 10 ¹⁵ (/ cm ³ ) or less, and [Oi] is 9.2 × 10 ¹⁷ (atoms / cm ³ ASTM). '79) and the ratio V / G between the growth rate V and the temperature gradient G in the vicinity of the crystal growth interface is 0.17 ≦ V / G ≦ −1.85 × 10 ⁻¹⁹ × [Oi] +0.36 If a silicon single crystal is grown under growth conditions that satisfy the above conditions, it is possible to obtain a low-defect crystal in which FPD and LEP are not detected even if a sample cut out from the crystal is selectively etched. A single crystal can be obtained.

  FPD and LEP are not detected in crystals grown under the conditions described above. However, when this crystal is seen in more detail, the defect (LSTD) detected by the infrared scattering method may be seen although the FPD is not visible. As described above, this is because the detection sensitivity of LSTD> FPD and LSTD is high at least in the low oxygen concentration region.

In order to obtain a crystal in which LSTD is not detected, [N] is 1 × 10 ¹³ (/ cm ³ ) or more and 5 × 10 ¹⁵ (/ cm ³ ) or less, and [Oi] is 4.0 ×. 10 ¹⁷ (atoms / cm ³ ASTM'79) or less, and the ratio V / G (mm ² / (K · min)) between the growth rate V and the temperature gradient G in the vicinity of the crystal growth interface is 0.17 ≦ A silicon single crystal may be grown under the growth condition of V / G ≦ −1.25 × 10 ⁻¹⁹ × [Oi] +0.24. This is preferable because FPD and LEP are not detected, and LSTD is not detected.

The reason why the oxygen concentration [Oi] is 4.0 × 10 ¹⁷ (atoms / cm ³ ASTM'79) or less is that a defect-free region in which even LSTD is not visible is easily obtained by reducing the oxygen concentration. The lower the oxygen concentration, the greater the effect. However, in the CZ method using a quartz crucible, the oxygen concentration is never completely zero, so in reality 0.1 × 10 ¹⁷ (atoms / cm ³ ASTM '79) or more.

The reason why the ratio V / G between the growth rate and the temperature gradient near the crystal growth interface is 0.17 (mm ² / (K · min)) or more is because LEP is not detected. Further, the reason why V / G is set to −1.25 × 10 ⁻¹⁹ × [Oi] +0.24 or less is that LSTD is detected at more than this.
Here, the upper limit value of V / G is used as a function of the oxygen concentration [Oi] because the range in which LSTD is not detected expands as the oxygen concentration decreases as in FPD, and is expressed as a conditional expression. This is because it became possible. Further, the lower value of the upper limit value of V / G when FPD is not detected is that the detection sensitivity of LSTD> FPD and LSTD is high at least in the low oxygen concentration region as described above. It depends.

The above conditions, that is, [N] is 1 × 10 ¹³ (/ cm ³ ) or more and 5 × 10 ¹⁵ (/ cm ³ ) or less and [Oi] is 4.0 × 10 ¹⁷ (atoms / cm ³ ASTM). '79) or less, and the ratio V / G between the growth rate V and the temperature gradient G near the crystal growth interface is 0.17 ≦ V / G ≦ −1.25 × 10 ⁻¹⁹ × [Oi] +0.24 If a silicon single crystal is grown under the conditions that satisfy the above conditions, it is possible to obtain a defect-free crystal in which FPD and LEP are not detected even if a sample cut from the crystal is selectively etched, and further, LSTD is not detected. Yes, it is possible to obtain a silicon single crystal suitable for the advanced semiconductor device.

  The silicon single crystal manufactured by the above manufacturing method is processed into a wafer through processes such as slicing, chamfering, grinding, etching, mirror finish polishing, etc., for example, according to a normal method, so that it has low or no defects. A silicon single crystal wafer can be manufactured. Such a silicon single crystal wafer can be transferred to a device manufacturing process as it is, but various processes can be added depending on the purpose.

  The silicon single crystal wafer of the present invention can deposit an epitaxial (EP) layer. Further, the resistivity of the EP layer can be different from that of the substrate (sub) in order to produce a structure that changes the resistivity. Since this sub wafer is a low oxygen concentration wafer doped with nitrogen, there is no giant oxygen precipitate stable at a high temperature that would be a problem with conventional nitrogen doped wafers, and defects occur even when an EP layer is formed. There is nothing. Moreover, since the FPD / LEP is controlled to a level at which it is not detected, even when a thin EP layer of about several μm is stacked, the sub-wafer defect is transferred to the EP layer to form a step, or the sub-wafer defect is There is no problem of see-through.

  In addition, when a low oxygen concentration wafer is used as a sub-wafer, it is known that the material strength is reduced due to the reduction of oxygen atoms, the yield stress is lowered, and the slip resistance is weakened. For example, in a low oxygen concentration sub-wafer, slips occur frequently only by loading an EP layer. However, in the silicon single crystal wafer according to the present invention, although it has a low oxygen concentration, slip resistance is improved by doping with nitrogen, and even if heat treatment such as EP growth is performed, generation of slip is suppressed. it can.

  As described above, the silicon single crystal wafer of the present invention can easily deposit an EP layer, and in particular, a thin film having an EP layer thickness of 10 μm or less that is susceptible to the oxygen concentration of the substrate and the surface crystal defects. It can be suitably used as an EP wafer. Since such an EP wafer is a low oxygen concentration substrate, there is little fear of a change in resistivity due to an oxygen donor, and for example, it can be suitably used as a material for a power device or an imaging device.

  In addition, the silicon single crystal wafer of the present invention is a sub-wafer for annealing, and an annealed wafer obtained by subjecting it to a heat treatment (annealing) can exhibit good performance in advanced semiconductor devices. The heat treatment conditions at this time are not particularly limited, and normal conditions can be applied.

  Usually, the purpose of annealing the sub-wafer is to modify the defect characteristics in the vicinity of the surface layer of the sub-wafer, or to reduce the oxygen concentration by outward diffusion of oxygen in the vicinity of the surface layer. However, since the silicon single crystal wafer according to the present invention is originally excellent in defect characteristics and has a low oxygen concentration, it can be easily modified only by a slight heat treatment, and the desired quality can be easily obtained. For this reason, there is a merit in terms of cost, for example, the costly annealing process can be shortened or the temperature can be lowered. Moreover, since slip which becomes a problem when annealed is doped with nitrogen, the slip resistance is enhanced, and the generation of slip can be suppressed.

  On the other hand, although the silicon single crystal wafer described above is nitrogen-doped, the gettering effect by BMD can hardly be expected due to the low oxygen concentration. Gettering capability is not always necessary due to recent advances in device processes, but if necessary, extrinsic gettering can be performed by applying polysilicon film formation, sand blasting, or ion implantation to the backside of the silicon single crystal wafer described above. (EG) ability can be added.

  Impurities and defects on the device active layer side can be reduced by performing polysilicon film formation or EG treatment by sandblasting on the back surface of the silicon single crystal wafer. Any known method can be applied for forming the polysilicon film and sandblasting.

  In addition, by performing ion implantation as an EG process, a strained layer having a gettering ability can be formed at a specific depth near the device active layer, so that the impurity concentration of the device active layer can be easily reduced. can do. Examples of this ion implantation include carbon ion implantation.

  As described above, the silicon single crystal wafer of the present invention can be subjected to various processes according to the purpose, and can be used as a material for advanced semiconductor devices such as memory, CPU, system LSI, power device, imaging device, solar cell and the like. It can be used suitably.

  EXAMPLES Hereinafter, although an experiment example, an Example, and a comparative example are shown and this invention is demonstrated more concretely, this invention is not limited to these.

(Experiment)
In completing the present invention, the oxygen concentration dependence of V / G in which various grown-in defects occur was investigated. It is known that the conditions under which various defects occur are greatly affected by V / G. It is also known to be affected by nitrogen doping. In addition to this, the defect size is also reduced by the passage time of the defect formation temperature zone, and it is not detected as FPD or LSTD, and the defect-free region is expanded. Therefore, in the case of extreme rapid cooling or gradual cooling, the defective area cannot be drawn only by V / G. Therefore, this time, all data was collected using a CZ single crystal manufacturing apparatus that has a structure having a cooling cylinder cooled by cooling water, which is schematically shown in FIG. In these manufacturing apparatuses, a distance from 1150 ° C. to 1080 ° C., which is called a defect formation temperature zone, is between 17 mm and 35 mm above the growth interface at the center of the crystal. In addition, although it is said that the defect formation temperature is lowered when nitrogen doping is performed, here, for simplicity, the defect formation temperature is expressed using a defect formation temperature zone when nitrogen doping is not performed. Moreover, V / G was also changed by changing the growth rate in various ways, but the growth rate at this time was between 0.4 mm / min and 1.1 mm / min. Conditions that shorten the transit time are not used. A crystal having a diameter of 200 mm or 300 mm was grown using the CZ method (including the MCZ method). Since the actual diameter has a portion that is scraped off by cylindrical grinding, it grows thicker by about 2-3%.

Under these conditions, crystals were grown in the case where nitrogen was doped and in the case where nitrogen was not doped. The oxygen concentration of these crystals and the occurrence of crystal defects were investigated and the defect map was completed. In the crystal doped with nitrogen, the crystal was grown under the condition that the nitrogen concentration [N] in the crystal was 3 × 10 ¹³ (/ cm ³ ) or more and 1 × 10 ¹⁵ (/ cm ³ ) or less. The oxygen concentration of the grown crystal was obtained by FT-IR method after high-luminance surface grinding of a wafer-like sample cut out from the crystal. For FPD and LEP evaluations, wafer-like samples are subjected to surface grinding, cleaning, and mirror etching by mixed acid, and then left in a selective etching solution consisting of hydrofluoric acid, nitric acid, acetic acid, and water, without shaking, and etching is performed. After leaving until the removal allowance of 25 ± 3 μm on both sides, it was counted with an optical microscope. The LSTD was evaluated by cleaving the same sample and using an infrared scattering tomograph (MO441 manufactured by Mitsui Kinzoku Co., Ltd.). The sample was heat-treated in a wet oxygen atmosphere at 1150 ° C. for 100 min, then selectively etched while rocking the sample, and the stacking fault was observed with an optical microscope to check the OSF.

  The above investigation results are plotted with the measured oxygen concentration on the horizontal axis and V / G calculated from the growth rate and the temperature gradient near the crystal growth interface in the grown crystal apparatus on the vertical axis. The temperature gradient near the crystal growth interface was determined between the melting point (1412 ° C.) and 1400 ° C. from the temperature distribution calculated using commercially available simulation software FEMAG. FIG. 2 shows the result when nitrogen is doped, and FIG. 3 shows the result when nitrogen is not doped. From this result, when nitrogen is not doped, FPD is not detected but LSTD is detected (of course, LSTD is detected, so it is on the V-rich side and LEP is not detected), and FPD, LEP, and LSTD are all It can be seen that the undetected region slightly expands as the oxygen concentration decreases.

On the other hand, when nitrogen is doped, FPD is not detected, but the region where LSTD is detected expands with a decrease in oxygen concentration, and V / G is −1.85 × 10 ⁻¹⁹ × [Oi] +0.36 or less. Observed over a wide area. In addition, a region where none of FPD, LEP, and LSTD were detected expanded with a decrease in oxygen concentration, and was observed in a wide region satisfying V / G of −1.25 × 10 ⁻¹⁹ × [Oi] +0.24 or less.

Example 1
A single crystal having a diameter of 200 mm was grown by the MCZ method using the CZ single crystal manufacturing apparatus whose schematic diagram is shown in FIG. The temperature gradient near the crystal growth interface in this single crystal manufacturing apparatus is 3.50 (K / mm). Using this apparatus, nitrogen is doped in a nitrogen concentration range of ^{3 to} 6 × 10 ¹⁴ (/ cm ³ ), and the growth rates are (1) 0.64 mm / min, (2) 0.70 mm / min, (3) Three levels of crystals were grown at 0.90 mm / min. Therefore, V / G is (1) 0.183 (mm ² / (K · min)), (2) 0.200 (mm ² / (K · min)), and (3) 0.257 (mm ² / (K · min)). The target oxygen concentrations (1) and (3) were 3 × 10 ¹⁷ (atoms / cm ³ ASTM′79), and (2) was 7.5 × 10 ¹⁷ (atoms / cm ³ ASTM′79). Wafer samples were cut from these crystals, and the oxygen concentration was measured by the FT-IR method in the same manner as in the experiment. As a result, the respective oxygen concentrations were (1) 3.2 × 10 ¹⁷ (atoms / cm ³ ASTM'79), (2) 7.2 × 10 ¹⁷ (atoms / cm ³ ASTM'79), (3) 2 6 × 10 ¹⁷ (atoms / cm ³ ASTM'79). Therefore, the sample (1) is grown in a region where none of FPD, LEP, and LSTD are detected, and the samples (2) and (3) are grown in a region where FPD is not detected but LSTD is detected.

  Defects were evaluated using samples actually cut from these crystals. The evaluation method of the defect was performed using the same method as the experiment. As a result, none of FPD, LEP, and LSTD was detected in sample (1). On the other hand, FPD and LEP were not detected in samples (2) and (3), but LSTD was detected. Therefore, it was confirmed that the relationship obtained in the experiment was correct.

A polished wafer (PW) was produced from the blocks cut out from these crystals through processes such as slicing, etching, and polishing. These wafers were evaluated with a particle counter (see FIG. 4). As a result, 0.1 μm or more particles including actual particles (1) 1.6 particles / wafer, (2) 4.8 particles / wafer, and (3) 9.1 particles / wafer are all 0. 03 / cm ² or less. As a result of evaluating the on-resistance characteristics, leakage characteristics, and breakdown voltage characteristics, which are important characteristics of power devices, with this polished wafer, performance equivalent to that of FZ-PW that has been used for conventional power can be obtained and used without problems. all right.

(Comparative Example 1)
The growth rate is 0.9 mm / min. Therefore, V / G is 0.257 (mm ² / (K · min)), and the oxygen concentration is 8.5 × 10 ¹⁷ (atoms / cm ³ ) higher than that in Example 1. Crystals (4) and (5) were grown under the same conditions as in Example 1 except that ASTM'79) and 12 × 10 ¹⁷ (atoms / cm ³ ASTM′79) were aimed. When the oxygen concentration was measured with the sample cut out from the crystal, (4) 8.4 × 10 ¹⁷ (atoms / cm ³ ASTM'79) and (5) 12.2 × 10 ¹⁷ (atoms / cm ³ ASTM), respectively. '79). Therefore, the crystal is grown in the region where FPD is detected.

  Crystal defects were investigated using samples cut out from these crystals. As a result, LEP was not detected, but FPD and LSTD were observed. Furthermore, when a polished wafer was produced from these crystals and the characteristics were evaluated, the leak characteristics were degraded as compared with the sample of Example 1. It is considered that defects observed as FPD caused leakage deterioration.

(Example 2)
The polished wafer produced in Example 1 was used as a sub-wafer, and an EP layer having a thickness of 2 μm was grown on this wafer. When this EPW was measured with a particle counter, almost no particles were detected as shown in FIG. Further, no slip was observed even when observed using a mode for evaluating slip provided in the particle counter. Furthermore, defects were observed using MAGICS (manufactured by Lasertec), which has a slightly longer wavelength (532 nm) than the particle counter and can detect defects on the sub-surface as well as on the EP layer. As a result, no defects were detected. This is because the sub-wafer fabricated according to the present invention is controlled to a size that does not detect crystal defects as FPD, and particles having a diameter of 0.1 μm or more are 0.03 particles / cm ² or less. Compared to the density 5 × 10 ⁴ (/ cm ³ ) shown in FIG. ⁴ (which is about 0.5 / cm ² in terms of area), this is considered to be because it is less than one digit.

(Comparative Example 2)
A crystal (6) was grown under the same conditions as the crystal (5) except that nitrogen was not doped. When a wafer-like sample was cut out from this crystal and the oxygen concentration was measured, it was 12.4 × 10 ¹⁷ (atoms / cm ³ ASTM'79). A crystal defect was investigated using a sample cut out from the crystal. As a result, LEP was not detected, but FPD and LSTD were observed.

  A polished wafer was prepared from the crystal (6) and the crystals (4) and (5) grown in Comparative Example 1. When this wafer was observed with a particle counter, many particles were counted on each wafer. Since this is not a condition in which FPD is not detected, it is considered that a large number of defects observed as the FPD exist on the wafer surface and are detected. When used as an EP sub, even if a defect is observed at the sub time, there is no problem if it is detoxified by filling the EP layer when it is stacked. went.

  First, an EP layer having a thickness of 2 μm was formed using these PWs as sub-wafers. This was observed with a particle counter. As a result, almost no particles were observed in the EPW produced from the crystals (4) and (6), but EP defects were observed on the EP layer surface in the EPW produced from the crystal (5). This is probably because nitrogen was doped and the oxygen concentration was high, so that stable large oxygen precipitation was possible even at high temperatures, which formed EP defects during the growth of the EP layer.

  Further, when EPW was observed with MAGICS having a long wavelength, defects were observed in any wafer. It is considered that FPD defects were detected in all of the crystals (4), (5), and (6), and this was observed through a thin EP layer of 2 μm.

  Finally, these EPWs were evaluated for slip using a particle counter slip mode. As a result, no slip was observed in the EPW produced from the crystals (4) and (5), but slip was observed in the EPW produced from the crystal (6) at a frequency of about 25%. Although the oxygen concentration is relatively high, slip resistance is considered weak because nitrogen is not doped and slip resistance is weak.

Example 3
The polished wafer produced from the crystal (3) produced in Example 1 was used as a sub-wafer, and this wafer was annealed at 1200 ° C. for 1 hour. As a result of observing the annealed wafer with a particle counter, almost no particles were detected. This is presumably because a small defect of which there were originally only about 9 pieces / wafer disappeared by a relatively slight heat treatment.

  The silicon single crystal according to the present invention has a specific nitrogen concentration and a low oxygen concentration in the crystal. Such a silicon single crystal is designated by a range of the ratio V / G between the growth rate and the temperature gradient. As a result, the region where crystal defects such as FPD and LSTD are not detected is enlarged. Accordingly, the manufacturing method of the silicon single crystal according to the present invention increases the manufacturing margin, thereby improving the yield and increasing the growth rate, thereby improving the productivity. Furthermore, EP wafers and annealed wafers using silicon single crystal wafers produced under the growth conditions included in such regions as sub-wafers have excellent quality. Therefore, even if the numerical value of V / G is different, what is included in this gist is considered to be within the scope of the present invention as long as the upper limit value of the range is a function of the oxygen concentration.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.

1 ... main chamber, 2 ... pulling chamber, 3 ... silicon single crystal rod,
4 ... Raw material melt, 5 ... Quartz crucible, 6 ... Graphite crucible, 7 ... Heater,
8 ... heat insulating member, 9 ... gas outlet, 10 ... gas inlet, 11 ... cooling cylinder,
12 ... Cooling medium introduction port, 13 ... Heat shield member, 14, ... Cooling auxiliary cylinder,
20: CZ single crystal manufacturing apparatus.

Claims (3)

A method for producing a silicon single crystal wafer,
The nitrogen concentration [N] in the silicon single crystal is 1 × 10 ¹³ (/ cm ³ ) or more and 5 × 10 ¹⁵ (/ cm ³ ) or less, and the oxygen concentration [Oi] is 9.2 × 10 ¹⁷ (atoms / cm). ³ ASTM'79) or less, and the ratio V / G when the growth rate in the growth of the silicon single crystal is V (mm / min) and the temperature gradient near the crystal growth interface is G (K / mm). in the range for the production of silicon single crystal FPD and LEP is not detected by the selective etching, 0.17 ≦ V / G ≦ -1.85 × 10 -19 × [Oi] oxygen concentration of +0.36 [Oi A silicon single crystal in which FPD and LEP are not detected by selective etching is manufactured by the Czochralski method by growing a single crystal under a growth condition satisfying the conditional expression. A method of manufacturing a silicon single crystal wafer, comprising depositing an epitaxial layer on a silicon single crystal wafer cut out from the manufactured silicon single crystal. The silicon single crystal oxygen concentration in the [Oi] is ^{4.0 × 10 17 (atoms / cm} 3 ASTM'79) or less, the growth conditions of 0.17 ≦ V / G ≦ -1.25 × 10 - ^{2. The} method for producing a silicon single crystal wafer according to claim 1, wherein a silicon single crystal in which LSTD is not detected is produced by satisfying ¹⁹ × [Oi] +0.24.   3. The silicon single crystal according to claim 1, wherein an exogenous gettering capability is added to the back surface of the silicon single crystal wafer by performing any one of polysilicon film formation, sandblasting, and ion implantation. Crystal wafer manufacturing method.

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