JP6027058B2 - Multilayer ceramic capacitor and its mounting board - Google Patents

Description

The present invention relates to a multilayer ceramic capacitor and a circuit board mounting structure of the multilayer ceramic capacitor.

In general, an electronic component using a ceramic material such as a capacitor, an inductor, a piezoelectric element, a varistor, or a thermistor is connected to a ceramic body made of a ceramic material, an internal electrode formed inside the body, and the internal electrode. Thus, an external electrode is provided on the surface of the ceramic body.

Among ceramic electronic components, a multilayer ceramic capacitor includes a plurality of stacked dielectric layers, internal electrodes disposed to face each other through one dielectric layer, and external electrodes electrically connected to the internal electrodes. .

Multilayer ceramic capacitors are widely used as parts of mobile communication devices such as computers, PDAs, and mobile phones because of their small size, high capacity, and easy mounting.

Recently, as electronic products are miniaturized and multi-functionalized, chip components are also miniaturized and highly functionalized, and multilayer ceramic capacitors are also required to be small and high-capacity products.

In addition, the multilayer ceramic capacitor is usefully used as a bypass capacitor disposed in the power supply circuit of the LSI. In order to function as such a bypass capacitor, the multilayer ceramic capacitor effectively prevents high frequency noise. Need to be removed. Such demands are increasing as the frequency of electronic devices increases. A multilayer ceramic capacitor used as a bypass capacitor is electrically connected to a mounting pad on a circuit board by soldering, and the mounting pad is connected to another external circuit via a wiring pattern or a conductive via on the board. be able to.

In addition to the capacitance component, the multilayer ceramic capacitor has both an equivalent series resistance (ESR) and an equivalent series inductance (ESL) component. Inhibits. In particular, the equivalent series inductance (ESL) increases the inductance of the capacitor at a high frequency and impedes the high frequency noise removal characteristics.

On the other hand, a low equivalent series inductance (ESL) is also required in the case of a vertical multilayer capacitor, and in order to realize this, a method of forming a margin part region in which no internal electrode is formed in a ceramic multilayer body that has already been manufactured. In this case, there is a possibility that a short-circuit failure problem may occur.

Korean Patent Laid-Open No. 2010-0068056

An object of the present invention is to provide a multilayer ceramic capacitor and a circuit board mounting structure of the multilayer ceramic capacitor.

One embodiment of the present invention is a ceramic body including a plurality of dielectric layers, wherein the ceramic body includes a first surface and a second surface facing each other in the width direction, and the first surface and the second surface. A third surface and a fourth surface that connect the first surface and the second surface, and a fifth surface and a sixth surface that connect the first surface and the second surface and oppose each other in the thickness direction. A first internal electrode having a first main electrode and a second lead portion disposed inside the ceramic main body and exposed to the first surface of the ceramic main body at a predetermined interval; And a second internal electrode having a third lead portion exposed on the first surface of the ceramic body and arranged at a predetermined interval from the third surface and the fourth surface, and the ceramic body Arranged on the first surface of the first and connected to the first to third lead portions, respectively. A third external electrode; and an insulating layer disposed on the first surface of the ceramic body, wherein the first and second lead portions are separated from the third lead portion at a predetermined interval. A multilayer ceramic capacitor is provided.

Another embodiment of the present invention is a ceramic body including a plurality of dielectric layers, wherein the ceramic body includes a first surface and a second surface facing each other in the width direction, and the first surface and the first surface. A third surface and a fourth surface that connect the two surfaces and oppose each other in the length direction, and a fifth surface and a sixth surface that connect the first surface and the second surface and oppose each other in the thickness direction. A ceramic body having a surface, and first to fourth lead portions disposed inside the ceramic body and exposed to the first surface and the second surface of the ceramic body at a predetermined interval from each other. A first internal electrode, and fifth and fifth electrodes exposed on the first and second surfaces of the ceramic body and arranged at a predetermined distance from the third and fourth surfaces of the ceramic body. A second internal electrode having a sixth lead portion, and the first surface and the second surface of the ceramic body; Including first to sixth external electrodes disposed and connected to the first to sixth lead portions, respectively, and insulating layers disposed on the first surface and the second surface of the ceramic body, The first to fourth lead portions provide a multilayer ceramic capacitor that is spaced apart from the fifth and sixth lead portions by a predetermined distance.

According to still another embodiment of the present invention, there is provided a multilayer ceramic capacitor mounting substrate comprising: a printed circuit board having first to third electrode pads on the top; and the multilayer ceramic capacitor disposed on the printed circuit board. I will provide a.

According to an embodiment of the present invention, the internal electrode may be formed with a maximum area while leaving a minimum margin or gap in the dielectric layer of the ceramic body. As a result, the overlapping region between the first and second internal electrodes is widened, so that a high-capacity multilayer ceramic capacitor can be formed.

In addition, since the distance between the first and second internal electrodes to which the external polarity is applied is reduced, the current loop is shortened, thereby reducing the equivalent series inductance (ESL, Equivalent Series Inductance). be able to.

According to one embodiment of the present invention, the insulating layer formed on the ceramic body includes the ends of the first and second internal electrodes exposed on one surface of the ceramic body and the lead portions of the first and second internal electrodes. By covering, the internal electrodes can be prevented from being short-circuited, and internal defects such as deterioration of moisture resistance can be prevented.

According to an embodiment of the present invention, the height of the insulating layer can be adjusted, and when the height of the insulating layer is formed lower than the height of the first and second external electrodes, the multilayer ceramic capacitor is formed on the circuit board. It can be mounted more stably on the top.

According to one embodiment of the present invention, since the current flow of the multilayer ceramic capacitor can be transmitted to the internal electrode through the plurality of external electrodes, the inductance of the multilayer ceramic capacitor connected in series with the capacitance component The component size can be very small.

Further, by forming the lead portions of the first and second internal electrodes so as not to overlap with each other, there is an effect that the short-circuit failure is reduced and the reliability is excellent.

1 is a schematic perspective view illustrating a multilayer ceramic capacitor according to an embodiment of the present invention. FIG. 2 is a cross-sectional view showing an internal electrode structure of the multilayer ceramic capacitor shown in FIG. 1. It is sectional drawing which follows the A-A 'line of FIG. It is a perspective view which shows the multilayer ceramic capacitor by other embodiment of this invention. FIG. 5 is a cross-sectional view showing an internal electrode structure of the multilayer ceramic capacitor shown in FIG. 4. FIG. 5 is a cross-sectional view taken along line A-A ′ of FIG. 4. It is a perspective view which shows the multilayer ceramic capacitor by other embodiment of this invention. FIG. 6 is a perspective view illustrating an aspect in which the multilayer ceramic capacitor of FIG. 5 is mounted on a printed circuit board.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiments of the present invention can be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. In addition, the embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for a clearer description.

Multilayer Ceramic Capacitor FIG. 1 is a schematic perspective view showing a multilayer ceramic capacitor according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing an internal electrode structure of the multilayer ceramic capacitor shown in FIG. FIG. 3 is a cross-sectional view taken along the line AA ′ of FIG.

The multilayer ceramic capacitor according to the present embodiment may be a three-terminal vertical multilayer capacitor. “Vertical laminated or vertical multilayer” means that the internal electrodes stacked in the capacitor are arranged perpendicular to the mounting area surface of the circuit board, and “3-terminal” means the capacitor. This means that three terminals are connected to the circuit board.

1 and 2, the multilayer ceramic capacitor 100 according to the present embodiment includes a ceramic body 110, internal electrodes 121 and 122 formed in the ceramic body, and insulating layers formed in the ceramic body, respectively. 141, 142, 143, 144 and external electrodes 131, 132, 133 may be included.

In the present embodiment, the ceramic body 110 is connected to the first surface 1 and the second surface 2 facing in the width direction, and the third surface facing the length direction by connecting the first surface and the second surface. It can have the surface 3 and the 4th surface 4, and the 5th surface 5 and the 6th surface 6 which connect the said 1st surface and the 2nd surface, and oppose a thickness direction.

The shape of the ceramic body 110 is not particularly limited, and may be a hexahedral shape having a first surface to a sixth surface as illustrated.

According to one embodiment of the present invention, the third surface 3 and the fourth surface 4 can face each other, and the fifth surface 5 and the sixth surface 6 can face each other.

According to an embodiment of the present invention, the first surface 1 of the ceramic body can be a mounting surface disposed in the mounting region of the circuit board.

According to an embodiment of the present invention, the x-direction is a direction in which the first to third external electrodes are formed at a predetermined interval, and the y-direction is a stack of the internal electrodes through the dielectric layer. The z-direction may be a direction in which the internal electrode is mounted on the circuit board.

According to an embodiment of the present invention, the ceramic body 110 may be formed by stacking a plurality of dielectric layers 111. The plurality of dielectric layers 111 constituting the ceramic body 110 are in a sintered state and are integrated so that the boundary between adjacent dielectric layers cannot be confirmed.

The length of the ceramic body in the length direction may be 1.0 mm or less, but is not necessarily limited thereto.

The dielectric layer 111 can be formed by firing a ceramic green sheet containing ceramic powder, an organic solvent, and an organic binder. The ceramic powder is a substance having a high dielectric constant, and is not particularly limited, and barium titanate (BaTiO ₃ ) -based materials, strontium titanate (SrTiO ₃ ) -based materials, and the like can be used.

According to an embodiment of the present invention, the first and second internal electrodes 121 and 122 may be disposed inside the ceramic body 110.

FIG. 2 is a cross-sectional view showing the dielectric layer 111 constituting the ceramic body 110 and the internal electrodes 121 and 122 disposed on the dielectric layer.

According to an embodiment of the present invention, a pair of the first internal electrode 121 having the first polarity and the second internal electrode 122 having the second polarity are paired in the y-direction via one dielectric layer 111. It can arrange | position so that it may oppose.

According to an embodiment of the present invention, the first and second internal electrodes 121 and 122 may be disposed perpendicular to the mounting surface of the multilayer ceramic capacitor, that is, the first surface 1 of the ceramic body 110. it can.

In the present invention, “first” and “second” mean different polarities, and “first” and “third” mean the same polarity.

According to the embodiment of the present invention, the first and second internal electrodes 121 and 122 may be formed of a conductive paste containing a conductive metal.

The conductive metal is not particularly limited, and may be nickel (Ni), copper (Cu), palladium (Pd), or an alloy thereof.

An internal electrode layer can be printed with a conductive paste on a ceramic green sheet forming a dielectric layer by a printing method such as a screen printing method or a gravure printing method.

The ceramic body can be formed by alternately laminating and firing ceramic green sheets on which internal electrodes are printed.

Referring to FIGS. 2 and 3, the first and second internal electrodes 121 and 122 have lead portions 121a, 121b, and 122a, respectively, to be connected to external electrodes having different polarities. 121b and 122a can be exposed on the first surface 1 of the ceramic body.

According to one embodiment of the present invention, the multilayer ceramic capacitor is a vertical multilayer type, and the lead portion of the first internal electrode and the lead portion of the second internal electrode can be exposed on the same surface of the ceramic body.

According to an embodiment of the present invention, the lead-out portion of the internal electrode means a region exposed to one surface of the ceramic body with an increased width (W) in the conductor pattern forming the internal electrode.

According to an embodiment of the present invention, the first internal electrode may have two lead portions 121a and 121b.

The two lead portions 121a and 121b of the first internal electrode are disposed at a predetermined interval and can be exposed to the first surface 1 of the ceramic body.

According to one embodiment of the present invention, the first lead portion 121a of the first internal electrode is exposed on the first surface 1 and the third surface 3 of the ceramic body, and the first internal electrode is exposed. The second lead portion 121b can be exposed on the first surface 1 and the fourth surface 4 of the ceramic body.

According to an embodiment of the present invention, the second internal electrode may have one lead portion 122a.

The third lead part 122a of the second internal electrode is disposed at a predetermined distance from the third surface 3 and the fourth surface 4 of the ceramic body, and is exposed to the first surface 1 of the ceramic body. can do.

The “with a predetermined interval” means a state in which the third lead portion 122a of the second internal electrode is insulated without being exposed to the third surface 4 and the fourth surface 4 of the ceramic body. Means.

The two lead portions 121a and 121b of the first internal electrode can be separated from the lead portion 122a of the second internal electrode with a predetermined gap G, respectively.

The above-mentioned “separation with a predetermined interval G” means a state where they are insulated without overlapping, and are used in the same meaning below.

Details regarding this will be described later.

According to an embodiment of the present invention, the end portions of the first and second internal electrodes 121 and 122 may be exposed on the third surface 4 and the fourth surface 4 of the ceramic body 110. By forming an insulating layer on the third surface 3 and the fourth surface 4 of the ceramic body, a short circuit between the internal electrodes can be prevented.

According to one embodiment of the present invention, the first and second internal electrodes 121 and 122 have a margin portion only on the second surface 2 of the ceramic body 110, and the third surface 3 and the fourth The surface 4 can be formed without a margin portion.

In general, the first and second internal electrodes form a capacitance by the overlapping region, and the lead portion connected to the external electrodes having different polarities has no overlapping region.

Therefore, there has been an attempt to increase the electrostatic capacity by causing a part of the lead portion connected to the external electrodes having different polarities to overlap each other.

However, in this case, there is a possibility that a short-circuit failure problem may occur in the overlapping region of the lead portions exposed to the outside.

In order to solve the above problem, according to an embodiment of the present invention, the two lead portions 121a and 121b of the first internal electrode are spaced apart from the lead portion 122a of the second internal electrode by a predetermined distance. And can be separated.

When the predetermined distance at which the first and second lead portions 121a and 121b are separated from the third lead portion 122a is G, 0 ≦ G ≦ 50 μm can be satisfied.

As described above, the first and second lead portions 121a and 121b are adjusted so that the predetermined gap G, which is separated from the third lead portion 122a, satisfies 0 ≦ G ≦ 50 μm. The problem can be solved.

When the predetermined distance G in which the first and second lead portions 121a and 121b are separated from the third lead portion 122a is 0 μm, the first and second lead portions 121a and 121b and the third This is a case where the lead-out portions 122a coincide with each other, and since there is no overlapping region, the short-circuit failure problem does not occur. However, when the predetermined interval G is less than 0 μm (a negative (−) value), an overlapping region is generated, which may cause a short circuit failure problem in the chip cutting process.

On the other hand, when the predetermined distance G in which the first and second lead portions 121a and 121b are separated from the third lead portion 122a exceeds 50 μm, the first and second polarities are applied. Since the distance between the internal electrodes increases and the current loop becomes longer, the equivalent series inductance (ESL, Equivalent Series Inductance) becomes higher.

According to an embodiment of the present invention, when the width of the third lead portion 122a is W1, and the width of the third external electrode 133 connected to the third lead portion 122a is W2, 1.0 ≦ W1 / W2 ≦ 2.0 can be satisfied.

As described above, the ratio between the width W1 of the third lead portion 122a and the width W2 of the third external electrode 133 connected to the third lead portion 122a is 1.0 ≦ W1 / W2 ≦ 2.0. By adjusting so as to satisfy the above, an equivalent series inductance (ESL) can be reduced, and an effect of preventing a short circuit failure and excellent reliability can be obtained.

The ratio (W1 / W2) of the width W1 of the third lead portion 122a to the width W2 of the third external electrode 133 connected to the third lead portion 122a is less than 1.0 and 2.0 In the case of exceeding, there is a possibility that a short circuit failure occurs and the equivalent series inductance (ESL, Equivalent Series Inductance) may also become high, which is a problem.

According to an embodiment of the present invention, an external electrode may be disposed on one surface of the ceramic body so as to be connected to the internal electrode.

More specifically, the first external electrode 131 is disposed so as to be connected to the first lead portion 121 a of the first internal electrode 121 exposed on the first surface 1 of the ceramic main body 110, and the ceramic main body 110. The second external electrode 132 may be disposed so as to be connected to the second lead portion 121 b of the first internal electrode exposed on the first surface 1.

The first and second external electrodes 131 and 132 are not particularly limited, and may be connected to a part of the first and second lead portions 121a and 121b, for example.

In addition, a third external electrode 133 may be formed so as to be connected to the third lead portion 122a of the second internal electrode 122 drawn to the first surface 1 of the ceramic body 110.

According to an embodiment of the present invention, insulating layers 141, 142, 143, and 144 may be formed on the ceramic body 110.

More specifically, a first insulating layer 141 and a second insulating layer 142 are formed on the first surface 1 of the ceramic body, and the third surface 3 and the fourth surface 4 of the ceramic body are respectively formed on the first surface 1. A third insulating layer 143 and a fourth insulating layer 144 may be formed.

The first insulating layer 141 formed on the first surface 1 of the ceramic body 110 is formed between the first and third external electrodes 131 and 133, and the second insulating layer 142 is formed by the second and third electrodes. The external electrodes 132 and 133 may be formed.

The first and second insulating layers 141 and 142 cover a part of the first internal electrode lead parts 121a and 121b exposed on the first surface and a part of the second internal electrode lead part 122a. Can be formed as follows.

The first and second insulating layers 141 and 142 may be formed to cover the exposed regions of the first internal electrode lead portions 121a and 121b and the second internal electrode lead portion 122a.

According to one embodiment of the present invention, as shown in FIG. 3, the first and second insulating layers 141 and 142 are formed on the first surface 1 of the ceramic body with the first external electrode 131 and the first external electrode 131. The second external electrode 132 or the third external electrode 133 may be formed to completely cover a region where the second external electrode 132 or the third external electrode 133 is not formed.

Although not shown, according to an embodiment of the present invention, the first and second insulating layers 141 and 142 are spaced apart from the first to third external electrodes 131, 132, and 133 by a predetermined distance. Can be formed.

According to an embodiment of the present invention, the third insulating layer 143 is formed on the third and fourth surfaces of the ceramic body 110 where the ends of the first and second internal electrodes 121 and 122 are exposed. In addition, a fourth insulating layer 144 may be formed.

The third insulating layer 143 may be connected to the margin dielectric layer 111 formed on the second surface of the ceramic body.

The fourth insulating layer 144 may be connected to the margin dielectric layer 111 formed on the second surface 2 of the ceramic body.

According to an embodiment of the present invention, the insulating layer is formed of the same or substantially the same material as the dielectric layer, and the coupling strength between the insulating layer and the ceramic body can be improved when connected to the dielectric layer. .

According to an embodiment of the present invention, the insulating layers 141, 142, 143, 144 may be formed of a ceramic slurry. By adjusting the amount and shape of the ceramic slurry, the formation position and height of the insulating layer can be adjusted. The insulating layers 141, 142, 143, and 144 may be formed by applying a ceramic slurry to the ceramic body and firing it after the ceramic body is formed by a firing process.

Alternatively, it may be formed by forming a ceramic slurry for forming an insulating layer on a ceramic green sheet for forming a ceramic body and firing it together with the ceramic green sheet.

The method for forming the ceramic slurry is not particularly limited, and for example, a spraying method, a method using a roller, coating, coating, adhesion, or the like can be used.

According to the embodiment of the present invention, the insulating layers 141, 142, 143, and 144 include the first and second internal electrode lead portions 121 a, 121 b, and 122 a exposed on one surface of the ceramic body, and the first and first layers. By covering the ends of the two internal electrodes 121 and 122, it is possible to prevent a short circuit between the internal electrodes and to prevent internal defects such as a decrease in moisture resistance characteristics.

According to an embodiment of the present invention, since the distance between the first and second internal electrodes to which external polarity is applied is reduced, the current loop is shortened, and thus the equivalent series inductance (ESL) is reduced. , Equivalent Series Inductance) can be lowered.

According to an embodiment of the present invention, the height of the first and second insulating layers 141 and 142 (the dimension in the Z direction in FIG. 1) is the same as that of the first to third external electrodes 131, 132, and 133. It can be formed smaller than the height (dimension in the Z direction in FIG. 1).

The heights of the insulating layers 141 and 142 and the external electrodes 131, 132, and 133 can be measured based on the first surface.

According to an embodiment of the present invention, the first and second insulating layers 141 and 142 are lower than the first to third outer electrodes 131, 132, and 133, so that the multilayer ceramic capacitor is a circuit. It can be mounted more stably on the substrate.

Although not shown, the heights of the first and second insulating layers 141 and 142 may be different.

FIG. 4 is a perspective view illustrating a multilayer ceramic capacitor according to another embodiment of the present invention, FIG. 5 is a cross-sectional view illustrating an internal electrode structure of the multilayer ceramic capacitor illustrated in FIG. 4, and FIG. It is sectional drawing which follows the AA 'line.

In the following description, components different from the above-described embodiment of the present invention will be mainly described, and detailed descriptions regarding the same components will be omitted.

4 to 6, the multilayer ceramic capacitor according to the present embodiment may be a 6-terminal vertical multilayer capacitor.

“6-Terminal” means that six terminals can be connected to the circuit board as terminals of the capacitor.

The multilayer ceramic capacitor 200 according to the present embodiment includes a ceramic body 210, internal electrodes 221 and 222 disposed inside the ceramic body 210, and insulating layers 241, 242, 243, 244 formed on the ceramic body 210, and the like. 245 and 246, and external electrodes 231, 232, 233, 234, 235, and 236.

FIG. 5 is a cross-sectional view showing the dielectric layer 211 constituting the ceramic body 210 and the internal electrodes 221 and 222 formed on the dielectric layer.

According to one embodiment of the present invention, a pair of first internal electrode 221 having the first polarity and second internal electrode 222 having the second polarity are paired in the y-direction via one dielectric layer 211. It can arrange | position so that it may oppose.

According to an embodiment of the present invention, the first and second internal electrodes 221 and 222 may be disposed perpendicular to the mounting surface of the multilayer ceramic capacitor.

According to this embodiment, the mounting surface of the multilayer ceramic capacitor can be the first surface 1 of the ceramic body or the second surface 2 opposite to the first surface 1.

Referring to FIGS. 5 and 6, the first and second internal electrodes 221 and 222 are connected to external electrodes having different polarities so that the lead portions 221a, 221b, 221c, 221d, 222a, and 222b are connected to each other. Can have.

According to one embodiment of the present invention, the multilayer ceramic capacitor is a vertical multilayer type, and the lead portion of the first internal electrode and the lead portion of the second internal electrode can be exposed on the same surface of the ceramic body.

According to an embodiment of the present invention, the first internal electrode 221 may include four lead portions 221a, 221b, 221c, and 221d.

According to one embodiment of the present invention, the two lead portions 221a and 221b of the first internal electrode 221 are exposed on the first surface 1 of the ceramic body at a predetermined interval, and the first internal electrode 221 is exposed to the first internal electrode 221. The other two lead portions 221c and 221d of the electrode can be exposed on the second surface 2 facing the first surface 1 of the ceramic body at a predetermined interval.

According to an embodiment of the present invention, the first lead portion 221a of the first internal electrode 221 is exposed on the first surface 1 of the ceramic body 210 and on the third surface 3, and the first lead portion 221a is exposed on the third surface 3. The second lead portion 221 b of the internal electrode 221 can be exposed on the first surface 1 and the fourth surface 4 of the ceramic body 210.

Further, in the same manner as described above, the third lead portion 221c of the first internal electrode 221 is exposed on the second surface 2 and the third surface 3 of the ceramic body 210, and the first The fourth lead portion 221 d of the internal electrode 221 can be exposed on the second surface 2 and the fourth surface 4 of the ceramic body 210.

According to an embodiment of the present invention, the second internal electrode 222 may have two lead portions 222a and 222b.

According to an embodiment of the present invention, the fifth lead portion 222a of the second internal electrode 222 is formed at a predetermined interval from the third surface 3 and the fourth surface 4 of the ceramic body, The sixth lead part 222b of the second internal electrode 222 exposed on the first surface 1 of the ceramic body 210 is spaced apart from the third surface 3 and the fourth surface 4 of the ceramic body 210 by a predetermined distance. And can be exposed to the second surface 2 opposite to the first surface 1 of the ceramic body 210.

The first and second lead portions 221a and 221b of the first internal electrode can be separated from the fifth lead portion 222a of the second internal electrode by a predetermined distance G, respectively.

Further, in the same manner as described above, the third and fourth lead portions 221c and 221d of the first internal electrode are separated from the sixth lead portion 222b of the second internal electrode by a predetermined distance G, respectively. Can do.

In addition, according to an embodiment of the present invention, the end portions of the first and second internal electrodes 221 and 222 can be exposed to the third surface 3 and the fourth surface 4 of the ceramic body 210. .

By forming an insulating layer on the third surface 3 and the fourth surface 4 of the ceramic body 210, a short circuit between the first and second internal electrodes can be prevented.

Referring to FIG. 6, an external electrode may be formed on one surface of the ceramic body so as to be connected to the internal electrode.

More specifically, the first and second leads are connected to the first and second lead portions 221a and 221b of the first internal electrode 221 exposed on the first surface 1 of the ceramic body 210, respectively. External electrodes 231 and 232 may be formed.

In addition, a fifth external electrode 235 may be formed so as to be connected to the fifth lead portion 222 a of the second internal electrode 222 exposed on the first surface 1 of the ceramic body 210.

Similarly to the above, the third and fourth external electrodes are connected to the third and fourth lead portions 221c and 221d of the first internal electrode exposed on the second surface 2 of the ceramic body, respectively. The sixth external electrode 236 may be formed so as to be connected to the sixth lead portion 222b of the second internal electrode exposed on the second surface of the ceramic body.

As in the above-described embodiment, the first to fourth external electrodes 231, 232, 233, and 234 are part of the first to fourth lead portions 221a, 221b, 221c, and 221d of the first internal electrode. Can be concatenated with.

According to an exemplary embodiment of the present invention, insulating layers 241, 242, 243, 244, 245, and 246 may be formed on the ceramic body.

More specifically, a first insulating layer 241 and a second insulating layer 242 are formed on the first surface of the ceramic body, and a third surface and a fourth surface of the ceramic body are respectively provided with a third surface. An insulating layer 243 and a fourth insulating layer 244 may be formed, and a fifth insulating layer 245 and a sixth insulating layer 246 may be formed on the second surface of the ceramic body.

The first insulating layer 241 formed on the first surface of the ceramic body is formed between the first and fifth external electrodes 231 and 235, and the second insulating layer 242 is the second and fifth external electrodes. 232 and 235 can be formed.

The first and second insulating layers 241 and 242 cover a part of the first internal electrode lead portions 221a and 221b exposed on the first surface and a part of the second internal electrode lead portion 222a. Can be formed as follows. The first and second insulating layers 241 and 242 may be formed so as to cover the exposed portions of the lead portion of the first internal electrode and the lead portion of the second internal electrode.

In addition, according to an embodiment of the present invention, the first and second insulating layers 241 and 242 are formed on the first surface of the ceramic body by the first external electrode 231, the second external electrode 232, 5 can be formed so as to completely cover the region where the external electrode 235 is not formed.

Although not shown, according to an embodiment of the present invention, the first and second insulating layers 241 and 242 are connected to the first, second, and fifth external electrodes 231, 232, and 235, respectively. Can be formed with an interval of.

In addition, the fifth insulating layer 245 and the sixth insulating layer 246 can be formed on the second surface of the ceramic body in the same manner as described above.

According to the embodiment of the present invention, the third insulating layer 243 and the fourth surface of the ceramic body from which the ends of the first and second internal electrodes 221 and 222 are exposed are respectively formed on the third surface and the fourth surface. Four insulating layers 244 can be formed.

According to an embodiment of the present invention, the insulating layer is formed of the same or substantially the same material as the dielectric layer, and the coupling strength between the insulating layer and the ceramic body can be improved when connected to the dielectric layer. .

The insulating layer covers the end portions of the first and second internal electrodes exposed on one surface of the ceramic body and the lead portions of the first and second internal electrodes, thereby preventing a short circuit between the internal electrodes. In addition, internal defects such as a decrease in moisture resistance can be prevented.

According to the present embodiment, since the distance between the first and second internal electrodes to which the external polarity is applied is reduced, the current loop is shortened, and thereby the equivalent series inductance (ESL, Equivalent Series). (Inductance) can be lowered.

Although not shown, the first internal electrode or the second internal electrode has two or more lead portions, and the lead portion formed on the first internal electrode or the second internal electrode is a ceramic. It can be exposed to the same or different surfaces of the body. It should be noted that the number and position of the lead portions of the internal electrode may be variously changed.

FIG. 7 is a perspective view showing a multilayer ceramic capacitor according to another embodiment of the present invention.

Referring to FIG. 7, a multilayer ceramic capacitor according to another embodiment of the present invention is disposed on the second surface 2 of the ceramic body 210 in the multilayer ceramic capacitor according to the embodiment of the present invention shown in FIG. A fifth insulating layer 245 may be disposed instead of the third, fourth, and sixth outer electrodes 233, 234, 236 and the fifth and sixth insulating layers 245, 246.

In this case, the third and fourth lead portions 221c and 221d and the sixth lead portion 222b are exposed on the second surface 2 of the ceramic body 210, but are insulated by the fifth insulating layer 245. Therefore, the problem of lowering reliability does not occur.

EXAMPLES Hereinafter, although an Example is given and this invention is demonstrated in detail, this invention is not restrict | limited by this.

Example The example shows that the first and second lead portions of the first internal electrode of the vertical multilayer capacitor are separated from the third lead portion of the second internal electrode by a predetermined distance G and This is manufactured so that the ratio (W1 / W2) of the width W1 of the third lead portion and the width W2 of the third external electrode connected to the third lead portion satisfies the numerical range of the present invention. .

Comparative example In the comparative example, the first and second lead portions of the first internal electrode of the vertical multilayer capacitor are separated from the third lead portion of the second internal electrode by a predetermined distance G and The same conditions as in the above embodiment except that the ratio (W1 / W2) of the width W1 of the third lead portion and the width W2 of the third external electrode connected to the third lead portion is outside the scope of the present invention. It was produced by.

Table 1 below shows the value of the distance G at which the first and second lead portions of the first inner electrode of the vertical multilayer capacitor are separated from the third lead portion of the second inner electrode according to the embodiment of the present invention. Is a comparison of the reliability due to the equivalent series inductance (ESL, Equivalent Series Inductance) and the number of short-circuit occurrences.

The reliability due to the number of short-circuits is evaluated by measuring the number of short-circuits with respect to 50 samples, and the width W1 of the third lead portion and the width of the third external electrode connected to the third lead portion. It measured in the state which fixed ratio (W1 / W2) with W2 to 1.7.

＊：比較例

*: Comparative example

Referring to Table 1 above, samples 1 to 4 as comparative examples have predetermined intervals at which the first and second lead portions of the first internal electrode are separated from the third lead portion of the second internal electrode, respectively. G has a negative value (−), which means that the drawers overlap.

In this case, it can be seen that there is a problem in reliability because of the large number of short circuits.

Further, in Samples 8 to 10 which are comparative examples, the predetermined gap G at which the first and second lead portions of the first internal electrode are separated from the third lead portion of the second internal electrode respectively exceeds 50 μm. Therefore, it can be seen that there is a problem because of the high equivalent series inductance (ESL, Equivalent Series Inductance).

On the other hand, Samples 5 to 7, which are examples, satisfy the numerical range of the present invention and have excellent reliability because the equivalent series inductance (ESL, Equivalent Series Inductance) is low and no short circuit occurs. I understand.

Table 2 below shows the ratio (W1 / W2) of the width W1 of the third lead portion of the vertical multilayer capacitor and the width W2 of the third external electrode connected to the third lead portion according to the embodiment of the present invention. ) Values of equivalent series inductance (ESL, Equivalent Series Inductance) and reliability due to the number of occurrence of short circuits are compared.

The reliability due to the number of short-circuit occurrences is evaluated by measuring the number of short-circuit occurrences for 50 samples, and the first and second lead portions of the first internal electrode are respectively the third lead of the second internal electrode. The measurement was performed in a state where a predetermined gap G separated from the part was fixed at 0, 20, and 50 μm.

＊：比較例

*: Comparative example

Referring to Table 2, Samples 11, 15, 16, 20, 21, and 25, which are comparative examples, have a width W1 of the third lead portion and a third external electrode connected to the third lead portion. Since the ratio (W1 / W2) with the width W2 is out of the numerical range of the present invention, there is a problem in reliability due to the occurrence of a short circuit failure, and the equivalent series inductance (ESL, Equivalent Series Inductance) is high. I know there is a problem.

On the other hand, Samples 12-14, 17-19, and 22-24, which are examples, satisfy the numerical range of the present invention and have low equivalent series inductance (ESL) and no short circuit. From this, it can be seen that the reliability is excellent.

Mounting board of multilayer ceramic capacitor FIG. 8 is a perspective view showing an aspect in which the multilayer ceramic capacitor of FIG. 5 is mounted on a printed circuit board.

Referring to FIG. 8, the mounting substrate 300 of the multilayer ceramic capacitor 200 according to the present embodiment is formed on the printed circuit board 310 on which the multilayer ceramic capacitor 200 is vertically mounted and spaced apart from the upper surface of the printed circuit board 310. 1 to 3rd electrode pads 321, 322, and 323.

At this time, in the multilayer ceramic capacitor 200, the first, second, and fifth external electrodes 231, 232, 235 are in contact with the first, second electrode pads 321, 322, and the third electrode pad 323, respectively. The printed circuit board 310 may be electrically connected to the printed circuit board 310 by solder.

In addition, the description which overlaps with the characteristic of the multilayer ceramic capacitor by one Embodiment of this invention mentioned above is abbreviate | omitted.

The embodiment of the present invention has been described in detail above, but the scope of the present invention is not limited to this, and various modifications and variations can be made without departing from the technical idea of the present invention described in the claims. It will be apparent to those having ordinary knowledge in the art.

100, 200 Multilayer ceramic capacitor 110, 210 Ceramic body 111, 211 Dielectric layers 121, 122, 221, 222 First and second internal electrodes 121a, 121b, 122a, 221a, 221b, 221c, 221d, 222a, 222b 1st to 6th lead portions 131, 132, 133, 231, 232, 233, 234, 235, 236 1st to 6th external electrodes 300 Mounting board 310 Printed circuit board

Claims (18)

A ceramic body including a plurality of dielectric layers, wherein the ceramic body connects a first surface and a second surface opposed to each other in the width direction, and the first surface and the second surface in the length direction. A ceramic body having a third surface and a fourth surface facing each other, and a fifth surface and a sixth surface connecting the first surface and the second surface and facing in the thickness direction;
A first internal electrode disposed inside the ceramic body and having first and second lead portions exposed at a first surface of the ceramic body at a predetermined interval, and a first of the ceramic body A second internal electrode having a third lead portion that is exposed on the surface and disposed at a predetermined interval from the third surface and the fourth surface;
First to third external electrodes disposed on the first surface of the ceramic body and connected to the first to third lead portions, respectively.
An insulating layer disposed on the first surface of the ceramic body;
Including
The first and second drawer portions are separated from the third drawer portion by a predetermined distance, respectively, and the first and second drawer portions are separated from the third drawer portion by the predetermined distance. when a G, meets 0 ≦ G ≦ 50μm, the width of the third lead portion W1, when the width of the third external electrode connected to the third lead portion and W2, 1. A multilayer ceramic capacitor satisfying 0 ≦ W1 / W2 ≦ 2.0 .   The multilayer ceramic capacitor according to claim 1, wherein the third lead portion is disposed between the first and second lead portions.   2. The multilayer ceramic capacitor according to claim 1, wherein ends of the first and second internal electrodes are exposed on a third surface and a fourth surface of the ceramic body.   The multilayer ceramic capacitor of claim 1, wherein the first and second internal electrodes are disposed perpendicular to the first surface of the ceramic body.   The multilayer ceramic capacitor of claim 1, wherein the first and second external electrodes are connected to a part of the first and second lead portions.   The multilayer ceramic capacitor according to claim 1, wherein a length of the ceramic body in a length direction is 1.0 mm or less.   The multilayer ceramic capacitor of claim 1, wherein the insulating layer is further disposed on a third surface and a fourth surface of the ceramic body.   The laminate according to claim 1, wherein the insulating layer formed on the first surface of the ceramic body is disposed smaller than the height of the first and second external electrodes measured from the first surface of the ceramic body. Ceramic capacitor.   The multilayer ceramic capacitor of claim 1, further comprising fourth to sixth external electrodes disposed on the second surface of the ceramic body. A ceramic body including a plurality of dielectric layers, wherein the ceramic body connects a first surface and a second surface opposed to each other in the width direction, and the first surface and the second surface in the length direction. A ceramic body having a third surface and a fourth surface facing each other, and a fifth surface and a sixth surface connecting the first surface and the second surface and facing in the thickness direction;
A first internal electrode disposed within the ceramic body and having first to fourth lead portions exposed on a first surface and a second surface of the ceramic body at a predetermined interval; and The fifth and sixth lead portions are exposed on the first surface and the second surface of the ceramic body and are arranged at a predetermined distance from the third surface and the fourth surface of the ceramic body. Two internal electrodes;
First to sixth external electrodes disposed on the first surface and the second surface of the ceramic body and connected to the first to sixth lead portions, respectively.
An insulating layer disposed on the first surface and the second surface of the ceramic body;
Including
The first to fourth lead portions are spaced apart from the fifth and sixth lead portions by a predetermined distance, respectively, and the first to fourth lead portions are spaced from the fifth and sixth lead portions, respectively. when the predetermined interval is set to G, 0 ≦ G ≦ 50μm meets, the fifth or sixth the width of the lead portion W1, a 5 or is connected to the fifth or lead-out portion of the sixth A multilayer ceramic capacitor satisfying 1.0 ≦ W1 / W2 ≦ 2.0 when the width of the sixth external electrode is W2 . Said fifth lead portion is disposed between the first and second lead portions, the lead portion of the sixth is disposed between the third and fourth lead portion, according to claim 10 Multilayer ceramic capacitor. 11. The multilayer ceramic capacitor according to claim 10 , wherein ends of the first and second internal electrodes are exposed on a third surface and a fourth surface of the ceramic body. The multilayer ceramic capacitor according to claim 10 , wherein the first and second internal electrodes are disposed perpendicular to a mounting surface of the ceramic body. The multilayer ceramic capacitor of claim 10 , wherein the first to fourth external electrodes are connected to a part of the first to fourth lead portions. The multilayer ceramic capacitor according to claim 10 , wherein a length of the ceramic body in a length direction is 1.0 mm or less. The multilayer ceramic capacitor of claim 10 , wherein the insulating layer is further disposed on a third surface and a fourth surface of the ceramic body. The insulating layer formed on the first surface or the second surface of the ceramic body is formed smaller than the height of the first to sixth external electrodes measured from the first surface or the second surface of the ceramic body. The multilayer ceramic capacitor according to claim 10 , wherein A printed circuit board having first to third electrode pads on the top;
The multilayer ceramic capacitor according to claim 1 or 10 installed on the printed circuit board,
A mounting substrate for a multilayer ceramic capacitor.

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