JP5343997B2 - Multilayer capacitor mounting structure - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress acoustic noise occurring due to the electrostrictive phenomenon of a multilayer capacitor. <P>SOLUTION: An acoustic capacitor 10 includes: an element assembly 11 in which a first internal electrode and a second internal electrode are stacked via a dielectric layer in a direction orthogonal to a substrate surface 2P of a circuit substrate 2; a first-side-surface-side first terminal electrode 21A that is connected to the first internal electrode on a first side surface 11A of the element assembly 11 existing in a direction orthogonal to a direction in which the first internal electrode and the second internal electrode are stacked; and a first-side-surface-side second terminal electrode 22A that is connected to the second internal electrode on the first side surface 11A. The multilayer capacitor 10 is attached to the circuit substrate 2 on the first side surface 11A side and is not attached to the circuit substrate 2 on a second side surface 11B side that is opposed to the first side surface 11A. <P>COPYRIGHT: (C)2013,JPO&amp;INPIT

Description

  The present invention relates to a mounting structure when a capacitor is mounted on a circuit board.

  An electronic device such as a personal computer, a PDA (Personal Digital Assistants), or a mobile phone has a circuit board on which a capacitor, an inductor, a varistor, or a composite component combining these is surface-mounted. With such a structure, the electronic device has electronic components mounted at high density to reduce the size of the entire circuit board. An example of the capacitor mounted on the circuit board is a multilayer ceramic capacitor.

  In the multilayer ceramic capacitor, dielectrics and internal electrodes are alternately stacked. Ferroelectric materials such as barium titanate having a high dielectric constant are used for the ceramic material forming the dielectric. When an AC voltage is applied to the multilayer ceramic capacitor, the ceramic material forming the dielectric generates an electrostriction phenomenon and mechanical distortion occurs. For this reason, the multilayer ceramic capacitor to which the AC voltage is applied vibrates. This vibration is also transmitted to the circuit board on which the multilayer ceramic capacitor is surface-mounted, and vibrates this. As a result, the circuit board on which the multilayer ceramic capacitor is surface-mounted generates vibration sound (sound).

  In order to suppress the vibration sound of the circuit board resulting from the electrostriction phenomenon of the multilayer ceramic capacitor, that is, the noise, for example, Patent Document 1 includes a dielectric layer made of a dielectric ceramic and an internal electrode layer. A multilayer ceramic capacitor circuit comprising a rectangular parallelepiped-shaped element body that is alternately laminated, and a pair of external terminal electrodes that alternately connect the internal electrodes formed on the internal electrode layer at both ends of the element body in parallel. A method for mounting on a substrate, wherein capacitor mounting lands that are electrically connected to each other are formed substantially symmetrically on the front and back surfaces of the circuit board, and the multilayer ceramic is formed on each of the front and back lands of the circuit board. A technique is described in which a capacitor is disposed to electrically connect an external terminal electrode and a land.

JP 2000-23320 A [0010]

  In the technique described in Patent Document 1, two multilayer ceramic capacitors are attached to the front and back of a circuit board and the vibrations of the two are canceled out. For this reason, when the frequency of both vibrations shifts or the mounting position shifts, the noise cannot be sufficiently suppressed. In general, since the multilayer ceramic capacitor has variations in characteristics, it is difficult to suppress the noise by the technique described in Patent Document 1. An object of the present invention is to suppress noise generated due to the electrostriction phenomenon of a multilayer capacitor.

  As a result of intensive studies on the above problems, the present inventors have found that noise can be suppressed by reducing the vibration of the multilayer capacitor transmitted from the connection portion between the multilayer capacitor and the circuit board to the circuit board. . The present invention has been completed based on such findings.

  The present invention provides an element body in which a first internal electrode and a second internal electrode are stacked via a dielectric layer in a direction orthogonal to a substrate surface of a circuit board, the first internal electrode, the second internal electrode, A first side surface side first terminal electrode provided on a first side surface of the element body that is present in a direction orthogonal to a direction in which the first side electrode is laminated and connected to the first internal electrode; and the first side surface side first terminal. A multilayer capacitor including a first side surface side second terminal electrode provided on the first side surface provided with an electrode and connected to the second internal electrode is attached to the circuit board on the first side surface side; The multilayer capacitor mounting structure is characterized in that the second side surface facing the first side surface is not attached to the circuit board.

  In this multilayer capacitor mounting structure, the terminal electrode provided on the same side surface (first side surface) and connected to the internal electrode of the multilayer capacitor is electrically connected to the substrate electrode, and the first side surface side of the multilayer capacitor is connected. A multilayer capacitor is attached to the circuit board, and the second side surface facing the first side surface is not attached to the circuit board. As described above, since the multilayer capacitor is attached to the circuit board on one side of the multilayer capacitor, the second third side and the fourth side adjacent to the second side and the first side are released from the circuit board. Is done. For this reason, in this multilayer capacitor mounting structure, the force transmitted from the side surface of the multilayer capacitor to the circuit board is released, and the vibration transmitted from the side surface of the multilayer capacitor to the circuit board is reduced. As a result, the mounting structure of the multilayer capacitor can suppress noise generated due to the electrostriction phenomenon of the multilayer capacitor.

  In the present invention, the third side surface and the fourth side surface adjacent to the first side surface do not have a terminal electrode connected to the first internal electrode or the second internal electrode, and the third side surface side and the The fourth side is preferably not attached to the circuit board. By doing so, it is possible to more reliably and effectively suppress the squeal that occurs due to the electrostriction phenomenon of the multilayer capacitor.

  In the present invention, the multilayer capacitor includes a second side surface side first terminal electrode provided on the second side surface and connected to the first internal electrode, and provided on the second side surface and the second internal electrode. A second terminal electrode connected to the second side surface, and one of the first side surface side and the second side surface side is preferably attached to the circuit board. By doing so, the number of side surfaces of the multilayer capacitor that can be attached to the circuit board is not limited to one, so the degree of freedom when mounting the multilayer capacitor on the circuit board is improved.

  In the present invention, the multilayer capacitor has a plurality of first side-side first terminal electrodes on the first side surface, and the first internal electrode is connected to the plurality of first side-side first terminal electrodes. It is preferable. By doing in this way, even when the multilayer capacitor is a so-called feedthrough capacitor, it is possible to suppress squeal that occurs due to the electrostriction phenomenon of the multilayer capacitor.

  In the present invention, the multilayer capacitor is provided on the second side surface with a third internal electrode disposed to face the second internal electrode through a dielectric layer, and is connected to the third internal electrode. It is preferable to further include a plurality of second side surface side third terminal electrodes and a second side surface side second terminal electrode provided on the second side surface and connected to the second internal electrode. By doing so, even when the multilayer capacitor is a feedthrough capacitor, the number of side surfaces of the multilayer capacitor that can be attached to the circuit board is not limited to one. Each of the first side surface side first terminal electrode, the second side surface side third terminal electrode, the first side surface side second terminal electrode, and the second side surface side second terminal electrode has symmetry in plan view. Therefore, mounting is possible even when the multilayer capacitor is rotated 180 degrees. As a result, it is not necessary to consider the directionality when the multilayer capacitor is mounted on the circuit board, and the degree of freedom during mounting is improved.

  In the present invention, it is preferable that the multilayer capacitor includes a plurality of element portions each including the first side surface side first terminal electrode, the first side surface side second terminal electrode, and the dielectric layer. In this way, even in a multilayer capacitor having a plurality of element portions that function as capacitors, that is, in a capacitor array, it is possible to suppress noise generated due to the electrostriction phenomenon of the multilayer capacitor.

  In the present invention, the element bodies are opposed to each other and have a rectangular shape in plan view so as to connect the first main surface and the second main surface, and the first main surface and the second main surface. , Having a third side surface and a fourth side surface that extend in the short side direction of the first main surface and the second main surface and face each other, and the plurality of element portions include the third side surface, It is preferable that the fourth side surface is arranged in a facing direction. This multilayer capacitor mounting structure is suitable for suppressing the noise of the capacitor array having such a structure.

  In the present invention, the element portion is provided on the second side surface and is connected to the first internal electrode. The second side surface side first terminal electrode is provided on the second side surface and the second internal electrode is connected to the second internal electrode. A second terminal electrode connected to the second side surface, and one of the first side surface side and the second side surface side is preferably attached to the circuit board. In this way, even in a multilayer capacitor having a plurality of element portions that function as capacitors, the side surface of the multilayer capacitor that can be attached to the circuit board is not limited to one, so when mounting the multilayer capacitor on the circuit board, The degree of freedom is improved.

  The present invention can suppress the squeal that occurs due to the electrostriction phenomenon of a ceramic capacitor.

FIG. 1 is a perspective view showing the multilayer capacitor mounting structure according to the first embodiment. FIG. 2 is a cross-sectional view illustrating the multilayer capacitor in the mounting structure according to the first embodiment. FIG. 3 is a plan view showing the internal structure of the multilayer capacitor in the mounting structure according to the first embodiment. FIG. 4 is a plan view showing the internal structure of the multilayer capacitor in the mounting structure according to the first embodiment. FIG. 5 is a perspective view for explaining deformation of the multilayer capacitor. FIG. 6 is a plan view of a mounting structure according to a comparative example. FIG. 7 is a side view of a mounting structure according to a comparative example. FIG. 8 is a plan view of the mounting structure according to the first embodiment. FIG. 9 is a side view of the mounting structure according to the first embodiment. FIG. 10 is a plan view illustrating the structure of the capacitor according to the first modification of the first embodiment. FIG. 11 is a plan view illustrating the structure of the capacitor according to the first modification of the first embodiment. FIG. 12 is a plan view of the mounting structure according to the first modification of the first embodiment. FIG. 13 is a plan view showing the structure of the capacitor according to the second modification of the first embodiment. FIG. 14 is a plan view showing the structure of the capacitor according to the second modification of the first embodiment. FIG. 15 is a plan view showing the structure of the capacitor according to the second embodiment. FIG. 16 is a plan view showing the structure of the capacitor according to the second embodiment. FIG. 17 is a plan view of the mounting structure according to the second embodiment. FIG. 18 is a plan view showing a structure of a capacitor according to a modification of the second embodiment. FIG. 19 is a plan view showing the structure of a capacitor according to a modification of the second embodiment. FIG. 20 is a plan view illustrating a structure of a capacitor according to a modification of the second embodiment. FIG. 21 is a partial cross-sectional view illustrating a structure of a capacitor according to a modification of the second embodiment. FIG. 22 is a plan view of a mounting structure according to a modification of the second embodiment. FIG. 23 is a plan view showing the structure of the capacitor according to the third embodiment. FIG. 24 is a plan view illustrating the structure of the capacitor according to the third embodiment. FIG. 25 is a plan view of the mounting structure according to the third embodiment.

  DESCRIPTION OF EMBODIMENTS Embodiments (embodiments) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited by the contents described in the following embodiments. The constituent elements described below include those that can be easily assumed by those skilled in the art and those that are substantially the same. Furthermore, the constituent elements described below can be appropriately combined. In addition, various omissions, substitutions, or changes of components can be made without departing from the scope of the present invention. In the following, the term “orthogonal” or “parallel” includes not only perfect orthogonality or parallelism but also tolerances or error ranges in the concept of orthogonality or parallelism.

(Embodiment 1)
FIG. 1 is a perspective view showing the multilayer capacitor mounting structure according to the first embodiment. A multilayer capacitor mounting structure (hereinafter referred to as a mounting structure as required) 1 is when a multilayer capacitor 10 in which a first internal electrode and a second internal electrode are stacked via a dielectric layer is mounted on a circuit board 2. This is the structure. The multilayer capacitor 10 includes a terminal electrode electrically connected to the first internal electrode on a side surface of the element body 11 in which the first internal electrode and the second internal electrode are stacked via a dielectric layer, and the first capacitor 2 is an electronic component having a terminal electrode electrically connected to the internal electrode. The multilayer capacitor 10 is a ceramic capacitor.

  The element body 11 included in the multilayer capacitor 10 includes a first side surface 11A, a second side surface 11B, a third side surface 11C, a fourth side surface 11D, a first mounting surface (hereinafter referred to as a first main surface) 11E, The shape is surrounded by a second mounting surface (hereinafter, referred to as a second main surface) 11F. The first side surface 11A, the second side surface 11B, the third side surface 11C, the fourth side surface 11D, the first main surface 11E, and the second main surface 11F are all rectangular (including square) planes. The element body 11 included in the multilayer capacitor 10 has a rectangular parallelepiped (including a cube) shape. The rectangular parallelepiped shape includes a shape in which the corners of the element body 11 are curved.

  The first side surface 11A and the second side surface 11B face each other. The third side surface 11C and the fourth side surface 11D face each other, and both are orthogonal to the first side surface 11A and the second side surface 11B. The first main surface 11E and the second main surface 11F face each other, and are orthogonal to the first side surface 11A, the second side surface 11B, the third side surface 11C, and the fourth side surface 11D, respectively. In the mounting structure 1, the first main surface 11E and the second main surface 11F are parallel to the substrate surface 2P of the circuit board 2, and in the present embodiment, the first main surface 11E faces the substrate surface 2P. . The substrate surface 2P is a surface on which the multilayer capacitor 10 is mounted. The circuit board 2 has a substrate electrode 3 on the substrate surface 2P. The element body 11 has a side surface parallel to the substrate surface 2P, that is, a surface orthogonal to the first main surface 11E and the second main surface 11F. The element body 11 includes a first main surface 11E and a second main surface 11F, and a first main surface 11E and a second main surface 11F, which are connected to each other, and the first main surface 11E and the second main surface 11F. The first main surface 11E and the first main surface 11E and the first main surface 11E and the second main surface 11F are connected to the first main surface 11E and the second main surface 11F. A plurality of dielectric layers extending in the short side direction of the second main surface 11F and having the third side surface 11C and the fourth side surface 11D facing each other are in the opposing direction of the first main surface 11E and the second main surface 11F. This is a laminated capacitor body.

  Since the mounting structure 1 is a three-dimensional structure, it can be expressed by X, Y, and Z coordinates. When the substrate surface 2P is an XY plane, the first main surface 11E and the second main surface 11F are surfaces parallel to the XY plane. The first side surface 11A and the second side surface 11B are surfaces parallel to the YZ plane, and the third side surface 11C and the fourth side surface 11D are surfaces parallel to the XZ plane. The Z direction is a direction orthogonal to the substrate surface 2P, and the X direction and the Y direction are directions parallel to the substrate surface 2P.

  The first side surface 11A of the element body 11 includes a first side surface side first terminal electrode 21A and a first side surface side second terminal electrode 22A. In the present embodiment, the second side surface 11B facing the first side surface 11A includes a second side surface side first terminal electrode 21B and a second side surface side second terminal electrode 22B. The first side surface side first terminal electrode 21A and the second side surface side first terminal electrode 21B correspond to terminal electrodes electrically connected to the first internal electrode of the element body 11, and the first side surface side second terminal. The electrode 22 </ b> A and the second side surface side second terminal electrode 22 </ b> B correspond to terminal electrodes that are electrically connected to the second internal electrode of the element body 11. Thus, the pair of first side surface side first terminal electrodes 21A and the first side surface side second terminal electrode 22A are provided on the same side surface (first side surface 11A) of the element body 11, and the pair of second side surfaces. The side first terminal electrode 21B and the second side surface side second terminal electrode 22B are provided on the same side surface (second side surface 11B) of the element body 11.

  The first side surface side first terminal electrode 21A, the first side surface side second terminal electrode 22A, the second side surface side first terminal electrode 21B, and the second side surface side second terminal electrode 22B are all metal conductor layers. , There is an Ag electrode layer. Moreover, it may be composed of a plurality of metal electrode layers. For example, the first side surface side first terminal electrode 21A and the first side surface side second terminal electrode 22A are made of a base electrode mainly composed of Cu or Ag. A Ni plating layer, a Sn plating layer, or the like may be formed on the surface.

  The first side surface side first terminal electrode 21A and the second side surface side first terminal electrode 21B are electrically connected to the side surface side electrode 21S provided on the first side surface 11A or the second side surface 11B and the side surface side electrode 21S. It has two mounting surface side electrodes 21T provided on the first main surface 11E and the second main surface 11F. Similarly, the first side surface side second terminal electrode 22A and the second side surface side second terminal electrode 22B are electrically connected to the side surface side electrode 22S provided on the first side surface 11A or the second side surface 11B and the side surface side electrode 22S. It has two mounting surface side electrodes 22T which are connected and provided on the first main surface 11E and the second main surface 11F. The mounting surface side electrodes 21T and 22T may be provided on at least one of the first main surface 11E and the second main surface 11F. The third side surface 11C and the fourth side surface 11D adjacent to the first side surface 11A (or the second side surface 11B) are terminal electrodes that are electrically connected to the first internal electrode or the second internal electrode of the element body 11. Does not have. Therefore, the multilayer capacitor 10 is attached to the circuit board 2 on the first side face 11A side or the second side face 11B side, and the third side face 11C side and the fourth side face 11D side are not attached to the circuit board 2. Next, the internal structure of the multilayer capacitor 10 will be described.

  FIG. 2 is a cross-sectional view illustrating the multilayer capacitor in the mounting structure according to the first embodiment. 3 and 4 are plan views showing the internal structure of the multilayer capacitor in the mounting structure according to the first embodiment. FIG. 2 is a plan view of the multilayer capacitor 10 and the circuit board 2 passing through the first side surface side first terminal electrode 21A and the first side surface side second terminal electrode 22A that are parallel to and face the third side surface 11C and the fourth side surface 11D. The cross section cut off by is shown. FIG. 3 shows a state in which the multilayer capacitor 10 is cut along a plane parallel to the first internal electrode 13 and passing through the first internal electrode 13. FIG. 4 shows a state in which the multilayer capacitor 10 is cut along a plane parallel to the second internal electrode 14 and passing through the second internal electrode 14. 3 and 4 are the same in the following similar drawings.

  The element body 11 included in the multilayer capacitor 10 includes a dielectric layer 12 made of a dielectric material, a first internal electrode 13 made of a conductive material, and a second internal electrode 14 made of the same conductive material. The first internal electrode 13 and the second internal electrode 14 are, for example, palladium, silver / palladium alloy, nickel, copper (Cu), or the like.

The dielectric layer 12 is, for example, barium titanate (BaTiO ₃ ). In the present embodiment, in the element body 11, the dielectric layers 12, the first internal electrodes 13, and the second internal electrodes 14 are alternately stacked. More specifically, in the element body 11, a first internal electrode 13 and a second internal electrode 14 are laminated via a dielectric layer 12 in a direction (Z direction) orthogonal to the substrate surface 2P of the circuit board 2. . In the present embodiment, the element body 11 includes a plurality of dielectric layers 12, first internal electrodes 13, and second internal electrodes 14, but the dielectric layer 12, first internal electrodes 13, and second internal electrodes. It is only necessary to have at least one electrode 14 each. The element body 11 is a laminated body in which a plurality of ceramic green sheets (unfired ceramic sheets) to be the dielectric layers 12 and conductor sheets to be the first internal electrodes 13 and the second internal electrodes 14 are alternately stacked. It is a rectangular parallelepiped-shaped sintered body obtained by thermocompression bonding and integration, then cutting, degreasing, and firing.

  As shown in FIG. 3, in the present embodiment, the first internal electrode 13 has two first lead portions 13C. As shown in FIG. 2, the element body 11 has a plurality of first internal electrodes 13, and each first internal electrode 13 has two first lead portions 13 </ b> C. Two first lead portions 13C included in each first internal electrode 13 are led out to the first side surface 11A and the second side surface 11B of the element body 11. In the present embodiment, the first lead portion 13C drawn to the first side surface 11A is arranged on the second side surface 11C side, and the first lead portion 13C drawn to the second side surface 11B is arranged on the fourth side surface 11D side. . The end face of the first lead portion 13C exposed on the first side surface 11A of the element body 11 is electrically connected to the side surface side electrode 21S of the first side surface side first terminal electrode 21A provided on the first side surface 11A. . Further, the end face of the first lead portion 13C exposed to the second side surface 11B of the element body 11 is electrically connected to the side surface side electrode 21S of the second side surface side first terminal electrode 21B provided on the second side surface 11B. .

  As shown in FIG. 4, each second internal electrode 14 has two second lead portions 14C. As shown in FIG. 3, the element body 11 has a plurality of second internal electrodes 14, and each second internal electrode 14 has two second lead portions 14 </ b> C. Two second lead portions 14 </ b> C included in each first internal electrode 14 are led out to the first side surface 11 </ b> A and the second side surface 11 </ b> B of the element body 11. In the present embodiment, the second lead portion 14C drawn to the first side surface 11A is arranged on the fourth side surface 11D side, and the second lead portion 14C drawn to the second side surface 11B is arranged on the second side surface 11C side. . The end face of the second lead portion 14C exposed to the first side surface 11A of the element body 11 is electrically connected to the side surface side electrode 22S of the first side surface side second terminal electrode 22A. The end face of the second lead portion 14C exposed on the second side surface 11B of the element body 11 is electrically connected to the side surface side electrode 21S of the second side surface side second terminal electrode 22B provided on the second side surface 11B. .

  As will be described later, it is sufficient that the number of the first drawer portion 13C and the second drawer portion 14C is at least one. In this case, the element body 11 includes the first side surface side first terminal electrode 21A and the first side surface side second terminal electrode 22A, and the second side surface side first terminal electrode 21B and the second side surface side second terminal electrode 22B. Either one may be provided on either the first side surface 11A or the second side surface 11B. In the present embodiment, the multilayer capacitor 10 has the center (centroid) of the first main surface 11E and the second main surface 11F when viewed from the first main surface 11E or the second main surface 11F side shown in FIG. The pair of first lead portions 13C is arranged point-symmetrically, and the pair of second lead portions 14C is arranged point-symmetrically.

  With such a structure, the multilayer capacitor 10 has a first center with respect to the centers (centroids) of the first main surface 11E and the second main surface 11F when viewed from the first main surface 11E or the second main surface 11F. The first side surface side first terminal electrode 21A and the second side surface side first terminal electrode 21B are arranged point-symmetrically, and the first side surface side second terminal electrode 22A and the second side surface side second terminal electrode 22B are point symmetric. Be placed. For this reason, when the multilayer capacitor 10 is mounted on the circuit board 2 by the component mounting apparatus, the multilayer capacitor 10 remains the same even if the multilayer capacitor 10 rotates 180 degrees with respect to the centers of the first main surface 11E and the second main surface 11F. Can be mounted on the circuit board 2. As a result, since it is not necessary to consider the directionality of the multilayer capacitor 10 when mounting the multilayer capacitor 10 on the circuit board 2, the degree of freedom is improved.

  As shown in FIG. 2, in the multilayer capacitor 10, the mounting surface side electrode 21 </ b> T on the first main surface 11 </ b> E side included in the first side surface side first terminal electrode 21 </ b> A is bonded to the substrate electrode 3 of the circuit substrate 2 by the solder 4. The Similarly, in the multilayer capacitor 10, the mounting surface side electrode 22 </ b> T on the first main surface 11 </ b> E side included in the first side surface side second terminal electrode 22 </ b> A is bonded to the substrate electrode 3 of the circuit substrate 2 by the solder 4. In addition, the mounting surface side electrodes 21T and 22T on the second main surface 11E side may be joined to the substrate electrode 3 of the circuit board 2 by the solder 4. The solder 4 electrically connects the mounting surface side electrodes 21T and 22T of the first side surface side first terminal electrode 21A and the first side surface side second terminal electrode 22A to the substrate electrode 3.

  As described above, the mounting structure 1 includes the first side surface side first terminal electrode 21A and the first side surface side second terminal electrode 22A provided on the same side surface (first side surface 11A) of the element body 11 of the multilayer capacitor 10. Are electrically connected to the substrate electrode 3 of the circuit board 2. That is, in the mounting structure 1, the multilayer capacitor 10 is mounted on the circuit board 2 on the first side surface 11 </ b> A side. On the other hand, in the multilayer capacitor 10, the second side surface side first terminal electrode 21 </ b> B and the second side surface side second terminal electrode 22 </ b> B are not electrically and physically connected to the substrate electrode 3 of the circuit board 2. That is, in the mounting structure 1, the side surface (second side surface 11 </ b> B) side opposite to the side surface (first side surface 11 </ b> A) side attached to the circuit board 2 of the multilayer capacitor 10 is not attached to the circuit board 2.

  FIG. 5 is a perspective view for explaining deformation of the multilayer capacitor. In the multilayer capacitor 10, a first internal electrode 13 and a second internal electrode 14 are laminated via a dielectric layer 12 in the Z direction, that is, in a direction orthogonal to the substrate surface 2P of the circuit board 2 shown in FIGS. Has been. A dielectric material is used for the dielectric layer 12 shown in FIG. The multilayer capacitor 10 is provided between the first side surface side first terminal electrode 21A and the first side surface side second terminal electrode 22A or between the second side surface side first terminal electrode 21B and the second side surface side second terminal electrode 22B. When an AC voltage is applied to the dielectric layer 12, an electrostriction phenomenon occurs in the dielectric layer 12, and the multilayer capacitor 10 is deformed. That is, due to the electrostrictive effect of the ceramic dielectric layer 12 having ferroelectricity, the multilayer capacitor 10 expands and contracts in the stacking direction.

  According to the general Poisson's ratio (= 0.3) of the dielectric, expansion and contraction occurs in the direction orthogonal to the stacking direction, that is, in the direction parallel to the substrate surface 2P of the circuit board 2 (X direction and Y direction). For example, as shown in FIG. 5, when the multilayer capacitor 10 extends in the lamination direction (Z direction) (directions indicated by arrows E and F in FIG. 5), the multilayer capacitor 10 extends in the direction (X direction and Y direction) perpendicular to the lamination direction. Shrinks (directions indicated by arrows A, B, C, and D in FIG. 5), and when contracted in the stacking direction, it extends in a direction orthogonal to the stacking direction.

  When the AC voltage is applied to the multilayer capacitor 10, the multilayer capacitor 10 expands and contracts in the lamination direction (direction orthogonal to the first main surface 11E and the second main surface 11F) and the direction orthogonal to the lamination direction (first Stretching in the first to fourth side surfaces 11 </ b> A to 11 </ b> D is repeated (the stretching in the stacking direction and the phase are shifted by 90 degrees). As a result, the circuit board 2 on which the multilayer capacitor 10 is mounted vibrates in a direction substantially orthogonal to the board surface 2P. The vibration amplitude of the multilayer capacitor 10 is very small (about 1 pm to 1 nm), and as it is, it is hardly recognized by humans as sound. However, when the multilayer capacitor 10 is mounted on the circuit board, the circuit board functions as an acoustic impedance converter depending on the mounting method. Then, when the frequency of vibration becomes a human audible frequency band (20 Hz to 20 kHz), it is detected as a sound by the human ear. As described above, when the multilayer capacitor 10 is mounted on the circuit board 2, a squeal due to the electrostriction phenomenon of the dielectric material may occur.

  FIG. 6 is a plan view of a mounting structure according to a comparative example. FIG. 7 is a side view of a mounting structure according to a comparative example. In the mounting structure 101 of the comparative example, the first side surface side first terminal electrode 21 </ b> A and the second side surface side second terminal electrode 22 </ b> B of the multilayer capacitor 10 are electrically and physically connected by the substrate electrode 3 and the solder 4 of the circuit board 2. Connected to. That is, the multilayer capacitor 10 has both the first side surface 11 </ b> A and the second side surface 11 </ b> B facing each other attached to the circuit board 2.

  In the case of such a structure, when the electrostriction phenomenon of the dielectric layer 12 of the multilayer capacitor 10 occurs, the multilayer capacitor 10 expands and contracts in a direction orthogonal to the stacking direction and is orthogonal to the first side surface 11A and the second side surface 11B. It expands and contracts in the direction as well (directions indicated by arrows A and B in FIGS. 6 and 7). The mounting structure 101 is attached to the circuit board 2 on both the first side surface 11A side of the multilayer capacitor 10 and the second side surface 11B side opposite thereto in the direction orthogonal to the first side surface 11A and the second side surface 11B. Yes. For this reason, in the mounting structure 101, a force in a direction orthogonal to the first side surface 11A and the second side surface 11B due to the electrostriction phenomenon is transmitted to the circuit board 2. As a result, as shown in FIG. 7, the circuit board 2 vibrates in a direction orthogonal to the board surface 2 </ b> P, more specifically, bends the circuit board 2 at the period of the AC voltage applied to the multilayer capacitor 10. It will be.

  FIG. 8 is a plan view of the mounting structure according to the first embodiment. FIG. 9 is a side view of the mounting structure according to the first embodiment. In the present embodiment, the mounting structure 1 includes a first side surface side first terminal electrode 21A and a first side surface side second terminal electrode 22A provided on the same side surface (the first side surface 11A in this example) of the multilayer capacitor 10. The circuit board 2 is electrically and physically connected to the substrate electrode 3 and the solder 4. That is, in the mounting structure 1, the multilayer capacitor 10 is attached to the circuit board 2 only on the first side face 11 </ b> A side, and is not attached to the circuit board 2 on the second side face 11 </ b> B side facing the first side face 11 </ b> A.

  In the mounting structure 1, when the electrostriction phenomenon of the dielectric layer 12 of the multilayer capacitor 10 occurs, the multilayer capacitor 10 expands and contracts in the direction orthogonal to the first side surface 11A and the second side surface 11B (arrows in FIGS. 8 and 9). Direction indicated by A and B). In the mounting structure 1, only the first side surface 11A side of the multilayer capacitor 10 is attached to the circuit board 2 in the direction orthogonal to the first side surface 11A and the second side surface 11B, and the second side surface 11B side facing the first side surface 11A Are open to the circuit board 2. With such a structure, in the mounting structure 1, the force in the direction orthogonal to the first side surface 11 </ b> A and the second side surface 11 </ b> B due to the electrostriction phenomenon is released on the second side surface 11 </ b> B side and hardly transmitted to the circuit board 2. . As a result, as shown in FIG. 9, the mounting structure 1 can suppress noise caused by the electrostriction phenomenon of the dielectric layer 12 when an AC voltage is applied to the multilayer capacitor 10.

  In general, a resist layer 5 is provided on the substrate surface 2P of the circuit board 2 except for the portion of the substrate electrode 3. The second side surface side second terminal electrode 22B on the second side surface 11B side of the multilayer capacitor 10 is not in contact with the substrate electrode 3. However, when the multilayer capacitor 10 is mounted on the circuit board 2, the resist layer 5 becomes the multilayer capacitor. 10 is supported. For this reason, even if the second side surface side second terminal electrode 22B and the substrate electrode 3 are not in contact with each other, the resist layer 5 can stabilize the posture of the multilayer capacitor 10.

(Modification 1)
10 and 11 are plan views showing the structure of the capacitor according to the first modification of the first embodiment. FIG. 12 is a plan view of the mounting structure according to the first modification of the first embodiment. The multilayer capacitor 10a of the present modification is different from the multilayer capacitor 10 described above in the arrangement of the first lead portion 13C of the first internal electrode 13 and the second lead portion 14C of the second internal electrode 14. The other structure of the multilayer capacitor 10a is the same as that of the multilayer capacitor 10 described above, and the mounting structure 1a of the present modification is the same as the above-described mounting structure 1 except that the multilayer capacitor 10a is used. Therefore, the mounting structure 1a can also suppress the squeaking similarly to the mounting structure 1 described above.

  As shown in FIG. 10, the two first lead portions 13C of the first internal electrode 13 of the multilayer capacitor 10a are drawn to the first side surface 11A and the second side surface 11B of the element body 11a. In this modification, all of the first lead portions 13C drawn to the first side surface 11A and the second side surface 11B are arranged on the third side surface 11C side. That is, the first lead portion 13C drawn to the first side surface 11A and the first lead portion 13C drawn to the second side surface 11B face each other.

  As shown in FIG. 11, the two second lead portions 14C of the second internal electrode 14 of the multilayer capacitor 10a are drawn out to the first side surface 11A and the second side surface 11B of the element body 11a. In the present modification, both of the second lead portions 14C drawn to the first side surface 11A and the second side surface 11B are arranged on the fourth side surface 11D side. That is, the second lead portion 14C drawn to the first side surface 11A and the second lead portion 14C drawn to the second side surface 11B face each other.

  In this modification, the multilayer capacitor 10a is orthogonal to the third side surface 11C and the fourth side surface 11D and viewed from the first main surface 11E or the second main surface 11F shown in FIG. A pair of first lead portions 13C is arranged in line symmetry with respect to a straight line passing through the middle point with the second side surface 11B, and a pair of second lead portions 14C is arranged in line symmetry. With such a structure, the multilayer capacitor 10a has the first side surface side first terminal electrode 21A and the second side surface side first with respect to the straight line when viewed from the first main surface 11E or the second main surface 11F side. The terminal electrode 21B is arranged in line symmetry, and the first side surface side second terminal electrode 22A and the second side surface side second terminal electrode 22B are arranged in line symmetry.

  In the mounting structure 1a, in the example shown in FIG. 12, the first side surface 11A side of the multilayer capacitor 10a is attached to the circuit board 2, and the second side surface 11B side is released from the circuit board 2. That is, the first side surface side first terminal electrode 21A and the first side surface side second terminal electrode 22A provided on the first side surface 11A as the same side surface of the multilayer capacitor 10a are electrically connected to the substrate electrode 3 of the circuit board 2 and Connected physically and physically. In the mounting structure 1a, the second side surface 11B side of the multilayer capacitor 10a may be attached to the circuit board 2 and the first side surface 11A side may be released from the circuit board 2. That is, the second side surface side first terminal electrode 21B and the second side surface side second terminal electrode 22B provided on the second side surface 11B as the same side surface of the multilayer capacitor 10a are electrically connected to the substrate electrode 3 of the circuit board 2 and the second side surface side second terminal electrode 22B. And may be physically and physically connected. As described above, since the multilayer capacitor 10a may be attached to the circuit board 2 on either the first side surface 11A side or the second side surface 11B side, the mounting structure 1a is used when the multilayer capacitor 10a is mounted on the circuit board 2. The degree of freedom increases.

(Modification 2)
13 and 14 are plan views showing the structure of the capacitor according to the second modification of the first embodiment. In the multilayer capacitor 10b of this modification, the number of first lead portions 13C included in one first internal electrode 13 and the number of second lead portions 14C included in one second internal electrode 14 are the same as those in the multilayer capacitor 10 described above. Different from 10a. The other structure of the multilayer capacitor 10b is the same as that of the multilayer capacitor 10, 10a described above. For this reason, also in the mounting structure using the multilayer capacitor 10b, it is possible to suppress the noise as in the mounting structures 1 and 1a described above.

  As shown in FIG. 13, one first lead portion 13C of the first internal electrode 13 of the multilayer capacitor 10b is drawn to the first side surface 11A of the element body 11b. In the present modification, the first lead portion 13C is disposed on the third side surface 11C side. As shown in FIG. 14, one second lead portion 14C included in the second internal electrode 14 of the multilayer capacitor 10b is drawn to the first side surface 11A of the element body 11b. In the present modification, the second lead portion 14C that is drawn to the first side surface 11A is disposed on the fourth side surface 11D side. As described above, in the multilayer capacitor 10b, the first lead portion 13C and the second lead portion 14C are drawn only to the first side surface 11A as the same side surface, and the first side surface side first terminal electrode 21A and the first side surface side are extracted. A second terminal electrode 22A is provided.

  The multilayer capacitor 10b is attached to the circuit board 2 on the first side surface 11A side. The multilayer capacitor 10b does not have a terminal electrode other than the one side surface (first side surface 11A) attached to the circuit board 2. For this reason, since the multilayer capacitor 10b is excellent in insulation, the mounting structure using the multilayer capacitor 10b can reduce the possibility of short circuit between terminal electrodes in addition to the suppression of noise.

  As described above, in the present embodiment and the modification thereof, a plurality of terminal electrodes provided on the same side surface of the multilayer capacitor are connected to the substrate electrode of the circuit board, and the multilayer capacitor is attached to the circuit board and mounted only on the same side surface side. . By doing so, it is possible to suppress the contraction of the multilayer capacitor due to electrostriction from being transmitted to the circuit board, and thus it is possible to suppress the noise caused by the electrostriction of the multilayer capacitor. The configurations described in this embodiment and its modifications can be applied as appropriate to the following embodiments and modifications thereof. Moreover, what has the structure described in this embodiment and its modification has the effect | action and effect similar to this embodiment and its modification.

(Embodiment 2)
15 and 16 are plan views showing the structure of the capacitor according to the second embodiment. FIG. 17 is a plan view of the mounting structure according to the second embodiment. The multilayer capacitor 10c of the present embodiment has a plurality of first lead portions 13C of the first internal electrode 13, and these are led out to the first side surface 11A as the same side surface, and a plurality of first side surface side It is characterized in that a one-terminal electrode 21A is provided. Other structures of the multilayer capacitor 10c are the same as those of the above-described multilayer capacitors 10, 10a, etc., and the mounting structure 1c of the present embodiment is the same as the above-described mounting structures 1, 1a, etc., except that the multilayer capacitor 10b is used. . Therefore, the mounting structure 1c can also suppress the squeal similarly to the mounting structures 1, 1a and the like described above.

  As shown in FIG. 15, the two first lead portions 13C included in the first internal electrode 13 of the multilayer capacitor 10c are drawn to the first side surface 11A of the element body 11c. In the present embodiment, one first drawer portion 13C is disposed on the third side surface 11C side, and the other first drawer portion 13C is disposed on the fourth side surface 11D side. As shown in FIG. 16, one second lead portion 14C included in the second internal electrode 14 of the multilayer capacitor 10c is the first side surface 11A of the element body 11c, and is between the two first lead portions 13C and 13C. Pulled out. The first internal electrode 13 electrically connects the two first lead portions 13C and 13C.

  Thus, in the multilayer capacitor 10c, the two first lead portions 13C and 13C and the one second lead portion 14C are drawn from the first side surface 11A. The first side surface side first terminal electrodes 21Ac and 21Ad are electrically connected to the two first lead portions 13C, respectively, and the first side surface side second terminal electrode 22A is connected to one second lead portion 14C. Electrically connected. With such a structure, the multilayer capacitor 10c has two first side surface side first terminal electrodes 21Ac and 21Ad and one first side surface side second terminal electrode 22A on the first side surface 11A.

  The first side electrode first terminal electrode 21Ac is connected to the substrate electrode 3I of the circuit board 2, and an electric signal is input thereto. The first side surface side first terminal electrode 21Ad is connected to the substrate electrode 3O of the circuit board 2, and the electric signal passing through the first internal electrode 13 is output (the input / output relationship of the electric signal may be reversed). . The first side surface side second terminal electrode 22A is connected to a GND (ground) electrode 3G of the circuit board 2. Thus, the multilayer capacitor 10c can be used as a so-called feedthrough capacitor through which an electric signal passes.

  A mounting structure 1c shown in FIG. 17 is a structure when a multilayer capacitor 10c that functions as a feedthrough capacitor is mounted on the circuit board 2. Also in the mounting structure 1c, the multilayer capacitor 10c includes only the first side surface side first terminal electrodes 21Ac and 21Ad and the first side surface side second terminal electrode 22A provided on the first side surface 11A as the same side surface of the circuit board 2. It is connected to the substrate electrode 3I and the like. For this reason, in the mounting structure 1c, the multilayer capacitor 10c is attached to the circuit board 2 only on the first side face 11A side as the same side face, and is attached to the circuit board 2 on the second side face 11B side facing the first side face 11A. Absent. As a result, the mounting structure 1c can suppress noise even when a feedthrough capacitor is used.

(Modification)
18, 19 and 20 are plan views showing the structure of a capacitor according to a modification of the second embodiment. FIG. 21 is a partial cross-sectional view illustrating a structure of a capacitor according to a modification of the second embodiment. FIG. 22 is a plan view of a mounting structure according to a modification of the second embodiment. In the multilayer capacitor 10d of the present modification, the multilayer capacitor 10c of the second embodiment described above is disposed on the third internal electrode 15 disposed opposite to the second internal electrode 14 via the dielectric layer, and the second side surface 11B. A plurality of second side surface side third terminal electrodes 23Bc, 23Bd connected to the third internal electrode 15 and a second side surface side second electrode provided on the second side surface 11B and connected to the second internal electrode 14; A two-terminal electrode 22B. The other structure of the multilayer capacitor 10d is the same as that of the multilayer capacitor 10c described above, and the mounting structure 1d of this modification is the same as the above-described mounting structure 1c except that the multilayer capacitor 10d is used. Therefore, the mounting structure 1d can also suppress the squealing similarly to the mounting structure 1c described above.

  As shown in FIG. 18, the multilayer capacitor 10 d has a third internal electrode 15. As shown in FIG. 21, the third internal electrode 15 faces the second internal electrode 14 with the dielectric layer 12 in between. In the multilayer capacitor 10 d, the first internal electrode 13, the second internal electrode 14, and the third internal electrode 15 are laminated via the dielectric layer 12. The two third lead portions 15C of the third internal electrode 15 are drawn to the second side surface 11B of the element body 11d. In the present embodiment, one third lead portion 15C is disposed on the third side surface 11C side, and the other third lead portion 15C is disposed on the fourth side surface 11D side. The third internal electrode 15 electrically connects the two third lead portions 15C and 15C.

  As shown in FIG. 19, the two first lead portions 13C of the first internal electrode 13 of the multilayer capacitor 10d are drawn to the first side surface 11A of the element body 11c. In the present embodiment, one first drawer portion 13C is disposed on the third side surface 11C side, and the other first drawer portion 13C is disposed on the fourth side surface 11D side. As shown in FIG. 20, one of the two second lead portions 14C included in the second internal electrode 14 of the multilayer capacitor 10d is the first side surface 11A of the element body 11d, and the two first lead portions 13C and 13C. Drawn out during The other second lead portion 14C is the second side face 11B of the element body 11d and is drawn between the two third lead portions 15C and 15C.

  As described above, in the multilayer capacitor 10d, the two first lead portions 13C and 13C and the one second lead portion 14C are drawn from the first side surface 11A, and the two third lead portions 15C and the second side face 11B are drawn. 15C and one second lead portion 14C are pulled out. The first side surface side first terminal electrodes 21Ac and 21Ad are electrically connected to the two first lead portions 13C and 13C, respectively, and the first side surface side second terminal electrode is connected to one second lead portion 14C. 22A is electrically connected. The second side surface side third terminal electrodes 23Bc and 23Bd are electrically connected to the two third lead portions 15C and 15C, respectively, and the second side surface side second terminal electrode is connected to one second lead portion 14C. 22B is electrically connected. The first side surface side first terminal electrode 21Ac and the second side surface side third terminal electrode 23Bc are arranged on the third side surface 11C side, and the first side surface side first terminal electrode 21Ad and the second side surface side third terminal electrode 23Bd are It is arranged on the 4 side 11D side.

  The first side surface side first terminal electrode 21Ac or the second side surface side third terminal electrode 23Bc is connected to the substrate electrode 3I of the circuit board 2, and an electric signal is input thereto. The first side surface side first terminal electrode 21Ad or the second side surface side third terminal electrode 23Bd is connected to the substrate electrode 3O of the circuit board 2, and the electric signal that has passed through the first internal electrode 13 or the third internal electrode 15 is transmitted. (The input / output relationship of the electrical signal may be reversed). The first side surface side second terminal electrode 22A or the second side surface side second terminal electrode 22B is connected to a GND (ground) electrode 3G of the circuit board 2. As described above, the multilayer capacitor 10d can also be used as a so-called feedthrough capacitor in which an electric signal passes through the inside, similarly to the multilayer capacitor 10c described above.

  In the mounting structure 1d shown in FIG. 22, the multilayer capacitor 10d includes only the first side-side first terminal electrodes 21Ac and 21Ad and the first side-side second terminal electrode 22A provided on the first side 11A as the same side. The substrate 2 is connected to the substrate electrode 3I and the like. Alternatively, in the multilayer capacitor 10d, only the second side surface side third terminal electrodes 23Bc and 23Bd and the second side surface side second terminal electrode 22B provided on the second side surface 11B as the same side surface are the substrate electrodes 3I of the circuit board 2, etc. Connected. For this reason, in the mounting structure 1d, the multilayer capacitor 10c is attached to the circuit board 2 only on the first side face 11A side as the same side face, and attached to the circuit board 2 on the second side face 11B side facing the first side face 11A. Alternatively, only the second side surface 11B side as the same side surface is attached to the circuit board 2, and the first side surface 11A side facing the second side surface 11B is not attached to the circuit board 2. As a result, the mounting structure 1d can suppress noise when using a feedthrough capacitor.

  The multilayer capacitor 10d is first in relation to the center (centroid) of the first main surface 11E and the second main surface 11F when viewed from above, that is, from the first main surface 11E or the second main surface 11F side. The side surface side first terminal electrode 21Ac and the second side surface side third terminal electrode 23Bd are arranged point-symmetrically, and the first side surface side first terminal electrode 21Ad and the second side surface side third terminal electrode 23Bc are arranged point symmetrically. Further, the first side surface side second terminal electrode 22A and the second side surface side second terminal electrode 22B are arranged point-symmetrically. For this reason, when the multilayer capacitor 10d is mounted on the circuit board 2 by the component mounting device, the multilayer capacitor 10d remains the same even if the multilayer capacitor 10d rotates 180 degrees with respect to the centers of the first main surface 11E and the second main surface 11F. Can be mounted on the circuit board 2. As a result, the degree of freedom when mounting the multilayer capacitor 10d on the circuit board 2 is improved.

  As mentioned above, this embodiment and its modification are attached and mounted on the circuit board only on the same side surface side of the feedthrough multilayer capacitor. As a result, even if the feedthrough multilayer capacitor is used, the contraction of the multilayer capacitor due to electrostriction can be suppressed from being transmitted to the circuit board, so that the noise caused by the electrostriction of the multilayer capacitor can be suppressed. The configurations described in this embodiment and its modifications can be applied as appropriate to the following embodiments and modifications thereof. Moreover, what has the structure described in this embodiment and its modification has the effect | action and effect similar to this embodiment and its modification.

(Embodiment 3)
23 and 24 are plan views showing the structure of the capacitor according to the third embodiment. FIG. 25 is a plan view of the mounting structure according to the third embodiment. The multilayer capacitor 10e of the present embodiment is the same as the multilayer capacitor 10 of Embodiment 1 described above, but includes the first side surface side first terminal electrode 21A, the first side surface side second terminal electrode 22A, and the dielectric layer 12. The difference is that a plurality (two in the present embodiment) of element portions 10Ae and 10Be are included. The other structure of the multilayer capacitor 10e is the same as that of the multilayer capacitor 10 described above, and the mounting structure 1e of the present embodiment is the same as the above-described mounting structure 1 except that the multilayer capacitor 10e is used. Therefore, the mounting structure 1e can also suppress the noise as with the mounting structure 1 described above.

  As shown in FIG. 23, the multilayer capacitor 10e includes element portions 10Ae and 10Be in which a first side surface side first terminal electrode 21A and a first side surface side second terminal electrode 22A are stacked with a dielectric layer 12 interposed therebetween. . Thus, the multilayer capacitor 10e forms a capacitor array. In the present embodiment, the multilayer capacitor 10e includes two element portions 10Ae and 10Be, but the number of element portions is not limited to two.

  Each element part 10Ae, 10Be is divided in the middle (part shown with a dashed-dotted line G) of 3rd side 11C and 4th side 11D for convenience. However, since the element portions 10Ae and 10Be are fired as the element body 11e having the common dielectric layer 12, the element portions 10Ae and 10Be are inseparable from each other in the multilayer capacitor 10e. The structure of each of the element portions 10Ae and 10Be is the same as that of the multilayer capacitor 10a (FIGS. 10 and 11) according to the first modification of the first embodiment described above.

  The multilayer capacitor 10e includes two first side-side first terminal electrodes 21A and two first side-side second terminal electrodes 22A on the first side surface 11A. The multilayer capacitor 10e has two second side surface side first terminal electrodes 21B and two second side surface side second terminal electrodes 22B on the second side surface 11B. In the multilayer capacitor 10e, in each of the element portions 10Ae and 10Be, one first side surface side second terminal electrode 22A and one first side surface side first terminal electrode 21A are adjacent, and one second side surface side second terminal. The terminal electrode 22B and one second side surface side first terminal electrode 21B are adjacent to each other. The multilayer capacitor 10e includes two first side-side first terminal electrodes 21A and two first side-side second terminal electrodes 22A on only one of the first side surface 11A and the second side surface 11B. You may have. In this case, the structure of each of the element portions 10Ae and 10Be is the same as that of the multilayer capacitor 10b (FIGS. 13 and 14) according to the second modification of the first embodiment described above.

  The element body 11e of the multilayer capacitor 10e has a first main surface 11F and a second main surface 11F, similar to the element body 11 of the multilayer capacitor 10 of the first embodiment shown in FIGS. The first main surface 11E and the second main surface 11F face each other and have a rectangular shape in plan view. The third side surface 11C and the fourth side surface 11D of the element body 11e are in the short side direction of the first main surface 11E and the second main surface 11F so as to connect the first main surface 11E and the second main surface 11F. And are opposed to each other. The third side surface 11C and the fourth side surface 11D connect the first main surface 11A and the second main surface 11B of the element body 11e. The first main surface 11A and the second main surface 11B have the same dimensions in the X direction (see FIGS. 1 and 2) as the third side surface 11C and the fourth side surface 11D, but the first main surface 11A and the second main surface 11B. The dimension in the Y direction of the surface 11B is larger than the dimension in the X direction of the third side surface 11C and the fourth side surface 11D. Therefore, the first main surface 11A and the second main surface 11B have a rectangular shape (including a square) in the third side surface 11C and the fourth side surface 11D. The main surface 11A and the second main surface 11B are larger in width than the third side surface 11C and the fourth side surface 11D.

  The multilayer capacitor 10e has two first side-surface side first terminal electrodes 21A and two first side-surface side second terminal electrodes 22A on the first side surface 11A, and the second side surface 11B has second side-side first terminals. Two terminal electrodes 21B and two second side surface side second terminal electrodes 22B are provided. As described above, the multilayer capacitor 10e includes the first main surface 11A and the second main surface which are the long side surfaces among the first main surface 11A, the second main surface 11B, the third side surface 11C, and the fourth side surface 11D. The first side surface side first terminal electrode 21A, the second side surface side first terminal electrode 21B, and the like are provided on at least one side of the surface 11B. The multilayer capacitor 10e has a plurality (two in this embodiment) of element portions 10Ae and 10Be in a direction in which the third side surface 11C and the fourth side surface 11D face each other, that is, in the longitudinal direction of the element body 10e. Arranged.

  In the mounting structure 1e shown in FIG. 25, the multilayer capacitor 10e includes two first side surface side first terminal electrodes 21A and two first side surface side first electrodes provided on the first side surface 11A or the second side surface 11B as the same side surface. Only the two-terminal electrode 22A is connected to the substrate electrode 3I and the like of the circuit board 2. For this reason, in the mounting structure 1e, the multilayer capacitor 10e is attached to the circuit board 2 only on the first side face 11A side as the same side face, and is attached to the circuit board 2 on the second side face 11B side facing the first side face 11A. Alternatively, only the second side surface 11B side as the same side surface is attached to the circuit board 2, and the first side surface 11A side facing the second side surface 11B is not attached to the circuit board 2. As a result, the mounting structure 1e can suppress noise even when the multilayer capacitor 10e having a plurality of element portions 10Ae and 10Be is used. Further, since the multilayer capacitor 10e can be attached to the circuit board 2 on either the first side surface 11A side or the second side surface 11B side, the mounting structure 1e is free when the multilayer capacitor 10a is mounted on the circuit board 2. The degree is improved.

  As described above, in the present embodiment, a capacitor array, that is, a multilayer capacitor having a plurality of element portions, is mounted and mounted on a circuit board only on the same side surface side. As a result, even if the multilayer capacitor is a capacitor array, the contraction of the multilayer capacitor due to electrostriction can be suppressed from being transmitted to the circuit board, so that the noise caused by the electrostriction of the multilayer capacitor can be suppressed. Those having the configuration described in the present embodiment have the same operations and effects as the present embodiment and its modifications.

1, 1a, 1c, 1d, 1e, 101 Mounting structure 2 Circuit board 2P Substrate surface 3, 3I, 3C Substrate electrode 3G GND (ground) electrode 5 Resist layer 10, 10a, 10b, 10c, 10d, 10e Multilayer capacitor 10Ae, 10Be Element portion 11, 11a, 11b, 11c, 11d, 11e Element body 11A First side surface 11B Second side surface 11C Third side surface 11D Fourth side surface 11E First mounting surface (first main surface)
11F Second mounting surface (second main surface)
12 Dielectric layer 13 1st internal electrode 13C 1st extraction part 14 2nd internal electrode 14C 2nd extraction part 15 3rd internal electrode 15C 3rd extraction part 21S, 22S Side surface electrode 21T, 22T Mounting surface side electrode 21A, 21Ac , 21Ad First side surface side first terminal electrode 21B Second side surface side first terminal electrode 22A First side surface side second terminal electrode 22B Second side surface side second terminal electrode 23Bc, 23Bd Second side surface side third terminal electrode

Claims (2)

An element body in which a first internal electrode and a second internal electrode are laminated via a dielectric layer in a direction perpendicular to the substrate surface of the circuit board;
A first side surface side first terminal electrode provided on a first side surface of the element body orthogonal to a plane parallel to the substrate surface and connected to the first internal electrode;
A multilayer capacitor including a first side surface side second terminal electrode provided on the first side surface provided with the first side surface side first terminal electrode and connected to the second internal electrode;
The first side surface side is attached to the circuit board, and the second side surface facing the first side surface is not attached to the circuit board ,
The multilayer capacitor has a plurality of the first side surface side first terminal electrodes on the first side surface, and the first internal electrode is connected to the plurality of first side surface side first terminal electrodes,
The multilayer capacitor includes a third internal electrode disposed to face the second internal electrode via a dielectric layer,
A plurality of second side surface side third terminal electrodes provided on the second side surface and connected to the third internal electrode;
A second side surface side second terminal electrode provided on the second side surface and connected to the second internal electrode;
A multilayer capacitor mounting structure further including The third side surface and the fourth side surface adjacent to the first side surface do not have a terminal electrode connected to the first internal electrode or the second internal electrode, and the third side surface side and the fourth side surface side. The multilayer capacitor mounting structure according to claim 1, wherein the multilayer capacitor mounting structure is not attached to the circuit board.

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