JP6013744B2 - Handling method of semiconductor wafer - Google Patents

Description

The present invention relates to a method for handling a semiconductor wafer used in a semiconductor manufacturing process.

  In order to adapt a conventional semiconductor wafer to a thin semiconductor package (not shown) in the back grinding process, the back surface is back grinded and supported on the adhesive tape of the carrier jig in the dicing process, and then the individual semiconductor chips are formed with a dicing blade. By separating, a large number of semiconductor chips are formed (see Patent Documents 1, 2, 3, and 4). In the semiconductor wafer back grinding process, the semiconductor wafer is thinly cut to a thickness of 100 μm or less, sometimes about 30 to 50 μm, with a rotating grindstone. There is a risk of coming.

  In view of this, in the past, (1) when a semiconductor wafer is back-ground, the inner region is back-ground while leaving the peripheral edge of the semiconductor wafer, and the remaining peripheral edge ensures the rigidity of the semiconductor wafer and bends. (2) A method is proposed in which a rigidity securing ring is positioned and fixed to the periphery of the semiconductor wafer by an adhesive, and the rigidity securing ring is used to impart rigidity to the semiconductor wafer to suppress and prevent bending. (See Patent Document 5).

JP 2009-260219 A JP 2009-164476 A JP 2005-191039 A Japanese Patent No. 4239974 JP 2011-159864 A

  However, when the method (1) is adopted, the strength of the semiconductor wafer can be improved and the warpage can be reduced. There will be a new problem that equipment and costs cannot be reduced.

  On the other hand, the method (2) is very convenient because the problem (1) can be solved. However, when positioning the rigidity securing ring on the periphery of the semiconductor wafer, the positioning is performed gradually while shifting the rigidity securing ring forward, backward, left and right, but if an adhesive is used to fix the rigidity securing ring, Therefore, it is difficult to align the position while making fine adjustments.

The present invention has been made in view of the above, and can improve the rigidity of a semiconductor wafer, reduce manufacturing equipment and costs, and can be positioned with fine adjustment to the peripheral edge of the semiconductor wafer. It aims to provide a handling method .

In the present invention, in order to solve the above problems, a semiconductor wafer handling method for adhering a semiconductor wafer jig for imparting rigidity to a back-ground flexible thin semiconductor wafer,
The semiconductor wafer jig is provided on a ring-shaped base layer facing the peripheral edge of one side of the semiconductor wafer, and on the opposing surface of the base layer facing the peripheral edge of the one side of the semiconductor wafer. And a pair of adhesive layers that adhere to each other in a peelable manner, and the base material layer is formed with a slightly larger diameter than the semiconductor wafer, and the outer peripheral edge of the base material layer is within 3 mm from the peripheral edge of the semiconductor wafer. In the circumferential direction of the base material layer, a plurality of fixing holes for positioning and fixing the semiconductor wafer at the time of processing are drilled at predetermined intervals, and a pair of adhesive layers are curved in a substantially semicircular shape on a plane. The pair of adhesive layers are laminated and adhered to most of the opposing surfaces of the base material layer facing the peripheral edge of one surface of the semiconductor wafer, and both ends of the pair of adhesive layers are other than the majority of the opposing surfaces of the base material layer. Facing the gap in the rest of the The gap between the remaining portion of the opposing surface of the base material layer and both ends of the pair of adhesive layers is partitioned and formed in a peeling trigger portion where the fixing holes of the base material layer are located, and each adhesive layer is made of silicone rubber or fluoro rubber. The average surface roughness Ra of the adhesive surface that is formed by and adheres to the peripheral edge of one surface of the semiconductor wafer is in the range of 0.5 to 5 μm,
A pressure-sensitive adhesive layer of a semiconductor wafer jig is applied to the periphery of one side of a back-ground flexible thin semiconductor wafer while being peeled, and the semiconductor wafer is subjected to any of stress relief, PVD, or CVD. After being applied, the semiconductor wafer jig is peeled from the semiconductor wafer by pulling up the semiconductor wafer jig from the peeling trigger part .

  Here, the semiconductor wafer in the claims is not particularly limited to the φ150, 200, 300, and 450 mm types. One side of the semiconductor wafer may be the front surface or the back surface of the semiconductor wafer. The base material layer and the adhesive layer may have the same thickness or width, or may have different thicknesses and widths. The base material layer and the adhesive layer may be formed integrally or separately.

The base material layer is mainly formed in a ring shape, but when a flat orientation flat is formed on the peripheral edge of the semiconductor wafer, the base material layer is formed in a shape along the peripheral edge of the semiconductor wafer. This base material layer does not specifically ask the presence or absence of transparency, opaqueness, translucency, coloring, and flexibility. The adhesive layer does not ask for a plurality. Furthermore, the stress relief, PVD, and CVD correspond to the predetermined processing applied to the semiconductor wafer .

  According to the present invention, when a thin semiconductor wafer is given rigidity and subjected to a predetermined treatment, one surface of the thin semiconductor wafer is set as the upper surface, and the adhesive layer of the semiconductor wafer jig is provided on the peripheral surface of the one surface of the semiconductor wafer. Lightly overlap and align, pressurize this semiconductor wafer jig, and attach it detachably.

  At this time, since the average surface roughness Ra on the adhesive surface of the adhesive layer is 0.5 μm or more, the semiconductor wafer jig does not adhere just by lightly stacking it, and the semiconductor wafer jig is shifted as necessary to be properly positioned. Can be combined. Moreover, since Ra is 5 micrometers or less, if it pressurizes, the jig | tool for semiconductor wafers can be appropriately adhere | attached with respect to the single-sided peripheral part of a semiconductor wafer.

According to the present invention, there is an effect that the rigidity of a semiconductor wafer can be improved and manufacturing equipment and cost can be reduced. In addition, instead of fixing the semiconductor wafer jig to the peripheral edge of one side of the semiconductor wafer with an adhesive so as not to be peeled off, the surface roughness of the adhesive surface is limited numerically using a weak adhesive layer, Accurate alignment can be achieved by placing a semiconductor wafer jig on a semiconductor wafer and fine-tuning the position while repeating it manually. Specifically, since the average surface roughness Ra on the adhesive surface of the adhesive layer is 0.5 μm or more, it is not adhering only by lightly stacking the semiconductor wafer jig, and the semiconductor wafer jig is appropriately shifted as necessary. It becomes possible to align with. Moreover, since average surface roughness Ra is 5 micrometers or less, if it pressurizes, the jig | tool for semiconductor wafers can be appropriately adhere | attached with respect to the single-sided peripheral part of a semiconductor wafer. In addition, since the fingertip or the like can be lifted by interfering with the peeling trigger portion of the semiconductor wafer jig, the semiconductor wafer jig in a close contact state can be easily and safely removed from the peripheral edge of the semiconductor wafer. In addition, since the base material layer is formed to have a slightly larger diameter than the semiconductor wafer, the positioning jig of the handling device is in direct contact with the edge of the thin semiconductor wafer and effectively suppresses occurrence of chipping or cracks. It becomes possible. Furthermore, if a plurality of fixing holes in the base material layer are used, the semiconductor wafer can be positioned and fixed during processing.

It is a section explanatory view showing typically an embodiment of a semiconductor wafer handling method concerning the present invention. It is sectional explanatory drawing which shows typically the dicing state in embodiment of the handling method of the semiconductor wafer which concerns on this invention. It is a perspective explanatory view showing typically the relation between a semiconductor wafer and a jig for semiconductor wafers in an embodiment of a semiconductor wafer handling method concerning the present invention. It is front explanatory drawing which shows typically the relationship between the semiconductor wafer and jig | tool for semiconductor wafers in embodiment of the handling method of the semiconductor wafer which concerns on this invention. It is back surface explanatory drawing which shows typically the jig | tool for semiconductor wafers in embodiment of the handling method of the semiconductor wafer which concerns on this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. A semiconductor wafer jig in the present embodiment is an endless base material facing the back surface of a thin semiconductor wafer 1 as shown in FIGS. 1 to 5. A layer 10 and a pair of adhesive layers 14 laminated on the base material layer 10 and detachably adhered to the peripheral edge of the back surface of the semiconductor wafer 1 are provided in a two-layer structure, and most of the base material layer 10 has a pair of adhesives. The layer 14 is laminated, and the remaining part 13 other than the majority is used as a pair of peeling trigger parts 16 where the adhesive layer 14 does not exist, and the average surface roughness Ra of the adhesive surface 15 of each adhesive layer 14 is set within a predetermined range. I have to.

  As shown in FIGS. 1 to 3, the semiconductor wafer 1 is made of, for example, a planar circular silicon wafer having a diameter of 200 mm, a circuit pattern is formed on the surface, and the back surface is back-ground by a general-purpose back-grinding device (not shown). Thus, the thickness is reduced to 100 μm or less. In this semiconductor wafer 1, a circuit pattern is formed on the back-ground back surface as required, and a substantially V-shaped notch 2 for facilitating discrimination and alignment of the crystal direction is cut out at the peripheral edge.

  As shown in FIGS. 4 and 5, the base material layer 10 and the adhesive layer 14 of the semiconductor wafer jig are formed to have the same width, for example. For convenience, the width of the base material layer 10 is formed slightly wider than the width of the adhesive layer 14.

  As shown in FIGS. 1 to 5, the base material layer 10 is formed in a thin planar ring shape with a predetermined material, and a plurality of fixing holes 11 for positioning and fixing the semiconductor wafer 1 at the time of processing are formed at predetermined intervals in the circumferential direction. It is perforated and faces the peripheral edge of the back surface of the semiconductor wafer 1. The material of the base material layer 10 is not particularly limited. For example, silicon, glass epoxy resin or glass cloth composite, carbon fiber reinforced plastic, liquid crystal polymer, polyether ether ketone, polyether imide, polyimide, Examples include metals (aluminum, SUS, tungsten, iron-nickel alloys (42 alloy, etc.)), other alloys, and the like. Among these, it is optimal to use a glass epoxy resin that is excellent in mechanical properties, hygroscopicity, strength, thermal conductivity, heat resistant temperature, and electrical properties.

  The base material layer 10 is formed to have the same diameter as the semiconductor wafer 1 or a slightly larger diameter. When the base layer 10 has the same diameter as the semiconductor wafer 1, the outer peripheral edge is aligned with the peripheral edge of the semiconductor wafer 1, and when the diameter is slightly larger than the semiconductor wafer 1, the outer peripheral edge is The semiconductor wafer 1 is close to the peripheral edge within 3 mm from the peripheral edge. When the base material layer 10 is formed to have a diameter slightly larger than that of the semiconductor wafer 1, a positioning jig or the like of a handling device (not shown) directly contacts the edge of the thin semiconductor wafer 1 to cause chipping or cracking. It can be effectively suppressed.

  As shown in FIGS. 1, 4, and 5, the pair of adhesive layers 14 is formed into a thin planar substantially semicircular arc shape having a thickness of 200 μm or less (for example, about 100 μm) with a predetermined material having excellent weak adhesiveness. It is formed in a curved shape and is laminated and adhered to the flat opposing surface 12 of the base material layer 10 facing the peripheral edge of the back surface of the semiconductor wafer 1, and is detachably adhered to the peripheral surface of the back surface of the semiconductor wafer 1.

  The material of each pressure-sensitive adhesive layer 14 is not particularly limited, and examples thereof include silicone rubber and fluororubber that have a peel strength that is reduced at about 60 ° C. and is excellent in heat resistance. Necessary predetermined fillers are added to these materials. Such a pair of pressure-sensitive adhesive layers 14 are laminated and adhered to most of the facing surface 12 of the base material layer 10, and both end portions face each other through a gap in the remaining portion 13 other than most of the facing surface 12.

  As shown in FIGS. 4 and 5, each peeling trigger portion 16 is partitioned and formed as a gap between the remaining portion 13 of the opposing surface 12 and both ends of the pair of adhesive layers 14, and adheres from the semiconductor wafer 1. It becomes a trigger when peeling jigs. In each peeling trigger portion 16, the fixing hole 11 of the base material layer 10 is selectively positioned as a working mark.

  The adhesive surface 15 that adheres to the peripheral edge of the back surface of the semiconductor wafer 1 of each adhesive layer 14 is made of a transfer method using a mold cavity or silica as a molding material when the adhesive layer 14 is formed by a molding method using a mold. It is formed roughly by a method such as adding a filler. The average surface roughness (arithmetic surface roughness) Ra of the adhesive surface 15 is in the range of 0.5 to 5 μm by measurement with a dedicated surface roughness measuring machine, a laser microscope, or a three-dimensional scanning electron microscope. It is preferable.

  This is because when the average surface roughness Ra of the adhesive surface 15 is less than 0.5 μm, the semiconductor wafer jig is lightly overlapped when positioning the semiconductor wafer jig on the peripheral edge of the back surface of the semiconductor wafer 1. This is because it sticks alone and seriously hinders the work of sliding the semiconductor wafer jig back and forth and left and right. Moreover, when Ra exceeds 5 μm, the semiconductor wafer jig does not adhere to the peripheral edge of the back surface of the semiconductor wafer 1.

  In the above-described configuration, when the back-ground thin semiconductor wafer 1 having a thickness of 100 μm or less is subjected to dicing processing by giving rigidity, first, the back surface of the back-ground thin semiconductor wafer 1 is used as the upper surface, and this semiconductor wafer The adhesive layer 14 of the semiconductor wafer jig is lightly overlapped on the peripheral edge of the back surface of 1 and aligned in the front, rear, left, and right directions, and the semiconductor wafer jig is pressed with a roller or the like so as to be detachably attached without any gap (see FIG. 3). ).

  At this time, since the average surface roughness Ra of the adhesive surface 15 is 0.5 μm or more, the semiconductor wafer jig is not adhered only by lightly stacking it, and the semiconductor wafer jig is shifted several times and properly aligned. Can do. Further, since Ra is 5 μm or less, the semiconductor wafer jig can be reliably adhered to the peripheral edge of the back surface of the semiconductor wafer 1. When the outer peripheral edge of the semiconductor wafer jig is positioned on the peripheral edge of the semiconductor wafer 1, the peeling trigger part 16 of the semiconductor wafer jig can be opposed to the notch 2 of the semiconductor wafer 1.

  Next, the semiconductor wafer 1 having increased strength is subjected to necessary processing such as stress relief, PVD, CVD, etching, solder bump formation, etc., and the semiconductor wafer 1 is adhered to the adhesive tape 21 of the carrier jig 20, so that the carrier jig 20 Is vacuum-adsorbed onto the chuck table 22 (see FIG. 1).

  When the carrier jig 20 is vacuum-sucked to the chuck table 22 by the vacuum pump 23, the semiconductor wafer jig is peeled from the peripheral edge of the back surface of the semiconductor wafer 1. In this case, if a fingertip or the like is locked and pulled up to the peeling trigger part 16 of the semiconductor wafer jig, the adhesive layer 14 is gradually peeled off from the peripheral edge of the back surface of the semiconductor wafer 1, and the semiconductor wafer jig is completely removed. be able to.

  At this time, if the characteristic of the adhesive layer 14 whose peel strength decreases at about 60 ° C., the removal of the semiconductor wafer jig can be simplified. Then, if a dicing process (see FIG. 2) is performed on the semiconductor wafer 1 with a dicing blade 24 that rotates at high speed from the back side, a large number of semiconductor chips can be easily obtained without causing damage to the semiconductor wafer 1. Become.

  According to the above configuration, the strength of the semiconductor wafer 1 can be increased by adhering the semiconductor wafer jig along the peripheral portion of the back-ground thin semiconductor wafer 1. In addition, it is possible to effectively suppress and prevent bending and facilitate the subsequent handling and conveyance. Therefore, it is not necessary to back grind the inner region while leaving the peripheral portion of the semiconductor wafer 1, and a dedicated device can be reliably omitted, so that significant reduction in manufacturing equipment and cost can be expected.

  Further, the surface roughness of the adhesive surface 15 is limited numerically by using the weak adhesive layer 14 instead of fixing the semiconductor wafer jig to the periphery of the back surface of the semiconductor wafer 1 with an adhesive. Therefore, the semiconductor wafer 1 can be superposed on the semiconductor wafer 1 and finely adjusted while the position is manually repeated, thereby accurately aligning the positions.

  In addition, since no adhesive that causes contamination is required, work is not delayed or complicated. Further, the semiconductor wafer jig can be reused without being discarded for each operation. Further, since the peeling trigger 16 can be lifted by interfering with a fingertip or the like, the semiconductor wafer jig in a close contact state can be easily and safely removed from the peripheral edge of the semiconductor wafer 1, and work delays and complications can be achieved. It is possible to effectively eliminate the fear of conversion.

  In the above embodiment, the adhesive layer of the semiconductor wafer jig is adhered to the peripheral edge of the back surface of the semiconductor wafer 1. However, the adhesive layer of the semiconductor wafer jig is adhered to the peripheral edge of the semiconductor wafer 1. A circuit pattern or the like may be formed on the back surface. Alternatively, after the adhesive layer 14 of the semiconductor wafer jig is adhered to the peripheral edge of the back surface of the semiconductor wafer 1, the semiconductor wafer jig may be peeled off and adhered to the peripheral edge of the semiconductor wafer 1 again.

  Further, the adhesive layer 14 is divided into a plurality of parts (for example, divided into three parts, four parts, etc.), the plurality of adhesive layers 14 are abutted through gaps, and the gaps between the plurality of adhesive layers 14 are respectively used as peeling trigger parts 16. Also good. Furthermore, the peeling trigger part 16 may be omitted by laminating and adhering the flat ring-shaped adhesive layer 14 instead of the pair of adhesive layers 14 to all the opposing surfaces 12 of the base material layer 10.

The method for handling a semiconductor wafer according to the present invention can be used in the field of semiconductor manufacturing.

DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 10 Base material layer 12 Opposing surface 13 Remaining part 14 Adhesive layer 15 Adhesive surface 16 Peeling trigger part 22 Chuck table

Claims (1)

A semiconductor wafer handling method for adhering a semiconductor wafer jig for imparting rigidity to a back-ground thin flexible semiconductor wafer,
The semiconductor wafer jig is provided on a ring-shaped base layer facing the peripheral edge of one side of the semiconductor wafer, and on the opposing surface of the base layer facing the peripheral edge of the one side of the semiconductor wafer. And a pair of adhesive layers that adhere to each other in a peelable manner, and the base material layer is formed with a slightly larger diameter than the semiconductor wafer, and the outer peripheral edge of the base material layer is within 3 mm from the peripheral edge of the semiconductor wafer. In the circumferential direction of the base material layer, a plurality of fixing holes for positioning and fixing the semiconductor wafer at the time of processing are drilled at predetermined intervals, and a pair of adhesive layers are curved in a substantially semicircular shape on a plane. The pair of adhesive layers are laminated and adhered to most of the opposing surfaces of the base material layer facing the peripheral edge of one surface of the semiconductor wafer, and both ends of the pair of adhesive layers are other than the majority of the opposing surfaces of the base material layer. Facing the gap in the rest of the The gap between the remaining portion of the opposing surface of the base material layer and both ends of the pair of adhesive layers is partitioned and formed in a peeling trigger portion where the fixing holes of the base material layer are located, and each adhesive layer is made of silicone rubber or fluoro rubber. The average surface roughness Ra of the adhesive surface that is formed by and adheres to the peripheral edge of one surface of the semiconductor wafer is in the range of 0.5 to 5 μm,
A pressure-sensitive adhesive layer of a semiconductor wafer jig is applied to the periphery of one side of a back-ground flexible thin semiconductor wafer while being peeled, and the semiconductor wafer is subjected to any of stress relief, PVD, or CVD. A method of handling a semiconductor wafer, comprising: removing the semiconductor wafer jig from the semiconductor wafer by lifting the semiconductor wafer jig from the separation trigger portion after the application .

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