JP6000015B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor device in which impurities implanted into a semiconductor substrate are activated by laser beam irradiation.

  Patent Document 1 discloses a method for manufacturing a semiconductor device in which an impurity is introduced into a semiconductor substrate by ion implantation and then activated by irradiation with a laser beam to form an electrode layer and a field stop layer. . In the technique described in Patent Document 1, after the surface structure of the semiconductor element is fabricated, the substrate is thinned. Thereafter, ion implantation is performed on the back surface, and a pulse laser beam is irradiated using two laser oscillators. The time difference between the laser pulses emitted from the two laser oscillators is set to 600 ns or less.

Specifically, for example, phosphorus ions are ion-implanted from the back surface side of the n ⁻ -type silicon substrate into the field stop layer formation scheduled region. At this time, the dose is set to 1 × 10 ¹⁴ cm ⁻² or less so that the peak concentration of the field stop layer is 5 × 10 ¹⁸ cm ⁻³ or less. Subsequently, the dose is set to 5 × 10 ¹⁶ cm ⁻² or less so that the peak concentration of the p ⁺ -type collector layer and the n ⁺ -type cathode layer is 1 × 10 ²¹ cm ⁻³ or less, for example, boron ions and phosphorus ions. Are implanted into the p ⁺ -type collector layer formation planned region and the n ⁺ -type cathode layer formation planned region, respectively.

It is known that such an n ⁺ -type cathode layer into which ions are implanted at a high concentration becomes amorphous due to destruction of crystallinity of the silicon substrate. In the method of manufacturing a semiconductor device described in Patent Document 1, laser irradiation causes defect recovery by solid phase diffusion and activation of impurities implanted into a deep portion exceeding a depth of 1 μm from the laser irradiation surface (substrate back surface). Done. A sufficient temperature rise and heating time cannot be ensured, and the activation of impurities may be insufficient. If the pulse energy density of the irradiated laser beam is increased in order to sufficiently activate the deep portion, the melting depth becomes deep. When melting to a deep part, the impurity concentration distribution in the depth direction changes, and the designed characteristics may not be obtained. In addition, problems such as severe roughness of the substrate surface occur.

  There has been proposed a technique for performing laser annealing by irradiating a pulse laser beam with a pulse energy density in a range in which the semiconductor substrate does not melt (see, for example, Patent Document 2). In this method, it is difficult to sufficiently recover the crystallinity of a region where impurities are ion-implanted at a high concentration and become amorphous, and to sufficiently activate the implanted impurities.

JP 2010-171057 A JP 2009-032858 A

  An object of the present invention is to provide a method of manufacturing a semiconductor device capable of improving the quality of impurity activation annealing.

According to one aspect of the invention,
A first layer doped with the first impurity in the surface layer portion, and a second impurity doped in a region deeper than the first layer at a concentration lower than the impurity concentration of the first layer. The second layer without melting the surface layer portion by causing a first laser pulse having a pulse width of 10 μs to 30 μs to enter the surface layer portion of the semiconductor substrate including the second layer. Activating the second impurity of
A second laser pulse shorter than the pulse width of the first laser pulse is incident on the surface layer portion of the semiconductor substrate to melt the first layer, and the second layer is not melted. And activating the first impurity of the first layer,
The incident region of the second laser pulse is disposed inside the incident region of the first laser pulse, and the area of the incident region of the second laser pulse is 50% of the area of the incident region of the first laser pulse. A method for manufacturing a semiconductor device in the range of ˜100% is provided.

  The quality of the activation annealing of the impurities of the first layer and the second layer can be improved.

FIG. 1 is a schematic view of a laser annealing apparatus used in a semiconductor device manufacturing method according to an embodiment. FIG. 2A is a cross-sectional view of an IGBT manufactured by the method according to the embodiment, and FIG. 2B is a cross-sectional view in the middle stage of manufacturing the IGBT. FIG. 3A is a graph showing an example of time waveforms of the first and second laser pulses irradiated by the method according to the embodiment, FIG. 3B is a plan view of an incident region of the laser pulse, and FIG. It is a top view of the other structural example of the incident area | region of a laser pulse. FIG. 4 is a graph showing an example of impurity concentration distribution in the depth direction of the semiconductor substrate. FIG. 5 is a graph showing a simulation result of the relationship between the arrival temperature of the silicon wafer and the pulse width when the first laser pulse is applied to the silicon wafer. FIG. 6 is a graph showing the impurity concentration distribution in the depth direction and the carrier concentration distribution after annealing. FIG. 7A is a cross-sectional TEM image of the surface layer portion of the silicon wafer into which phosphorus is ion-implanted, FIG. 7B is a cross-sectional TEM image of the surface layer portion of the silicon wafer after irradiation with the second laser pulse, and FIG. FIG. 3 is a cross-sectional TEM image of a surface layer portion of a silicon wafer after irradiation with a first laser pulse. FIG. 8A is a graph showing an example of a time waveform of a laser pulse when laser annealing is performed by the method according to the embodiment, and FIG. 8B is a graph when the first and second laser pulses of FIG. 8A are irradiated to the silicon wafer. FIG. 8C is a graph showing the simulation result of the temporal change in the melting depth of the silicon wafer. FIG. 9 shows the elapsed time (delay time) from the falling time of the first laser pulse to the rising time of the second laser pulse and the fluence of the second laser pulse necessary for melting the silicon wafer. It is a graph which shows a relationship. FIG. 10 is a graph showing measurement results of impurity concentration distribution before activation annealing and carrier concentration distribution after activation annealing. FIG. 11 is a graph showing measurement results of impurity concentration distribution before activation annealing and carrier concentration distribution after activation annealing. FIG. 12A is a plan view showing a scanning path of a pulsed laser beam when the entire surface of a semiconductor wafer is activated and annealed, and FIGS. 12B and 12C perform annealing using a continuous wave laser beam and a pulsed laser beam. It is a graph which shows the time change of the laser energy which injects into the top view of a laser incident area at the time, and one point of a semiconductor wafer.

FIG. 1 is a schematic diagram of a laser annealing apparatus used in a method for manufacturing a semiconductor device according to an embodiment. A semiconductor laser oscillator (first laser oscillator) 21 emits a quasi-continuous oscillation (QCW) laser beam having a wavelength of 808 nm, for example. Note that a semiconductor laser oscillator that emits a pulse laser beam having a wavelength of 950 nm or less may be used. A solid-state laser oscillator (second laser oscillator) 31 emits a pulsed laser beam in the green wavelength region. For the solid-state laser oscillator 31, for example, an Nd: YAG laser, an Nd: YLF laser, an Nd: YVO ₄ laser, or the like that emits a second harmonic is used.

  The pulse laser beam emitted from the semiconductor laser oscillator 21 and the pulse laser beam emitted from the solid-state laser oscillator 31 are incident on the semiconductor substrate 50 to be annealed via the propagation optical system 27. The pulse laser beam emitted from the semiconductor laser oscillator 21 and the pulse laser beam emitted from the solid-state laser oscillator 31 are incident on the same region on the surface of the semiconductor substrate 50.

  Next, the configuration and operation of the propagation optical system 27 will be described. The pulse laser beam emitted from the semiconductor laser oscillator 21 is incident on the semiconductor substrate 50 via the attenuator 22, the beam expander 23, the homogenizer 24, the dichroic mirror 25, and the condenser lens 26.

  The pulse laser beam emitted from the solid-state laser oscillator 31 is incident on the semiconductor substrate 50 via the attenuator 32, the beam expander 33, the homogenizer 34, the bending mirror 35, the dichroic mirror 25, and the condenser lens 26.

  The beam expanders 23 and 33 collimate the incident pulse laser beam and expand the beam diameter. The homogenizers 24 and 34 and the condenser lens 26 shape the beam cross section on the surface of the semiconductor substrate 50 into a long shape, and uniformize the light intensity distribution in the beam cross section. The pulse laser beam emitted from the semiconductor laser oscillator 21 and the pulse laser beam emitted from the solid-state laser oscillator 31 are incident on substantially the same long region on the surface of the semiconductor substrate 50.

  The semiconductor substrate 50 is held on the stage 41. An XYZ orthogonal coordinate system is defined in which a plane parallel to the surface of the semiconductor substrate 50 is defined as an XY plane, and a normal direction of the surface of the semiconductor substrate 50 is defined as a Z direction. The control device 20 controls the semiconductor laser oscillator 21, the solid state laser oscillator 31, and the stage 41. The stage 41 receives the control from the control device 20 and moves the semiconductor substrate 50 in the X direction and the Y direction.

  FIG. 2A shows a cross-sectional view of an insulated gate bipolar transistor (IGBT) as an example of a semiconductor device manufactured by the method according to the embodiment. The IGBT has an emitter and a gate formed on one surface (hereinafter referred to as “first surface”) 50T of a semiconductor substrate 50 made of n-type silicon, and the other surface (hereinafter referred to as “second surface”). It is manufactured by forming a collector on 50B. As the semiconductor substrate 50, a silicon single crystal substrate is usually used. The structure of the surface on which the emitter and the gate are formed is manufactured in the same process as a general MOSFET manufacturing process. For example, as shown in FIG. 2A, a p-type base region 51, an n-type emitter region 52, a gate electrode 53, a gate insulating film 54, and an emitter electrode 55 are formed on the surface layer portion of the first surface 50T of the semiconductor substrate 50. Be placed. Current on / off control can be performed by the voltage between the gate and the emitter.

A p-type collector layer 57 and a low-concentration n-type buffer layer 56 are formed on the surface layer portion of the second surface 50B of the semiconductor substrate 50. The buffer layer 56 is disposed in a region deeper than the collector layer 57. The collector layer 57 and the buffer layer 56 are formed by implanting boron and phosphorus, for example, as impurities, and performing activation annealing. The laser annealing apparatus shown in FIG. 1 is applied to this activation annealing. A collector electrode 58 is formed on the surface of the collector layer 57 after the activation annealing.

  The depth from the second surface 50B to the interface between the collector layer 57 and the buffer layer 56 is, for example, about 0.3 μm. The depth from the second surface to the deepest position of the buffer layer 56 is, for example, in the range of 1 μm to 5 μm.

  FIG. 2B shows a cross-sectional view of the semiconductor substrate 50 at a stage where laser annealing is performed. Boron ions are implanted into the surface layer portion 57a of the second surface 50B of the semiconductor substrate 50. Phosphorus ions are implanted into a region 56a deeper than the surface layer portion 57a. Boron in the surface layer portion 57a and phosphorus in the deep region 56a are not activated. The boron concentration in the surface layer portion 57a is higher than the phosphorus concentration in the deep region 56a. In this specification, the surface layer portion 57a is referred to as a “high concentration layer”, and the deep region 56a is referred to as a “low concentration layer”. Since the dose of boron is large, the high concentration layer 57a is in an amorphous state. A region deeper than the interface between the high concentration layer 57a and the low concentration layer 56a remains in a single crystal state. On the first surface 50T of the semiconductor substrate 50, the element structure shown in FIG. 2A is formed.

  FIG. 3A schematically shows a laser pulse waveform incident on the semiconductor substrate 50 (FIG. 2B). In FIG. 3A, the pulse waveform is represented by a rectangle, but the actual pulse waveform includes portions such as a rising edge, an attenuation, and a falling edge of the pulse. The emission timing of the pulse waveform shown in FIG. 3A is determined by the control measure 20 (FIG. 1) controlling the semiconductor laser oscillator 21 and the solid-state laser oscillator 31.

  At time t1, incidence of the first laser pulse LP1 emitted from the semiconductor laser oscillator 21 on the semiconductor substrate 50 starts. The second laser pulse LP2 emitted from the solid state laser oscillator 31 is incident on the semiconductor substrate 50 at time t2 after time t1. The regions where the first laser pulse LP1 and the second laser pulse LP2 are incident substantially overlap. The peak power of the second laser pulse LP2 is higher than the peak power of the first laser pulse LP1, and the pulse width PW2 of the second laser pulse LP2 is shorter than the pulse width PW1 of the first laser pulse LP1. At time t3, the incidence of the second laser pulse LP2 ends. Thereafter, at time t4, the incidence of the first laser pulse LP1 ends. Note that the second laser pulse LP2 may be incident after the time t4.

  The pulse width PW1 of the first laser pulse LP1 is, for example, 10 μs or more. The pulse width PW2 of the second laser pulse LP2 is, for example, 1 μs or less. As an example, the pulse width PW1 is in the range of 10 μs to 30 μs, and the pulse width PW2 is in the range of 100 ns to 200 ns. The pulse width PW2 of the second laser pulse LP2 is preferably set to 1/10 or less of the pulse width PW1 of the first laser pulse LP1.

  FIG. 3B shows a plan view of a laser pulse incident region on the second surface 50B of the semiconductor substrate 50 (FIG. 2B). The first laser pulse LP1 (FIG. 3A) and the second laser pulse LP2 (FIG. 3A) are incident on the same region 40 that is long in the X direction on the second surface 50B (FIG. 2B) of the semiconductor substrate 50. For example, the preferable length L and width Wt of the beam incident region 40 are 2 mm to 4 mm and 200 μm to 400 μm, respectively.

During the annealing, the first laser pulse LP1 and the second laser pulse LP2 (FIG. 3A) are incident on the semiconductor substrate 50 at a constant repetition frequency while moving the semiconductor substrate 50 (FIG. 2B) in the Y direction. The distance that the semiconductor substrate 50 moves during one cycle of the repetition frequency of the first laser pulse LP1 and the second laser pulse LP2 is represented by Wo. The beam incident regions 40 of two first laser pulses LP1 adjacent on the time axis partially overlap each other. The overlap ratio Wo / Wt of both is, for example, 50%.

  When the incidence of the first laser pulse LP1 starts at time t1 shown in FIG. 3A, the temperature of the surface layer portion of the second surface 50B (FIG. 2B) of the semiconductor substrate 50 starts to rise. At the time t2, the temperature of the second surface 50B of the semiconductor substrate 50 has not reached the melting point (1300K-1430K) of amorphous silicon. When the second laser pulse LP2 is incident at time t2, the temperature of the surface layer portion of the second surface 50B of the semiconductor substrate 50 reaches the melting point of amorphous silicon, and the surface layer portion is melted. The melted portion reaches the bottom surface of the high concentration layer 57a (FIG. 2B).

  When the incidence of the second laser pulse LP2 is completed, the temperature of the surface layer portion of the semiconductor substrate 50 is lowered and solidified. At this time, the crystal is epitaxially grown from the single crystal low concentration layer 56a (FIG. 2B), so that the high concentration layer 57a becomes a single crystal. At the same time, the impurities implanted into the high concentration layer 57a are activated.

  Since the incidence of the first laser pulse LP1 (FIG. 3A) continues after time t3, the second substrate 50B of the semiconductor substrate 50 is heated to the deep low concentration layer 56a, and the temperature rises. Thereby, the impurity implanted in the low concentration layer 56a (FIG. 2B) is activated. When the incidence of the first laser pulse LP1 ends at time t4, the temperature of the second surface 50B of the semiconductor substrate 50 does not reach the melting point of single crystal silicon. For this reason, the surface layer portion of the second surface 50B of the recrystallized semiconductor substrate 50 is not remelted.

  In the case where the second laser pulse LP2 is incident after the time t4, the impurities in the low concentration layer 56a are activated by the irradiation with the first laser pulse LP1. Thereafter, the high concentration layer 57a (FIG. 2B) is melted by irradiation with the second laser pulse LP2. When the high concentration layer 57a is recrystallized, the impurities in the high concentration layer 57a are activated.

  In FIG. 3B, the incident region 40 of the first laser pulse LP1 and the incident region 40 of the second laser pulse LP2 on the surface of the semiconductor substrate 50 are substantially matched, but it is not always necessary to match them. As shown in FIG. 3C, the incident area 40A of the first laser pulse LP1 may be slightly larger than the incident area 40B of the second laser pulse LP2. At this time, the incident region 40B of the second laser pulse LP2 is included in the incident region 40A of the first laser pulse LP1.

  When the area of the incident area 40A of the first laser pulse LP1 and the area of the incident area 40B of the second laser pulse LP2 are made to be the same, there is almost no margin for the misalignment between the optical axes of both. Disappear. As shown in FIG. 3C, when the incident region 40A of the first laser pulse LP1 is made larger than the incident region 40B of the second laser pulse LP2, even if the optical axes of both are displaced, The incident region 40B of the second laser pulse LP2 falls inside the incident region 40A of the first laser pulse LP1. For this reason, the optical axis alignment margin (margin) can be increased.

In the region where the incident region 40A of the first laser pulse LP1 and the incident region 40B of the second laser pulse LP2 overlap, activation of impurities in the high concentration layer 57a and the low concentration layer 56a (FIG. 2B) is performed. . If the incident area 40A of the first laser pulse LP1 is made too large with respect to the incident area 40B of the second laser pulse 40B, the overlapping rate of the first laser pulse LP1 becomes too high and waste is increased. The overlapping rate of the first laser pulse LP1 is preferably 50% or more. The second laser pulse must be irradiated so that there is no gap between the incident areas of two adjacent shots on the time axis. In order to meet the above requirements and reduce unnecessary energy for irradiation, the area of the incident region 40B of the second laser pulse LP2 is set to 50% to 100% of the area of the incident region 40A of the first laser pulse LP1. % Is preferable.

FIG. 4 shows an example of the impurity concentration distribution in the depth direction of the semiconductor substrate 50. The horizontal axis of FIG. 4 represents the depth from the second surface 50B (FIG. 2B) of the semiconductor substrate 50 in the unit of “μm”. The vertical axis | shaft of FIG. 4 represents the density | concentration of the added impurity in a unit "cm ^<-3 >" on the logarithmic scale.

  The concentration of boron (B) shows a maximum value at a depth of 0.3 μm from the second surface 50B. The concentration of phosphorus (P) shows a maximum value at a depth of 1.8 μm from the second surface 50T. The tail of the phosphorus (P) concentration distribution extends from the second surface 50B to a depth of 3 μm. The depth at which the boron impurity concentration and the phosphorus impurity concentration are equal corresponds to the interface between the high concentration layer 57a and the low concentration layer 56a (FIG. 2B).

  Impurities (phosphorus) added at a relatively low concentration in a relatively deep region, for example, a region having a depth exceeding 1 μm, are activated by the first laser pulse LP1 (FIG. 3A) having a relatively long pulse width. It becomes. An impurity (boron) added at a relatively high concentration in a relatively shallow region, for example, a region having a depth of 1 μm or less, is activated by the second laser pulse LP2 (FIG. 3A) having a relatively short pulse width. It becomes. The second laser pulse LP2 melts the semiconductor substrate 50 to a position deeper than the region that is made amorphous by ion implantation at a high concentration. By irradiation with the second laser pulse LP2, the semiconductor substrate 50 in the incident region 40 (FIG. 3B) is melted. When the molten region solidifies, liquid phase epitaxial growth occurs from the single crystal region. As a result, recrystallization of the amorphous region and activation of impurities (boron) are performed.

  2A, 2B, and 4 show an example in which boron is implanted into the relatively shallow high-concentration layer 57a and phosphorus is implanted into the relatively deep low-concentration layer 56a, but other impurities are implanted. Even in the case, the same activation is performed. Further, impurities of the same conductivity type may be implanted into the high concentration layer 57a and the low concentration layer 56a. As an example, phosphorus may be implanted into both the high concentration layer 57a and the low concentration layer 56a. In this case, a high concentration n-type layer is formed in the shallow region, and a low concentration n-type layer is formed in the deep region.

  With reference to FIGS. 5 and 6, the activation of impurities in the deep low-concentration layer 56a (FIG. 2B) by irradiation with the first laser pulse LP1 (FIG. 3A) will be described.

  FIG. 5 shows a simulation result of the relationship between the arrival temperature of the silicon wafer and the pulse width when the silicon wafer is irradiated with the first laser pulse LP1. The horizontal axis represents the pulse width PW1 of the first laser pulse LP1 in the unit “μs”, and the vertical axis represents the reached temperature in the unit “K”. The wavelength of the first laser pulse LP1 was 915 nm. The irradiation condition of the first laser pulse LP1 was such that the surface temperature of the silicon wafer reached the melting point of silicon (about 1690K). Solid lines a and b in FIG. 5 indicate the reached temperatures at positions where the depth from the surface of the silicon wafer is 3 μm and 100 μm, respectively.

  It can be seen that when the pulse width is short, heat is not easily transmitted to a deep region. In order to activate the impurity at a depth of 3 μm, the pulse width is preferably set to 5 μs or more. If the pulse width is too long, the temperature of a deep region having a depth of about 100 μm, that is, the first surface 50T (FIG. 2B) on which the element structure is formed becomes high.

FIG. 6 shows the impurity concentration distribution in the depth direction and the carrier concentration distribution after annealing. The horizontal axis represents the depth from the surface of the silicon wafer in the unit “μm”, and the vertical axis represents the concentration in the unit “cm”.
^-3 ". The solid line a indicates the phosphorus concentration when phosphorus is ion-implanted under the conditions of an acceleration energy of 2 MeV and a dose of 3 × 10 ¹³ cm ⁻² . This impurity concentration distribution corresponds to the impurity concentration distribution of the low concentration layer 56a (FIG. 2B). A solid line b indicates the carrier concentration after irradiation with the first laser pulse LP1. Laser irradiation was performed under the conditions of a pulse width of 20 μs and a power density of 360 kW / cm ^{2 on} the irradiated surface. From the results shown in FIG. 6, it was confirmed that about 70% or more of the implanted impurities were activated.

  Next, with reference to FIGS. 7A to 7C, the recovery of the region made amorphous by ion implantation will be described.

FIG. 7A shows a cross-sectional TEM image of a surface layer portion of a silicon wafer into which phosphorus is ion-implanted. Phosphorus ion implantation was performed under the conditions of an acceleration energy of 100 keV and a dose of 2 × 10 ¹⁵ cm ⁻² . This ion implantation condition corresponds to the impurity ion implantation condition for the high concentration layer 57a. In FIG. 7A, the amorphous region is represented by a relatively light color.

FIG. 7B shows a cross-sectional TEM image of the surface layer portion of the silicon wafer after irradiation with the second laser pulse LP2 (FIG. 3A). As the second laser pulse LP2, the second harmonic of an Nd: YLF laser was used. The irradiation with the second laser pulse LP2 was performed by a so-called double pulse method. The pulse width of one laser pulse is 130 ns, the pulse energy density is 1.6 J / cm ² , and the delay time from irradiation of the first shot laser pulse to irradiation of the second shot laser pulse is 500 ns. In the region melted by the laser irradiation, epitaxial growth occurs from the single crystal region below the region, so that a good single crystal layer with few defects is obtained.

FIG. 7C shows a cross-sectional TEM image of the surface layer portion of the silicon wafer after irradiation with the first laser pulse LP1 (FIG. 3A). The wavelength of the first laser pulse LP1 is 808 nm. Irradiation with the first laser pulse LP1 was performed under conditions of a pulse width of 40 μs and a power density of 300 kW / cm ² . Under this irradiation condition, the surface of the silicon wafer is not melted. If the deep region of the silicon wafer (low concentration layer 56a in FIG. 2B) is melted by the laser pulse, the impurity concentration distribution of the high concentration layer 57a is destroyed. Therefore, the irradiation with the first laser pulse LP1 is performed under conditions that do not melt the silicon wafer. An annealing method that activates impurities without melting the silicon wafer is referred to as “non-melting annealing”. In contrast, an annealing method for temporarily melting a silicon wafer is referred to as “melting annealing”. In non-melting annealing, crystallization proceeds from the upper and lower surfaces of the amorphous region. A layer in an amorphous state remains substantially at the center in the thickness direction. The crystal quality of the crystallized region is also worse than the crystal quality of the recrystallized region of FIG. 7B.

  As can be seen from the cross-sectional TEM images shown in FIGS. 7A to 7C, the amorphous high-concentration layer 57a (FIG. 2B) has a relatively short pulse width and a relatively high peak power. It is preferable to activate the impurities by performing melt annealing using (FIG. 3A).

  FIG. 8A shows an example of a time waveform of a laser pulse when laser annealing is performed by the method according to the embodiment. The horizontal axis represents the elapsed time from the rise of the first laser pulse LP1 in the unit “μs”, and the vertical axis represents the light intensity. The pulse width of the first laser pulse LP1 is 15 μs. The second laser pulse LP2 rises when 14 μs has elapsed from the rise of the first laser pulse LP1. The second laser pulse LP2 is the second harmonic of the Nd: YLF laser, and its pulse width is 130 ns.

FIG. 8B shows a simulation result of the temperature change of the silicon wafer when the first and second laser pulses LP1 and LP2 of FIG. 8A are irradiated to the silicon wafer. The horizontal axis represents elapsed time in units of “μs”, and the vertical axis represents temperature in units of “K”. Solid lines a to g in FIG. 8B indicate temperatures at positions where the depth from the surface of the silicon wafer is 0 μm, 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, and 100 μm, respectively.

  When the irradiation with the first laser pulse LP1 is started, the temperature of the silicon wafer rises. When 14 μs has elapsed since the start of irradiation, the surface temperature of the silicon wafer reaches 1660 K, which is close to the melting point of silicon. At this point, the silicon wafer is not melted. When the second laser pulse LP2 is irradiated, the surface temperature of the silicon wafer reaches the melting point, and the surface layer portion melts.

  FIG. 8C shows a simulation result of the temporal change in the melting depth of the silicon wafer. The horizontal axis represents elapsed time in units of “μs”, and the vertical axis represents melting depth in units of “μm”. It can be seen that the film is melted to a depth of about 0.3 μm by the irradiation with the second laser pulse LP2. Impurities implanted in the region shallower than the depth of 0.3 μm are activated by melting and recrystallizing the surface layer portion.

  As shown in FIG. 8B, when about 14 μs has elapsed from the start of irradiation with the first laser pulse LP1, the temperature at the depth of 5 μm exceeds 1200K. For this reason, the impurities implanted in the unmelted region having a depth of about 5 μm are activated by solid phase diffusion.

FIG. 9 shows the elapsed time t2-t4 from the falling time t4 of the first laser pulse LP1 to the rising time t2 of the second laser pulse LP2, and the second laser pulse LP2 necessary for melting the silicon wafer. The relationship with the fluence of The delay time from time t4 to time t2 is expressed as td. The horizontal axis represents the delay time td in the unit “μs”. In the region where the delay time td is negative, the second laser pulse LP2 rises before the fall time t4 of the first laser pulse LP1. 9 represents the fluence of the second laser pulse LP2 in the unit “J / cm ² ”, and the right vertical axis represents the power of the second laser pulse LP2 in the unit “W”.

  A solid line a shown in FIG. 9 shows the simulation result of the fluence of the second laser pulse LP2 when the position of the silicon wafer having a depth of 0.3 μm is melted. A solid line b shows the simulation result of the fluence of the second laser pulse LP2 when the outermost surface of the silicon wafer is melted. When the delay time td changes, the increase / decrease tendency of both is substantially equal. The square symbols shown in FIG. 9 indicate actual measurement values of the power of the second laser pulse LP2 when the outermost surface of the silicon wafer is melted. Since the area and the pulse width of the incident region 40 (FIG. 3B) of the first laser pulse LP1 are constant, the fluence can be converted to a fluence by multiplying the power of the second laser pulse LP2 by a constant. As shown in FIG. 9, the simulation result is sufficiently consistent with the actual experimental result.

  The origin (td = 0) on the horizontal axis corresponds to the irradiation condition in which the second laser pulse LP2 rises simultaneously with the fall of the first laser pulse LP1.

The pulse width of the first laser pulse LP1 was 25 μs, and the power density on the silicon wafer surface was 310 kW / cm ² . The position where the delay time td is −25 μs corresponds to the irradiation condition in which the second laser pulse LP2 rises simultaneously with the rise of the first laser pulse LP1.

If the delay time td is increased from −25 μs to 0 μs (the rising time t2 of the second laser pulse LP2 is brought closer to the falling time t4 of the first laser pulse LP1), it is necessary for melting the silicon wafer. The fluence of the second laser pulse LP2 decreases. This is because the silicon wafer is preheated by the first laser pulse LP1 when the second laser pulse LP2 is incident. In the vicinity of the delay time td = 0, the fluence of the second laser pulse LP2 necessary for melting the silicon wafer shows a minimum value.

  As the delay time td increases from 0, the fluence of the second laser pulse LP2 necessary for melting the silicon wafer increases. This is because the temperature of the silicon wafer decreases (the effect of preheating is reduced) after the falling time t4 of the first laser pulse LP1.

  As can be seen from the simulation results and the experimental results shown in FIG. 9, the second timing necessary for melting the silicon wafer is adjusted by adjusting the irradiation timing of the first laser pulse LP1 and the second laser pulse LP2. The fluence of the laser pulse LP2 can be reduced. In other words, if the area of the incident region 40 (FIG. 3B) is constant, a solid laser oscillator 31 (FIG. 1) for the second laser pulse LP2 can be used. If the output of the solid-state laser oscillator 31 is constant, the area of the incident region 40 can be increased.

  The effects of the activation method according to the embodiment will be described with reference to FIGS. An evaluation experiment was conducted in which phosphorus (P) was implanted as an impurity into a silicon wafer, and activation annealing was performed by the method according to the example.

10 and 11 show the measurement results of the impurity concentration distribution before the activation annealing and the carrier concentration distribution after the activation annealing. The horizontal axis represents depth in units of “μm”, and the vertical axis represents concentration in units of “cm ⁻³ ”. The broken lines in FIGS. 10 and 11 show the impurity concentration distribution before the activation annealing. A single crystal silicon substrate was used as the semiconductor substrate, and the implanted impurity was phosphorus (P). The impurity concentration shows maximum values at the depths of 0.2 μm and 1.8 μm. A shallow region from the surface to a depth of 0.3 μm corresponds to the high concentration layer 57a (FIG. 2B), and a deep region from the depth of 0.3 μm to about 4 μm corresponds to the low concentration layer 56a (FIG. 2B). . In the evaluation experiment, phosphorus was used as an impurity for both the shallow high-concentration layer 57a and the deep low-concentration layer 56a. However, p-type and n-type impurities were used for the high-concentration layer 57a and the low-concentration layer 56a, respectively. However, the activation rate by the activation annealing shows almost the same tendency as the result of the evaluation experiment.

In the evaluation experiment, the pulse width of the first laser pulse LP1 was 25 μs and the power density was 310 kW / cm ² . The pulse width of the second laser pulse LP2 was set to 0.15 μs . The fluence of the second laser pulse LP2 was set such that the melting depth shown in FIG. 9 was 0.3 μm.

  FIG. 10 shows the result of activation annealing performed under the condition that the second laser pulse LP2 rises simultaneously with the fall time t4 of the first laser pulse LP1 or after the time t4. The delay time td from the falling time t4 of the first laser pulse LP1 to the rising time t2 of the second laser pulse LP2 was set to 0 μs, 2 μs, 5 μs, and 10 μs.

  FIG. 11 shows the result of activation annealing performed under the condition that the second laser pulse LP2 rises before the fall time t4 of the first laser pulse LP1. The delay time td from the falling time t4 of the first laser pulse LP1 to the rising time t2 of the second laser pulse LP2 becomes negative. Delay times td from the falling time t4 of the first laser pulse LP1 to the rising time t2 of the second laser pulse LP2 were set to −3 μs, −8 μs, −13 μs, and −18 μs.

  As shown in FIGS. 10 and 11, the shallow region (the region corresponding to the high concentration layer 57 a) and the deep region (the region corresponding to the low concentration layer 56 a) within the delay time td of −18 μs to 10 μs. In any case, it can be seen that sufficient activation is performed. In the region shallower than the depth of 0.3 μm, the high-concentration layer 57a is once melted by irradiation with the second laser pulse LP2, and then the impurities are activated when solidified.

  The pulse width of the microsecond order of the first laser pulse LP1 is significantly shorter than the annealing time in the electric furnace. For this reason, in order to perform sufficient activation, a high temperature is required compared with annealing by an electric furnace. When the temperature of silicon exceeds about 1200 K, the activation of impurities begins to occur even with a pulse width (heating time) on the order of microseconds. As in the simulation result shown in FIG. 8B, when the temperature of the region having a depth of 1 μm to 5 μm exceeds 1200 K by irradiation with the first laser pulse LP1, the depth is increased by irradiation with the first laser pulse LP1. Activation of deep regions up to 5 μm is performed. From the results of the evaluation experiments shown in FIGS. 10 and 11, it was confirmed that the impurities were activated by the irradiation with the first laser pulse LP1 in the region up to about 4 μm deeper than 0.3 μm.

  When the pulse width of the first laser pulse LP1 is increased, the region reaching the temperature 1200K becomes deeper. Therefore, when it is desired to activate the impurity to a deeper region, the pulse width of the first laser pulse LP1 may be increased. The pulse width of the first laser pulse LP1 is determined by the target depth to be activated. In order to activate the deep region, it is preferable to reduce the power density so that the surface of the semiconductor substrate does not melt when the pulse width of the first laser pulse LP1 is increased. Next, the reason why it is not preferable to melt the surface of the semiconductor substrate with the first laser pulse LP1 will be described.

  In the case where the surface layer portion of the semiconductor substrate is melted by irradiation with the second laser pulse LP2 having a short pulse width, the temperature of the surface layer portion of the semiconductor substrate rapidly rises, so that the laser pulse incident region is almost the entire region. At the same time, melting begins. When the first laser pulse LP1 having a long pulse width is irradiated, the substrate temperature gradually rises as shown in FIG. 8B. If there is a variation in temperature in the incident region 40 (FIG. 3B), a molten region and a non-molten region are mixed in the incident region 40. When the melted region and the unmelted region coexist, unevenness occurs on the surface of the semiconductor substrate after solidification. In order to keep the crystal quality of the surface layer portion of the semiconductor substrate high, it is preferable that the irradiation condition of the first laser pulse LP1 is a condition that does not melt the surface of the semiconductor substrate.

  Next, the incident timing of the first laser pulse LP1 and the second laser pulse LP2 when activation annealing is performed on the shallow high-concentration layer 57a (FIG. 2B) and the deep low-concentration layer 56a (FIG. 2B). The preferable conditions of will be described. As shown in FIGS. 10 and 11, it was confirmed that when the pulse width of the first laser pulse LP1 is 25 μs, sufficient activation can be performed within the range of the delay time td of −18 μs to 10 μs.

  When the pulse width of the first laser pulse LP1 is represented by PW1, the falling time of the first laser pulse is represented by t4, and the rising time of the second laser pulse is represented by t2, −0.7 × PW1 ≦ It was confirmed by an evaluation experiment that good activation is performed within the range of t2−t4 ≦ 0.4 × PW1. Even if the pulse width of the first laser pulse LP1 changes, the change in the substrate temperature during the period from the rise to the fall of the first laser pulse LP1 shows the same tendency. Therefore, when the second laser pulse LP2 rises at time t2 before the fall time t4 of the first laser pulse LP1, even if the pulse width of the first laser pulse LP1 changes, −0.7 × PW1 ≦ It is considered that good activation annealing can be performed within the range of t2−t4 ≦ 0.

  When the second laser pulse LP2 rises at time t2 after the fall time t4 of the first laser pulse LP1, good recrystallization and activation can be achieved by adjusting the fluence of the second laser pulse LP2. Is possible. However, as shown in FIG. 9, when the delay time td = t2-t4 becomes longer, the fluence of the second laser pulse LP2 has to be increased. Further, if the delay time td becomes too long, the moving distance of the semiconductor substrate from the falling time t4 of the first laser pulse LP1 to the rising time t2 of the second laser pulse LP2 cannot be ignored. That is, the incident region 40B of the second laser pulse LP2 is displaced in the Y direction with respect to the incident region 40A of the first laser pulse LP1 shown in FIG. 3C. In order to make the first laser pulse LP1 and the second laser pulse LP2 enter substantially the same region, the delay time td = t2-t4 is 1 of the repetition period of the pulse of the first laser pulse LP1. / 10 or less is preferable. That is, when the repetition period of the first laser pulse LP1 is represented by T, it is preferable to satisfy t2−t4 ≦ T / 10.

  FIG. 12A shows an example of a scanning path when the entire surface of the semiconductor substrate (silicon wafer) 50 is annealed with the first laser pulse LP1 and the second laser pulse LP2. As shown in FIG. 1, the stage 41 is moved while the path of the laser beam is fixed and the first laser pulse LP 1 and the second laser pulse LP 2 are periodically incident on the semiconductor substrate 50. As a result, the surface of the semiconductor substrate 50 is scanned with the first laser pulse LP1 and the second laser pulse LP2. The main scanning direction is the Y direction, and the sub scanning direction is the X direction. In the Y direction (main scanning direction), reciprocal scanning is performed.

  With reference to FIG. 12B and FIG. 12C, the annealing method by a comparative example is demonstrated. In the comparative example, a continuous wave (CW) laser beam is used as the first laser beam for activating the deep region, and a pulse laser beam is used as the second laser beam for activating the shallow region. Use.

  FIG. 12B shows the positional relationship between the first incident region 60A of the first laser beam and the second incident region 60B of the second laser beam. Both have a long shape that is long in the X direction. The second incident area 60B is included inside the first incident area 60A. While maintaining this positional relationship, the first incident region 60A and the second incident region 60B are scanned in the negative direction of the Y axis. When attention is paid to one point on the surface of the semiconductor substrate 50, the rear edge (left edge in FIG. 12B) passes from the time when the front edge (right edge in FIG. 12B) of the first incident region 60A passes. The first laser beam is irradiated until the point of time. The second laser beam is irradiated from the rising point to the falling point.

  When attention is paid to one point on the surface of the semiconductor substrate 50, the elapsed time from the incident time t10 of the first laser beam to the incident time t11 of the second laser beam depends on the first incident region 60A and the second incident. It depends on the positional relationship with the region 60B. More specifically, this depends on the distance between the right edge of the first incident area 60A and the edge of the second incident area 60B and the scanning speed.

  FIG. 12C shows the positional relationship between the first incident region 60A and the second incident region 60B when the first incident region 60A and the second incident region 60B are scanned in the positive direction of the Y axis, and the semiconductor. The irradiation timing of the laser beam irradiated to one point on the surface of the substrate 50 is shown. The elapsed time from the incident time t10 of the first laser beam to the incident time t11 of the second laser beam is the distance between the left edge of the first incident region 60A and the edge of the second incident region 60B. Depends on the scanning speed.

As shown in FIGS. 12B and 12C, the second laser beam is incident from the time t10 when the first laser beam is incident, when scanning in the negative direction of the Y axis and when scanning in the positive direction. The elapsed time up to time t11 is not the same. On the other hand, in the embodiment, the elapsed time from the incident time of the first laser pulse LP1 to the incident time of the second laser pulse LP2 is independent of the relative positional relationship between the incident areas of the two laser pulses, This coincides with the rise time interval of the first laser pulse LP1 and the second laser pulse LP2. For this reason, the time elapsed from the incident time of the first laser pulse LP1 to the incident time of the second laser pulse LP2 is the same regardless of whether the scanning is in the positive or negative direction of the Y axis. Therefore, it is possible to perform reciprocal scanning in the Y direction. By performing reciprocal scanning, the annealing time can be shortened. Further, it is not necessary to adjust the relative positional relationship of the path between the first laser pulse LP1 and the second laser pulse LP2 between the forward path and the return path. This eliminates the need for a complicated optical system adjustment mechanism.

  In the above embodiment, if the wavelength of the first laser pulse LP1 is made too short, the laser energy is absorbed in the extremely shallow region of the silicon wafer, and it becomes difficult to efficiently heat the deep region. Conversely, if the wavelength of the first laser pulse LP1 is too long, the laser energy will not be absorbed by the silicon wafer. In order to efficiently heat the low-concentration layer 56a (FIG. 2B) of the silicon wafer with the first laser pulse LP1, the wavelength is preferably set to 550 nm or more and 950 nm or less.

  Light having a wavelength of 550 nm penetrates to a depth of about 1 μm in the silicon substrate. For this reason, when the wavelength of the first laser pulse LP1 is 550 nm, the region up to a depth of 1 μm can be efficiently heated. A region deeper than 1 μm deep is heated by heat conduction. When the wavelength of the first laser pulse LP1 is set to 650 nm, a region up to about 3 μm in depth can be efficiently heated. When the wavelength of the first laser pulse LP1 is set to 700 nm, the region up to about 5 μm in depth can be efficiently heated. When the thickness of the silicon substrate is 100 μm, when the wavelength of the first laser pulse LP1 is longer than 950 nm, the laser energy that passes through the silicon substrate increases.

  In order to activate the impurities in the deep low concentration layer 56a (FIG. 2B), the light penetration length of the first laser pulse LP1 into the semiconductor substrate 50 is changed from the second surface 50B of the semiconductor substrate 50 to the low concentration layer 56a. It is preferable to make it longer than the depth to the bottom surface. Further, in order to reduce useless light energy that passes through the semiconductor substrate 50, it is preferable that the light penetration length of the first laser pulse LP <b> 1 is shorter than the thickness of the semiconductor substrate 50. The wavelength of the first laser pulse LP1 is selected so as to satisfy the light penetration length. Here, the “light penetration length” means a distance at which the light intensity is attenuated to 1 / e.

  The irradiation conditions of the first laser pulse LP1, specifically, the pulse width and power density are preferably set such that the surface of the semiconductor substrate does not melt and the activation of impurities in the low concentration layer 56a starts. Specifically, it is preferable that the temperature of the bottom surface of the low-concentration layer 56a exceeds 1200K.

  The second laser pulse LP2 preferably includes a green wavelength component that is easily absorbed by silicon in order to efficiently melt the high-concentration layer 57a (FIG. 2B) of the silicon wafer. Note that due to the effect of preheating the first laser pulse LP1, light having a wavelength longer than that of green is easily absorbed by silicon. Therefore, the wavelength of the second laser pulse LP2 may be an infrared region having a wavelength of about 1 μm. Since light having a wavelength in the infrared region penetrates into a deep region of the silicon substrate, the light is melted to a deeper region than when light in the green wavelength region is used as the second laser pulse LP2.

In the above embodiment, the manufacture of the IGBT is taken as an example. However, the method according to the above embodiment activates impurities in the surface layer portion of one surface of the semiconductor substrate and suppresses the temperature increase on the opposite surface. It is possible to apply to the manufacture of a semiconductor device for which the above is desired.

  Although the present invention has been described with reference to the embodiments, the present invention is not limited thereto. It will be apparent to those skilled in the art that various modifications, improvements, combinations, and the like can be made.

20 Control Device 21 Semiconductor Laser Oscillator 22 Attenuator 23 Beam Expander 24 Homogenizer 25 Dichroic Mirror 26 Condensing Lens 27 Propagation Optical System 31 Solid State Laser Oscillator 32 Attenuator 33 Beam Expander 34 Homogenizer 35 Bending Mirror 40 Laser Pulse Incidence Area 40A First Laser pulse incident region 40B Second laser pulse incident region 41 Stage 50 Semiconductor substrate 50T First surface 50B Second surface 51 p-type base region 52 n-type emitter region 53 Gate electrode 54 Gate insulating film 55 Emitter electrode 56 Low-concentration n-type buffer layer 56a Low-concentration layer 57 p-type collector layer 57a High-concentration layer 58 Collector electrode 60A First incident region 60B Second incident region

Claims (6)

A first layer doped with the first impurity in the surface layer portion, and a second impurity doped in a region deeper than the first layer at a concentration lower than the impurity concentration of the first layer. The second layer without melting the surface layer portion by causing a first laser pulse having a pulse width of 10 μs to 30 μs to enter the surface layer portion of the semiconductor substrate including the second layer. Activating the second impurity of
A second laser pulse shorter than the pulse width of the first laser pulse is incident on the surface layer portion of the semiconductor substrate to melt the first layer, and the second layer is not melted. And activating the first impurity of the first layer,
The incident region of the second laser pulse is disposed inside the incident region of the first laser pulse, and the area of the incident region of the second laser pulse is 50% of the area of the incident region of the first laser pulse. A method for manufacturing a semiconductor device within a range of ˜100%. The light source of the first laser pulse is a semiconductor laser oscillator, and the light source of the second laser pulse is a solid-state laser oscillator;
The pulse width of the first laser pulse is PW1, the fall time of the first laser pulse is t4, the rise time of the second laser pulse is t2, and the repetition period of the first laser pulse is T. When
−0.7 × PW1 ≦ t2−t4 ≦ T / 10
The method of manufacturing a semiconductor device according to claim 1, wherein the first laser pulse and the second laser pulse are incident on the semiconductor substrate at a timing satisfying   The method for manufacturing a semiconductor device according to claim 1, wherein an incident region of the first laser pulse and an incident region of the second laser pulse substantially coincide with each other. Causing the first laser pulse and the second laser pulse to periodically enter the surface layer portion of the semiconductor substrate while moving the semiconductor substrate in a first direction parallel to the surface thereof; ,
Causing the first laser pulse and the second laser pulse to periodically enter the surface layer portion of the semiconductor substrate while moving the semiconductor substrate in a direction opposite to the first direction; The manufacturing method of the semiconductor device of any one of Claims 1 thru | or 3 containing these.   The wavelength of the first laser pulse is selected such that the light penetration length into the semiconductor substrate is longer than the depth from the surface of the semiconductor substrate to the bottom surface of the second layer. 5. The method for manufacturing a semiconductor device according to claim 4. 6. The semiconductor device according to claim 1, wherein the wavelength of the first laser pulse is selected such that a light penetration length into the semiconductor substrate is shorter than a thickness of the semiconductor substrate. Manufacturing method.