JP5989758B2 - シンプルペリフェラルバスを利用するシステム及び方法 - Google Patents
シンプルペリフェラルバスを利用するシステム及び方法 Download PDFInfo
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- JP5989758B2 JP5989758B2 JP2014501133A JP2014501133A JP5989758B2 JP 5989758 B2 JP5989758 B2 JP 5989758B2 JP 2014501133 A JP2014501133 A JP 2014501133A JP 2014501133 A JP2014501133 A JP 2014501133A JP 5989758 B2 JP5989758 B2 JP 5989758B2
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- 230000002093 peripheral effect Effects 0.000 title claims description 241
- 238000000034 method Methods 0.000 title claims description 35
- 230000006854 communication Effects 0.000 claims description 50
- 238000004891 communication Methods 0.000 claims description 50
- 230000006870 function Effects 0.000 claims description 38
- 230000007175 bidirectional communication Effects 0.000 claims 1
- 238000004590 computer program Methods 0.000 claims 1
- 230000015654 memory Effects 0.000 description 11
- 238000012545 processing Methods 0.000 description 4
- 230000001413 cellular effect Effects 0.000 description 2
- 238000013500 data storage Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/102—Program control for peripheral devices where the programme performs an interfacing function, e.g. device driver
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
- G06F15/8015—One dimensional arrays, e.g. rings, linear arrays, buses
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40032—Details regarding a bus interface enhancer
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- Computer Hardware Design (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computing Systems (AREA)
- Information Transfer Systems (AREA)
- User Interface Of Digital Computer (AREA)
- Bus Control (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
Description
通信システム内の要素同士の間でデータ通信を行うように形成されたシンプルペリフェラルバス(SPB)と、
HID-SPBインタフェースと共に実現されたペリフェラルセンサであって、前記ペリフェラルセンサの各々は、ペリフェラル装置とコンピュータ装置との間で、HIDデータフォーマットによる前記シンプルペリフェラルバスを介したインタフェースとして機能するように形成されている、ペリフェラルセンサと
を有するシステムである。
この「実施の形態の概要」の欄は、シンプルペリフェラルバスを介するヒューマンインタフェースデバイス(Human Interface Device:HID)の簡易な概念を提供し、その概念は以下の詳細な説明により及び/又は添付図面を参照しながら更に説明される。この「実施の形態の概要」の欄は、請求項に記載された事項の本質的特徴を説明しているように解釈すべきでなく、請求項に記載された事項の範囲を決定するためにも限定するためにも使用すべきでない。
以下、シンプルペリフェラルバスを介したHIDの実施の形態を添付図面を参照しながら説明する。図中、図示されている同様な特徴及び要素を示すために同じ番号が使用されているかもしれない。
Claims (10)
- コンピュータシステム内の要素同士の間でデータ通信を行う集積回路間(I2C)データバスとして形成されたシンプルペリフェラルバス(SPB)と、
HID-SPBインタフェースと共に実現されたペリフェラルセンサであって、前記ペリフェラルセンサの各々は、前記シンプルペリフェラルバスを介して、HIDデータフォーマットでのペリフェラル装置と前記コンピュータシステムとの間のインタフェースを為すように形成される、ペリフェラルセンサと
を有するシステム。 - 前記ペリフェラルセンサが、前記コンピュータシステム内の前記ペリフェラル装置の独自機能についての拡張データを前記シンプルペリフェラルバスを介して通信するように更に形成されている、請求項1に記載のシステム。
- 前記ペリフェラルセンサが、前記コンピュータシステムに対して前記ペリフェラル装置はHID対応装置であることを示し、かつ前記ペリフェラル装置のコンフィギュレーションを決定するように更に形成されている、請求項1に記載のシステム。
- 前記ペリフェラルセンサが、HIDレポートプロトコルを用いて、前記ペリフェラル装置から前記コンピュータシステムへ及び前記コンピュータシステムから前記ペリフェラル装置への双方向通信を行うように更に形成されている、請求項1に記載のシステム。
- 前記ペリフェラルセンサがHIDデータ構造としてデータをシンプルペリフェラルバスを介して通信するように更に形成されている、請求項1に記載のシステム。
- ペリフェラルセンサとHIDソフトウェアスタックとの間でHIDデータを通信するように形成されたSPBドライバを更に有する請求項1に記載のシステム。
- コンピュータにより実行される方法であって、
ペリフェラルセンサが、ペリフェラル装置から入力を受信するステップであって、前記ペリフェラルセンサは、HID-SPBインタフェースを実現し、集積回路間(I2C)データバスとして形成されたシンプルペリフェラルバス(SPB)を介して、HIDデータフォーマットでの前記ペリフェラル装置とコンピュータシステムとの間のインタフェースを為す、ステップと、
前記ペリフェラルセンサが、前記ペリフェラル装置の独自機能についての拡張データを受信するステップと、
前記コンピュータシステムにおいて、前記ペリフェラル装置からの前記入力と前記拡張データとを前記HIDデータフォーマットで前記シンプルペリフェラルバスを介して通信するステップと
を有する方法。 - 前記コンピュータシステムに対して前記ペリフェラル装置がHID対応装置であることを通知するステップを更に有する請求項7に記載の方法。
- 前記ペリフェラル装置のコンフィギュレーションを決定するステップを更に有する請求項8に記載の方法。
- 請求項7ないし9のうち何れか1項に記載の方法を前記コンピュータに実行させるコンピュータプログラム。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/053,104 | 2011-03-21 | ||
US13/053,104 US8521942B2 (en) | 2011-03-21 | 2011-03-21 | HID over simple peripheral buses |
PCT/US2012/028666 WO2012128977A2 (en) | 2011-03-21 | 2012-03-11 | Hid over simple peripheral buses |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2014514640A JP2014514640A (ja) | 2014-06-19 |
JP5989758B2 true JP5989758B2 (ja) | 2016-09-07 |
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JP2014501133A Expired - Fee Related JP5989758B2 (ja) | 2011-03-21 | 2012-03-11 | シンプルペリフェラルバスを利用するシステム及び方法 |
Country Status (11)
Country | Link |
---|---|
US (2) | US8521942B2 (ja) |
EP (1) | EP2689337A4 (ja) |
JP (1) | JP5989758B2 (ja) |
KR (1) | KR20140020925A (ja) |
CN (1) | CN102707792B (ja) |
AU (1) | AU2012231346B2 (ja) |
BR (1) | BR112013024141A2 (ja) |
CA (1) | CA2830475A1 (ja) |
MX (1) | MX2013010825A (ja) |
RU (1) | RU2599543C2 (ja) |
WO (1) | WO2012128977A2 (ja) |
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US20130332643A1 (en) | 2013-12-12 |
CA2830475A1 (en) | 2012-09-27 |
EP2689337A4 (en) | 2014-08-20 |
MX2013010825A (es) | 2013-10-17 |
CN102707792A (zh) | 2012-10-03 |
RU2599543C2 (ru) | 2016-10-10 |
US8738835B2 (en) | 2014-05-27 |
US8521942B2 (en) | 2013-08-27 |
JP2014514640A (ja) | 2014-06-19 |
EP2689337A2 (en) | 2014-01-29 |
AU2012231346A1 (en) | 2013-09-12 |
WO2012128977A3 (en) | 2012-12-27 |
WO2012128977A2 (en) | 2012-09-27 |
KR20140020925A (ko) | 2014-02-19 |
AU2012231346B2 (en) | 2015-05-14 |
BR112013024141A2 (pt) | 2016-12-20 |
CN102707792B (zh) | 2016-08-24 |
RU2013143012A (ru) | 2015-03-27 |
US20120246377A1 (en) | 2012-09-27 |
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