JP5981786B2 - 集積回路チップ上にセンサを垂直に積み重ねるためのシステムおよび方法 - Google Patents

集積回路チップ上にセンサを垂直に積み重ねるためのシステムおよび方法 Download PDF

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JP5981786B2
JP5981786B2 JP2012145725A JP2012145725A JP5981786B2 JP 5981786 B2 JP5981786 B2 JP 5981786B2 JP 2012145725 A JP2012145725 A JP 2012145725A JP 2012145725 A JP2012145725 A JP 2012145725A JP 5981786 B2 JP5981786 B2 JP 5981786B2
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circuit board
printed circuit
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sensor
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チア−ミーン・リウ
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Honeywell International Inc
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Description

[0001]従来の手法は、プリント回路板(PCB)において、加速度計またはジャイロスコープなどの微小電気機械システム(MEMS)センサが配置される側と反対側に特定用途向け集積回路(アナログASIC)チップを配置するものであった。アナログASICチップは、MEMSセンサの温度を検知するように設計された温度センサを含むが、この手法では、MEMSセンサによって生成された熱がPCBを通って伝えられる必要があるので、検知される温度値が大幅に損失される。したがって、検知されるMEMセンサ温度の精度が大幅に低下される。
[0002]Acarに対する米国特許出願公開第2009/0282917号は、マルチアクセスの角速度センサおよび加速度センサを有する一体型の微細機械加工された慣性検知装置を提供する。Acarは、図1〜図3に示されるように、ASICチップの上部に1つまたは複数のセンサを配置することを開示する。しかし、Acarは、センサとASICチップの間に適切な熱伝導もたらすことには無関心である。Acarは、センサが金属バイアを介してASICチップに電気的に取り付けられることを示す。このASICチップは、センサによって生成された信号を受け取って増幅/処理するためのパターンおよび信号調整回路を含む。センサとASICチップの間に物理的間隙があると思われるので、センサとASICチップの間の熱伝導性能は、センサがPCBの1つの側に配置されてASICチップがPCBの反対側に配置される設計より劣るはずである。
米国特許出願公開第2009/0282917号
[0003]本発明は、サイズが縮小され、熱検知性能が改善された検知装置パッケージを提供する。例示的パッケージは、複数のパターン、アナログの特定用途向け集積回路(アナログASIC)チップ、および微小電気機械システム(MEMS)のダイ上に形成された微細機械加工されたセンサを有するプリント回路板を含む。アナログASICチップは、プリント回路板に電気的かつ機械的に取り付けられる。MEMSのダイは、プリント回路板のパターンの一部分とのみ直接的に電気通信し、アナログASICチップに機械的かつ熱的に直接取り付けられる。
[0004]本発明の一態様では、センサは、加速度計または角速度センサのうち少なくとも1つを含む。
[0005]本発明の別の態様では、MEMSのダイは、無鉛のチップキャリアパッケージまたはウェーハレベルのチップスケールパッケージ(WLCSP)である。
[0006]本発明のさらに別の態様では、MEMSのダイとアナログASICチップの間に、熱伝導性の化合物/エポキシ樹脂が配置される。
[0007]本発明のさらに別の態様では、1つまたは複数のはんだボールが、アナログASICチップをプリント回路板に電気的に取り付け、1つまたは複数のはんだパターンが、MEMSのダイをプリント回路板に電気的に取り付ける。
[0008]本発明の好ましい実施形態および代替実施形態が、以下の図面を参照しながら下記で詳細に説明される。
[0009]本発明の一実施形態によって形成されたセンサパッケージの側断面図である。 [0010]図1に示されたセンサパッケージの斜視図である。 [0011]図1に示されたパッケージで使用されるアナログASICチップの概略ブロック図である。 [0012]本発明の一実施形態によって形成された3軸加速度計またはジャイロスコープの概略上面図である。
[0013]図1−1および図1−2は、本発明の一実施形態によって形成されたパッケージ20を示す。パッケージ20は、プリント回路板(PCB)24に実装されたアナログの特定用途向け集積回路(アナログASIC)チップ26に実装されたセンサ28を含む。
[0014]アナログASICチップ26は、1つまたは複数のはんだボール32を使用してPCB 24に電気的に取り付けられる。PCB 24は、はんだボールを受け取るように前もってパターニングされた回路を含み、それによってアナログASICチップ26内の構成要素とPCB 24上の回路の間の電気的接続を作製する。
[0015]一実施形態では、アナログASICチップ26とPCB 24の間のコーナーに、非導電性エポキシ樹脂34が注射器で注入される。アナログASICチップ26の下の領域は、毛管作用によって充填される。アナログASICチップ26がPCB 24に取り付けられた後に、アナログASICチップ26の上側に、Master Bond EP30LTE−LOまたは熱的化合物などの熱伝導性で熱膨張率(CTE)の低いエポキシ樹脂36が塗布される。次いで、アナログASICチップ26の上部にセンサ28が置かれ、エポキシ硬化の段階中に摩滅予防先端を有する金属クリップを用いて適当な場所に固定される。センサ28は、無鉛のチップキャリア(LCC)パッケージまたはウェーハレベルのチップスケールパッケージ(WLCSP)など、複数の別々の方法で前もってパッケージ化されていてよい。
[0016]次いで、センサ28は、PCB 24の表面に配置された電気的パッドまたはパターンに電気的に接続される。一実施形態では、センサ28をPCB 24に電気的に接続するのに、1つまたは複数のはんだリード38が使用される。一実施形態では、センサ28をPCB 24に電気的に接続するのにワイヤボンディングが用いられ得る。
[0017]図2は、図1に示されたアナログASICチップ26のブロック図を示す。アナログASICチップ26は、プロセッサ40、温度センサ42、メモリデバイス44、および通信デバイス46を含む。プロセッサ40は、温度センサ42、メモリ44、および通信デバイス46と信号通信する。通信デバイス46が、PCB 24上の回路パターン、はんだリード38、およびはんだボール32を介して、取り付けられたセンサ28とデジタルASIC(図示せず)の間を行き来する信号を受け取る。温度センサ42は、熱伝導性の化合物/エポキシ樹脂36を介してセンサ28の温度を検知する。
[0018]図3は、センサパッケージ100の上面図を示す。センサパッケージ100は、PCB 102、図1に示されたものに類似の3つのセンサ/アナログASICチップのパッケージ120、デジタルASIC 122、およびコネクタデバイス104を含む。デジタルASIC 122は、PCB 102上の回路パターンを介してセンサパッケージ100(すなわちパッケージ120のすべて)につながる。コネクタデバイス104により、デジタルASIC 122は、データの処理および管理のための中央処理装置(CPU)を有するマイクロボードなどの外部構成要素に電気的に接続することが可能になる。PCB 102は、センサのアナログASICチップパッケージ120と、デジタルASIC 122と、コネクタデバイス104との間のパターンを含む。
[0019]排他的な所有権または特権が主張される本発明の実施形態が、特許請求の範囲に記載のように定義される。
20 パッケージ
24 プリント回路板(PCB)
26 ASICチップ
28 センサ
32 はんだボール
34 非導電性エポキシ樹脂
36 エポキシ樹脂
38 はんだリード
40 プロセッサ
42 温度センサ
44 メモリデバイス
46 通信デバイス
100 センサパッケージ
102 PCB
104 コネクタデバイス
120 パッケージ
122 デジタルASIC

Claims (3)

  1. 検知装置であって、
    複数のパターンを備えるプリント回路板と
    前記プリント回路板に電気的かつ機械的に取り付けられた特定用途向け集積回路(ASIC)チップと
    微小電気機械システム(MEMS)のダイ上に形成された微細機械加工されたセンサであって、前記プリント回路板の前記複数のパターンの一部分のみと直接的に電気通信し、前記ASICチップに対して機械的かつ熱的に直接取り付けられる、センサと
    前記ASICチップ及び前記プリント回路板に結合される非導電性エポキシ樹脂と、
    1つまたは複数のはんだボールであって、前記ASICチップが前記1つまたは複数のはんだボールを使用して前記プリント回路板に電気的に取り付けられ、前記非導電性エポキシ樹脂が囲む前記1つまたは複数のはんだボールと、
    前記MEMSのダイを前記プリント回路板の1又は複数のパッドまたはパターンに電気的に取り付けるように構成された1又は複数のはんだリードまたはワイヤボンディングと、
    を備える、
    検知装置。
  2. 請求項1に記載の検知装置において、前記MEMSのダイが、無鉛のチップキャリア(LCC)パッケージまたはウェーハレベルのチップスケールパッケージ(WLCSP)を備え、前記検知装置がさらに、
    前記MEMSのダイと前記ASICチップの間に配置された熱伝導化合物を備える検知装置。
  3. 非導電性エポキシ樹脂によって囲まれるはんだボールを使用して、プリント回路板に特定用途向け集積回路(ASIC)チップを電気的かつ機械的に直接取り付けるステップと、
    微小電気機械システム(MEMS)のダイ上に形成された微細機械加工されたセンサを、前記ASICチップに対して機械的かつ熱的にのみ取り付けるステップと、
    前記MEMSのダイの前記ASICに最も近い側と前記プリント回路板とから延びる1または複数のはんだリードまたはワイヤボンディングを使用して、前記センサを、前記プリント回路板上に配置された電気的パターンまたはパッドの一部分にのみ電気的に直接取り付けるステップと
    を含み、前記ASICチップを取り付けるステップは、前記ASICチップが前記プリント回路板に取り付けられた後、非導電性エポキシ樹脂を注入することを含む、方法。
JP2012145725A 2011-06-29 2012-06-28 集積回路チップ上にセンサを垂直に積み重ねるためのシステムおよび方法 Expired - Fee Related JP5981786B2 (ja)

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