JP5929485B2 - 制御装置、記憶装置、データ書込方法 - Google Patents

制御装置、記憶装置、データ書込方法 Download PDF

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JP5929485B2
JP5929485B2 JP2012106830A JP2012106830A JP5929485B2 JP 5929485 B2 JP5929485 B2 JP 5929485B2 JP 2012106830 A JP2012106830 A JP 2012106830A JP 2012106830 A JP2012106830 A JP 2012106830A JP 5929485 B2 JP5929485 B2 JP 5929485B2
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data
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writing
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Japanese (ja)
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JP2013235630A (ja
JP2013235630A5 (https=
Inventor
裕也 石川
裕也 石川
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Sony Corp
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Sony Corp
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Priority to JP2012106830A priority Critical patent/JP5929485B2/ja
Priority to TW102108719A priority patent/TW201401048A/zh
Priority to US13/870,722 priority patent/US9454475B2/en
Priority to KR1020130046708A priority patent/KR20130125303A/ko
Priority to CN2013101571119A priority patent/CN103389881A/zh
Publication of JP2013235630A publication Critical patent/JP2013235630A/ja
Publication of JP2013235630A5 publication Critical patent/JP2013235630A5/ja
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/26Sensing or reading circuits; Data output circuits
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7202Allocation control and policies
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7207Details relating to flash memory management management of metadata or control data

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
JP2012106830A 2012-05-08 2012-05-08 制御装置、記憶装置、データ書込方法 Expired - Fee Related JP5929485B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2012106830A JP5929485B2 (ja) 2012-05-08 2012-05-08 制御装置、記憶装置、データ書込方法
TW102108719A TW201401048A (zh) 2012-05-08 2013-03-12 控制裝置、記憶裝置及資料寫入方法
US13/870,722 US9454475B2 (en) 2012-05-08 2013-04-25 Control device, storage device, and data writing method
KR1020130046708A KR20130125303A (ko) 2012-05-08 2013-04-26 제어 장치, 기억 장치, 데이터 기입 방법
CN2013101571119A CN103389881A (zh) 2012-05-08 2013-04-28 控制装置、存储装置以及数据写入方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012106830A JP5929485B2 (ja) 2012-05-08 2012-05-08 制御装置、記憶装置、データ書込方法

Publications (3)

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JP2013235630A JP2013235630A (ja) 2013-11-21
JP2013235630A5 JP2013235630A5 (https=) 2015-03-19
JP5929485B2 true JP5929485B2 (ja) 2016-06-08

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JP2012106830A Expired - Fee Related JP5929485B2 (ja) 2012-05-08 2012-05-08 制御装置、記憶装置、データ書込方法

Country Status (5)

Country Link
US (1) US9454475B2 (https=)
JP (1) JP5929485B2 (https=)
KR (1) KR20130125303A (https=)
CN (1) CN103389881A (https=)
TW (1) TW201401048A (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103729303B (zh) * 2014-01-20 2017-03-29 飞天诚信科技股份有限公司 一种Flash的数据写入和读取方法
TWI545571B (zh) * 2014-02-18 2016-08-11 慧榮科技股份有限公司 存取快閃記憶體的方法及相關的控制器與記憶裝置
US9529668B2 (en) 2014-09-26 2016-12-27 Intel Corporation Method and system for using NAND page buffers to improve the transfer buffer utilization of a solid state drive
US10489241B2 (en) * 2015-12-30 2019-11-26 Arteris, Inc. Control and address redundancy in storage buffer
CN107092560B (zh) * 2016-02-17 2020-06-16 建兴储存科技(广州)有限公司 固态储存装置及运用于其中的快闪转换层对应表重建方法
CN109086006B (zh) * 2018-07-24 2021-10-15 浪潮电子信息产业股份有限公司 一种数据读取的方法以及相关装置
CN109189348B (zh) * 2018-10-08 2020-07-24 华中科技大学 基于电荷捕获型3d tlc闪存的存储系统的读性能优化方法
CN110471863A (zh) * 2019-08-13 2019-11-19 深圳忆联信息系统有限公司 基于固态硬盘的数据写入读取方法、装置和计算机设备

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5162846B2 (ja) 2005-07-29 2013-03-13 ソニー株式会社 記憶装置、コンピュータシステム、および記憶システム
JP2007094921A (ja) 2005-09-30 2007-04-12 Toshiba Corp メモリカードとその制御方法
JP5076411B2 (ja) 2005-11-30 2012-11-21 ソニー株式会社 記憶装置、コンピュータシステム
JP2008112285A (ja) * 2006-10-30 2008-05-15 Toshiba Corp 不揮発性メモリシステム
JP4537420B2 (ja) 2007-04-02 2010-09-01 株式会社リコー Simd型マイクロプロセッサ
JP4356782B2 (ja) 2007-09-12 2009-11-04 ソニー株式会社 メモリ装置、メモリ制御方法、およびプログラム
JP4649503B2 (ja) * 2008-08-13 2011-03-09 株式会社東芝 半導体装置
JP4666081B2 (ja) * 2009-02-09 2011-04-06 Tdk株式会社 メモリコントローラ及びメモリコントローラを備えるフラッシュメモリシステム、並びにフラッシュメモリの制御方法
JP2010198407A (ja) 2009-02-26 2010-09-09 Sony Corp 情報処理装置、およびデータ記録制御方法、並びにプログラム
JP2010282492A (ja) * 2009-06-05 2010-12-16 Toshiba Corp メモリシステム
JP4956593B2 (ja) * 2009-09-08 2012-06-20 株式会社東芝 メモリシステム

Also Published As

Publication number Publication date
US20130304971A1 (en) 2013-11-14
CN103389881A (zh) 2013-11-13
US9454475B2 (en) 2016-09-27
JP2013235630A (ja) 2013-11-21
TW201401048A (zh) 2014-01-01
KR20130125303A (ko) 2013-11-18

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