JP5892838B2 - 様々な書き込みコマンド・スケジューリングを含むメモリシステム - Google Patents

様々な書き込みコマンド・スケジューリングを含むメモリシステム Download PDF

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JP5892838B2
JP5892838B2 JP2012083966A JP2012083966A JP5892838B2 JP 5892838 B2 JP5892838 B2 JP 5892838B2 JP 2012083966 A JP2012083966 A JP 2012083966A JP 2012083966 A JP2012083966 A JP 2012083966A JP 5892838 B2 JP5892838 B2 JP 5892838B2
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memory
command
write command
read
slot
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JP2012216210A5 (enExample
JP2012216210A (ja
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マイケル・ジェイ・モリソン
ジェイ・ビイ・パテル
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モーシス，インコーポレーテッド
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4239—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with asynchronous protocol

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP2012083966A 2011-03-31 2012-04-02 様々な書き込みコマンド・スケジューリングを含むメモリシステム Expired - Fee Related JP5892838B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/077,261 2011-03-31
US13/077,261 US8473695B2 (en) 2011-03-31 2011-03-31 Memory system including variable write command scheduling

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JP2012216210A JP2012216210A (ja) 2012-11-08
JP2012216210A5 JP2012216210A5 (enExample) 2015-05-21
JP5892838B2 true JP5892838B2 (ja) 2016-03-23

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JP2012083966A Expired - Fee Related JP5892838B2 (ja) 2011-03-31 2012-04-02 様々な書き込みコマンド・スケジューリングを含むメモリシステム

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US (2) US8473695B2 (enExample)
EP (1) EP2506149B1 (enExample)
JP (1) JP5892838B2 (enExample)
KR (1) KR101600131B1 (enExample)
CN (1) CN102968291B (enExample)

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Also Published As

Publication number Publication date
CN102968291B (zh) 2016-05-18
KR20120112265A (ko) 2012-10-11
KR101600131B1 (ko) 2016-03-14
EP2506149A1 (en) 2012-10-03
EP2506149B1 (en) 2017-08-09
CN102968291A (zh) 2013-03-13
US8473695B2 (en) 2013-06-25
US20120254562A1 (en) 2012-10-04
JP2012216210A (ja) 2012-11-08
US20120254558A1 (en) 2012-10-04
US8635417B2 (en) 2014-01-21

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