JP5794075B2 - Electronic device and manufacturing method thereof - Google Patents

Description

  The present invention relates to an electronic device using a graphene sheet.

Graphene for example an atomic layer made of carbon atoms of sp ² bonds constituting the hexagonal lattice of carbon in the graphite crystal, if suppressing the effect of scattering beyond the 200000cm ² V ^-1 cm ^-1 at room temperature very Since high electron mobility can be achieved, research on fabricating ultrafast electronic devices using graphene sheets has been conducted.

  However, as with graphite crystals, graphene sheets are also semimetals, and since the valence band and conduction band overlap and there is no band gap, it cannot be used for current switching as it is.

  For this reason, a technique has been proposed in which a ribbon-like structure having a width of 10 nm or less is formed by a graphene sheet as in Patent Document 1 and a band gap is generated by a quantum confinement effect.

  In addition, a technique has been proposed in which holes having a radius of around 10 nm are formed in a graphene sheet in a mesh shape and a band gap is generated by the effect of periodic arrangement of the formed holes (Non-Patent Documents 1 to 3). Although no mention is made of the effect of generating a band gap, such a perforated structure is also known from Patent Document 2.

JP 2009-94190 A JP-A-10-139411

J. Bai et al., Nature Nanotech. 5, 190 (2010) M. Kim et al., Nano. Lett. 10, 1125 (2010) X. Liang et al., Nano Lett. 10, 2454 (2010) K. S. Noveselov, et al., Science 306, 666 (2004) C. Berger, et al., J. Phys. Chem. B 108, 19912 (2004) A. Reina et.al., Nano. Lett. 9, 30 (2009)

  FIG. 1 is a plan view showing an example of the graphene sheet 1.

Referring to FIG. 1, the graphene sheet 1 is an atomic layer composed of hexagonal lattices of carbon atoms having sp ² bonds as described above. The hexagonal lattices constituting the graphene sheet 1 are mutually connected. A first edge 1A including CC bonds 1a and CC bonds 1b arranged in parallel and staggered and extending in the direction of the CC bonds 1a and 1b as a whole, and a CC repeating in a zigzag manner It includes (carbon-carbon) bonds 1c and 1d, and is entirely defined by a second edge 1B extending in a direction orthogonal to the edge 1A.

In the first edge 1A, the C—C bond 1a continues to the next C—C bond 1b with an oblique CC bond 1e, and the C—C bond 1b becomes the next C—C bond 1a. It is continuous by an oblique CC bond 1f and forms an edge shape called an armchair end. On the other hand, the second edge 1B has a shape called a zigzag end because the CC bond 1c and CC bond 1d are repeated. Referring to FIG. 1, for example, a zigzag end 1B in which a CC bond 1c and a CC bond 1d are repeated as 1d-1c-1d-1c... Includes 5 or more carbon atoms, of which It is clear that two or more carbon atoms have bonds not bonded to other carbon atoms.

  The edge 1A forming the armchair end or the edge 1B forming the zigzag end causes an electron quantum confinement effect. Therefore, in Patent Document 1, the band structure of the graphene sheet is formed by the armchair end or zigzag end. A band gap was generated in the inside, enabling the on / off operation of the electronic device.

  However, in the method described in Patent Document 1, since the channel is effectively formed corresponding to the armchair end or the zigzag end, the channel width is narrowed to 10 nm or less. Alternatively, it is necessary to produce a large number of ribbon-like structures having zigzag edges with a graphene sheet, and to arrange these ribbon-like structures in parallel and at high density between the source region and the drain region. For this reason, in such a prior art, the problem which the manufacturing process of an electronic device becomes complicated arises.

  In the methods described in Non-Patent Documents 1 to 3, since the band gap is generated by the two-dimensional periodic arrangement of holes, it is necessary to two-dimensionally arrange holes having a radius of about 10 nm in the graphene sheet. It cannot be used for a miniaturized electronic device having a channel length of about several tens of nanometers. Furthermore, the band gap formed by such periodicity of the order of 10 nm is as small as about 0.1 eV, and it is not easy to reliably perform the on / off operation with an operating voltage used in a normal electronic device.

  In addition, a technique for generating a band gap by applying an electric field perpendicular to the surface of the two-layer graphene sheet has also been proposed, but the band gap obtained with such a configuration is at most about 0.3 eV. Of course, application to electronic devices is difficult.

  The method described in Patent Document 2 claims a structure having a circular hole, a circular combination of holes, or a polygonal hole. However, depending on the shape, arrangement, and size of the holes, the size may be as expected. There is a possibility that the band gap cannot be obtained.

According to one aspect, an electronic device is formed on a substrate, a graphene sheet formed on the substrate via a gate insulating film, a source electrode formed on one end of the graphene sheet, and the other end of the graphene sheet The gate electrode for applying a gate voltage between the source electrode and the drain electrode on the graphene sheet, and the source electrode and the drain electrode between the source electrode and the drain electrode on the graphene sheet. A plurality of openings formed across the connecting direction, each of the plurality of openings having an equilateral triangular shape defined by three zigzag ends, Two of the zigzag ends are at an angle of 30 ° with respect to the direction connecting the source electrode and the drain electrode, and the other zigzag end is 9 °. ° an angle of said plurality of openings in the opening sequence, and is formed by aligning the orientation of each equilateral triangle.

According to another aspect, an electronic device includes a substrate, a graphene sheet formed on the substrate, a source electrode formed on one end of the graphene sheet, a drain electrode formed on the other end of the graphene sheet, A gate insulating film that covers the graphene sheet between the source electrode and the drain electrode, and is formed on the graphene sheet between the source electrode and the drain electrode with the gate insulating film interposed therebetween, and the source on the graphene sheet a gate electrode for applying a gate voltage between the electrode and the drain electrode, wherein between the source electrode and the drain electrode, wherein the plurality of openings formed across the direction connecting the source electrode and the drain electrode in the graphene sheet Each of the plurality of openings is formed by three zigzag ends. The zigzag end is defined as an equilateral triangle, and two of the zigzag ends are at an angle of 30 ° with respect to the direction connecting the source electrode and the drain electrode, and the other zigzag end is 90 °. The plurality of openings are formed so that their equilateral triangles are aligned in the opening row.

According to another aspect, a method for manufacturing an electronic device includes a step of forming a graphene sheet on a substrate, a step of forming an insulating film on the graphene sheet, and forming a plurality of mask openings in the insulating film A step of patterning the graphene sheet using the insulating film as a mask, forming a plurality of openings corresponding to the plurality of mask openings in the graphene sheet, and forming an array of openings by the plurality of openings. A step of heat-treating the graphene sheet in a non-oxidizing atmosphere to change the shape of the plurality of openings in the graphene sheet to a stable shape, and the opening row on the graphene sheet. Forming a source electrode on one side and a drain electrode on the other side, with the step of forming the plurality of mask openings Each of the mask openings connects the source electrode and the drain electrode with two edges that form an angle of 30 ° in the clockwise direction and the counterclockwise direction with respect to the straight line connecting the source electrode and the drain electrode. In the step of forming the plurality of mask openings, the plurality of mask openings are formed in respective triangles, and are executed so as to have an equilateral triangle shape defined by one edge perpendicular to a straight line. In the graphene sheet, each of the plurality of openings is defined by three zigzag ends and has an equilateral triangle shape, and two of the zigzag ends are the source electrode and the zigzag end. Each of them forms an angle of 30 ° with respect to the direction in which the drain electrodes are connected, the other zigzag end forms an angle of 90 °, and the plurality of openings are respectively in the opening row. It is formed by aligning of the equilateral triangle of orientation.

  According to the present invention, a large conduction gap can be formed in the band structure of the graphene sheet by forming a plurality of equilateral triangular openings in the graphene sheet.

It is a top view which shows the hexagonal lattice of graphene. It is a top view which shows the electronic device by 1st Embodiment. FIG. 3 is a sectional view taken along line AA ′ in FIG. 2. It is a top view which shows the example of the opening part by a comparative example. It is a top view which shows the other example of the opening part by a comparative example. It is a top view which shows the further another example of the opening part by a comparative example. It is a top view which shows the opening part row | line by the modification of 1st Embodiment. It is a top view which shows the opening part row | line by the other modification of 1st Embodiment. It is a top view which shows the opening part row | line by the further another modification of 1st Embodiment. It is a top view which shows the opening part row | line by the further another modification of 1st Embodiment. 3 is a graph showing a band gap generated in a graphene sheet in the electronic device of FIG. 2. 3 is a flowchart illustrating a method for manufacturing the electronic device in FIG. 2. FIG. 3 is a process cross-sectional view (part 1) illustrating the method for manufacturing the electronic device of FIG. 2; FIG. 6 is a process cross-sectional view (part 2) illustrating the method for manufacturing the electronic device of FIG. 2. FIG. 9 is a process cross-sectional view (part 3) illustrating the manufacturing method of the electronic device of FIG. 2; FIG. 6 is a process cross-sectional view (part 4) illustrating the method for manufacturing the electronic device of FIG. 2. FIG. 10 is a process cross-sectional view (part 5) illustrating the manufacturing method of the electronic device of FIG. 2; FIG. 6 is a process cross-sectional view (part 6) illustrating the manufacturing method of the electronic device of FIG. 2; FIG. 10 is a process cross-sectional view (part 7) illustrating the manufacturing method of the electronic device of FIG. 2; FIG. 11 is a process cross-sectional view (No. 8) for explaining the manufacturing method of the electronic device of FIG. 2; FIG. 10 is a process cross-sectional view (No. 9) for explaining the manufacturing method of the electronic device of FIG. 2; FIG. 10 is a process cross-sectional view (No. 10) for explaining the manufacturing method of the electronic device of FIG. 2; It is a top view which shows the mask pattern used at the process of FIG. 13G. It is sectional drawing which shows the electronic device by 2nd Embodiment. 16 is a flowchart illustrating a method for manufacturing the electronic device of FIG. FIG. 16 is a process cross-sectional view (part 1) illustrating the manufacturing method of the electronic device of FIG. 15; FIG. 16 is a process cross-sectional view (part 2) illustrating the manufacturing method of the electronic device of FIG. 15; FIG. 16 is a process cross-sectional view (part 3) illustrating the manufacturing method of the electronic device of FIG. 15; FIG. 16 is a process cross-sectional view (part 4) illustrating the manufacturing method of the electronic device of FIG. 15; FIG. 16 is a process cross-sectional view (part 5) for explaining the manufacturing method of the electronic device of FIG. 15; FIG. 16 is a process cross-sectional view (part 6) illustrating the method for manufacturing the electronic device of FIG. 15; FIG. 16 is a process cross-sectional view (part 7) illustrating the method for manufacturing the electronic device of FIG. 15. FIG. 16 is a process cross-sectional view (part 8) illustrating the manufacturing method of the electronic device of FIG. 15; FIG. 16 is a process cross-sectional view (part 9) illustrating the manufacturing method of the electronic device of FIG. 15; FIG. 16 is a process cross-sectional view (part 10) illustrating the method for manufacturing the electronic device of FIG. 15; FIG. 16 is a process cross-sectional view (part 11) illustrating the method for manufacturing the electronic device of FIG. 15;

[First Embodiment]
FIG. 2 is a plan view of the electronic device 20 according to the first embodiment, and FIG. 3 is a cross-sectional view taken along line AA ′ in FIG.

  First, referring to the cross-sectional view of FIG. 3, for example, a silicon oxide film 22 serving as a gate insulating film is formed on a silicon substrate 21 that is doped p + type and also serves as a gate electrode. A graphene sheet 23 similar to the graphene sheet 1 of FIG. 1 is formed on the top.

  Further, on the silicon substrate 21, a source electrode 23S is formed at one end of the graphene sheet 23, and a drain electrode 23D is formed at the other end.

In the graphene sheet 23, as shown in the plan view of FIG. 2, a plurality of openings 23A cross the direction connecting the source electrode 23S and the drain electrode 23D (hereinafter referred to as “channel direction”), It is formed in the form of an opening row 23N extending in the channel width direction orthogonal to the channel direction. Each of the openings 23A in the illustrated embodiment is defined by the edges _23a 1 _{~23a 3} and forms a regular triangle, zigzag edge is formed on all of the edges _23a 1 _{~23a 3.} Here, the “channel direction” is also a direction in which electrons emitted from the source electrode 23S to the graphene sheet 23 travel in the graphene sheet 23 toward the drain electrode 23D, and are straight lines AA ′ in FIG. Is parallel to the direction.

  In the electronic device 20 having the configuration of FIG. 2, the source electrode 23S and the drain electrode 23D face each other in parallel, and the straight line AA ′ is orthogonal to the source electrode 23S and the drain electrode 23D.

Further, in the electronic device 20 having the configuration shown in FIG. 2, the pair of edges facing each other in parallel among hexagonal lattices of carbon atoms constituting the graphene sheet 23 are formed on the silicon substrate 21. As a result, the zigzag ends 23a ₁ and 23a ₂ are inclined at an angle of 30 ° counterclockwise and clockwise with respect to the channel direction, respectively. cage, 23a ₃ is orthogonal to the channel direction.

  In the electronic device 20 having such a configuration, the magnitude of the band gap Eg generated in the graphene sheet 23 is calculated. For example, in the configuration illustrated in FIG. 2, the length of one side of the opening 23A is about 2.5 nm. It was shown that the band gap Eg was 1.00 eV when the openings 23A were arranged so that the center-to-center distance was about 3.5 nm. However, this calculation is performed by a tight binding approximation calculation based on one pz orbital per carbon atom and considering only the interaction between the nearest atoms.

On the other hand, instead of the opening 23A formed in the graphene sheet 23, as a comparative example, (A) as shown in the plan view of FIG. 4 has a rhombus shape with a side length of 2.5 nm, When the opening 23B defined only by the zigzag ends 23b _{1 to} 23b ₄ is formed, (B) a rectangular shape as shown in FIG. 5 and a length of 2.5 nm by the two zigzag ends 23c ₁ and 23c ₃ is used. When an opening 23C having a side having a length of 2.3 nm is formed by the side and two armchair ends 23c ₂ and 23c ₄ , and (C) a hexagon having a side length of 1.5 nm as shown in FIG. Considering the case where the opening 23E having a shape and defined only by the zigzag end is formed, the size of the band gap Eg corresponds to (A), (B), (C), 0.54 eV, 0.13 eV, It has been shown to be called 0.56eV. However, this calculation is also performed by a tightly bound approximation calculation based on one pz orbital per carbon atom and considering only the interaction between the nearest atoms. Also in the above calculation, the distance between the centers of the openings is about 3.5 nm.

In the above calculation, the orientation of the graphene sheet 23 in FIGS. 4, 5 and 6 is set to be the same as the orientation of the graphene sheet 23 in FIG. Therefore, in the configuration (A) of FIG. 4, the openings 23B are opposed to each other in the channel width direction, and zigzag ends 23b ₁ and 23b ₂ inclined 30 ° counterclockwise and clockwise with respect to the channel direction, respectively. And zigzag ends 23b ₃ and 23b ₄ that are opposed to each other in the channel width direction and that are inclined by 30 ° clockwise and counterclockwise with respect to the channel direction, respectively, and In the configuration (B) of FIG. 5, the zigzag ends 23c ₁ and 23c ₃ that define the opening 23C extend in a direction orthogonal to the channel direction, that is, the channel width direction, while the armchair end 23c _2, 23c ₄ is a direction orthogonal to the channel width direction, i.e. the extend in the channel direction, and arrangement of FIG. 6 (C), the said opening Zigzag edge _23e 1 defining the 3E, 23e ₄ is a direction orthogonal to the channel direction, i.e. one that extends in the channel width direction, zigzag edge _{23e 2, 23e 3, 23c 5} , 23c 6 whereas the channel direction It should be noted that the angle is 30 ° counterclockwise or clockwise.

  As described above, according to the present embodiment, it has been found that the largest band gap Eg is generated in the graphene sheet 23 when the equilateral triangular opening shown in FIG. 2 is formed.

  Next, the band gap when the arrangement of the equilateral triangular openings 23F in the graphene sheet 23 corresponding to the equilateral triangular openings 23A is variously changed as shown in FIGS. A change in Eg will be described.

  First, referring to FIG. 7, the example of FIG. 7 is substantially the same as FIG. 2, and equilateral triangular openings 23 </ b> F are aligned along the channel width direction in the same direction. In this case, the band gap is 1.00 eV as described above. Further, even when the openings 23F are not aligned in a line along the channel width direction as shown in FIG. 8, the value of 1.00 eV is obtained as the band gap Eg by the same calculation as described above. It was shown that

  On the other hand, by the same calculation, equilateral triangle openings 23F and opposite equilateral triangle openings 23G as shown in FIG. 9 are alternately arranged and aligned in a line along the channel width direction. In this case, the band gap Eg is only 0.02 eV, and the openings 23F and 23G are alternately arranged as shown in FIG. 10, but they are folded symmetrically left and right along the lines connecting the bases. It was shown that the band gap Eg was only 0.06 eV when not aligned in a line along the channel width direction.

  This is the reason why the band gap Eg is reduced in such an arrangement other than FIG. 7 or FIG. 8. For example, in the opening 23F and the opening 23G in FIG. 9, two adjacent openings have two zigzag ends. May be related to facing each other in parallel. That is, when parallel zigzag edges are formed close to each other, the electron wavefunctions that should have localized to each zigzag edge to form a band gap spread, and the wavefunctions of such electrons It is possible that delocalization leads to the reduction of the band gap. For example, in the arrangement of FIG. 10, the opposite parallel zigzag ends of the openings 23F and 23G are more obliquely separated than in the case of FIG. 9, and a larger band gap Eg of 0.06 eV is generated accordingly. There is a possibility. It can be seen that such zigzag edges facing each other in parallel in the graphene sheet 23 also occur in the configuration of FIG. 4, the configuration of FIG. 5, and the configuration of FIG. On the other hand, it should be noted that such parallel zigzag ends are not formed in this embodiment shown in FIG.

  As described above, according to the present embodiment, in order to obtain a large band gap Eg in the graphene sheet 23, a plurality of equilateral triangular openings 23F each defined by three zigzag ends are provided in the graphene sheet 23. Two of the zigzag ends are oriented so that each of them forms an angle of 30 ° with respect to the direction connecting the source electrode 23S and the drain electrode 23D, and the other zigzag end forms an angle of 90 °. It is concluded that it is advantageous to form them together.

  FIG. 11 shows (a) the distance between the centers of adjacent openings 23F is fixed with respect to the equilateral triangular openings 23F aligned in a line shown in FIG. (B) when the distance between the ends of the opening 23F is fixed and the size of the opening 23F, that is, the length of one side of the equilateral triangle is changed, and (c) the opening The result of obtaining the value of the band gap Eg in the same manner as the previous calculation in the case where the size of the portion 23F, that is, the length of one side of the equilateral triangle is fixed and the distance between the centers of the openings 23F is changed is shown. It is a graph. The center-to-center distance, end-to-end distance, and side length are as defined in FIG.

  Referring to FIG. 11, the horizontal axis indicates the ratio of the length of one side of the equilateral triangle of the opening 23F to the distance between the centers of the openings 23F, but this ratio is larger than the relation of FIG. It can be seen that the band gap Eg increases. For example, when it is desired to obtain the graphene sheet 23 with Eg> 0.5 eV, it is understood that the ratio should be 60% or more.

In the present embodiment, the graphene sheet 23, as in FIG. 2 or FIG. 4 to FIG. 10, a pair of edge portions mutually parallel hexagonal lattice is placed in a direction such as to be parallel to the channel direction, such When a general opening such as the openings 23A, 23B, 23C, 23E, 23F, and 23G is formed in the graphene sheet 23, the edge portion that defines the opening is formed from the viewpoint of thermodynamic stability. Among them, the stable one is an angle of 0 ° with respect to the channel direction, 30 ° counterclockwise or clockwise, or 60 ° or 90 ° counterclockwise or clockwise. Note that it is limited. Of these, the edge that forms an angle of 60 ° in the 0 ° direction and the counterclockwise or clockwise direction forms the end of the armchair, the edge that forms an angle of 30 ° in the counterclockwise or clockwise direction, and 90 ° The edge forming the angle forms a zigzag end.

  Next, the manufacturing process of the electronic device 20 of FIG. 2 will be described with reference to the flowchart of FIG. 12 and the process cross-sectional views of FIGS. 13A to 13J.

  Referring to the flowchart of FIG. 12, in step 1, as shown in FIG. 13A, a silicon oxide film 22 having a thickness of, for example, 300 nm and serving as a gate insulating film is formed on a silicon substrate 21 doped, for example, p + type. To do. Here, the silicon oxide film 22 can be formed by thermal oxidation of the silicon substrate 21 or the like. In addition to the p + type doped silicon substrate, other conductive substrates such as an n + type doped silicon substrate and a metal substrate can be used as the substrate 21. In this case, the silicon oxide film 22 can be formed by sputtering, for example.

  Next, in step 2 of FIG. 12, a graphene sheet 23 is formed on the silicon oxide film 22 as shown in FIG. 13B. The graphene sheet 23 is made of, for example, a scotch tape (registered trademark) or a cello tape (registered trademark) such as a highly oriented pyrolytic graphite (HOPG), a natural graphite, or a bulk graphite crystal surface such as quiche graphite. By a process of mechanically peeling or cleaving with an adhesive medium such as an adhesive tape or an adhesive sheet and further cleaving with another adhesive tape as described in Non-Patent Document 4, etc. Can be obtained. The graphene sheet 23 obtained in this manner is further rubbed and transferred to the surface of the silicon oxide film 22 together with the adhesive medium, thereby obtaining the structure of FIG. 13B.

  Alternatively, as described in Non-Patent Document 5 or the like, a hexagonal 6H—SiC substrate is prepared and heated to 1200 ° C. or higher in a vacuum or in a non-oxidizing atmosphere such as Ar to form Si from the substrate surface. It is also possible to obtain a graphene sheet epitaxially depending on the hexagonal atomic arrangement of SiC on the SiC substrate surface by desorbing atoms. Also in this case, the structure of FIG. 13B can be obtained by transferring the obtained graphene sheet to an adhesive medium or the like and transferring it to the surface of the silicon oxide film 22.

  In addition, as described in Non-Patent Document 6 and the like, a graphene sheet can be formed by a CVD method. In this case, a metal catalyst such as Fe, Ni, or Cu is deposited on the silicon oxide film surface on the silicon substrate, and a thermal CVD process using acetylene as a raw material is performed at a temperature of about 650 to 1000 ° C. Graphene can be synthesized on a metal catalyst. Also in this case, the obtained graphene is transferred to an adhesive medium, and further transferred to the surface of the silicon oxide film 22, whereby the structure of FIG. 13B can be obtained.

Next, in step 3, as shown in FIG. 13C, a silicon oxide film HM1 serving as a hard mask is formed to a film thickness of, for example, 10 nm by CVD or sputtering, covering the graphene sheet 23, and further in step 4 Then, after aligning the mask orientation of the resist pattern R1, the silicon oxide film HM1 is patterned using the resist pattern R1 as a mask as shown in FIG. 13D to form the source electrode 23S in the graphene sheet 23. The line connecting the source region 23s and the drain region 23d where the drain electrode 23D is formed and the source region 23s and the drain region 23d is connected to the hexagonal lattice of carbon constituting the graphene sheet 23. to be parallel to the two sides extending in parallel to and facing, exposed of That.

Moreover source electrode pattern 23S on the structure of Figure 13D in step 5, the metal film 23M serving as the drain electrode pattern 23D, as is to cover the resist pattern R ₁ on the silicon oxide film HM1 as shown in FIG. 13E e.g. is deposited by a sputtering method or an electron beam deposition method, further the resist pattern R ₁ at step 7, the metal film 23M together liftoff deposited thereon. As a result, the source electrode pattern 23S is formed in the source region 23s of the graphene sheet 23, and the drain electrode pattern 23D is formed in the drain region 23d. The metal film 23M may have a structure in which, for example, a Ti adhesion film (not shown) having a thickness of 5 nm and an Au film (not shown) having a thickness of 30 nm, for example, are sequentially stacked.

Then the resist film R ₂ is formed on the silicon oxide film HM ₁ in step 8, the in the resist film R ₂ using the mask pattern M of Fig. 14 is a resist opening R2A as shown in FIG. 13G, the It is formed corresponding to the mask opening 23M in the mask pattern M. The mask opening 23M has a configuration in which equilateral triangular mask openings corresponding to the opening row 23A formed in the graphene sheet 23 are arranged along the opening row with the orientation thereof aligned. The zigzag ends 23a ₁ , 23a ₂ and 23a _{3 of the} opening 23A correspond to the edges 23m ₁ , 23m ₂ and 23m ₃ of the mask opening 23M, respectively.

At that time in the step 8, the orientation of the mask opening 23M is, to match the orientation of the opening portion 23A to be formed in the graphene sheet 23, the orientation of the resist film R ₂ relative to the graphene sheet 23 Is set. As a result of such mask orientation alignment, the edge 23m ₁ is inclined 30 ° counterclockwise from the channel direction, while the edge 23m ₂ is inclined 30 ° clockwise from the channel direction. The edge 23m ₃ is orthogonal to the channel direction.

In the step 8, further this way is the silicon oxide film HM ₁ is patterned by the formed resist opening R2A are, in the silicon oxide film HM _1, the mask opening 23M as shown in FIG. 13H A corresponding mask opening HMA is formed.

Next to the graphene sheet 23 in the process of the step 9, the silicon oxide film HM ₁ as a mask, for example, under a pressure of 10 mTorr, the oxygen gas reactive ion etching while supplying at a flow rate of 25sccm with the plasma power of 90W ( RIE), and in the graphene sheet 23, as shown in FIG. 13I, the opening 23A corresponding to the mask opening HMA has a predetermined relationship with the orientation of the graphene sheet 23, that is, zigzag ends 23a ₁ and 23a ₂ of the opening portion 23A is, the inclination 30 ° in the counterclockwise direction and clockwise direction, respectively to the channel direction, zigzag edge 23m _3, so as to be perpendicular to the channel direction, to form . In the mask pattern M, the mask openings 23M are periodically formed in the direction of the openings as shown in FIG. 14, so that the openings 23A are formed in the graphene sheet 23 by the openings 23A. It is formed in the channel width direction.

The silicon oxide film HM ₁ as shown in FIG. 13J In still step 10, it is selectively removed by wet etching using HF, then, in a reducing atmosphere such as hydrogen atmosphere, a heat treatment at a temperature of, for example 1000 ° This stabilizes the arrangement of the carbon atoms at the end of the opening 23A. As a result of such stabilization, even if the orientation of the mask pattern M is slightly shifted in the step of FIG. 13H, the carbon atoms are rearranged at the edge of the opening 23A and counterclockwise in the channel direction. Alternatively, a zigzag end with an angle of 30 ° in the clockwise direction can be stably obtained.

[Second Embodiment]
FIG. 14 is a cross-sectional view showing the configuration of the electronic device 60 according to the second embodiment. In the figure, portions corresponding to the portions described above are denoted by the same reference numerals, and description thereof is omitted.

Referring to FIG. 14, the electronic device 60 is formed on the (0001) plane of the 6H—SiC substrate 61, formed directly on the (0001) plane, and the opening shown in the plan view of FIG. 2. The graphene sheet 23 in which the opening row 23N is formed by the portion 23A and the hexagonal lattice of carbon atoms constituting the graphene sheet 23 on the graphene sheet 23 are parallel to two sides facing each other in parallel A source electrode 23S and a drain electrode 23D are formed so as to face each other in the direction.

Further, the graphene sheet 23 is covered with the gate insulating film 62 made of hafnium oxide (HfO ₂ ) having a thickness of 10 nm, for example, for each of the opening rows 23N. A gate electrode 63 having a structure in which a 5 nm titanium (Ti) film and a gold (Au) film having a thickness of, for example, 30 nm are sequentially stacked is formed.

  In the configuration shown in the drawing, the source electrode 23S and the drain electrode 23D are also covered with the hafnium oxide film 62, and via holes (not shown) are formed in the hafnium oxide film 62 corresponding to the source electrodes 23S and 23D.

Also in the electronic device having such a configuration, the straight line connecting the source electrode 23S and the drain electrode 23D and the source electrode 23S and the drain electrode 23D is opposed to each other in the hexagonal lattice of carbon constituting the graphene sheet 23S. Since it is formed so as to be parallel to two sides, the graphene sheet 23 has a clockwise direction or a counterclockwise direction with respect to the channel direction, as in the embodiment of FIG. An opening row 23N of equilateral triangular openings 23A defined by a zigzag end inclined by 30 ° and a zigzag end orthogonal to the channel direction is formed in the same manner as in the previous embodiment. As can be seen from the graph of FIG. 11, the graphene sheet 23 has a side length of the opening 23A that is 60% or more of the center-to-center distance of the opening 23A, for example. If, it shows a large band gap Eg of more than 0.5eV. Therefore, also in the electronic device 60 of FIG. 14, the flow of electrons from the source electrode 23 </ b> S to the drain electrode 62 </ b> D can be reliably controlled by the gate voltage applied to the gate electrode 63.

  A method for manufacturing the electronic device 60 of FIG. 15 will be described below with reference to the flowchart of FIG. 16 and the process cross-sectional views of FIGS. 17A to 17K. In the figure, portions corresponding to the portions described above are denoted by the same reference numerals, and description thereof is omitted.

  Referring to the flowchart of FIG. 16, in step 21, as shown in FIG. 17A, a 6H—SiC substrate 61 having a (0001) plane as a main surface is prepared, and in step 22, the 6H—SiC substrate is placed in vacuum or 1200. A heat treatment is performed in a non-oxidizing atmosphere such as argon (Ar) or more to remove Si element from the (0001) plane that defines the main surface of the substrate 21. As a result, on the main surface of the 6H—SiC substrate 21 made of (0001), a carbon atom layer made of carbon atoms arranged in a hexagonal system as shown in FIG. 17B remains, and the desired graphene sheet 23 is epitaxially formed. It is formed.

  Next, in step 23 of FIG. 16, as shown in FIG. 17C, a hard mask film HM1 made of a silicon oxide film is formed by, eg, sputtering or CVD, and in step 24, the hard mask film HM1 is formed as shown in FIG. 17D. Then, the resist pattern R1 is patterned as a mask to expose the source region 23s and the drain region 23d of the graphene sheet 23.

  Further, in step 25 of FIG. 16, a titanium film having a thickness of 5 nm and a gold film having a thickness of 30 nm are sequentially deposited on the structure of FIG. 17D by electron beam evaporation or sputtering, and the metal shown in FIG. A film 23M is formed, and in step 26 of FIG. 16, the resist pattern R1 is lifted off together with the metal film 23M thereon as shown in FIG. 17F, a source electrode 23S is formed in the source region 23s of the graphene sheet 23, and the drain A drain electrode 23D is formed in each region 23d.

  Further, in step 27 of FIG. 16, the hard mask film HM1 is patterned in accordance with the mask opening 23M using the mask pattern M described in FIG. 14, for example, and the graphene sheet 23 is exposed as shown in FIG. 17G. An opening HMA is formed, and in step 28, the graphene sheet 23 is patterned using the hard mask film HM1 as a mask. Further, as shown in FIG. 17H, in the graphene sheet 23, for example, an opening row comprising openings 23A 23N is formed.

Further, in step 29 of FIG. 16, the graphene sheet 23 is heat-treated in a reducing atmosphere such as a hydrogen atmosphere at a temperature of 1000 °, for example, to stabilize the arrangement of carbon atoms at the edge of the opening 23A formed earlier. Further, in step 30, as shown in FIG. 17I, the hard mask film HM1 is removed by wet processing using HF, for example, and in step 31, a gate insulating film 62 is formed on the graphene sheet 23 as shown in FIG. 17J. In the illustrated example, a hafnium oxide (HfO ₂ ) film is used as the gate insulating film 62, but a zirconium oxide (ZrO ₂ ) film, a hafnium silicate (HfSiO ₄ ) film, a hafnium zirconate (ZrSiO ₄ ) film, or the like is used. It can also be used.

  Further, in step 32, a gate electrode 63 having a laminated structure of a Ti film and a gold film, which is the same as the source electrode pattern 23S or the drain electrode pattern 23D, is formed on the gate insulating film 62 as shown in FIG. 17K. An electronic device having a gate structure can be obtained.

In each of the above embodiments, the “graphene sheet” does not necessarily have to be a strictly single atomic layer made of carbon atoms having sp ² bonds constituting a hexagonal lattice of carbon. Multiple may be included.

  As mentioned above, although this invention was described about preferable embodiment, this invention is not limited to this specific embodiment, A various deformation | transformation and change are possible within the summary described in the claim.

1,23 graphene sheet 1A armchair end 1B zigzag ends 1a, 1b, 1c, 1d, 1e C-C bonds 20, 60 electronic device 21 silicon substrate 23A, 23B, 23C, 23E, 23F, 23G openings 23a ₁ ~23a ₃ , 23 b _{1 to} 23 b ₄ , 23 c _{1 to} 23 c ₄ , 23 e _{1 to} 23 e ₆ edge 23 N opening array 23 M mask opening 23 m _{1 to} 23 m ₃ edge 23 S source electrode pattern 23 D drain electrode pattern 61 SiC substrate 62 gate insulating film 63 Gate electrode

Claims (10)

A substrate,
A graphene sheet formed on the substrate via a gate insulating film;
A source electrode formed at one end of the graphene sheet;
A drain electrode formed on the other end of the graphene sheet;
A gate electrode for applying a gate voltage between the source electrode and the drain electrode to the graphene sheet;
An opening row formed of a plurality of openings formed between the source electrode and the drain electrode on the graphene sheet and across a direction connecting the source electrode and the drain electrode;
With
Each of the plurality of openings has an equilateral triangular shape defined by three zigzag ends, and two of the zigzag ends are all 30 in the direction connecting the source electrode and the drain electrode. Make an angle of °, another zigzag edge makes an angle of 90 °,
The electronic device, wherein the plurality of openings are formed so that the directions of the equilateral triangles are aligned in the opening row. A substrate,
A graphene sheet formed on the substrate;
A source electrode formed at one end of the graphene sheet;
A drain electrode formed on the other end of the graphene sheet;
A gate insulating film covering the graphene sheet between the source electrode and the drain electrode;
A gate electrode formed between the source electrode and the drain electrode on the graphene sheet via the gate insulating film, and applying a gate voltage between the source electrode and the drain electrode on the graphene sheet;
Between the source electrode and the drain electrode, an opening row composed of a plurality of openings formed across the direction connecting the source electrode and the drain electrode to the graphene sheet,
With
Each of the plurality of openings has an equilateral triangular shape defined by three zigzag ends, and two of the zigzag ends are all 30 in the direction connecting the source electrode and the drain electrode. Make an angle of °, another zigzag edge makes an angle of 90 °,
The electronic device, wherein the plurality of openings are formed so that the directions of the equilateral triangles are aligned in the opening row.   One of the zigzag edges forms an angle of 30 ° clockwise with respect to the direction connecting the source electrode and the drain electrode when viewed from a direction perpendicular to the surface of the graphene sheet. The electronic device according to claim 1 or 2.   One of the zigzag edges forms an angle of 30 ° counterclockwise with respect to the direction connecting the source electrode and the drain electrode when viewed from a direction perpendicular to the surface of the graphene sheet. The electronic device according to claim 1 or 2.   The one of the zigzag edges is perpendicular to a direction connecting the source electrode and the drain electrode when viewed from a direction perpendicular to the surface of the graphene sheet. Electronic devices. The Jiguza grayed end, of the preceding claims, characterized in that it is constituted of carbon atoms having a bond that is not bonded to another carbon atom of five or more carbon atoms, including two or more, The electronic device as described in any one. The opening column of the preceding claims, characterized in that it is formed over a plurality of rows across the flow between can Yaria of the source electrode and the drain electrode, the electron apparatus according to any one claim .   In the said opening part row | line | column, the ratio of the length of the one side of the said opening part with respect to the center distance between adjacent opening parts is 60% or more, The any one of Claims 1-7 characterized by the above-mentioned. Electronic devices. Forming a graphene sheet on the substrate;
Forming an insulating film on the graphene sheet;
Forming a plurality of mask openings in the insulating film;
Patterning the graphene sheet using the insulating film as a mask, forming a plurality of openings corresponding to the plurality of mask openings in the graphene sheet, and forming an opening row by the plurality of openings; When,
Heat treating the graphene sheet in a non-oxidizing atmosphere, and changing the shape of the plurality of openings in the graphene sheet to a stable shape;
On the graphene sheet, a step of forming a source electrode on one side and a drain electrode on the other side across the opening row,
Including
In the step of forming the plurality of mask openings, each of the plurality of mask openings has an angle of 30 ° in a clockwise direction and a counterclockwise direction with respect to a straight line connecting the source electrode and the drain electrode. Two edges formed, and having an equilateral triangle shape defined by one edge orthogonal to a straight line connecting the source electrode and the drain electrode,
Further, in the step of forming the plurality of mask openings, the plurality of mask openings are formed with the directions of the respective triangles aligned .
In the graphene sheet, each of the plurality of openings is defined by three zigzag ends and has an equilateral triangle shape, and two of the zigzag ends are in a direction connecting the source electrode and the drain electrode. Each of them has an angle of 30 °, the other zigzag end has an angle of 90 °, and the plurality of openings are formed in the opening row so that the directions of the equilateral triangles are aligned. A method for manufacturing an electronic device. Process line that runs on the source electrode and the drain electrode, opposing flat row to so that two sides of the hexagonal grid of the carbon atoms constituting the graphene sheet forming the said source and drain electrodes The method for manufacturing an electronic device according to claim 9, further comprising a step of aligning.

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