JP5792063B2 - アンダーフィル材料のフィレットの寸法を制御する方法 - Google Patents
アンダーフィル材料のフィレットの寸法を制御する方法 Download PDFInfo
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- JP5792063B2 JP5792063B2 JP2011517608A JP2011517608A JP5792063B2 JP 5792063 B2 JP5792063 B2 JP 5792063B2 JP 2011517608 A JP2011517608 A JP 2011517608A JP 2011517608 A JP2011517608 A JP 2011517608A JP 5792063 B2 JP5792063 B2 JP 5792063B2
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- Prior art keywords
- fillet
- microelectronic device
- dispensing
- dispensing system
- packaged microelectronic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/26—Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
- G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67126—Apparatus for sealing, encapsulating, glassing, decapsulating or the like
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Description
Claims (4)
- パッケージ形マイクロ電子デバイスに隣接して支持サブストレート上に小出しされたアンダーフィル材料のフィレットの寸法を制御する方法であって、
小出しシステムのジェッティングディスペンサを使用して、支持サブストレートに取り付けられたパッケージ形マイクロ電子デバイスに隣接して連続線でアンダーフィル材料の小滴を前記支持サブストレート上にジェット噴射させ、前記パッケージ形マイクロ電子デバイスの下で前記アンダーフィル材料を流して、前記パッケージ形マイクロ電子デバイスの縁に沿ってフィレットを形成するステップと、
前記フィレット付きの前記パッケージ形マイクロ電子デバイス及び前記支持サブストレートを前記アンダーフィル小出しシステムから自動化光学検査システムへ移動させるステップと、
前記フィレット付きの前記パッケージ形マイクロ電子デバイスが前記アンダーフィル小出しシステムから取り外された後に、前記自動化光学検査システムを使用して前記フィレットの画像を捕捉するステップと、
前記自動化光学検査システムによって捕捉された画像を使用して、前記フィレットの1以上の寸法を寸法決めされた標準と比較するステップと、
前記小出しシステムの閉ループ制御が可能なフィードバックループにより、前記フィレットの1以上の寸法と寸法決めされた標準との比較から情報を伝達するステップと、
前記フィードバックループにより前記小出しシステムに伝達された情報に応答して、前記小出しシステムの1以上の動作パラメータを調節するステップと、
前記調節された1以上の動作パラメータを使用して、他の支持サブストレートに取り付けられた他のパッケージ形マイクロ電子デバイスに隣接して連続線でアンダーフィル材料の小滴をジェット噴射させ、前記パッケージ形マイクロ電子デバイスの下で前記アンダーフィル材料を流して、前記パッケージ形マイクロ電子デバイスの縁に沿ってフィレットを形成するステップと、
を含むことを特徴とする方法。 - 前記小出しシステムの1以上の動作パラメータを調節するステップは、前記材料小出しシステムへの制御入力を調節して、エラーを最小限に抑え又は調節するステップを含むことを特徴とする、請求項1に記載の方法。
- 前記自動化光学検査システムが小さなフィレット寸法を検知したことに応答して、前記自動化光学検査システムによってその情報を前記小出しシステムに伝達して、フィレット材料の小出し量を増加させ、それによりフィレット寸法を増大させることを特徴とする、請求項1に記載の方法。
- 請求項1に記載の方法において、さらに、前記自動化光学検査システムを使用して、前記小出しシステムによって小出しされ、前記支持サブストレートに取り付けられた複数のパッケージ形マイクロ電子デバイスのフィレットの寸法及び形状を記録するステップを含むことを特徴とする方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US7954708P | 2008-07-10 | 2008-07-10 | |
US61/079,547 | 2008-07-10 | ||
PCT/US2009/050067 WO2010006141A1 (en) | 2008-07-10 | 2009-07-09 | Automated fillet inspection systems with closed loop feedback and methods of use |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011527758A JP2011527758A (ja) | 2011-11-04 |
JP5792063B2 true JP5792063B2 (ja) | 2015-10-07 |
Family
ID=41507434
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011517608A Expired - Fee Related JP5792063B2 (ja) | 2008-07-10 | 2009-07-09 | アンダーフィル材料のフィレットの寸法を制御する方法 |
Country Status (5)
Country | Link |
---|---|
US (3) | US9146196B2 (ja) |
JP (1) | JP5792063B2 (ja) |
KR (1) | KR101600283B1 (ja) |
CN (1) | CN102047096A (ja) |
WO (1) | WO2010006141A1 (ja) |
Families Citing this family (15)
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US9146196B2 (en) * | 2008-07-10 | 2015-09-29 | Nordson Corporation | Automated fillet inspection system with closed loop feedback and methods of use |
US8753713B2 (en) | 2010-06-05 | 2014-06-17 | Nordson Corporation | Jetting dispenser and method of jetting highly cohesive adhesives |
US9627346B2 (en) * | 2013-12-11 | 2017-04-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Underfill pattern with gap |
KR102153562B1 (ko) * | 2014-03-20 | 2020-09-09 | 삼성전자주식회사 | 반도체 검사 장비 및 이를 이용한 반도체 소자의 검사 방법 |
KR102362654B1 (ko) | 2015-07-03 | 2022-02-15 | 삼성전자주식회사 | 오븐 |
EP3185086B1 (fr) * | 2015-12-21 | 2019-06-12 | The Swatch Group Research and Development Ltd. | Applique de cadran d'une pièce d'horlogerie |
US9825008B1 (en) * | 2016-04-29 | 2017-11-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package-on-package device with supplemental underfill and method for manufacturing the same |
EP3452289B1 (en) | 2016-05-03 | 2021-03-17 | Precision Valve & Automation, Inc. | Determining an automatic bonding sequence for optical bonding |
CN106370831B (zh) * | 2016-08-29 | 2019-06-14 | 苏州奥普特克自动化科技有限公司 | 用于生物分子相互作用动态检测的检测芯片及制备方法 |
DE102017202150A1 (de) * | 2017-02-10 | 2018-06-28 | Siemens Healthcare Gmbh | Füllfortschrittsbestimmung eines Zwischenschichtmaterials bei der Herstellung eines Röntgendetektors |
EP3706920A1 (en) * | 2017-11-10 | 2020-09-16 | Nordson Corporation | Systems and methods for enhanced coating dispensing controls |
CN108198766A (zh) * | 2017-12-29 | 2018-06-22 | 英特尔产品(成都)有限公司 | 芯片封装缺陷自动识别和处理方法、系统及存储设备 |
DE102018006760A1 (de) * | 2018-08-27 | 2020-02-27 | Mühlbauer Gmbh & Co. Kg | Inspektion beim Übertragen elektronischer Bauteile von einem ersten zu einem zweiten Träger |
KR102530763B1 (ko) | 2018-09-21 | 2023-05-11 | 삼성전자주식회사 | 반도체 패키지의 제조방법 |
WO2020142229A1 (en) * | 2019-01-04 | 2020-07-09 | Jabil Inc. | Apparatus, system, and method of providing underfill on a circuit board |
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US6412328B1 (en) * | 1996-10-25 | 2002-07-02 | Speedline Technologies, Inc. | Method and apparatus for measuring the size of drops of a viscous material dispensed from a dispensing system |
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-
2009
- 2009-07-09 US US12/936,643 patent/US9146196B2/en active Active
- 2009-07-09 JP JP2011517608A patent/JP5792063B2/ja not_active Expired - Fee Related
- 2009-07-09 CN CN2009801194567A patent/CN102047096A/zh active Pending
- 2009-07-09 WO PCT/US2009/050067 patent/WO2010006141A1/en active Application Filing
- 2009-07-09 KR KR1020117000205A patent/KR101600283B1/ko active IP Right Grant
-
2015
- 2015-08-19 US US14/829,822 patent/US9466539B2/en not_active Ceased
-
2017
- 2017-06-16 US US15/625,634 patent/USRE47118E1/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20150357253A1 (en) | 2015-12-10 |
JP2011527758A (ja) | 2011-11-04 |
USRE47118E1 (en) | 2018-11-06 |
US9466539B2 (en) | 2016-10-11 |
US9146196B2 (en) | 2015-09-29 |
WO2010006141A1 (en) | 2010-01-14 |
KR101600283B1 (ko) | 2016-03-07 |
KR20110028338A (ko) | 2011-03-17 |
CN102047096A (zh) | 2011-05-04 |
US20110063606A1 (en) | 2011-03-17 |
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