JP5694120B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine including an effect control device that controls an effect device including an image display device and a sound output device.

  In a gaming machine, for example, a pachinko gaming machine, a visual effect such as a character display or a variation display of an identification symbol and an auditory effect that outputs a sound effect or a sound are generally executed.

  However, display control for performing visual effects and audio control for performing auditory effects have the problem of placing a heavy load on the effect control device. In view of this, there has been proposed a gaming machine that distributes the processing load by separating an image display device for performing visual effects and a sound output device for performing auditory effects (for example, , See Patent Document 1).

JP 2008-125668 A

However, the gaming machine disclosed in Patent Document 1, and when to update the display in the symbol display device, it is difficult to synchronize the timing of updating the presentation by the speaker (or top lamp).

  The present invention has been made in view of the above-described problems, and an object thereof is to provide a gaming machine capable of synchronizing image display timing and sound effect output timing.

The present invention relates to a game control means for comprehensively controlling a game, and an effect control means for controlling a plurality of effect devices including an image display device and a sound effect output device in response to an effect control command from the game control means. , The effect control means is capable of controlling the plurality of effect devices in response to an operation of an effect operating means operable by a player , and the effect control means includes the game Based on an effect control command from the control means, an effect overall control means for overall control of the plurality of effect devices, and an image processing command from the effect overall control means is displayed on the image display device. An image processing means for controlling the image, and an image update signal generating means for generating an image update signal for updating the image, and the effect control means for controlling the sound effect output device. And management means, and an image processing command output means for outputting an image processing instruction to the image processing unit, is provided, et al is, with the sound effect processing means and the image processing command output means, on the basis of both the image update signal controlled Rutotomoni, in response to an operation of said operation means during the operation lifetime running predetermined effect, the sound effect processing means, the image processing by the image processing command output means corresponding to said predetermined effect The timing of a predetermined delay time defined by a relative time that is an integral multiple of the generation cycle of the image update signal is started from the timing at which the command is output, and after the delay time has elapsed, the image processing command is handled. A sound effect is output.

  According to the present invention, since image display and sound effect output are controlled based on the image update signal, the image display timing and sound effect output timing can be synchronized.

1 is a perspective view of a gaming machine according to a first embodiment of the present invention. It is a front view of the game board with which the gaming machine of the 1st embodiment of the present invention is equipped. It is a block diagram which shows the structure of the game control apparatus of the 1st Embodiment of this invention. It is a block diagram which shows the structure of the presentation control apparatus of the 1st Embodiment of this invention. It is a block diagram which shows the structural example of the serial transmission circuit in the game control apparatus of the 1st Embodiment of this invention. It is a figure which shows the structural example of the transmission serial channel setting register of the 1st Embodiment of this invention. It is a figure which shows the structural example of the transmission control register of the 1st Embodiment of this invention. It is a figure which shows the structural example of the transmission data status register of the 1st Embodiment of this invention. It is a figure which shows the structural example of the transmission data register (for 1 stage) of the 1st Embodiment of this invention. It is a block diagram which shows the structural example of the serial receiver circuit in the presentation control apparatus of the 1st Embodiment of this invention. It is a figure which shows the structural example of the receiving serial channel setting register of the 1st Embodiment of this invention. It is a figure which shows the structural example of the reception control register of the 1st Embodiment of this invention. It is a figure which shows the structural example of the reception data status register of the 1st Embodiment of this invention. It is a figure which shows the structural example of the reception data register (for 1 stage) of the 1st Embodiment of this invention. It is a figure which shows an example of the command code transmitted to the production | presentation control apparatus from the game control apparatus in the 1st Embodiment of this invention. It is a figure explaining the command code of the change start of the 1st Embodiment of this invention, (A) is the change start command table at the time of loss, (B) is the change start command table at the time of big hit. It is a flowchart of the main process performed by the game control apparatus of the 1st Embodiment of this invention. It is a flowchart which shows the procedure of the timer interruption process of the 1st Embodiment of this invention. It is a figure which shows an example of the effect registration information of the 1st Embodiment of this invention. It is the process by CPU with which the presentation control apparatus of the 1st Embodiment of this invention was equipped. It is a flowchart which shows the procedure of the game process of the 1st Embodiment of this invention. It is a flowchart which shows the procedure of the game initialization process of the 1st Embodiment of this invention. It is a flowchart which shows the procedure of the game continuation process of the 1st Embodiment of this invention. It is a flowchart which shows the procedure of the production | presentation instruction | command process of the 1st Embodiment of this invention. It is a flowchart which shows the procedure of the display update process of the 1st Embodiment of this invention. In the case where the control command of a plurality of bytes transmitted from the game control device according to the first embodiment of the present invention can be received by the serial reception circuit without being divided into the first half byte and the second half byte, It is a timing chart which shows the transmission / reception timing of the data between control circuits. When the control command of a plurality of bytes transmitted from the game control device according to the first embodiment of the present invention is divided into the first half byte and the second half byte and received by the serial reception circuit, each control inside the effect control device It is a timing chart which shows the transmission / reception timing of the data between circuits. It is a figure which shows an example of the fluctuation | variation display of the 1st Embodiment of this invention, (A) is an example from which the fluctuation | variation display game is started from the state of a fluctuation | variation stop, and a result loses, (B) is a figure. This is an example in which the notice effect is executed from the reach state. It is a timing chart before and after the button operation possible timing in the notice display of the first embodiment of the present invention. It is a timing chart which shows the output timing of the countdown sound effect in the notice display of the first embodiment of the present invention, (A) when the countdown sound effect is output, (B) is that the effect button is operated The case where the countdown sound effect is not output is shown. It is a flowchart which shows an example of the communication interruption process of the modification of the 1st Embodiment of this invention. It is a flowchart which shows the procedure of the game process of the modification of the 1st Embodiment of this invention. It is a timing chart which shows the process which notifies each structure of an effect control apparatus of the command transmitted from the game control apparatus of the modification of the 1st Embodiment of this invention. It is a block diagram which shows the structure of the presentation control apparatus of the 2nd Embodiment of this invention. It is a timing chart which shows the process in which the command transmitted from the game control apparatus of the 2nd Embodiment of this invention is notified to each structure of an effect control apparatus, and the control command of multiple bytes transmitted from the game control apparatus is 1 It is a case where it was able to be received at once. It is a timing chart which shows the process in which the command transmitted from the game control apparatus of the 2nd Embodiment of this invention is notified to each structure of an effect control apparatus, and can receive the command transmitted from the game control apparatus at once. This is a case where the image is received separately at two image update timings.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a perspective view of the gaming machine 1 according to the first embodiment of the present invention.

  The gaming machine 1 includes an opening / closing frame that is attached to a main body frame (outer frame) 2 fixed to the island facility via a hinge 4 so that one side portion can be freely opened and closed. The open / close frame includes a front frame (game frame) 3 and a glass frame (front frame) 18.

  On the front frame 3, a game board 10 (see FIG. 2) having a game area 10a is accommodated in a storage frame (not shown) provided near the upper part. Further, a glass frame 18 having a cover glass (transparent member) 18 a that covers the front surface of the game board 10 is attached to the front frame 3. The front frame 3 and the glass frame 18 can be opened individually. For example, only the glass frame 18 can be opened to access the game area 10a (see FIG. 2) of the game board 10. Further, by opening the front frame 3 in a state where the glass frame 18 is not opened, it is possible to access a game control device 500 (see FIG. 3) disposed on the back side of the game board 10.

  A decorative member 9 that emits decorative light is provided around the cover glass 18 a of the glass frame 18. Inside the decoration member 9, a frame decoration device 18d (see FIG. 3) constituted by a lamp, an LED, or the like is provided. By causing the frame decoration device 18d to emit light in a predetermined light emission mode, the decoration member 9 emits light in a predetermined light emission mode.

  An illumination unit 11 is provided in the upper center portion of the glass frame 18. Inside the illumination unit 11, light emitting members such as LEDs and lamps are provided.

  A first movable illumination 13 is provided on the left side of the illumination unit 11 and a second movable illumination 14 is provided on the right side. The 1st movable illumination 13 and the 2nd movable illumination 14 are arrange | positioned above the upper speaker 30a. Each of the first movable illumination 13 and the second movable illumination 14 is provided with an illumination drive motor (a frame effect device 18f (see FIG. 4)) in addition to an illumination member such as an LED. To operate (for example, rotate).

  Further, the gaming machine 1 is provided with a speaker (sound effect output device) 30 that emits sound (sound effect, alarm sound, notification sound, etc.). The speaker 30 includes an upper speaker 30a and a lower speaker 30b. The upper speaker 30a is disposed above the glass frame 18, and the lower speaker 30b is disposed below the upper plate 21, which will be described later.

  On the right side of the first movable illumination 13, a gaming state LED 29 for notifying that an abnormality has occurred in the gaming machine 1 is provided. When an abnormality occurs in the gaming machine 1, a notification sound for notifying the abnormality is further output from the speaker 30.

  Abnormalities occurring in the gaming machine 1 include failure of the gaming machine 1 and implementation of fraud. The cheating is, for example, an act of illegally manipulating the trajectory of a game ball launched by a magnet or an act of vibrating the gaming machine 1. These fraudulent acts are detected by detecting magnetism with the magnetic sensor switch (SW) 39a (see FIG. 3) or detecting vibration with the vibration sensor switch (SW) 39b (see FIG. 3). Also, the act of opening the open / close frame illegally is also included in the illegal act. At this time, it is detected by the frame open sensor switch (front frame open detection switch 3b, glass frame open detection switch 18b, see FIG. 3) that the front frame 3 and the open / close frame of the glass frame 18 are opened during business hours. . When an illegal act as described above is detected, an abnormality is notified by the gaming state LED 29, the speaker 30, or the like.

  Below the cover glass 18a of the glass frame 18, an upper plate unit including an upper plate 21 and the like is provided. The upper plate 21 supplies a game ball (game medium) to a hitting ball launching device (not shown). The upper plate unit includes an upper plate cover unit 20 having a production button 31.

  Further, a fixed panel 22 that is positioned below the glass frame 18 and is fixed to the front frame 3 is provided with a lower plate 23, an operation unit 24 of a ball striking device, and the like. When the player rotates the operation unit 24, the hitting ball launching device launches the game ball supplied from the upper plate 21 to the game area 10a (see FIG. 2) of the game board 10.

  The lower tray 23 is provided with a lower tray ball removing mechanism 16 for discharging the game balls stored in the lower tray 23. A key 25 for locking the glass frame 18 is provided on the lower right side of the front frame 3.

  Further, an effect button 31 having an effect button switch (SW) 31a (see FIG. 4) for receiving an operation input from the player is provided on the front side of the upper plate 21 in the upper plate unit. By operating the effect button 31, the player can perform an effect in which the player's operation is intervened in a variable display game on the display device 48 (board display device, image display device, see FIG. 2). . For example, the production content can be selected. Note that the fluctuation display game includes a special figure fluctuation display game and a common figure fluctuation display game. In the present specification, when the fluctuation display game is simply referred to, the special figure fluctuation display game is indicated.

  Further, the effect pattern may be changed not only during the execution of the variable display game but also by the player operating the effect button 31 in the normal game state. Note that the normal gaming state (normal state) is a gaming state in which no special gaming state has occurred. In addition, the special game state is, for example, a state (progressive change state) or a big hit state (special change state) with a high probability of occurrence of a special result (big hit) in a specific game state (general power support state or a short time state) described later or a variable display game. Gaming state).

  In addition, after the variable display game is started, an operation promotion effect for promoting the operation of the effect button 31 is executed. By operating the effect button 31 while the operation promotion effect is being executed, the start memory is stored. It is possible to execute a notice effect or the like for notifying the result of the corresponding variable display game in advance.

  In the upper right portion of the upper plate 21, a ball lending button 26 that is operated when a player borrows a game ball and a discharge button 27 that is operated to discharge a prepaid card from a card unit (not shown) are provided. . Further, a balance display unit 28 for displaying a balance of a prepaid card or the like is provided between the ball lending button 26 and the discharge button 27.

  FIG. 2 is a front view of the gaming board 10 provided in the gaming machine 1 according to the first embodiment of the present invention.

  The game board 10 includes a flat game board body 10b (made of wood or synthetic resin) serving as a mounting base for various members, and has a game area 10a surrounded by a guide rail 35 on the front surface of the game board body 10b. ing. A front component (side case) 33 is attached to the front surface of the game board main body 10b and outside the guide rail 35. Further, the front right component 33 on the lower right side of the game area 10a is covered with a black transparent certificate plate 36 at the center of the front. Then, a game ball is fired from the hitting ball launching device into the game area 10a surrounded by the guide rail 35 to play a game. In the game area 10a, a windmill 45 as a hitting direction changing member, a number of obstacle nails (not shown), and the like are arranged, and the shot game balls are changed in rolling direction by these hitting direction changing members. The game area 10a flows down.

  A center case 46 that forms a window serving as a display area for the variable display game is attached to the approximate center of the game area 10a. Behind the window formed in the center case 46 is disposed a display device 48 as an effect display device capable of executing an effect of a variable display game that displays a plurality of identification information in a variable manner (variable display). The display device 48 includes, for example, a liquid crystal display (LCD), and is arranged so that display contents can be viewed from the front side of the game board 10 through the window portion of the center case 46. Note that the display device 48 is not limited to a device including a liquid crystal display, and may include a display such as an EL or CRT.

  A plurality of variable display areas are provided in an area (display area) where an image of the display screen can be displayed, and identification information (special symbol) and a character that produces a variable display game are displayed in each variable display area. . In addition, an image (for example, jackpot display, fanfare display, ending display, etc.) based on the progress of the game is displayed on the display screen.

  A stage portion 46 a is provided below the window portion of the center case 46. The stage portion 46a of the center case 46 opens toward the game area 10a so as to receive game balls flowing down the game area 10a, and passes through a warp passage (not shown) disposed inside the center case 46. A game ball is discharged. Since the stage portion 46a of the center case 46 is disposed above the first start winning opening 37 and the second starting winning opening 38, the game balls rolling on the stage portion 46a are moved to the first start winning opening 37 and the second start winning opening 37. 2 It is configured to easily flow down to the start winning prize port 38. Details of the first start winning opening 37 and the second starting winning opening 38 will be described later.

  On the left side of the center case 46 in the game area 10a, a normal symbol start gate (common figure start gate, auxiliary start area) 34 is provided. A gate switch (SW) 34 a (see FIG. 3) for detecting a game ball that has passed through the normal start gate 34 is provided inside the normal start gate 34. Then, when the game ball that has been driven into the game area 10a passes through the normal diagram start gate 34, a normal variation display game (auxiliary game) is executed.

  Further, three general winning holes 44 are arranged on the lower left side of the center case 46, and one general winning hole 44 is arranged on the lower right side of the center case 46. In addition, winning of a game ball in the general winning opening 44 is detected by winning opening switches (SW) 44a to 44n (see FIG. 3) provided in the general winning opening 44.

  Also, below the center case 46 is provided a first start winning opening (first special start area) 37 for giving a start condition for the special figure variation display game, and an inverted “C” shape is formed directly below the first start winning opening. And a pair of movable members (guidance members) 38a that are converted into a state in which the game ball can easily flow into (guidance state), and a second start winning opening (second special start area) 38 is disposed therein. . And when a game ball wins the 1st start winning opening 37 or the 2nd starting winning opening 38, a special figure change display game is performed as an auxiliary game.

  The pair of movable members 38a of the second start winning prize port 38 always holds a closed state (a disadvantageous state for the player, a non-inductive state) with an interval of about the diameter of the game ball. However, since the first start winning opening 37 is provided above the second starting winning opening 38, the game ball cannot be won in the closed state.

  Then, when the result of the normal map change display game becomes a predetermined stop display mode, the second start is performed by opening a reverse “C” shape by the general electric solenoid 38b (see FIG. 3) as the driving device. The game ball is configured to be changed to an open state (a state advantageous to the player, an easy winning state, a guiding state) in which a game ball easily flows into the winning port 38.

  The movable member 38a is controlled by a game control device to be described later. The game control device generates the above-described specific game state (general power support state, short time state) by increasing the frequency of occurrence of the easy-to-win state or increasing the occurrence time of the easy-to-win state.

  Further, an attacker-type opening / closing door that is opened below the second start winning opening 38 of the game area 10a by being rotated in a direction in which the upper end side is tilted forward by a large winning opening solenoid 42b (see FIG. 3). A special variable winning device 42 having a large winning opening 42a is provided. The special variation winning device 42 converts the state where the big prize opening is closed (blocking state unfavorable for the player) from the closed state (a state advantageous to the player, a special gaming state) according to the result of the special figure variation display game. A predetermined game value (prize ball) is given to the player by facilitating the inflow of the game ball into the big prize opening. In addition, a count switch 42d (see FIG. 3) as a detecting means for detecting a game ball that has entered the special winning opening is disposed inside the special winning opening (winning area).

  When the game ball wins the general winning port 44, the first starting winning port 37, the second starting winning port 38, and the special winning port of the special variable winning device 42, the payout control device 580 (see FIG. 3) wins the winning prize. Control is performed so that the number of prize balls corresponding to the type of mouth is discharged from the dispensing device to the upper plate 21 or the lower plate 23 of the front frame 3. Further, below the special variable winning device 42, an out port 43 is provided for collecting game balls that have not won a winning port or the like.

  In addition, on the outside of the game area 10a (for example, the lower right portion of the game board 10), the special figure variation display game (first special figure variation display game, second special figure variation display game) on the display device 48, and the general figure There is provided a collective display device 50 for executing a general-purpose variable display game triggered by winning at the start gate 34. Further, the collective display device 50 is provided with a display unit for displaying information such as the current gaming state.

  Here, the collective display device 50 will be described. The collective display device 50 includes a first special figure fluctuation display unit (special figure 1 display unit) 51 and a second special figure fluctuation display unit (figure display unit) (figure display game) composed of a 7-segment type display (LED lamp) or the like. Special figure 2 display) 52, a general figure fluctuation display section (auxiliary fluctuation display section, universal figure display) 53 for a common figure fluctuation display game, and the starting memory number of each fluctuation display game similarly configured by LED lamps A storage display unit for notification (special figure 1 hold display 54, special figure 2 hold display 55, general figure hold display 56) is provided.

  Further, the collective display device 50 is turned on when a big hit occurs and a first gaming state display unit (first gaming state indicator) 57 that notifies the occurrence of the big hit, and lights up when a short time state occurs to notify the occurrence of a short time state. A second gaming state display unit (second gaming state indicator) 60, a state indicator 58 for displaying that the probability state of the jackpot is a high probability state when the gaming machine 1 is turned on, and the number of rounds at the time of the jackpot A round display section 59 for displaying (the number of times the special variable winning device 42 is opened and closed) is provided.

  The special figure fluctuation display game in the special figure 1 display 51 or the special figure 2 display 52 is a 7 segment type while the fluctuation display game is being executed, that is, while the decoration special figure fluctuation display game is being performed on the display device 48. By flickering the segments of the indicator, special display information (special drawing, special symbol) is changed and displayed in a changing manner every predetermined time.

  When the variation time determined at the start of the variation display of the special identification information has elapsed, the variation display is stopped at the special identification information corresponding to the result of the variation display game, and the special figure 1 display 51 or special figure is displayed. 2 The special figure fluctuation display game on the display 52 is ended.

  The normal display (auxiliary display unit) 53 blinks the lamp during the change and displays that the change is being made. When the game result is “out of”, for example, the lamp is turned off, and when the game result is “hit”, the lamp is turned on to display the game result.

  The special figure 1 hold display 54 displays the number of undigested balls (starting memory number = holding number) out of the number of winning balls to the first start winning opening 37, which is the variation start condition of the special figure 1 display 51. . Specifically, four LED lamps are provided. When the number of holding is “0”, all four lamps are turned off, and when the number of holding is “1”, only lamp 1 is turned on. Further, when the number of holdings is “2”, the lamps 1 and 2 are turned on, when the number of holdings is “3”, the lamps 1, 2 and 3 are turned on, and when the number of holdings is “4”, 4 is set. All the lamps 1 to 4 are turned on.

  The special figure 2 hold display 55 displays the start memory number (= hold number) of the second start winning port 38, which is the variation start condition of the special figure 2 display 52, in the same manner as the special figure 1 hold display 54. To do.

  The general map hold display 56 displays the start memory number (= hold number) of the general map start gate 34 which is the variation start condition of the general map display 53. For example, when two LED lamps are provided, lamps 1 and 2 are turned off when the number of holdings is “0”, and only lamp 1 is turned on when the number of holdings is “1”. When the number of hold is “2”, lamps 1 and 2 are turned on. When the number of hold is “3”, lamp 1 is blinked, lamp 2 is turned on, and when the number of hold is “4”. Lamps 1 and 2 are blinked.

  For example, the first gaming state indicator 57 turns off the lamp in the normal gaming state, and turns on the lamp when the big hit has occurred. For example, the second gaming state indicator 60 turns off the lamp in the normal gaming state, and turns on the lamp when the time-short state occurs.

  For example, the status indicator 58 turns off the lamp when the jackpot probability state is low when the gaming machine 1 is turned on, and when the jackpot probability state is high probability when the gaming machine 1 is turned on. Turns on the lamp.

  For example, the round display unit 59 turns off the lamp in the normal gaming state, and turns on the lamp corresponding to the number of rounds (2 rounds or 15 rounds) when the big hit occurs. The round display unit 59 may be configured by a 7 segment type display.

  Here, the flow of the game in the gaming machine 1 according to the first embodiment of the present invention and the details of the fluctuation display game (the normal figure fluctuation display game, the special figure fluctuation display game) will be described.

  As described above, in the gaming machine 1 according to the first embodiment of the present invention, a game is played by launching a game ball (pachinko ball) from a not-shown hitting ball launcher toward the game area 10a. The launched game balls flow down the game area 10a while changing the rolling direction by means of direction changing members such as obstacle nails and windmills 45 arranged in various places in the game area 10a, and the normal start gate 34, general winning opening 44, the first start winning port 37, the second starting winning port 38 or the special variable winning device 42 is won, or it flows into the out port 43 provided at the bottom of the game area 10a and is discharged from the game area. When a game ball wins the general winning port 44, the first starting winning port 37, the second starting winning port 38, or the special variable winning device 42, the number of winning balls corresponding to the type of the winning winning port is controlled for payout. From the dispensing unit controlled by the device 580, the sheet is discharged to the upper plate 21 or the lower plate 23 of the front frame 3.

  As described above, a gate switch 34a (see FIG. 3) for detecting a game ball that has passed through the general diagram start gate 34 is provided in the general diagram start gate 34. The usual start gate 34 is, for example, a non-contact type switch. When the game ball that has been driven into the game area 10a passes through the usual figure start gate 34, it is detected by the gate switch 34a, and the usual figure change display game (conversion lottery) is executed.

  In addition, a state in which the normal map change display game cannot be started, for example, when the normal map change display game has already been performed and the normal map change display game has not ended, or the result of the normal map change display game is a hit. When the second start winning opening 38 is converted to the open state and the game ball passes through the ordinary start gate 34, if the number of ordinary start memories is less than the upper limit, the ordinary start memory number is added (+1). ) And one ordinary start memory is stored. The memorized number of the general start prize is displayed on the general figure hold display 56 for notifying the start prize number of the collective display device 50.

  In addition, in the normal chart start memory, a random number value for hit determination for determining a hit error of the normal figure fluctuation display game is stored, and when the random number value for hit determination coincides with the determination value In addition, a specific result mode (specific result) is derived by winning the normal map change display game (winning of the conversion lottery).

  The usual map change display game is executed by a change display unit (common figure display) 53 provided in the collective display device 50. The general-purpose indicator 53 is composed of LEDs indicating normal identification information (general-purpose symbols, normal symbols) when the LED is lit, and indicating misalignment when the LED is not lit. Information variation is displayed, and after a predetermined variation display time has elapsed, the LED is turned on or off to display the result.

  Note that, for example, numbers, symbols, character designs, and the like may be used as the normal identification information, and this may be configured to be displayed by variably displaying for a predetermined time and then stopped. If the stop display of this ordinary figure change display game is a specific result (winning of the conversion lottery), the pair of opening and closing members (guidance members) 38a of the second start winning opening 38 will be in a predetermined time ( For example, it becomes an open state (inductive state) opened for 0.3 seconds. This makes it easier for a game ball to win the second start winning opening 38, and the number of times that the special figure 2 variable display game is executed increases.

  When the random number value extracted at the time of detection of the passage to the universal chart start gate 34 is a winning value, the normal symbol displayed on the universal chart display unit 53 stops in the hit state and enters the hit state. At this time, the second start winning opening 38 is in a state in which the open / close member 38a is opened for a predetermined time (for example, 0.3 seconds) by driving a built-in power solenoid 38b (see FIG. 3). And the winning of the game ball into the second start winning opening 38 is allowed.

  The winning ball to the first starting winning port 37 and the winning ball to the second starting winning port 38 are respectively a start port 1 switch 37d (see FIG. 3) and a start port 2 switch 38d (see FIG. 3) provided inside. ) Is detected. The game balls won in the first start winning opening 37 are detected as start winning balls in the special figure 1 variable display game and are stored in the limit of four, and the game balls won in the second start winning opening 38 are special figures. It is detected as a start winning ball of a two-variable display game and is stored up to four.

  In addition, when the starting winning ball is detected, a big hit random number value, a big hit symbol random number value, and each variation pattern random number value are extracted, and the extracted random number value is stored in a special figure in the game control device 500 (see FIG. 3). Each area (a part of the RAM) is stored as a special figure start winning memory for a predetermined number of times (for example, a maximum of four times). The number of the special figure start winning memory is displayed on the start display number storage display unit (the special figure 1 hold display 54 and the special figure 2 hold display 55) of the collective display device 50, and Also displayed on the display device 48 of the center case 46.

  The game control device 500 receives a special figure indicator (variable display device, special figure 1 indicator 51 or special figure) based on winning in the first starting prize opening 37 or the second starting prize opening 38, or their start memory. 2 display 52), a special figure 1 fluctuation display game or a special figure 2 fluctuation display game is played.

  The special figure 1 fluctuation display game and the special figure 2 fluctuation display game are performed by variably displaying a plurality of special symbols (special figures and identification information) and then stopping and displaying a predetermined result form. In addition, a decorative special figure fluctuation display game is displayed in which a plurality of types of identification information (for example, numbers, symbols, character designs, etc.) are variably displayed on the display device 48 corresponding to each special figure fluctuation display game. ing.

  In the decorative special symbol variation display game on the display device 48, for example, the decorative special symbol (identification information) composed of the above-described numbers is left (first special symbol), right (second special symbol), middle (third special symbol). The variation display is started in the order of symbols), the symbols that have been varied after a predetermined time are sequentially stopped, and the result of the special symbol variation display game is displayed. In addition, the display device 48 performs a decoration special figure variation display game with a special decoration pattern corresponding to the number of stored special figure winning memories, and various effects such as the appearance of a character are provided to enhance the interest.

  Further, when winning at the first start winning port 37 or the second starting winning port 38 is made at a predetermined timing (specifically, when the winning random number at the time of winning detection is a winning value) As a result of the variable display game, a specific result mode (special result mode) is derived from the display symbols, and a big hit state (special game state) is obtained. Correspondingly, the display mode of the display device 48 is also a special result mode (for example, any one of the numbers in the flat order such as “7, 7, 7”).

  At this time, the special variable prize winning device 42 is in a closed state (player) in which the big prize opening does not accept a game ball for a predetermined time (for example, 30 seconds) by energizing the big prize solenoid 42b (see FIG. 3). From an unfavorable state) to an open state (a state advantageous to the player) in which a game ball can be easily received. In other words, the special winning opening provided in the special variable prize winning device 42 opens widely until a predetermined time or a predetermined number of game balls wins, so that a privilege that a player can acquire many game balls during this period is given. Is done.

  The special figure 1 display 51 and the special figure 2 display 52 may be separate displays or the same display, but each special figure variation display game is not executed simultaneously. In addition, for the decorative special figure variation display game on the display device 48, the special figure 1 variation display game and the special figure 2 variation display game may be executed in different display devices or in different display areas. It may be executed in the display device or display area. In this case, the decorative special figure fluctuation display game corresponding to the special figure 1 fluctuation display game and the special figure 2 fluctuation display game is prevented from being executed simultaneously.

  The special figure 2 variable display game is executed with priority over the special figure 1 variable display game. That is, when there is a start memory of the special figure 1 fluctuation display game and the special figure 2 fluctuation display game, and the execution of the special figure fluctuation display game becomes possible, the special figure 2 fluctuation display game is executed.

  In addition, in a state where the special figure 1 variable display game (special figure 2 variable display game) can be started and the start memory number is 0, a game is played in the first start winning opening 37 (second start winning opening 38). When the ball wins, the start memory is stored as the start right is generated. At this time, the start memory number is incremented by 1, and the special figure 1 fluctuation display game (special figure 2 fluctuation display game) is immediately started based on the start memory, and at this time, the start memory number is decremented by one.

  On the other hand, a state in which the special figure 1 fluctuation display game (the special figure 2 fluctuation display game) cannot be started immediately, for example, the special figure 1 fluctuation display game or the special figure 2 fluctuation display game has already been performed, and the special figure fluctuation display game is ended. If a game ball is won in the first start winning opening 37 (second start winning opening 38) in a state that is not played or in a special gaming state, the starting stored number is less than the upper limit number. 1 is added and one start-up memory is stored. And the state where the special figure 1 variable display game (the special figure 2 variable display game) can be started in the state where the starting memory number becomes 1 or more (the end of the previous special figure variable display game or the end of the special game state) Then, the start memory number is decremented by 1, and the special figure 1 variable display game (special figure 2 variable display game) is started based on the stored start memory.

  In the following description, when the special figure 1 fluctuation display game and the special figure 2 fluctuation display game are not distinguished, they are simply referred to as a special figure fluctuation display game.

  Although not particularly limited, the start port 1 switch 37d in the first start prize port 37, the start port 2 switch 38d in the second start prize port 38, the gate switch 34a, and the prize port switches 44a to 44a. 44n, the count switch 42d is provided with a magnetic detection coil, and a non-contact type magnetic proximity sensor (hereinafter referred to as a proximity switch) that detects a game ball using a phenomenon in which a magnetic field changes when a metal approaches the coil. ) Is used. As the front frame open detection switch 3b on the front frame 3 or the glass frame open detection switch 18b provided on the glass frame 18, a micro switch having a mechanical contact can be used.

  FIG. 3 is a block diagram illustrating a configuration of the game control device 500 according to the first embodiment of this invention.

  The gaming machine 1 includes a game control device 500. The game control device 500 is a main control device (main board) that controls the game in an integrated manner, and includes a game microcomputer (hereinafter referred to as a game microcomputer) 511. The CPU unit 510 includes an input port 520 having an input port, an output unit 530 having an output port, a driver, and the like, a data bus 540 for connecting the CPU unit 510, the input unit 520, and the output unit 530.

  The CPU unit 510 logically inverts a signal (start winning detection signal) from the gaming microcomputer 511 called an amusement chip (IC) and the proximity switch interface chip (proximity I / F) 521 in the input unit 520. An oscillating circuit (quartz crystal) including an inverting circuit 512 formed of an inverter or the like to be input to the gaming microcomputer 511 and an oscillator such as a crystal oscillator, and generating a clock serving as a reference for a CPU operation clock, a timer interrupt, and a random number generating circuit. Oscillator) 513 and the like. The game control device 500 and electronic components such as a solenoid and a motor driven by the game control device 500 are supplied with a DC voltage of a predetermined level such as DC32V, DC12V, and DC5V generated by the power supply device 300 to be operable. Composed.

  The power supply apparatus 300 includes a normal power supply unit including an AC-DC converter that generates a DC32V DC voltage from a 24V AC power supply, a DC-DC converter that generates a lower level DC voltage such as DC12V and DC5V from a DC32V voltage, and the like. 310, a backup power supply unit 320 that supplies a power supply voltage to the RAM 511c inside the gaming microcomputer 511 at the time of a power failure, a power failure monitoring circuit and an initialization switch, and notifies the game control device 500 of the occurrence and recovery of the power failure. A control signal generation unit 330 that generates and outputs control signals such as a power failure monitoring signal, an initialization switch signal, and a reset signal is provided.

  In this embodiment, the power supply device 300 is configured separately from the game control device 500, but the backup power supply unit 320 and the control signal generation unit 330 are integrated on a separate board or the game control device 500, that is, You may comprise so that it may provide on a main board | substrate. Since the game board 10 and the game control device 500 are to be replaced when the model is changed, the backup power supply unit 320 and the control signal generation unit 330 are provided on a board different from the power supply apparatus 300 or the main board as in the embodiment. By providing, it can remove from the object of replacement | exchange and can aim at cost reduction.

  The backup power supply unit 320 can be composed of one large-capacitance capacitor such as an electrolytic capacitor. The backup power is supplied to the game microcomputer 511 (particularly the built-in RAM) of the game control device 500, and the data stored in the RAM 511c is retained even during a power failure or after the power is shut off. The control signal generation unit 330 monitors the voltage of 32V generated by the normal power supply unit 310, for example, and detects the occurrence of a power failure when the voltage drops to, for example, 17V or less, changes the power failure monitoring signal, and resets the signal after a predetermined time. Is output. In addition, a reset signal is output after a predetermined time has elapsed from the time when the power is turned on or the power is restored. After the power failure is restored, the game control device 500 restores the gaming state before the power failure based on the game data held in the RAM 511c. Note that the backup power supply unit 320 can hold game data for two to three days or more.

  The initialization switch signal is a signal generated when the initialization switch is turned on, and forcibly initializes information stored in the RAM 511c in the gaming microcomputer 511 and the RAM in the payout control device 580. . Although not particularly limited, the initialization switch signal is read when the power is turned on, and the power failure monitoring signal is repeatedly read in the main loop of the main program executed by the gaming microcomputer 511. The reset signal is a kind of forced interrupt signal and resets the entire control system.

  The gaming microcomputer 511 has a CPU (central processing unit, microprocessor) 511a, a non-rewritable (read-only) ROM (read only memory, non-volatile storage means) 511b, and a rewritable memory ( A RAM (random access memory, volatile storage means) 511c and an individual ID register 511d, which can be read and written as needed, are provided.

  The ROM 511b stores invariant information (program, fixed data, various random number judgment values, etc.) for game control in a non-volatile manner (non-rewritable), and the RAM 511c stores the work area and various signals of the CPU 511a during game control. Used as a storage area for random values. As the ROM 511b or the RAM 511c, an electrically rewritable nonvolatile memory such as an EEPROM may be used.

  In addition, the ROM 511b stores, for example, variation pattern distribution information for determining a variation pattern that defines the execution time of the special figure variation display game, the contents of the effects, the presence or absence of the reach state, and the like.

  The variation pattern distribution information is distribution information for the CPU 511a to determine the variation pattern by referring to the variation pattern random numbers 1 to 3 stored as the start memory. The variation pattern distribution information includes out-of-range variation pattern distribution information selected when the result is out of range, large hit variation pattern distribution information selected when the result is per 15R or per 2R, and the like. For example, the special pattern fluctuation display game is a fluctuation pattern distribution information related to a fluctuation pattern without reach, a fluctuation pattern distribution information related to a fluctuation pattern in which normal (N) reach is executed in the special figure fluctuation display game, and a special figure fluctuation display game. Fluctuation pattern distribution information related to a fluctuation pattern for executing a special (SP) 1 reach, Fluctuation pattern distribution information relating to a fluctuation pattern for executing a special (SP) 2 reach in a special figure fluctuation display game, Special figure fluctuation for a big hit There is variation pattern distribution information related to a variation pattern for executing premium reach in a display game.

  Further, the pattern distribution information includes the latter half variation pattern distribution information and the first half variation pattern distribution information.

  Here, the ROM 511b constitutes a change distribution information storage unit that stores a plurality of change distribution information related to the execution time setting in the special figure change display game.

  Reach (reach state) has a display device whose display state can change, and the display device derives and displays a plurality of display results at different times, and the plurality of display results are predetermined. In the gaming machine 1 in which the game state becomes a game state advantageous to the player (special game state) when the special result mode is entered, the game is already derived at the stage where some of the plurality of display results are not yet derived and displayed. Display state that satisfies the condition that the displayed display result is a special result mode (for example, a plurality of pieces of identification information except for the identification information to be stopped at the end are stopped with identification information that can generate a special result in which a special gaming state is generated) And the state in which the identification information to be stopped last is variably displayed). In other words, the reach state is deviated from the display condition that is the special result mode even when the display device's variable display control progresses and reaches the stage before the display result is derived and displayed. There is no display mode. For example, a state where so-called full-rotation reach is performed in a variable display region while maintaining a state in which special result modes are aligned (so-called full rotation reach) is also included in the reach state. The reach state is a display state at the time when the display control of the display device has progressed to reach a stage before the display result is derived and displayed, and is determined before the display result is derived and displayed. The display state in the case where at least a part of the display results of the plurality of variable display areas satisfies the condition for the special result mode.

  Thus, for example, a decorative special figure fluctuation display game displayed on the display device corresponding to the special figure fluctuation display game has a plurality of identification information for a predetermined time in each of the left, middle and right fluctuation display areas on the display device 48. After the variable display, if the variable display is stopped and displayed in the order of left, right and middle, and the result mode is displayed, the left and right variable display areas satisfy the conditions for the special result mode (for example, , The state where the variable display is stopped with the same identification information) becomes the reach state. In addition to this, when the variable display of all the variable display areas is temporarily stopped, the condition that the special result mode is satisfied in any two of the left, middle, and right variable display areas (for example, the same The state that is the identification information (except for the special result mode) may be the reach state, and the remaining one variable display area may be variably displayed from the reach state.

  In addition, the reach state includes a plurality of reach productions, and the possibility of deriving a special result form is different (reliability is different). As the reach production, normal reach, special 1 reach, special 2 reach, special 3 reach, special 4 reach etc. are set. The reliability increases in the order of no reach <normal reach <special 1 reach <special 2 reach <special 3 reach <special 4 reach (the probability that a special result mode is derived differs depending on reach production). . In addition, the reach state is included in a variable display mode at least when a special result mode is derived in a special figure variable display game (when a big hit is achieved). In other words, there may be included a variable display mode in a case where it is determined that a special result mode is not derived in the special figure variable display game (when it is out of place).

  Here, the level of reliability can be calculated by the ratio of the effect selection when the special result mode is derived and the effect selection when the special result mode is not derived.

  For example, in a variable display game in which a special result mode is derived, the SP1 reach is selected at a rate of 10%, and the SP3 reach is selected at a rate of 40%. On the other hand, in a variable display game in which no special result mode is derived, the SP1 reach is selected at a rate of 5%, and the SP3 reach is selected at a rate of 1%. By setting such a selection ratio, it can be said that the expected degree of SP1 reach is lower than the expected degree of SP3 reach.

  Also in the present invention, since the selection ratio is different for such reach production (or specific production), it is possible to compare the production with high reliability and the production with low reliability as described above. ing.

  The CPU 511a executes a game control program in the ROM 511b to generate a control signal (command) for the payout control device 580 and the effect control device 550, or generate and output a drive signal for a solenoid or a display device. To control the entire gaming machine 1.

  Further, although not shown, the gaming microcomputer 511 generates a jackpot determination random number for the special figure variation display game, a big hit symbol random number for determining the jackpot symbol, a hit determination random number for the common figure variation display game, and the like. A random number generation circuit. Furthermore, a clock generator is provided that generates a clock that gives a timer interrupt signal of a predetermined period (for example, 4 milliseconds) to the CPU 511a and a renewal timing of the random number generation circuit based on an oscillation signal (original clock signal) from the crystal oscillator 513. Yes.

  In addition, the CPU 511a selects any one of a plurality of variation pattern distribution information stored in the ROM 511b in a start port switch monitoring process (S901) and a special figure routine process (S909) in a special figure game process to be described later. Fluctuation pattern distribution information is acquired. Specifically, the CPU 511a determines the game result (big hit or miss) of the special figure fluctuation display game, the probability state (normal probability state or high probability state) of the special figure fluctuation display game as the current game state, and the current game. Based on the operation state (normal operation state or short-time operation state) of the second start winning port 38 as a state, the number of start memories, etc., one of the variation pattern distribution information is selected from a plurality of variation pattern distribution information And get.

  Although not shown, the payout control device 580 includes a CPU, a ROM, a RAM, an input interface, an output interface, and the like, and drives a payout motor of the payout unit in accordance with a prize ball payout command (command or data) from the game control device 500. , Control for paying out a prize ball. Also, the payout control device 580 performs control for driving the payout motor of the payout unit on the basis of the loan request signal from the card unit and paying out the rental money. In addition, on condition that the card unit is connected, the payout control device 580 issues a game ball launch permission signal, so that the launch control device 581 is ready to launch.

  The input unit 520 of the game control device 500 includes a start port 1 switch 37d in the first start winning port 37, a start port 2 switch 38d in the second start winning port 38, a gate switch 34a in the usual start gate 34, Connected to the prize opening switches 44a to 44n and the count switch 42d, a negative logic signal such as a high level of 11V and a low level of 7V supplied from these switches is inputted and converted into a positive logic signal of 0V-5V. An interface chip (proximity I / F) 521 is provided. Proximity I / F 521 seems to be floating because the input range is 7V-11V, the lead wire of the proximity switch is improperly shorted, the switch is disconnected from the connector, or the lead wire is disconnected. An abnormal state can be detected, and when an abnormality is detected, an abnormality detection signal is output. At this time, the abnormality detection signal is input to the input port 523.

  All outputs of signals input to the proximity I / F 521 are supplied to the input port 522, read into the game microcomputer 511 via the data bus 540, and from the game control device (main board) 500 via the relay board 591. It is supplied to a test firing test apparatus (not shown). In addition, the detection signal of the start port 1 switch 37d and the start port 2 switch 38d among the outputs of the proximity I / F 521 is configured to be input to the gaming microcomputer 511 through the inverting circuit 512 in addition to the input port 522. ing. The inversion circuit 512 is provided because the signal input terminal of the gaming microcomputer 511 assumes that a signal from a micro switch or the like is input, and detects negative logic, that is, low level (0 V) as an effective level. Because it is designed to do.

  Therefore, when a micro switch is used as the start port 1 switch 37d and the start port 2 switch 38d, it is possible to directly input the detection signal to the gaming microcomputer 511 without providing the inverting circuit 512. That is, when it is desired to directly input negative logic signals from the start port 1 switch 37d and the start port 2 switch 38d to the gaming microcomputer 511, the proximity switch cannot be used. As described above, the proximity I / F 521 has a signal level conversion function. In order to enable such a level conversion function, the proximity I / F 521 is supplied with a voltage of 12 V from the power supply device 300 in addition to a voltage such as 5 V required for normal IC operation. It has become.

  Further, the input unit 520 includes a first start winning opening converted by a signal from the fraud detection magnetic sensor switch 39a and the vibration sensor switch 39b provided on the front frame 3 of the gaming machine 1 and the proximity I / F 521. 37, the start port 1 switch 37d in the 37, the start port 2 switch 38d in the second start winning port 38, the gate switch 34a, the winning port switches 44a to 44n, the signals from the count switch 42d and the game via the data bus 540 An input port 522 for supplying to the microcomputer 511 is provided. The data held by the input port 522 can be read by asserting the enable signal CE1 (changing to an effective level) by decoding the address assigned to the input port 522 by the gaming microcomputer 511. The same applies to other ports described later.

  Further, the input unit 520 includes signals from the front frame opening detection switch 3b provided on the front frame 3 of the gaming machine 1 and the glass frame opening detection switch 18b provided on the glass frame 18, and from the payout control device 580. An input port 523 is provided which takes in a status signal indicating a payout abnormality, a shot ball break switch signal indicating a shortage of game balls before payout, and an overflow switch signal indicating an overflow and supplies them to the game microcomputer 511 via the data bus 540. ing. The overflow switch signal is a signal that is output when it is detected that a predetermined amount or more of game balls are stored in the lower plate 23 (full).

  Further, the input unit 520 is provided with a Schmitt trigger circuit 524 for inputting signals such as a power failure monitoring signal, an initialization switch signal, and a reset signal from the power supply device 300 to the gaming microcomputer 511 and the like. The circuit 524 has a function of removing noise from these input signals. Of the signals from the power supply device 300, the power failure monitoring signal and the initialization switch signal are once input to the input port 523 and taken into the game microcomputer 511 via the data bus 540. That is, it is treated as a signal equivalent to the signal from the various switches described above. This is because the number of terminals receiving external signals provided in the gaming microcomputer 511 is limited.

  On the other hand, the reset signal RST from which noise has been removed by the Schmitt trigger circuit 524 is directly input to a reset terminal provided in the gaming microcomputer 511 and is also supplied to each output port of the output unit 530. In addition, the reset signal RST is directly output to the relay board 591 without going through the output unit 530, thereby turning off the test test signal held in the port (not shown) of the relay board 591 for output to the test board 591. It is configured as follows. Further, the reset signal RST may be configured to be output to the test firing test apparatus via the relay board 591. The reset signal RST is not supplied to each input port (522, 523) of the input unit 520. The data set to each output port of the output unit 530 by the gaming microcomputer 511 immediately before the reset signal RST is input needs to be reset to prevent malfunction of the system, but immediately before the reset signal RST is input, This is because the data read by the game microcomputer 511 from each input port (522, 523) is discarded by resetting the game microcomputer 511.

  The output unit 530 of the game control device 500 generates a 4-bit data signal output to the payout control device 580 connected to the data bus 540 and a control signal (data strobe signal) indicating the validity / invalidity of the data. A first output port 531a that transmits to 580 by parallel communication and a serial transmission circuit 535 that transmits data to the effect control device 550 by serial communication are provided.

  Further, the output unit 530 receives data indicating special symbol information of the variable display game to a test firing test apparatus of an accredited organization, which is connected to the data bus 540, and a signal indicating the probability status of the jackpot via the relay board 591. The output buffer 532b is configured to be mountable. The buffer 532b is a component that is not mounted on a game control device (main board) of a pachinko gaming machine as an actual machine (mass production product) installed in the game shop. Note that a detection signal of a switch that does not require processing, such as a start port switch, output from the proximity I / F 521 is supplied to the test firing test apparatus via the relay substrate 591 without passing through the buffer 532b.

  On the other hand, detection signals that cannot be supplied to the test fire test device as they are, such as the magnetic sensor switch 39a and the vibration sensor switch 39b, are once taken into the game microcomputer 511 and processed into other signals or information. For example, an error signal indicating that the gaming machine cannot be controlled is supplied from the data bus 540 to the test firing test apparatus via the buffer 532b and the relay board 591. Note that the relay board 591 is provided with a port that takes in the signal output from the buffer 532b and supplies it to the test test apparatus, a connector that relays and transmits the signal line of the switch detection signal that does not pass through the buffer, and the like. Yes. A chip enable signal CE output from the gaming microcomputer 511 is also supplied to the port on the relay board 591, and a signal of a port that is selectively controlled by the signal CE is supplied to the test test apparatus.

  The output unit 530 also includes a solenoid (large winning port solenoid 42b) connected to the data bus 540 for opening and closing the special variable winning device 42 and a solenoid (general power solenoid 38b) for opening and closing the movable member 38a of the second start winning port 38. ), The third output port 531c for outputting the ON / OFF data of the digit line to which the LED cathode terminal of the collective display device 50 is connected, and the LED displayed according to the contents displayed on the collective display device 50 A fourth output port 531d for outputting ON / OFF data of the segment line connected to the anode terminal of the second, and a second output port for outputting information related to the gaming machine 1 such as jackpot information to the information transmission unit 508 of the external information terminal board A 5-output port 531e is provided. The information related to the gaming machine 1 output from the information transmission unit 508 of the external information terminal board is supplied to, for example, an information collection terminal installed in a game store or a game hall internal management device (not shown).

  Further, the output unit 530 is provided with a first driver (drive circuit) 533a, a second driver 533b, a third driver 533c, and a fourth driver 533d. The first driver 533a receives the opening / closing data signal of the big prize opening solenoid 42b output from the third output port 531c, receives the solenoid driving signal and the opening / closing data signal of the power solenoid 38b, and generates and outputs the solenoid driving signal. . The second driver 533b outputs an on / off drive signal for the digit line on the current drawing side of the collective display device 50 output from the third output port 531c. The third driver 533c outputs an on / off drive signal for the segment line on the current supply side of the collective display device 50 output from the fourth output port 531d. The fourth driver 533d outputs an external information signal supplied from the fifth output port 531e to an external device such as a management device to the information transmission unit 508 of the external information terminal board.

  The first driver 533a is supplied with DC32V from the power supply device 300 as a power supply voltage so that a solenoid operating at 32V can be driven. Also, DC12V is supplied to the third driver 533c that drives the segment lines of the collective display device 50. Since the second driver 533b for driving the digit line is for extracting the digit line corresponding to the display data with a current, the power supply voltage may be either 12V or 5V. The third driver 533c that outputs 12V supplies current to the anode terminal of the LED via the segment line, and the second driver 533b that outputs ground potential extracts current from the cathode terminal via the segment line, so that the dynamic drive system The power supply voltage flows through the LEDs sequentially selected in step 1 so that the LEDs are lit. The fourth driver 533d that outputs the external information signal to the information transmission unit 508 of the external information terminal board is supplied with DC12V in order to give the external information signal a level of 12V. The buffer 532b, the third output port 531c, the first driver 533a, and the like may be provided on the output unit 530 of the game control device 500, that is, on the relay board 591 side instead of the main board.

  Further, the output unit 530 is provided with a photocoupler 534 for transmitting information such as an identification code and a program of each gaming machine to an external inspection device 592. The photocoupler 534 is configured to be capable of two-way communication so that the gaming microcomputer 511 can transmit and receive data to and from the inspection device 592 through serial communication. Note that such data transmission / reception is performed using a serial communication terminal included in the gaming microcomputer 511 in the same manner as a normal general-purpose microprocessor, and thus a port such as the input port 522 is not provided. The photocoupler 534 outputs the information received from the gaming microcomputer 511 to the information transmission unit 508 of the external information terminal board by serial communication.

  Next, the configuration of the effect control device 550 will be described with reference to FIG. FIG. 4 is a block diagram illustrating a configuration of the effect control device 550 according to the first embodiment of this invention.

  The production control device 550 includes a main control microcomputer (1st CPU) 551 formed of an amusement chip (IC) as in the case of the game microcomputer 511, and a video control microcomputer that performs video control exclusively under the control of the main control microcomputer 551. 2nd CPU) 554, VDP (Video Display Processor) 558 as a graphic processor for performing image processing for video display on a panel display device (display device) 48 in accordance with commands and data from the video control microcomputer 554, and various types The sound source LSI 560 for controlling the output of sound is provided in order to reproduce the melody or sound effect from the speaker 30 (30a, 30b).

  The main control microcomputer (1st CPU) 551 and the video control microcomputer (2nd CPU) 554 are connected to program ROMs 553 and 555, each of which includes a PROM (programmable read only memory) storing a program executed by each CPU, and the VDP 558 is connected to the VDP 558. An image ROM 557 storing character images and video data is connected, and an audio ROM 561 storing audio data is connected to the sound source LSI 560.

  The main control microcomputer (1st CPU) 551 receives the control command (effect control command) transmitted from the game microcomputer 511 of the game control device 500 by serial communication via the serial reception circuit 565. Then, the received control command is analyzed, the content of the effect is determined and the content of the output video is instructed to the video control microcomputer 554, the reproduction sound is instructed to the sound source LSI 560, the decoration lamp is turned on, the motor drive control, Perform processing such as management of production time.

  The main control microcomputer (1st CPU) 551 constitutes a production control unit together with the PROM 553, the sound source LSI 560, the sound ROM 561, and the amplifier circuits 562a and 562b. The tone generator LSI 560, the audio ROM 561, and the amplifier circuits 562a and 562b constitute sound effect processing means for outputting sound. Further, the video control microcomputer (2nd CPU) 554 constitutes an image processing means together with the PROM 555 and the VDP 558.

  RAMs that provide work areas for the main control microcomputer (1st CPU) 551 and the video control microcomputer (2nd CPU) 554 are provided in the respective chips. Note that the RAM that provides the work area may be provided outside the chip.

  Although not particularly limited, the main control microcomputer (1stCPU) 551 and the video control microcomputer (2ndCPU) 554 and the main control microcomputer (1stCPU) 551 and the sound source LSI 560 are serially connected. Data is transmitted and received. The main control microcomputer (1st CPU) 551 and the VDP 558 are configured to transmit and receive data in a parallel manner. By transmitting and receiving data in the parallel system, commands and data can be transmitted in a shorter time than in the serial system. The VDP 558 includes an ultra-high-speed VRAM (video RAM) 558a used for developing and processing image data such as characters read from the image ROM 557, and a scaler for enlarging and reducing images. 558b, a signal conversion circuit 558c for generating a video signal to be transmitted to the display device 48 by an LVDS (small amplitude signal transmission) method, and the like are provided.

  A vertical synchronization signal VSYNC is input from the VDP 558 to the main control microcomputer 551 in order to synchronize the image of the display device 48 and lighting of the decorative lamps provided on the front frame 3 and the game board 10. The VDP 558 includes a configuration for generating VSYNC, and forms image update signal generation means. Furthermore, the VDP 558 notifies the video control microcomputer 554 that it is waiting to receive an interrupt signal INT0-n and a command or data from the video control microcomputer 554 in order to notify the processing status such as the end of drawing in the VRAM. A wait signal WAIT is input.

  Also, the video control microcomputer 554 notifies the main control microcomputer 551 that the video control microcomputer 554 is operating normally. A call signal CTS and a response signal RTS are exchanged between the main control microcomputer 551 and the tone generator LSI 560 in order to transmit and receive commands and data by the handshake method.

  Note that the video control microcomputer (2ndCPU) 554 uses a CPU that is faster, that is, more expensive than the main control microcomputer (1stCPU) 551. By providing a video control microcomputer (2ndCPU) 554 separately from the main control microcomputer (1stCPU) 551 and sharing the processing, it is possible to display a fast moving image on a large screen that is difficult to achieve with the main control microcomputer (1stCPU) 551 alone. In addition to being able to display on the display device 48, it is possible to suppress an increase in cost compared to the case where two CPUs having processing capabilities equivalent to the video control microcomputer (2nd CPU) 554 are used. Also, by providing two CPUs, it becomes possible to separately develop the control programs for the two CPUs in parallel, thereby shortening the development period of the new model.

  Further, the effect control device 550 includes a serial reception circuit 565 that receives a command transmitted from the game control device 500. The serial receiving circuit 565 receives the control command serially communicated from the game control device 500 and notifies the main control microcomputer (1st CPU) 551. The serial reception circuit 565 receives a change start command, a customer waiting demo command, a fanfare command, a probability information command, an error designation command, and the like as an effect control command signal.

  Further, the effect control device 550 is provided on the front frame 3 with a panel decoration LED control circuit 10c for controlling a panel decoration device 10d having an LED (light emitting diode) provided on the game board 10 (including the center case 46). Frame decoration LED control circuit 18c for controlling the frame decoration device 18d having LEDs (light emitting diodes), and a board effect device (for example, an effect display on the display device 48) provided in the game board 10 (including the center case 46). Board effect motor / SOL control circuit 10e for driving and controlling 10f, and a frame effect device provided on the front frame 3 (for example, the first movable illumination 13 described above). A frame effect motor control circuit 18e for driving and controlling a motor 18f for operating the second movable illumination 14) is provided. These control circuits (10c, 18c, 10e, 18e) for driving and controlling lamps, motors, solenoids and the like are connected to a main control microcomputer (1st CPU) 551 via an address / data bus 559.

  Further, the effect control device 550 is configured to turn on / off a switch 31a built in the effect button 31 provided on the front surface of the gaming machine 1 and an effect motor switch 31b for detecting the initial position of the motor in the board effect device 10f. A switch input circuit 570 for detecting a state and inputting a detection signal to the main control microcomputer (1st CPU) 551, an amplifier circuit 562a including an audio power amplifier for driving the upper speaker 30a provided on the front frame 3, and the front frame 3 Is provided with an amplifier circuit 562b for driving the lower speaker 30b.

  Since the normal power supply unit 310 of the power supply device 300 supplies a desired level of DC voltage to the effect control device 550 having the above-described configuration and electronic components controlled thereby, a plurality of types of voltages can be generated. It is configured. Specifically, in addition to DC32V for driving a motor or solenoid, DC5V serving as a power supply voltage of DC12V for driving a display device 48 including a liquid crystal panel, etc., DC18V for driving an LED or a speaker, and the like It is possible to generate a voltage of NDC 24V that is used as a reference for the direct current voltage or to turn on the power supply monitor lamp. Further, when an LSI that operates at a low voltage such as 3.3 V or 1.2 V is used as the main control microcomputer (1st CPU) 551 and the video control microcomputer (2nd CPU) 554, DC3. The effect control device 550 is provided with a DC-DC converter for generating 3V or DC 1.2V. The DC-DC converter may be provided in the normal power supply unit 310.

  The reset signal RST generated by the control signal generator 330 of the power supply apparatus 300 is a control circuit (10c to 18e) that controls driving of the main control microcomputer 551, the video control microcomputer 554, the VDP 558, the sound source LSI 560, the lamp, the motor, and the like. Are supplied to the amplifier circuits 562a and 562b for driving the speakers, and are reset. In this embodiment, the general purpose port of the video control microcomputer 554 is used to generate and supply a reset signal to the VDP 558. Thereby, the cooperation of the operations of the video control microcomputer 554 and the VDP 558 can be improved.

  FIG. 5 is a block diagram illustrating a configuration example of the serial transmission circuit 535 in the game control device 500 according to the first embodiment of this invention.

  The serial transmission circuit 535 includes a transmission serial channel setting register 633, a transmission data status register 631, a transmission control register 632, a transmission data register 635 (transmission data buffer register 635a, transmission data shift register 635b), and a baud rate generation circuit (transmission speed setting means). 634.

  The transmission serial channel setting register 633 is a register for designating a communication speed and a communication format at the time of data transmission. Each value is set in the transmission serial channel setting register 633 in the initialization process of the main process described later.

  FIG. 6 is a diagram illustrating a configuration example of the transmission serial channel setting register 633 according to the first embodiment of this invention. As shown in FIG. 6, the transmission serial channel setting register 633 is composed of 16 bits, and all bits 0 to 15 can be written / read.

  In the transmission serial channel setting register 633, bits 0 to 12 are set with a baud rate setting value (for example, a frequency division ratio) for calculating a transmission baud rate (communication speed). Bit 13 is set to “0” when the transmission data length is 8 bits, and is set to “1” when the transmission data length is 9 bits. Bit 14 is set to “0” when no parity is added to transmission data, and is set to “1” when parity is added. Bit 15 is set to “0” when the parity added to the transmission data is even parity, and is set to “1” when the parity is odd parity (“1” (with parity) is set in bit 14. When set).

  In FIG. 5, a transmission control register 632 is a register for controlling the operation of the serial transmission circuit 535.

  FIG. 7 is a diagram illustrating a configuration example of the transmission control register 632 according to the first embodiment of this invention. As shown in FIG. 7, the transmission control register 632 is composed of, for example, 8 bits, bit 6 is read-only, and other bits 0, 4, 5, and 7 are writable / readable. In this embodiment, since bits 1 to 3 of the transmission control register 632 are unused, the description is omitted in FIG.

  In the transmission control register 632, “1” is set in bit 0 when the transmission circuit (serial transmission circuit 535) is initialized. When the transmission circuit is initialized, all registers including the data in the transmission data register 635 are set to initial values. Bit 4 is set to “0” when data transmission from the transmission data register 635 (transmission data shift register 635b) is prohibited, and is set to “1” when data transmission is permitted. Bit 5 is set to “0” when a transmission interrupt is not requested when the transmission data register 635 is empty, and is set to “1” when a transmission interrupt is requested. Bit 6 is set to a value indicating whether or not a transmission interrupt request is generated (transmission interrupt state). When “0” is set in bit 6, it indicates that a transmission interrupt is not requested, and when “1” is set, it indicates that a transmission interrupt is requested. In bit 7, the value of bit 8 of the transmission data register (when the data length is 9 bits) is set.

  In FIG. 5, a transmission data status register 631 is a register indicating the state of the transmission data register 635. The CPU 511a can check the state of the transmission data register 635 based on the setting value of the transmission data status register 631.

  FIG. 8 is a diagram illustrating a configuration example of the transmission data status register 631 according to the first embodiment of this invention. The transmission data status register 631 is composed of, for example, 8 bits, and bits 0 to 5 and 7 are all read-only. In this embodiment, bit 6 of the transmission data status register 631 is not used, and is omitted in FIG.

  In the transmission data status register 631, bits 0 to 5 are set to values indicating the remaining amount of transmission data. For example, if “00h” (hexadecimal “0”) is set in bits 0 to 5, it indicates that there is no transmission data. If “01h” is set, one byte of transmission data remains. When “20h” is set, it indicates that 32 bytes of transmission data remain. In bit 7, a value indicating the data transmission state in the transmission data register 635 is set. When “1” is set in bit 7, it indicates that data is not being transmitted, and when “0” is set, it indicates that data is being transmitted.

  In FIG. 5, a transmission data register 635 is a register for storing data transmitted by the serial transmission circuit 535. The transmission data register 635 includes, for example, a one-stage transmission data shift register 635b and a 31-stage transmission data buffer register 635a.

  FIG. 9 is a diagram illustrating a configuration example of the transmission data register 635 (for one stage) according to the first embodiment of this invention. The one-stage transmission data register 635 is composed of, for example, 8 bits, and bits 0 to 7 are all dedicated to writing.

  The transmission data register 635 stores control command data generated by timer interrupt processing. If bit 4 of the transmission control register is set to “1” (transmission permission), the stored control command data is It is automatically transmitted to the effect control device 550.

  The control command data is composed of, for example, 2 bytes of 1-byte mode data and 1-byte action data, so that one control command data is stored in the two-stage transmission data register 635. In this embodiment, since the transmission data register 635 is composed of 32 stages, when a maximum of 16 control command data are generated by one timer interrupt process, all of them are stored in the transmission data register 635. be able to.

  In FIG. 3, the baud rate generation circuit 634 performs transmission used by the serial transmission circuit 535 based on a clock signal output from a clock circuit (not shown) and a setting value (baud rate setting value) set in the transmission serial channel setting register 633. Generate baud rate. At this time, the baud rate generation circuit 634 obtains the transmission baud rate using a predetermined calculation formula based on the clock signal and the baud rate setting value.

  After the transmission permission is set (bit 4 of the transmission control register 632 is “1”), the serial transmission circuit 535 automatically writes data to be transmitted to the transmission data register 635 (transmission data buffer register 635a). Transmission starts. When transmission is started, the data in the transmission data buffer register 635a is transferred to the transmission data shift register 635b, serially converted from the transmission data shift register 635b, and sequentially output bit by bit from the least significant bit (bit 0). . When the data transmission is completed, the transmission data shift register 635b becomes empty, so that the next data written in the transmission data buffer register 635a is transferred to the transmission data shift register 635b and output.

  Therefore, in the serial transmission circuit 535, the data (control command data) written in the transmission data register 635 (transmission data shift register 635b, transmission data buffer register 635a) is sequentially transmitted bit by bit to the effect control device 550. It becomes.

  As described above, the serial transmission circuit (control command transmission means) 535 includes the transmission data register 635 that stores transmission data (for example, control command data, transmission start specifying data and transmission end specifying data described later), and a transmission data register. When transmission data is stored in 635, the stored transmission data is sequentially transmitted bit by bit in the direction from the game control device 500 to the effect control device 550 (so-called serial communication).

  Specifically, the transmission data register 635 holds the stored data and the transmission data shift register 635b that transmits the stored data immediately, and the transmission data shift register 635b can store the data (data The transmission data buffer register 635a transfers the stored data to the transmission data shift register 635b when the transmission is completed.

  As a result, the transmission process of the control command data is executed in the background of the timer interruption process, and the transmission process of the control instruction data in the timer interruption process, which is essential in the conventional parallel communication, can be omitted. The burden can be reduced.

  Further, by using serial communication, the number of wires for transmitting control command data can be reduced.

  Further, the communication between the game control device 500 and the effect control device 550 is unidirectional communication in which data can be transmitted only from the game control device 500 to the effect control device 550, and no data is input to the game control device 500. Can prevent fraud.

  Further, the transmission data register (transmission data storage means) 635 is configured to be able to store all of a series of control command data generated in one timer interrupt process, and the game control device 500 can control the control command data in the timer interrupt process. As soon as is generated, the generated control command data is stored in the transmission data register 635.

  As a result, the control command data generated for each timer interruption can be reliably transmitted without being temporarily stored in the RAM 511c.

  FIG. 10 is a block diagram illustrating a configuration example of the serial reception circuit 565 in the effect control device 550 according to the first embodiment of this invention.

  As shown in FIG. 10, the serial reception circuit 565 includes a reception serial channel setting register 641, a reception control register 642, a reception data status register 643, a reception data register 644 (a reception data shift register 644a and a reception data buffer register 644b), a baud rate. A generation circuit 645 and a communication interrupt signal generation circuit 646 are included.

  The reception serial channel setting register 641 is a register for designating a communication speed and a communication format at the time of data reception.

  FIG. 11 is a diagram illustrating a configuration example of the reception serial channel setting register 641 according to the first embodiment of this invention. As shown in FIG. 11, the reception serial channel setting register 641 is composed of, for example, 16 bits, and all bits 0 to 15 can be written / read.

  In the reception serial channel setting register 641, bits 0 to 12 are set with a baud rate setting value (for example, a frequency division ratio) for calculating a reception baud rate (communication speed). Bit 13 is set to “0” when the received data length is 8 bits, and is set to “1” when the received data length is 9 bits. Bit 14 is set to “0” when the received data is treated as having no parity added, and is set to “1” when handled as having the parity added. Bit 15 is set to “0” when the parity added to the received data is an even parity, and is set to “1” when the parity is an odd parity.

  In FIG. 10, a reception control register 642 is a register for controlling the operation of the serial reception circuit 565.

  FIG. 12 is a diagram illustrating a configuration example of the reception control register 642 according to the first embodiment of this invention. As shown in FIG. 12, the reception control register 642 is composed of, for example, 8 bits, and bits 0 to 5 and 7 can be written / read. In the present embodiment, bit 6 of the reception control register 642 is unused, and is omitted in FIG.

  In the reception control register 642, bits 0 to 5 are set with conditions for requesting an interrupt to the main control microcomputer (1st CPU) 551. For example, bits 0 to 5 are set to “01h” when a reception interrupt request is generated when 1-byte data is received, and when a reception interrupt request is generated when 2-byte data is received. When “02h” is set and a reception interrupt request is generated when 32 bytes of data are received, “20h” is set. When no interrupt request is generated, bits 00 to 5 are set to “00h” or “21h to 2fh”. Bit 7 is set to “0” when data reception in the reception data register 644 (reception data shift register 644a) is prohibited, and is set to “1” when data reception is permitted.

  In FIG. 10, a reception data status register 643 is a register indicating the state of the reception data register 644. The main control microcomputer (1st CPU) 551 can confirm the state of the reception data register 644 based on the set value of the reception data status register 643.

  FIG. 13 is a diagram illustrating a configuration example of the reception data status register 643 according to the first embodiment of this invention. As shown in FIG. 13, the reception data status register 643 is composed of, for example, 8 bits, and bits 0 to 5 are all read-only. In this embodiment, bits 6 and 7 of the reception data status register 643 are unused, and are omitted in FIG.

  In the reception data status register 643, bits 0 to 5 are set to values indicating the amount of data received in the reception data register 644. For example, if “00h” is set in bits 0 to 5, it indicates that there is no received data. If “01h” is set, it indicates that there is 1 byte of received data, and “20h” is set. Indicates that there are 32 bytes of received data.

  In FIG. 10, a reception data register 644 is a register for storing data received by the serial reception circuit 565. The reception data register 644 includes, for example, a one-stage reception data shift register 644a and a 31-stage reception data buffer register 644b.

  FIG. 14 is a diagram illustrating a configuration example of the reception data register 644 (for one stage) according to the first embodiment of this invention. As shown in FIG. 14, the reception data register 644 in one stage is composed of, for example, 8 bits, and bits 0 to 7 are all read-only. The reception data register 644 stores control command data transmitted from the game control device 500.

  Further, when the reception data shift register 644a receives the data and the data is transmitted to the reception data buffer register 644b, it notifies the communication interrupt signal generation circuit 646. At this time, the communication interrupt signal generation circuit 646 is configured to output a communication interrupt signal to the main control microcomputer (1st CPU) 551.

  The baud rate generation circuit 645 generates a baud rate used by the serial reception circuit 565 based on a clock signal output from a clock circuit (not shown) and a setting value (baud rate setting value) set in the reception serial channel setting register 641. At this time, the baud rate generation circuit 645 obtains a reception baud rate using a predetermined calculation formula based on the clock signal and the baud rate setting value.

  In the serial reception circuit 565, reception permission is set (bit 7 of the reception control register 642 is “1”), and reception is automatically started when a start bit included in the reception data is detected. The received data is sequentially stored bit by bit in the received data shift register 644a, and transferred to the received data buffer register 644b from the received data shift register 644a when a stop bit is detected. The reception data stored in the reception data buffer register 644b is sequentially transferred to the RAM 551a.

  As described above, the serial reception circuit 565 sequentially receives data (control command data, presentation control command) transmitted from the game control device 500 bit by bit, and the received data is stored in the RAM 511a.

  The above is the configuration of the gaming machine 1 according to the first embodiment of the present invention. Subsequently, a command code (control command) transmitted from the game control device 500 to the effect control device 550 will be described.

  FIG. 15 is a diagram illustrating an example of a command code transmitted from the game control device 500 to the effect control device 550 according to the first embodiment of the present invention. The command code according to the first embodiment of the present invention has a two-byte configuration including a first half byte and a second half byte.

  The first half byte indicates the type of command code, and the second half byte has detailed contents. For example, when the first half byte is “81h”, it is a change start command when the result of the change display game is out of place. A value from “00h” to “27h” can be set for the latter half byte, and as will be described later with reference to FIG. 16, a variable display game is executed in a variable manner according to the set value. Thus, since the production control command is composed of a plurality of bytes, it is possible to set many types of commands.

  FIG. 16 is a diagram illustrating a change start command code according to the first embodiment of this invention. (A) is the fluctuation start command table at the time of loss (table for sorting used to set the value of the second half byte of the command code), (B) is the fluctuation start command table at the time of big hit (value of the second byte of the command code) Table for sorting used in the setting of

  In the first embodiment of the present invention, three types of fluctuations are performed. Specifically, there are three types: “no change in advance notice”, “change in advance notice A” and “change in advance notice B”. In the case of no notice change, the notice effect is not executed, and the notice B change is a notice effect with higher reliability than the notice A change. As a difference between the notice A fluctuation and the notice B fluctuation, for example, the notice display and the sound are output at the same time in the notice A change, and the notice display and the sound are output in a state shifted from each other in the notice B change.

  In the present embodiment, seven types of reach (the above-mentioned normal reach and each special reach are further subdivided into a total of seven types) are defined. Digits (1-7) correspond to the reach to be executed. If no reach occurs, the last digit of the second half byte is 0. Specifically, the result of the variable display game is out of place (the first half byte is “81h”) and the second half byte is “00h”. In addition, since the reach always occurs when the result of the variable display game is a big hit, “00h” is not set in the second half byte.

  In the present embodiment, the probability that the result of the variable display game will be lost is set to 6000/6020, and the probability that it will be a big hit is set to 20/6020. When the result of the variation display game is out of place, the “notice variation without notice” is selected at a high frequency (5950 times out of 6000 times), and the frequency at which “the notice A variation” is selected (out of 6000 times) 45 times) or “notice B fluctuation” is selected at a frequency much higher than the frequency (5 times of 6000 times), so that the notice effect is rarely executed.

  On the other hand, when the result of the variable display game is a big hit, the frequency of selecting “no change in advance notice” is 10 times out of 20 times, and the frequency of selecting “change in advance notice” is 20 times. Of these, five times, the frequency of selecting “notice B variation” is five out of twenty. Therefore, in consideration of the probability of jackpot and the frequency with which each notice is selected, when the notice A fluctuation is executed, a big hit occurs with a probability of 5 / (45 + 5) = 1/10, and the notice B fluctuation Is executed, a big hit will occur with a probability of 5 / (5 + 5) = 1/2. Therefore, as described above, the expectation of the big hit is greater when the notice variation occurs than when the notice effect does not occur, and further, when the notice A change occurs when the notice B change occurs. The expectation of jackpot is greater than

[Main processing (game control device) / Timer interrupt processing]
Next, with reference to FIG.17 and FIG.18, the process regarding the game performed with the game control apparatus 500 is demonstrated. FIG. 17 is a flowchart of main processing executed by the game control device 500 according to the first embodiment of this invention. FIG. 18 is a flowchart illustrating a procedure of timer interrupt processing according to the first embodiment of this invention.

  The game control device 500 executes a main process shown in FIG. 17 and a timer interrupt process every predetermined time (for example, 2 msec) shown in FIG.

  The main process shown in FIG. 17 is executed when the gaming machine is turned on, and is continuously executed until the power supply to the gaming machine is interrupted. For example, when a game machine is turned on to start a business at a game hall, or when it recovers from a power failure, the execution starts, and until the game machine is turned off to end the business at the game hall ( Or it continues to run (until a power failure occurs).

  The game control device 500 first executes an initialization process at power-on as a process at the start of the program (S1), and then executes a power failure recovery process (S2).

  In the power failure recovery processing, processing for resuming game control in the gaming state at the time of the power failure is performed using data stored and stored in the RAM 511c of the game control device 500 by the backup power source when the power failure occurs. However, an initialization operation unit (not shown) is provided on the back side of the gaming machine, and if the initialization operation unit is operated when the gaming machine is turned on, the gaming state of the gaming machine is set in advance. Initialize to the specified state. By this initialization, the game state of the special figure variation display game becomes a low probability state, and the ordinary power operation state (the operation state of the movable member (induction member) 38a of the second start winning opening 38) becomes the suppression state.

  In the power failure recovery process, specification data including the type of gaming machine is transmitted to the effect control device 550. The type of gaming machine is information indicating whether the gaming machine is a regular version or a low-priced version. As described above, since the configuration of the rendering device is different between the regular version gaming machine and the low-priced gaming machine, the specification data is transmitted so that the rendering control device 550 can perform rendering control according to the type. doing.

  Next, the game control device 500 executes main loop processing. In the main loop process, first, an interrupt timer is started (S3), and a CTC (counter timer circuit) is started. Next, the game control device 500 prohibits interruption (S4). After that, initial value random number update processing to update the initial value of random numbers such as jackpot determination random numbers (special figure determination random numbers) and jackpot symbol random numbers (special symbol random numbers) to break the regularity of random numbers Is executed (S5), and an interrupt is permitted (S6).

  The game control device 500 checks the power failure inspection area of the RAM 511c and determines whether or not a power failure has occurred (S7). Note that, in the power failure inspection area of the RAM 511c, check data is stored when the power of the gaming machine is cut off due to a power failure, and the check data is not normally stored. Therefore, it is possible to determine whether or not a power failure has occurred by determining the presence or absence of check data in the power failure inspection area of the RAM 511c.

  If a power failure has not occurred (the result of S7 is “N”), the process returns to the interrupt prohibition process in step S4, and thereafter, the game control device 500 repeats the processes from step S4 to step S7. On the other hand, when a power failure occurs (the result of S7 is “Y”), the game control device 500 performs a power failure occurrence process in step S8. When a power failure occurs, the backup power supply of the power supply device supplies power that can execute the processing when the power failure occurs. Further, the backup power supply supplies power necessary for maintaining the contents of the RAM 511c of the game control device 500 during a power failure. At this time, the backup power source can hold the game data for 2 to 3 days or more.

  In the power failure occurrence processing in step S8, first, processing for prohibiting interruption is performed, processing for turning off all output ports, and processing for clearing the power failure inspection area are performed. Then, after performing the process of saving the power failure recovery inspection area check data in the power failure recovery inspection area, performing the process of calculating the checksum when the RAM 511c is powered off, and performing the process of prohibiting access to the RAM 511c, the gaming machine Wait for the power to turn off. Thus, by saving the power failure recovery inspection area check data in the power failure recovery inspection area and calculating and holding the checksum at the time of power interruption, the information stored in the RAM 511c before the power interruption is correctly backed up. It can be determined whether the power is turned on.

  Next, a timer interrupt process of the game control device 500 will be described with reference to FIG. The timer interrupt process is executed in a form of interrupting the main process in response to the generation of an interrupt signal (generated at a predetermined interval by the interrupt timer).

  In the timer interrupt process, the game control device 500 first saves the data stored in the register (S10). Next, inputs from various sensors (start port 1 switch 37d, start port 2 switch 38d, gate SW 34a, winning ports SW 44a to 44n, count SW 42d, glass frame open detection switch 18b, front frame open detection SW 3b, etc.) Based on the output data set in the process, an input / output process for processing an output for performing drive control of the big prize opening SOL42b, the ordinary electric power SOL38b, etc. is executed (S11). At this time, the command set in the transmission buffer is output to the effect control device 550 or the like.

  The game control device 500 executes a command transmission process for setting a command prepared in various processes in the transmission buffer (S12).

  The game control device 500 executes a random number update process 1 for updating a random number for determining whether the special figure variation display game or the common figure variation display game is missed or for determining the big hit symbol of the special figure variation display game. (S13). Thereafter, the game control device 500 updates the initial value of the random number, and executes an initial value random number update process for breaking the temporal regularity of the random number (S14).

  The game control device 500 executes a random number update process 2 for updating a random number for determining a variation pattern (execution mode) in the decoration special diagram variation display game related to the special diagram variation display game (S15).

  In step S13 and step S15, the five random numbers of the big hit random number, the big hit symbol random number, and the fluctuation pattern random number (the first fluctuation pattern random number to the third fluctuation pattern random number) related to the special figure fluctuation display game are updated as a set.

  The gaming control device 500 determines whether or not a signal is input from the start port 1SW 37d, the start port 2SW 38d, the gate SW 34a, the winning ports SW 44a to 44n, and the count SW 42d (whether or not a signal indicating detection of a game ball is input). A winning opening switch monitoring process for monitoring is performed (S16).

  After that, the game control device 500 executes an error monitoring process for monitoring each signal and error (S17). If an error is detected, a command is transmitted to the effect control device in order to notify the player of the occurrence of the error. For example, the error command shown in FIG.

  Further, the game control device 500 executes a special figure game process for performing a process related to the special figure variation display game (S18). In the special figure game process, a special figure fluctuation display game-related process is performed, and a command related to the effect control device 550 is transmitted. Specifically, the change start command, change stop command, hold number update command, and the like shown in FIG. A jackpot related command is also transmitted.

  The game control device 500 performs a general game process (S19) for performing a process related to the general variable display game. Further, a segment LED editing process related to the segment LED for displaying various information related to the game is executed (S20), and an external information editing process (S21) for setting a signal to be output to the external management device in the output buffer is executed.

  Then, the game control device 500 declares the end of the interrupt process (S22), and restores the saved register data (S23). Finally, a process for permitting the interrupt again is executed (S24), and the timer interrupt process is terminated.

  The above is the processing executed by the game control device 500. Then, the process performed with the production | presentation control apparatus 550 is demonstrated.

[Direction registration information]
FIG. 19 is a diagram illustrating an example of the effect registration information according to the first embodiment of this invention. An effect code for each decoration device and a standby counter corresponding to the effect code are defined. The effect registration information is stored in the RAM 551a of the main control microcomputer (1st CPU) 551 of the effect control device 550.

  The effect code corresponds to the decoration control device for performing the effect and the content of the effect. For example, when the production code “10h” is set, the sound effect production A in which the sound effect A is output from the speaker 30 is executed.

  Further, the standby counter is a standby time from when the execution of an effect is instructed to when it is actually executed. Specifically, it waits until VSYNC (video synchronization signal, image signal interrupt (image interrupt)) for the number of times set in the standby counter is generated. For example, when the production code “11h” is set, the sound effect production B is executed after two VSYNCs are generated. Thus, by delaying the audio output timing based on the standby counter, it is possible to match the image output timing and the audio output timing, which require time for processing.

[Processing by each CPU of the production control device]
FIG. 20 shows processing by the CPU provided in the effect control device 550 according to the first embodiment of this invention. Each CPU executes processing while synchronizing at a predetermined timing (image interruption).

  First, processing by a main control microcomputer (1st CPU) that performs presentation control in accordance with a command transmitted from the game control device 500 will be described. When the power is turned on, the main control microcomputer (1st CPU) 551 executes an initialization process (S30). In this initialization process, a value of “00h” is set in the interrupt request setting of bits 0 to 5 of the reception control register 642 shown in FIG. By setting this value, the setting not to generate an interrupt request to the serial reception circuit 565 (FIG. 10) is completed, and the main interrupt control microcomputer (1st CPU) 551 from the communication interrupt signal generation circuit 646 (FIG. 10). No interrupt signal is output. Then, timer interruption and image interruption are permitted (S31).

  Thereafter, the main control microcomputer (1st CPU) 551 waits until an image interrupt occurs (S32). The image interruption occurs when the VDP 558 that performs image processing outputs VSYNC (video synchronization signal). When an image interruption occurs (result of S32 is “Y”), the main control microcomputer (1st CPU) 551 captures a control command (production control command) and detects an operation of the production button 31 to control the video. An input / output process for outputting an image display command to the microcomputer (2ndCPU) 554 is executed (S33).

  Further, in this input / output processing, the main control microcomputer (1st CPU) 551 includes a panel decoration LED control circuit 10c, a frame decoration LED control circuit 18c, a panel effect motor / SOL control circuit 10e, a frame effect motor control circuit 18e, and a tone generator LSI 560. In response to this, an effect command is output to drive various effect devices provided on the game board 10 and the front frame 3, and sound effects are output from the speakers 30a and 30b.

  Next, the main control microcomputer (1st CPU) 551 executes a game process for managing the progress of the variable display game based on the received control command (S34). Details of the game process will be described with reference to FIG.

  Finally, the main control microcomputer (1st CPU) 551 executes an effect command process for generating and storing an image display command to be transmitted to the video control microcomputer (2nd CPU) 554 (S35). Details of the effect command processing will be described with reference to FIG. The image display command generated in the effect command process is output to the video control microcomputer (2nd CPU) 554 when the input / output process (S33) is executed next. Then, it waits until the next image interruption occurs.

  Next, processing by the video control microcomputer (2nd CPU) 554 that performs video control exclusively under the control of the main control microcomputer 551 will be described. When the power is turned on, the video control microcomputer (2nd CPU) 554 executes an initialization process in the same manner as the main control microcomputer 551 (S40). And various interruptions are permitted (S41).

  Thereafter, the video control microcomputer (2nd CPU) 554 waits until an image interrupt occurs (S42). When an image interruption occurs (result of S42 is “Y”), the image display command transmitted from the main control microcomputer (1st CPU) 551 is input, and the VDP control command generated in the display update process is output to the VDP 558. Input / output processing is executed (S43).

  Further, the video control microcomputer (2nd CPU) 554 executes display update processing for generating a VDP control command for updating the image displayed on the display device 48 (S44). Details of the display update process will be described with reference to FIG. Then, it waits until the next image interruption occurs.

  Next, processing by the VDP 558 as a graphic processor that performs image processing for video display on the display device 48 in accordance with the VDP control command from the video control microcomputer 554 will be described. When the power is turned on, the VDP 558 executes an initialization process in the same manner as the main control microcomputer 551 (S50). Then, it waits until it is time to generate an image interrupt (S51).

  When it is time to generate an image interrupt (the result of S51 is “Y”), the VDP 558 issues an image interrupt to the main control microcomputer (1st CPU) 551 and the video control microcomputer (2nd CPU) 554. It is generated (S52). Then, an input / output process in which the VDP control command transmitted from the video control microcomputer (2nd CPU) 554 is input is executed (S53). At this time, the image data is output to the display device 48.

  Finally, the VDP 558 executes image data generation processing for generating image data to be displayed on the display device 48 based on the VDP control command transmitted from the video control microcomputer (2nd CPU) 554 (S54). Then, it waits until the next image interruption generation time.

  Next, the game process (S34 in FIG. 20) executed by the main control microcomputer (1st CPU) will be described. FIG. 21 is a flowchart showing a game process procedure according to the first embodiment of the present invention. As described above, the game process is a process for managing the progress of the variable display game.

  First, the main control microcomputer (1st CPU) 551 acquires a control command from the serial reception circuit 565 (S60). In the present embodiment, since no interrupt signal is generated from the serial reception circuit 565 (FIG. 10), an effect control command stored in the reception data register (FIG. 12) is cycled by the main control microcomputer (1st CPU) 551. Need to be acquired. Therefore, depending on the timing of acquisition, it is possible to receive a 2-byte presentation control command in units of 1 byte, so an incomplete command (a command in a state where only the first half byte has been received) May be received. In this case, the incomplete command (first half byte) generated (received) last time and the command (second half byte) received this time are combined to create a completed command (control command in which the combination of the first half byte and the second half byte is completed). Generate (S61).

  By controlling in this way, it is possible to perform reliable processing even in a configuration in which control commands (production control commands) are transmitted separately.

  Next, the main control microcomputer (1st CPU) 551 determines whether or not there is an incomplete command (S62). If there is an incomplete command (result of S62 is “Y”), the incomplete command is saved (S63). The saved incomplete command is combined with the command received when the next game process is executed.

  Subsequently, the main control microcomputer (1st CPU) 551 determines whether or not there is a completion command (that is, a command that has received both the first half byte and the second half byte) (S64). If there is a completion command (the result of S64 is “Y”), game initialization processing is executed (S65). In the game initialization process, a designated process is executed based on the received command. Details of the game initialization process will be described with reference to FIG.

  On the other hand, if there is no completion command (the result of S64 is “N”), the main control microcomputer (1st CPU) 551 executes a game continuation process (S66). In the game continuation process, the effect being executed is continued based on the received command. Details of the game continuation process will be described with reference to FIG.

  Next, a game initialization process (S65 in FIG. 21) executed in the game process will be described. FIG. 22 is a flowchart illustrating a procedure of game initialization processing according to the first embodiment of this invention. The game initialization process starts a process based on the received command.

  First, the main control microcomputer (1st CPU) 551 analyzes the received command (effect control command) (S70). Then, based on the analysis result of the command, processing corresponding to the type of command is executed (S71).

  When the received command is a change start command, the main control microcomputer (1st CPU) 551 determines a change pattern (reach type, etc.) in the change display game (S72), and an animation corresponding to the determined change pattern. Is determined as an image display pattern (S73). Further, preparation is made for transmitting an image display command corresponding to the determined image display pattern to the video control microcomputer (2nd CPU) 554 (S74).

  Next, the main control microcomputer (1st CPU) 551 determines an initial value of the standby counter (S75). The initial value of the standby counter is determined in consideration of the delay time until the image that becomes the determined image display pattern is actually displayed on the display device 48. Here, the number of image update interrupts generated until the image data reflecting the determined image display pattern is output to the image display device 48 is set. In principle, “3” is set.

  However, the initial value of the standby counter may not be a fixed value. For example, when the number of image update interrupts that occur before the determined image display pattern is reflected as image data varies, the initial value of the standby counter may be changed each time. For example, when generating an image with an image display pattern in which the processing of the video control microcomputer (2ndCPU) 554 takes a long time, the initial value of the standby counter may be set to “4” or “5”. . By configuring in this way, it is possible to match the output timing of the sound effect with no sense of incongruity corresponding to the time required for image processing.

  Moreover, the initial value of the standby counter may be set according to the longest time regardless of the length of time required for image processing. For example, if the number of image update interrupts that occur before the determined image display pattern is reflected as image data changes between “3” and “5”, the longest value “5” May be set in the standby counter. In this way, by adjusting the difference between the image display timing and the sound effect output timing to the longest time, the sound effect output timing can be adjusted even if the time required for image processing changes.

  The main control microcomputer (1st CPU) 551 sets effect registration information related to sound effects (S76). Furthermore, the effect registration information regarding the light emission and the movable object is set (S77). Further, a standby counter corresponding to each set production registration information is set.

  Next, the main control microcomputer (1st CPU) 551 determines whether or not to execute a special effect (S78). The special effect in the present embodiment corresponds to the notice B fluctuation (FIG. 16) with a high expectation degree of jackpot. When executing the special effect (the result of S78 is “Y”), the main control microcomputer (1st CPU) 551 sets the special effect flag to ON (S79). When the special effect is not executed (the result of S78 is “N”), the special effect flag is set to OFF (S80).

  On the other hand, when receiving the fluctuation stop command, the main control microcomputer (1st CPU) 551 executes the fluctuation stop process (S81). When a jackpot related command is received, a jackpot related process is executed (S82). In addition, if a hold ball command is sent when a game ball wins at the start winning opening and the hold number increases or the hold number where the variable display game is started decreases, the hold number is updated. The pending update process is executed (S83). If an error command is received, error related processing is executed (S84).

  Next, the game continuation process (S66 in FIG. 21) executed in the game process will be described. FIG. 23 is a flowchart illustrating a procedure of game continuation processing according to the first embodiment of this invention. The game continuation process is performed continuously based on the received command.

  The main control microcomputer (1st CPU) 551 determines whether or not it is the appearance timing of the character in the ongoing performance (S100). At this time, when a message or the like is displayed in addition to the character, processing is performed in the same manner as the appearance of the character.

  In the case of the appearance timing of the character (the result of S100 is “Y”), the main control microcomputer (1st CPU) 551 prepares a display command for causing the character to appear (S101). This display command is notified to the video control microcomputer (2nd CPU) 554.

  The main control microcomputer (1st CPU) 551 determines whether or not the special effect flag is set to ON (S102). When the special effect flag is set to ON (result of S102 is “Y”), the effect registration information regarding the sound effect of the character appearance is set (S103). At this time, the value of the standby counter of the effect registration information related to the sound effect is the number of image update interruptions necessary until image data reflecting the determined image display pattern is output to the image display device 48. Instead of “,” change to “1”, which is a smaller value.

  As a result, the standby counter is decremented to “0” (S123 in FIG. 24) in the effect command process (S35 in FIG. 20, see FIG. 24) executed immediately thereafter, and the linked effect for outputting the sound effect. When the command is prepared (S125 in FIG. 24), the input / output process (S33 in FIG. 20) is executed at the timing of the next image interrupt occurrence, and the sound effect is output.

  However, before the image in which the character appears is actually displayed on the display device 48, it is necessary to wait until the image update interrupt occurs three times. In addition, a sound effect in which the character appears is heard. In this way, the timing of image display and the timing of sound effect output are shifted to make the player feel uncomfortable.

  On the other hand, when the special effect flag is not set to ON (the result of S102 is “N”), the main control microcomputer (1st CPU) 551 has a value “3” that is normally set in the standby counter. Is set, and the effect registration information regarding the sound effect of the character appearance is set (S104).

  When the main control microcomputer (1st CPU) 551 sets the effect registration information related to the sound effect of the character appearance, the main control microcomputer (1st CPU) 551 sets the effect registration information related to the light emission and the movable object accompanying the character appearance (S105). At this time, “3”, which is a normally set value, is set in the standby counter.

  The main control microcomputer (1st CPU) 551 satisfies the condition that the operation button 31 can be operated after the process of S105 is finished or when the character appearance timing is not reached (result of S100 is “N”). It is determined whether or not (S106). When the operable condition of the effect button 31 is satisfied (the result of S106 is “Y”), a display command is prepared for causing the display device 48 to display a display requesting the player to operate the effect button 31 (S107). ). At this time, if there is an effect to be interrupted by the operation of the effect button 31, the related effect registration information is deleted.

  The main control microcomputer (1st CPU) 551 determines the button operation timing when the operable condition of the effect button 31 is not satisfied (the result of S106 is “Y”) or when the process of S107 is completed. It is determined whether or not (S108). If the button operation timing has not come (the result of S108 is “N”), this process is terminated.

  The main control microcomputer (1st CPU) 551 determines whether or not there is a button operation when the button operation timing is reached (the result of S108 is “Y”) (S109). When there is a button operation (the result of S109 is “Y”), a button operation corresponding process for executing a process according to the operation content is executed (S110).

  On the other hand, when there is no button operation (the result of S109 is “N”), the main control microcomputer (1st CPU) 551 determines whether or not the countdown timing has come (S111). When it is time to count down (result of S111 is “Y”), the effect registration information regarding the sound effect of the countdown is set (S112). If the countdown timing has not come (the result of S111 is “N”), this process ends.

  By configuring as described above, sound effects are output in accordance with the countdown timing. During the countdown, the effect button 31 can be operated, and a countdown display ((J) in FIG. 28 described later) is performed together with the sound effect. When the effect button 31 is operated, the countdown display and the sound effect of the countdown are stopped, and the screen is switched to the screen when the effect button operation is executed (FIG. 28 (K) described later). Therefore, it becomes easier for the player to know whether or not the effect button 31 has been operated depending on whether or not a sound effect is output.

  Next, an effect command process (S35 in FIG. 20) executed by the main control microcomputer (1st CPU) will be described. FIG. 24 is a flowchart illustrating the procedure of the effect command process according to the first embodiment of this invention. As described above, the effect command processing is performed based on the set effect registration information, such as the tone generator LSI 560 and other control circuits (panel decoration LED control circuit 10c, frame decoration LED control circuit 18c, board effect motor / SOL control circuit 10e. , A process for generating an interlocking effect command to be transmitted to the frame effect motor control circuit 18e).

  First, the main control microcomputer (1st CPU) 551 determines whether or not there is set production registration information (S120). If there is the set production registration information (the result of S120 is “Y”), the first (first) production registration information is set as the processing target (S121).

  Next, the main control microcomputer (1st CPU) 551 determines whether or not the standby counter of the effect registration information to be processed has become 0 (S122). If the stand-by counter of the effect registration information to be processed is not 0 (the result of S122 is “N”), the stand-by counter is subtracted (S123), and the stand-by counter of the effect registration information to be processed is 0. It is determined whether or not (S124). When the standby counter of the effect registration information to be processed becomes 0 (result of S122 is “N”), an effect start linked effect command corresponding to the effect code is prepared (S125).

  The main control microcomputer (1st CPU) 551 determines whether or not there is remaining production registration information, that is, production registration information for which production start command data is not prepared (S126). When there is remaining production registration information (the result of S126 is “Y”), the next production registration information is set as a processing target (S127), and the processes after S122 are executed. On the other hand, when there is no remaining effect registration information (the result of S126 is “N”), this process is terminated.

  In addition, when the standby counter of the effect registration information to be processed becomes 0 (the result of S122 is “Y”), the main control microcomputer (1st CPU) 551 determines whether or not it is the effect end timing (S128). ). When it is not the production end timing (the result of S128 is “N”), the production corresponding to the production code is continued (S131), and the processes after S126 are executed.

  On the other hand, in the case of the production end timing (the result of S128 is “N”), the main control microcomputer (1st CPU) 551 prepares a production end linked production command corresponding to the production code (S129). The production registration information is deleted (S130).

  Next, the display update process (S44 in FIG. 20) executed by the video control microcomputer (2nd CPU) 554 will be described. FIG. 25 is a flowchart illustrating a procedure of display update processing according to the first embodiment of this invention. As described above, the display update process is a process of generating a VDP control command for updating the image displayed on the display device 48.

  The video control microcomputer (2ndCPU) 554 first determines whether or not an image display command has been received from the main control microcomputer (1stCPU) (S140). When an image display command is received (result of S140 is “Y”), it is determined whether or not the initialization is single-shot, that is, whether or not the initialization is completed by receiving one image display command. (S141).

  The video control microcomputer (2nd CPU) 554 initializes the animation (first half) when the initialization is not single-shot (the result of S141 is “N”) (S142). Then, the initialization flag is set to ON (S143).

  Subsequently, the video control microcomputer (2nd CPU) 554 updates the animation displayed on the display device 48 (S144), and prepares a VDP control command corresponding to the updated content (S145).

  On the other hand, if the initialization is single-shot (the result of S141 is “Y”), the video control microcomputer (2nd CPU) 554 initializes the animation (S146) and prepares a VDP control command corresponding to the initialization (S146). S147).

  Further, when the image control microcomputer (2ndCPU) 554 has not received the image display command (the result of S140 is “N”), the video control microcomputer (2ndCPU) 554 determines whether the initialization flag is set to ON (S148). ). When the initialization flag is not set to ON (the result of S148 is “N”), the processing after S144 is executed.

  If the initialization flag is set to ON (result of S148 is “Y”), the video control microcomputer (2nd CPU) 554 initializes the animation (second half) (S149). Then, the initialization flag is set to off (S150). Thereafter, a VDP control command corresponding to initialization is prepared (S147), and this process is terminated.

[Timing chart (when sending commands)]
The above is the processing in the effect control device 550. Subsequently, the control command (production control command, command code) transmitted from the game control device 500 is received by the production control device 550, and a command (image display command, VDP control command, linked production command) is sent to each control circuit. The process of transmitting will be described.

  FIG. 26 shows a case where the serial reception circuit 565 can receive a control command of a plurality of bytes transmitted from the game control apparatus 500 according to the first embodiment of the present invention without dividing the first half byte and the second half byte. FIG. 38 is a timing chart showing data transmission / reception timings between the control circuits inside the effect control device 550. FIG.

  In the same timing charts in FIG. 26 and subsequent figures, “COM” indicates the timing at which various commands other than the linked effect commands are transmitted and received in each CPU and VDP 558. “Calculation” indicates the timing of required calculation processing executed based on the command. Further, “SND” indicates a timing at which the main control microcomputer (1st CPU) 551 outputs a linked effect command to the sound source LSI 560. Further, “LCD” indicates a timing at which the VDP 558 outputs image data to the display device 48.

  When a control command is output from the game control apparatus 500 (COM of 701), it is received by the serial reception circuit 565 as described above. Then, the image is taken into the main control microcomputer (1st CPU) 551 at the image interruption timing (COM of 711). The main control microcomputer (1st CPU) 551 performs arithmetic processing based on the fetched command (calculation 712). At this time, an image display command to be transmitted to the video control microcomputer (2nd CPU) 554 is generated. The generated image display command is transmitted to the video control microcomputer (2nd CPU) 554 at the next image interrupt timing (COM of 713).

  When receiving the image display command output from the main control microcomputer (1st CPU) 551 (COM of 721), the video control microcomputer (2nd CPU) 554 performs arithmetic processing based on the received command (calculation of 722). An image display command to be transmitted to the VDP 558 is generated. The image display command generated in the VDP 558 is transmitted at the next image interrupt timing (COM of 723).

  When the VDP 558 receives the VDP control command output from the video control microcomputer (2nd CPU) 554 (COM of 731), the VDP 558 generates image data based on the received VDP control command (calculation of 732) and performs the next image allocation. The generated image data is output to the image display device (LCD) 48 at the time of loading (LCD of 733). At this time, the main control microcomputer (1st CPU) 551 outputs to the tone generator LSI 560 an interlocking effect command that instructs the output of the sound effect corresponding to the image data (714 SND).

  Thus, sound effects are output from the speakers 30a and 30b at the timing when the image is displayed on the image display device (LCD) 48. For example, when performing a countdown display, a sound effect is output at the timing when the number is updated.

  FIG. 27 shows a case where the control command of a plurality of bytes transmitted from the game control device 500 according to the first embodiment of the present invention is divided into the first half bytes and the second half bytes and received by the serial reception circuit 565. 4 is a timing chart showing data transmission / reception timings between control circuits inside a control device 550. This is a process that can occur when an image update interrupt occurs while a multibyte control command is being transmitted to the serial reception circuit 565. Note that the processing having the same timing as in FIG. 26 will be described with the same numbering.

  In the case shown in FIG. 27, when a control command is output from the game control device 500 (COM of 701), the first half of the control command is taken into the main control microcomputer (1st CPU) 551 at the first image interrupt timing ( 711a COM). Then, the second half of the control command is fetched at the next image interrupt timing (COM of 711b), and calculation processing is performed based on the completed command synthesized from the commands fetched in the first half and the second half (712 calculation). Note that the processing of each CPU and each control circuit after fetching the control command is the same as in FIG.

[Screen display example]
Next, the display contents of the display device 48 will be described. FIG. 28 is a diagram illustrating an example of a variation display according to the first embodiment of this invention.

  As shown in the order of (A) to (E), in this embodiment, when the variable display is started from the stopped state, all the symbols are displayed in a variable manner, and the symbols are stopped in the order of the left symbol, the right symbol, and the middle symbol. Let me go.

  However, in the state of (D), when the left symbol and the right symbol stop at the same symbol, as shown in (F), a reach state in which the middle symbol slowly changes and is displayed. When reaching the reach state, all the symbols will eventually stop at the same symbol as shown in (G) and will be a big hit, or only the middle symbol will stop at a different symbol as shown in (H) and come off. .

  In the reach state (D) (or in the normal fluctuation state immediately before changing to the reach state), a notice display may be made. This is a case in which the variation “forecast variation A” or “preliminary variation B” described above with reference to FIG. 16 is executed. Specifically, as shown in (I), “CHANCE” is displayed in front of the identification symbol. The notice is displayed by displaying the characters.

  At this time, sound effects are output from the speakers 30a and 30b in synchronization with the timing when the display of “CHANCE” appears. In this case, in the case of a change that becomes “notice change A”, a sound effect is output at the same time as the display of “CHANCE” appears, whereas in the case of a change that becomes “notice change B”, “CHANCE” Sound effects are output before the display of. That is, an effect with a little uncomfortable feeling is executed in the “notice fluctuation A”, but the “notice fluctuation B” makes the player feel uncomfortable by shifting the display timing and the sound effect output timing. By controlling in this way, it is notified that the degree of expectation of “notice fluctuation B” is high.

  Therefore, according to the first embodiment of the present invention, it is possible to make a notification without a sense of incongruity by combining the timing of the notice display and the output timing of the sound effect in the “notice fluctuation A”. On the other hand, it is possible to enhance the interest of the game by intentionally generating a sense of incongruity like “notice fluctuation B”.

  In the case where a notice effect is executed, a notification that prompts the player to operate the effect button 31 may be given as shown in (J). The operation of the effect button 31 in this case can be performed only for a predetermined time (for example, 5 seconds) from the time when the notification message appears. At this time, as shown in (J), the remaining number of seconds in the notification message changes, and further, a sound effect is output at a timing when the display of the number of seconds changes.

  Then, when the effect button 31 is operated during the operable time of the effect button 31, as shown in (K), the screen is switched to a screen on which a message informing that the effect button has been operated.

  In addition, if the operation possible time of the production button 31 is finished in a state where the production button 31 is not operated, the identification symbol in the reach state shown in (F) is displayed again, and the variable display is continued.

[Timing chart (countdown)]
Subsequently, a command generated and transmitted / received in each arithmetic unit when a notice display is performed, and a transmission timing of the command will be described. FIG. 29 is a timing chart before and after the button operable timing in the notice display according to the first embodiment of this invention.

  In the timing charts of FIGS. 29 to 31, “start sound”, “end sound”, “update sound”, “PS sound”, and the like are the effects of the main control microcomputer (1st CPU) 551 corresponding to the sound source LSI 560. The timing of the process of outputting the sound linked production command is shown. As for “CD”, the main control microcomputer (1stCPU) 551 outputs an image display command for causing the video control microcomputer (2ndCPU) 554 to perform a countdown display ((J) in FIG. 28). Indicates timing.

  Further, “output” indicates a timing at which the video control microcomputer (2nd CPU) 554 outputs a VDP control command for causing the VDP 558 to generate image data. Here, “output 1” to “output 5” are VDP control commands for setting the display of the display device 48 to countdown display ((J) in FIG. 28). If “time is 1 second” and “output 5”, “remaining time 5 seconds” is designated.

  “Output N” is a VDP control command for setting the display of the display device 48 to the display of the reach state ((F) in FIG. 28). “Output PS” is a VDP control command for displaying on the display device 48 to display an image ((K) in FIG. 28) indicating that the effect button 31 has been operated.

  Further, “display” indicates a timing at which the VDP 558 outputs image data to the display device 48. Here, “display 1” to “display 5” are image data in which the display of the display device 48 is a countdown display ((J) in FIG. 28). ”And“ Display 5 ”, the image data is“ remaining time 5 seconds ”.

  “Display N” is image data in which the display of the display device 48 is in a reach state ((F) in FIG. 28). “Display PS” is image data that is displayed on the display device 48 as an image ((K) in FIG. 28) indicating that the effect button 31 has been operated.

  Referring to FIG. 29, first, a countdown (CD) image display command is transmitted from the main control microcomputer (1st CPU) 551 to the video control microcomputer (2nd CPU) 554 at the first image interrupt timing. At this time, the VDP control command of “output N” is transmitted from the video control microcomputer (2nd CPU) 554 to the VDP 558, and the image data of “display N” is transmitted from the VDP 558 to the LCD (display device) 48. Accordingly, since the countdown (CD) image display command is not yet reflected at this timing, the countdown display ((J) in FIG. 28) message is not output to the display device 48.

  At the next image interrupt timing, the video control microcomputer (2nd CPU) 554 that has received the “CD” image display command sets an initial value (5 seconds) of the button operable time for the countdown display, and outputs “Output 5”. ”VDP control command is transmitted. Even at this timing, the image data of “Display N” is output from the VDP 558 to the display device 48, so that the countdown display ((J) in FIG. 28) message is not output to the display device 48.

  At the next image interrupt timing, a linked start command of “start sound” is output from the main control microcomputer (1st CPU) 551 to the sound source LSI 56, and therefore a start sound of countdown is output. At the same time, the VDP control command of “output 5” and the image data of “display 5” are output, so that the display device 48 counts down the remaining time of the button operable period as “5 seconds”. A display message is output.

  It should be noted that when the countdown (CD) image display command is output from the main control microcomputer (1st CPU) 551 to the video control microcomputer (2ndCPU) 554, the standby registration includes “ 2 "is set. The standby counter is subtracted every time the image interrupt timing comes, and a countdown start sound is output at the timing when the standby counter becomes “0”.

  Thus, in the gaming machine of the present embodiment, the value of the standby counter is set so that the countdown start sound is output later than the time when the countdown (CD) image display command is output. With this configuration, the countdown starts in response to the delay until the image display command output from the main control microcomputer (1st CPU) 551 reaches the VDP 558 via the video control microcomputer (2nd CPU) 554. Sound can be output.

  Thereafter, every time the display of the remaining time is updated, a countdown sound effect is output in accordance with the display update timing (corresponding to “update sound” in FIGS. 30 and 31 described later). At this time, the display of the remaining time of the button operable period is switched from “5 seconds” to “4 seconds”, switched from “4 seconds” to “3 seconds”, and switched from “3 seconds” to “2 seconds”. A countdown sound effect is output at each of the timings, i.e., the timing of switching from "2 seconds" to "1 second".

  As described above, there is a time lag between the timing at which the remaining time can be displayed and the timing at which the sound effect can be output. However, as described above, by setting the standby counter, the output timing of the sound effect and the remaining time are output. It becomes possible to match the time display timing.

  Returning to the figure, when the button operable period ends, the main control microcomputer (1st CPU) 551 outputs an “end sound” interlocking effect command to the sound source LSI 56, and outputs a countdown end sound. At this timing, the image data of “Display N” is output from the VDP 558 to the display device 48, whereby the “down remaining time 1 second” countdown display message displayed on the display device 48 disappears, and ( Returning to the reach state screen shown in F), the variable display game is continued.

  FIG. 30 is a timing chart showing the output timing of the countdown sound effect in the notice display according to the first embodiment of this invention. (A) shows the case where the countdown sound effect is output because the operation of the effect button 31 is not performed, and (B) shows the case where the countdown sound effect is not output when the effect button 31 is operated.

  In (A), a sound effect is output at the timing when the display of the remaining time is updated from “3 seconds” to “2 seconds”. At this time, the effect button 31 is not operated.

  On the other hand, in (B), the effect button 31 is operated in a state where “3 seconds” is displayed as the remaining time in the button operable time. At this time, no sound effect is output at the timing when the display of the remaining time is updated from “3 seconds” to “2 seconds” (the linked effect command of “update sound” in the figure is not output). Specifically, because the result of the process of S109 of FIG. 23 is “Y”, the effect registration information regarding the sound effect of the countdown is deleted by the button operation corresponding process of S110. However, since the image data of “Display 2” is also output at this timing, a countdown display in which the display of the remaining time is “2 seconds” is temporarily performed.

  As described above, when the effect button 31 is operated immediately before the display of the remaining time on the display device 48 is switched, the display of the remaining time after switching (display of “2 seconds”) is executed. Since the sound effect accompanying the update of the remaining time display (the sound effect when switching from “3 seconds” to “2 seconds”) is not output, the player can operate the effect button 31 before the remaining time is updated. Can be confirmed. Therefore, even if the gaming machine is configured such that the sound effect is output with a delay with respect to the progress of the game, such as the gaming machine of the present embodiment, the player does not feel uncomfortable regarding the operation.

  When the main control microcomputer (1st CPU) 551 detects the operation of the effect button 31, the main control microcomputer (1st CPU) 551 executes a button operation corresponding process (S 110 in FIG. 23). In the button operation corresponding processing, an image display command (PS command) corresponding to the operation command for the effect button 31 is output from the main control microcomputer (1st CPU) 551 to the video control microcomputer (2nd CPU) 554. When receiving the “PS command” image display command, the video control microcomputer (2nd CPU) 554 transmits a VDP control command (output PS) to the VDP 558 in order to perform a corresponding effect display on the display device 48. Upon receiving the VDP control command (output PS), the VDP 558 outputs “display PS” image data to the LCD (display device) 48. Then, an effect corresponding to the display device 48 is displayed, and an effect sound (PS sound) due to the operation of the effect button 31 is output at the same timing.

[Effect of the first embodiment]
An image display command is transmitted from the main control microcomputer (1st CPU) 551 to the video control microcomputer (2ndCPU) 554, a VDP control command is transmitted from the video control microcomputer (2ndCPU) 554 to the VDP 558, and the VDP 558 further displays an LCD (display device). ) The image display is controlled by outputting the image data to 48. However, since the first image display command that is output is reflected in the VDP control command, and the VDP control command is reflected in the image data, two image update interrupts are required. The display content cannot be updated until the time has elapsed.

  On the other hand, the output control of the sound effects can be executed by the main control microcomputer (1st CPU) 551 at the next image update interrupt timing after receiving the control command from the game control device 500. Therefore, if the sound effect is output immediately after receiving the command, the image update timing and the output timing of the sound effect are shifted.

  Therefore, according to the first embodiment of the present invention, it is possible to execute sound effect output corresponding to the delay in image display by using the standby counter. Can be synchronized with each other.

  Also, the processing load of the control by the configuration for displaying images (video control microcomputer (2nd CPU) 554, VDP 558) and the configuration for outputting sound effects (main control microcomputer (1st CPU) 551, sound source LSI 560) is shared. It becomes possible to make it.

(Modification of the first embodiment)
In the first embodiment of the present invention, the command is received at the image update timing (when the image update interrupt occurs) without using the interrupt signal from the serial reception circuit 565. As a modification of the embodiment, a configuration in which the main control microcomputer (1st CPU) 551 takes in a control command based on a communication interrupt signal generated in the serial reception circuit 565 will be described.

  As described above, the serial reception circuit 565 includes the communication interrupt signal generation circuit 646, and sets a predetermined value for the interrupt request setting of bits 0 to 5 of the reception control register 642 shown in FIG. Thus, when the reception data register 644 (FIG. 10) receives data (control command), a communication interrupt signal may be output to the main control microcomputer (1st CPU) 551. In the modification, when the initialization process of S30 is performed in the process of the CPU (1st) in FIG. 20, the value “02h” is set in the interrupt request setting of bits 0 to 5 of the reception control register 642 shown in FIG. Set. By setting this value, every time the reception data register 644 receives 2-byte data, an interrupt signal is output from the communication interrupt signal generation circuit 646 (FIG. 10) to the main control microcomputer (1st CPU) 551. The

[Communication interrupt processing]
In the modification, when the communication interrupt signal from the communication interrupt signal generation circuit 646 is input, the main control microcomputer (1st CPU) 551 executes the communication interrupt process in the form of interrupting the main process. . FIG. 31 is a flowchart illustrating an example of a communication interrupt process according to a modification of the first embodiment of this invention.

  When a communication interrupt signal is input, the main control microcomputer (1st CPU) 551 acquires a command from the serial reception circuit 565 (S160). If the acquired command is an abnormal command, it is discarded, and if it is a normal command, it is stored in the RAM 551a.

  Thereafter, the main control microcomputer (1st CPU) 551 acquires the command stored in the RAM 551a and executes the process.

[Game processing]
In the modification of the first embodiment, since the command is not acquired at the timing of the image update interrupt, the procedure for acquiring the command in the game process is different from that of the first embodiment. . FIG. 32 is a flowchart showing a game process procedure according to a modification of the first embodiment of the present invention.

  The main control microcomputer (1st CPU) 551 determines whether or not a command is stored in the RAM 551a (S170). If the command is stored (the result of S170 is “Y”), game initialization processing is executed (S171). On the other hand, when the command is not stored (the result of S170 is “N”), the game continuation process is executed (S172).

  In the modification of the first embodiment, even if the control command (production control command) is composed of a plurality of bytes as in the first embodiment, it is not received in multiple times. As described above, since the interrupt signal is generated every time the serial reception circuit 565 receives a plurality of bytes (2 bytes), the interrupt is generated when one byte of the control command (production control command) is received. The command is not split because it wants to generate an embedded signal.

  FIG. 33 is a timing chart showing a process of notifying each component of the effect control device 550 of a command transmitted from the game control device 500 according to the modification of the first embodiment of the present invention.

  As shown in FIG. 33, when a control command is output from the game control device 500, it is received by the serial reception circuit 565. As described above, the serial reception circuit 565 receives a plurality of bytes (2 bytes). Each time, the main control microcomputer (1st CPU) 551 is notified by an interrupt signal (701 COM).

  When receiving a command reception notification from the serial reception circuit 565, the main control microcomputer (1st CPU) 551 acquires the received command regardless of the image interrupt timing as shown in FIG. 33 (COM of 711c). The processing after the main control microcomputer (1st CPU) 551 receives the command is the same as in the first embodiment.

[Effects of Modification of First Embodiment]
Therefore, according to the modification of the first embodiment of the present invention, it is possible to perform reliable processing because there is no possibility that the production control command is separated.

(Second Embodiment)
In the first embodiment of the present invention, the video control microcomputer (2ndCPU) 554 is provided together with the main control microcomputer (1stCPU) 551. However, in the second embodiment, the video control microcomputer (2ndCPU) is provided. 554 is not included. That is, the main control microcomputer (1st CPU) 551 itself outputs a VDP control command to the VDP 588. Hereinafter, a second embodiment will be described with reference to FIGS. Note that the configuration common to the first embodiment is omitted as appropriate.

  FIG. 34 is a block diagram showing a configuration of an effect control device 550 according to the second embodiment of the present invention. The production control device 550 of the second embodiment is different from the first embodiment in that it does not include the video control microcomputer (2ndCPU) 554 as described above. Other configurations are the same as those in the first embodiment.

  35 and 36 are timing charts showing a process of notifying each component of the effect control device 550 of a command transmitted from the game control device 500 according to the second embodiment of the present invention. FIG. 35 shows that when a multi-byte control command transmitted from the game control device 500 can be received once, FIG. 36 shows that a multi-byte control command transmitted from the game control device 500 cannot be received at one time. This is a case where the image is received separately at two image update timings.

  Referring to FIG. 35 and FIG. 36, the process in which the main control microcomputer (1st CPU) 551 receives the control command from the game control device 500 is executed at the same timing as in the first embodiment (711, 711a, 711b COM). However, since the VDP 558 is configured to perform processing by the video control microcomputer (2nd CPU), time is required for the arithmetic processing (calculation of 732a). Therefore, it is necessary to set the value of the standby counter to be larger as necessary than in the case of the first embodiment.

  It should be noted that the computation processing time of the main control microcomputer (1st CPU) 551 is long enough to extend over a plurality of image update timings (the computation processing of 712a etc. becomes long), and the VDP control command to the VDP 558 is transmitted. A configuration in which the output is somewhat delayed (a configuration in which COM of 713a is delayed) may be used, but even in this case, it is necessary to determine the output timing of the sound effect (SND of 714) in consideration of the delay time.

[Effects of Second Embodiment]
As described above, according to the second embodiment of the present invention, it is possible to obtain the same effect as that of the first embodiment even in a configuration that does not include the video control microcomputer (2ndCPU) 554. Become.

  The embodiment disclosed this time is illustrative in all points and is not restrictive. The scope of the present invention is shown not by the above description of the invention but by the scope of claims, and is intended to include all modifications within the scope and meaning equivalent to the scope of claims.

1 gaming machine 2 body frame (outer frame)
3 Front frame (game frame)
10 Game board 18 Glass frame (front frame)
30 Speaker (Sound effect output device)
31 effect button 31a effect button switch 34 universal start gate 37 first start winning opening 38 second starting winning opening 48 display device (board display device, image display device, LCD)
300 Power supply device 500 Game control device (main board, game control means)
535 Serial transmission circuit (control command transmission means)
550 Production control device (production control means)
551 Main control microcomputer (1st CPU, production control unit)
551a RAM
554 Microcomputer for video control (2nd CPU, image processing means)
558 VDP (image processing means, image update signal generation means)
560 tone generator LSI (sound effect processing means)
565 Serial receiving circuit 580 Dispensing control device 635 Transmission data register (transmission data storage means)
635a Transmission data buffer register 635b Transmission data shift register 644 Reception data register 644a Reception data shift register 644b Reception data buffer register 646 Communication interrupt signal generation circuit

Claims (1)

A game comprising game control means for comprehensively controlling a game, and effect control means for controlling a plurality of effect devices including an image display device and a sound effect output device in response to an effect control command from the game control means. In the machine
The effect control means can control the plurality of effect devices according to the operation of the effect operating means that can be operated by the player,
The production control means includes
Based on the production control command from the game control means, production overall control means for overall control of the plurality of production devices;
Image processing means for controlling an image displayed on the image display device based on an image processing command from the production control section;
Image update signal generation means for generating an image update signal for updating the image;
Is provided,
In the production control unit,
Sound effect processing means for controlling the sound effect output device;
Image processing command output means for outputting an image processing command to the image processing means;
It is equipped et al is,
And the sound effect processing means and the image processing command output means are both controlled on the basis of the image update signal Rutotomoni, in response to operation of the operation means in the operation lifetime running predetermined effect,
The sound effect processing means is a predetermined time defined by a relative time that is an integral multiple of the generation cycle of the image update signal from the timing at which the image processing command output means outputs the image processing command corresponding to the predetermined effect. The game machine is characterized in that the delay time is started and a sound effect corresponding to the image processing command is output after the delay time has elapsed.

Images