JP5657844B1 - 直交信号を生成するための周波数の1.5分周 - Google Patents
直交信号を生成するための周波数の1.5分周 Download PDFInfo
- Publication number
- JP5657844B1 JP5657844B1 JP2014543633A JP2014543633A JP5657844B1 JP 5657844 B1 JP5657844 B1 JP 5657844B1 JP 2014543633 A JP2014543633 A JP 2014543633A JP 2014543633 A JP2014543633 A JP 2014543633A JP 5657844 B1 JP5657844 B1 JP 5657844B1
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- signal
- phase
- type transistor
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 claims description 44
- 230000007850 degeneration Effects 0.000 claims description 34
- 239000003990 capacitor Substances 0.000 claims description 31
- 238000004590 computer program Methods 0.000 claims description 12
- 230000003111 delayed effect Effects 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 16
- 238000004891 communication Methods 0.000 description 14
- 238000012935 Averaging Methods 0.000 description 8
- 230000006870 function Effects 0.000 description 5
- 238000012545 processing Methods 0.000 description 5
- 230000003287 optical effect Effects 0.000 description 4
- 238000010587 phase diagram Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000003203 everyday effect Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000010363 phase shift Effects 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
- H03B19/06—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes
- H03B19/14—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source by means of discharge device or semiconductor device with more than two electrodes by means of a semiconductor device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B27/00—Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
- Networks Using Active Elements (AREA)
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201161563958P | 2011-11-28 | 2011-11-28 | |
| US61/563,958 | 2011-11-28 | ||
| US13/653,054 US8803568B2 (en) | 2011-11-28 | 2012-10-16 | Dividing a frequency by 1.5 to produce a quadrature signal |
| US13/653,054 | 2012-10-16 | ||
| PCT/US2012/066902 WO2013082193A1 (en) | 2011-11-28 | 2012-11-28 | Dividing a frequency by 1.5 to produce a quadrature signal |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP5657844B1 true JP5657844B1 (ja) | 2015-01-21 |
| JP2015504638A JP2015504638A (ja) | 2015-02-12 |
Family
ID=48466271
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014543633A Expired - Fee Related JP5657844B1 (ja) | 2011-11-28 | 2012-11-28 | 直交信号を生成するための周波数の1.5分周 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US8803568B2 (cg-RX-API-DMAC7.html) |
| EP (1) | EP2786493A1 (cg-RX-API-DMAC7.html) |
| JP (1) | JP5657844B1 (cg-RX-API-DMAC7.html) |
| KR (1) | KR101508608B1 (cg-RX-API-DMAC7.html) |
| CN (1) | CN103959654B (cg-RX-API-DMAC7.html) |
| IN (1) | IN2014CN03136A (cg-RX-API-DMAC7.html) |
| WO (1) | WO2013082193A1 (cg-RX-API-DMAC7.html) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9966937B2 (en) * | 2011-04-29 | 2018-05-08 | Marvell World Trade Ltd. | Frequency multipliers |
| EP2849021B1 (en) | 2013-09-12 | 2020-01-01 | Socionext Inc. | Signal-alignment circuitry and methods |
| US8723568B1 (en) * | 2013-12-20 | 2014-05-13 | Qualcomm Incorporated | Local oscillator signal generation using delay locked loops |
| US9455716B2 (en) * | 2014-05-28 | 2016-09-27 | Qualcomm Incorporated | Reconfigurable fractional divider |
| US9531358B2 (en) * | 2014-10-27 | 2016-12-27 | Mediatek Inc. | Signal generating system and signal generating method |
| US10164574B2 (en) * | 2015-07-07 | 2018-12-25 | Mediatek Inc. | Method for generating a plurality of oscillating signals with different phases and associated circuit and local oscillator |
| US10374588B2 (en) * | 2016-10-31 | 2019-08-06 | Mediatek Inc. | Quadrature clock generating mechanism of communication system transmitter |
| US10547315B2 (en) | 2017-11-28 | 2020-01-28 | Samsung Electronics Co., Ltd. | Frequency divider and a transceiver including the same |
| CN108540149B (zh) * | 2018-07-16 | 2020-07-24 | 南京中感微电子有限公司 | 无线射频发射机 |
| CN110214417B (zh) * | 2019-04-18 | 2023-05-02 | 香港应用科技研究院有限公司 | 50%占空比正交输入正交输出(qiqo)3分频电路 |
| US11626865B1 (en) * | 2021-09-22 | 2023-04-11 | Qualcomm Incorporated | Low-power high-speed CMOS clock generation circuit |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002521904A (ja) * | 1998-07-24 | 2002-07-16 | グローバル・コミュニケーション・テクノロジー・インク | 単一チップcmos送信器/受信器およびvco−ミキサ構造 |
| US6570946B1 (en) * | 1999-11-03 | 2003-05-27 | Ericsson, Inc. | One-hot decoded phase shift prescaler |
| US6882229B1 (en) * | 2003-07-23 | 2005-04-19 | Pericom Semiconductor Corp. | Divide-by-X.5 circuit with frequency doubler and differential oscillator |
| WO2010022092A1 (en) * | 2008-08-18 | 2010-02-25 | Qualcomm Incorporated | Divide-by-three quadrature frequency divider |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6335952B1 (en) | 1998-07-24 | 2002-01-01 | Gct Semiconductor, Inc. | Single chip CMOS transmitter/receiver |
| US6480045B2 (en) * | 2001-01-05 | 2002-11-12 | Thomson Licensing S.A. | Digital frequency multiplier |
| US20030064699A1 (en) | 2001-09-28 | 2003-04-03 | Olsen Gordon A. | Down-converting multiple received radio frequency signals |
| DE10344851B3 (de) | 2003-09-26 | 2005-04-28 | Infineon Technologies Ag | Signalaufbereitungsschaltung |
| US20060217098A1 (en) | 2005-03-22 | 2006-09-28 | Anderson Jeffrey K | System for reducing power consumption in a local oscillator |
| US20070160168A1 (en) | 2006-01-11 | 2007-07-12 | Beukema Troy J | Apparatus and method for signal phase control in an integrated radio circuit |
| CN101242182A (zh) * | 2007-02-06 | 2008-08-13 | 凌阳科技股份有限公司 | 具有相位旋转扩频的锁相环 |
| WO2008141102A2 (en) * | 2007-05-11 | 2008-11-20 | Skyworks Solutions, Inc. | Systems and methods for providing a clock signal |
| CN101944906A (zh) * | 2009-07-10 | 2011-01-12 | 智迈微电子科技(上海)有限公司 | 基于相位旋转器的分频器 |
-
2012
- 2012-10-16 US US13/653,054 patent/US8803568B2/en active Active
- 2012-11-28 IN IN3136CHN2014 patent/IN2014CN03136A/en unknown
- 2012-11-28 EP EP12799435.8A patent/EP2786493A1/en not_active Ceased
- 2012-11-28 KR KR1020147017542A patent/KR101508608B1/ko not_active Expired - Fee Related
- 2012-11-28 JP JP2014543633A patent/JP5657844B1/ja not_active Expired - Fee Related
- 2012-11-28 WO PCT/US2012/066902 patent/WO2013082193A1/en not_active Ceased
- 2012-11-28 CN CN201280058034.5A patent/CN103959654B/zh active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002521904A (ja) * | 1998-07-24 | 2002-07-16 | グローバル・コミュニケーション・テクノロジー・インク | 単一チップcmos送信器/受信器およびvco−ミキサ構造 |
| US6570946B1 (en) * | 1999-11-03 | 2003-05-27 | Ericsson, Inc. | One-hot decoded phase shift prescaler |
| US6882229B1 (en) * | 2003-07-23 | 2005-04-19 | Pericom Semiconductor Corp. | Divide-by-X.5 circuit with frequency doubler and differential oscillator |
| WO2010022092A1 (en) * | 2008-08-18 | 2010-02-25 | Qualcomm Incorporated | Divide-by-three quadrature frequency divider |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103959654B (zh) | 2016-08-24 |
| US20130135016A1 (en) | 2013-05-30 |
| KR101508608B1 (ko) | 2015-04-14 |
| KR20140104456A (ko) | 2014-08-28 |
| WO2013082193A1 (en) | 2013-06-06 |
| EP2786493A1 (en) | 2014-10-08 |
| US8803568B2 (en) | 2014-08-12 |
| CN103959654A (zh) | 2014-07-30 |
| JP2015504638A (ja) | 2015-02-12 |
| IN2014CN03136A (cg-RX-API-DMAC7.html) | 2015-07-03 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5657844B1 (ja) | 直交信号を生成するための周波数の1.5分周 | |
| JP5591914B2 (ja) | サプライレギュレートされたフェイズロックループ(pll)及び用いる方法 | |
| JP5908587B2 (ja) | フィードバックループにおける位相補正を備えた位相ロックドループ | |
| JP6324875B2 (ja) | クロッククリーンアップ位相ロックループ(pll) | |
| US7825703B2 (en) | Divide-by-three quadrature frequency divider | |
| US8629700B2 (en) | Capacitive multiplication in a phase locked loop | |
| JP5937211B2 (ja) | 集積回路上のコア間でのクロック共有 | |
| US8487678B2 (en) | Half cycle delay locked loop | |
| US10476660B1 (en) | Quadrature signal generation | |
| JP6359533B2 (ja) | 基準クロック信号バッファにおけるバッファ入力インピーダンス補償 | |
| US8963587B2 (en) | Clock generation using fixed dividers and multiplex circuits | |
| US9071251B2 (en) | Phase-locked loop outputs with reduced reference spurs and noise | |
| US11750180B2 (en) | High frequency AC coupled self-biased divider | |
| CN205356306U (zh) | 一种宽带小步进锁相源 | |
| CN104184491A (zh) | 一种宽带数字解跳装置 | |
| CN106936470A (zh) | 一种宽带数字解跳装置 | |
| JPWO2014083726A1 (ja) | 復調器および変調器 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| TRDD | Decision of grant or rejection written | ||
| A975 | Report on accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A971005 Effective date: 20141023 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20141028 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20141126 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5657844 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |