DE10344851B3 - Signalaufbereitungsschaltung - Google Patents

Signalaufbereitungsschaltung Download PDF

Info

Publication number
DE10344851B3
DE10344851B3 DE10344851A DE10344851A DE10344851B3 DE 10344851 B3 DE10344851 B3 DE 10344851B3 DE 10344851 A DE10344851 A DE 10344851A DE 10344851 A DE10344851 A DE 10344851A DE 10344851 B3 DE10344851 B3 DE 10344851B3
Authority
DE
Germany
Prior art keywords
output
divider circuit
signal
circuit
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE10344851A
Other languages
English (en)
Inventor
Dietolf Seippel
Andre Hanke
Duyen Pham-Staebner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Deutschland GmbH
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to DE10344851A priority Critical patent/DE10344851B3/de
Priority to US10/947,963 priority patent/US7433667B2/en
Priority to CNB2004100119854A priority patent/CN1327616C/zh
Application granted granted Critical
Publication of DE10344851B3 publication Critical patent/DE10344851B3/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B27/00—Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs

Landscapes

  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

In einer Signalaufbereitungsschaltung ist ein Oszillator (1) vorgesehen, der mit den Eingängen (31, 41) zweier Mischer (3, 4) verbunden ist. Der Ausgang (33) eines Mischers (3) ist unter Bildung eines Rückführungspfades mit einer Frequenzteilerschaltung (2) gekoppelt, deren erster Ausgang (22) mit dem zweiten Eingang (32) des ersten Mischers (3) gekoppelt ist. Ein zweiter Signalausgang (23) der Frequenzteilerschaltung (2) führt ein Signal mit einem Phasenversatz von 90 DEG zum Signal am ersten Signalausgang (22) der Frequenzteilerschaltung (2). Das zweite Signal wird einem zweiten Eingang (42) des zweiten Mischers (4) zugeführt. Durch die Rückführung werden unerwünschte Signalanteile in der Inphase- und der Quadraturkomponente unterdrückt. Gleichzeitig besitzt die Inphase und die Quadraturkomponente ein festes Phasenverhältnis zueinander. Mit der Signalaufbereitungsschaltung läßt sich jedes beliebige nicht ganzzahlige Teilerverhältnis erreichen.
DE10344851A 2003-09-26 2003-09-26 Signalaufbereitungsschaltung Expired - Fee Related DE10344851B3 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE10344851A DE10344851B3 (de) 2003-09-26 2003-09-26 Signalaufbereitungsschaltung
US10/947,963 US7433667B2 (en) 2003-09-26 2004-09-23 Signal conditioning circuit
CNB2004100119854A CN1327616C (zh) 2003-09-26 2004-09-27 信号处理电路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10344851A DE10344851B3 (de) 2003-09-26 2003-09-26 Signalaufbereitungsschaltung

Publications (1)

Publication Number Publication Date
DE10344851B3 true DE10344851B3 (de) 2005-04-28

Family

ID=34398986

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10344851A Expired - Fee Related DE10344851B3 (de) 2003-09-26 2003-09-26 Signalaufbereitungsschaltung

Country Status (3)

Country Link
US (1) US7433667B2 (de)
CN (1) CN1327616C (de)
DE (1) DE10344851B3 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102019126041A1 (de) 2019-09-26 2019-12-24 FEV Group GmbH Assistenzsystem für ein Fahrzeug mit einer unter Einwirkung einer extern generierten Frequenz erzeugten Sendefrequenz

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8369820B2 (en) * 2007-09-05 2013-02-05 General Instrument Corporation Frequency multiplier device
JP4982350B2 (ja) * 2007-12-17 2012-07-25 ルネサスエレクトロニクス株式会社 送受信機
US8803568B2 (en) 2011-11-28 2014-08-12 Qualcomm Incorporated Dividing a frequency by 1.5 to produce a quadrature signal

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69319297T2 (de) * 1992-10-19 1998-11-12 Nec Corp Empfänger
DE10211524A1 (de) * 2002-03-15 2003-05-22 Infineon Technologies Ag Schaltungsanordnung zur Frequenzumsetzung und Mobilfunkgerät mit der Schaltungsanordnung

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06350537A (ja) * 1993-06-03 1994-12-22 Sumitomo Electric Ind Ltd 無線信号光伝送方法及びこの方法を使用する通信装置
JPH1168468A (ja) * 1997-08-12 1999-03-09 Oki Electric Ind Co Ltd ミクサ回路および直交ミクサ回路
DE60220986T2 (de) * 2002-04-04 2008-03-13 Texas Instruments Inc., Dallas Quadraturteiler
JP4222368B2 (ja) * 2003-02-20 2009-02-12 日本電気株式会社 信号処理装置、及びダイレクトコンバージョン受信装置

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69319297T2 (de) * 1992-10-19 1998-11-12 Nec Corp Empfänger
DE10211524A1 (de) * 2002-03-15 2003-05-22 Infineon Technologies Ag Schaltungsanordnung zur Frequenzumsetzung und Mobilfunkgerät mit der Schaltungsanordnung

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102019126041A1 (de) 2019-09-26 2019-12-24 FEV Group GmbH Assistenzsystem für ein Fahrzeug mit einer unter Einwirkung einer extern generierten Frequenz erzeugten Sendefrequenz

Also Published As

Publication number Publication date
CN1601905A (zh) 2005-03-30
CN1327616C (zh) 2007-07-18
US7433667B2 (en) 2008-10-07
US20050113056A1 (en) 2005-05-26

Similar Documents

Publication Publication Date Title
WO2004102808A3 (en) Frequency synthesizer with acoustic resonance vco
WO2007018888A3 (en) Television receiver suitable for multi-standard operation and method therefor
EP1184970A3 (de) Frequenzsynthetisierer und Multiband-Funkgerät mit einem solchen Frequenzsynthetisierer
AU9806098A (en) Digital radio-frequency transceiver
WO2004021572A3 (en) Multiple band local oscillator frequency generation circuit
EP1294100A3 (de) Verfahren und Vorrichtung für eine Neuabtastung in einem Frequenzvorteiler
TW367663B (en) Circuit for simultaneous frequency doubler and mixer
JPS6472626A (en) Double-branch receiver
TW200419914A (en) Voltage-controlled oscillator presetting circuit
AU4523501A (en) Oscillator having multi-phase complementary outputs
WO2006135788A3 (en) Prescaler for a fractional-n synthesizer
WO2003039002A3 (en) Fractional-r- frequency synthesizer
DE10344851B3 (de) Signalaufbereitungsschaltung
EP1292038A3 (de) Sendeverfahren und Sendegerät und Frequenzplanung zur Reduktion der Interferenzsignale
WO2004059844A3 (en) Pahse locked loop comprising a variable delay and a discrete delay
WO2001089092A3 (en) Apparatus for radio frequency processing with dual modulus synthesizer
EP1248378A4 (de) Sender und funkkommunikationsendgerät mit demselben
WO2005043925A3 (en) Directional coupler for use in vco unequal power splitting
WO2006065478A3 (en) Method and apparatus for generating a phase-locked output signal
TW200514355A (en) Clock-generating system
TW200501592A (en) Variable rate sigma delta modulator
WO2000062428A3 (en) Improvements relating to frequency synthesisers
WO2001065681A3 (en) Fractional-phase locked loop
AU2001264413A1 (en) Phase lock circuit
EP1484837A3 (de) Spannungsgesteuerter Oszillator

Legal Events

Date Code Title Description
8100 Publication of patent without earlier publication of application
8364 No opposition during term of opposition
R081 Change of applicant/patentee

Owner name: INTEL DEUTSCHLAND GMBH, DE

Free format text: FORMER OWNER: INTEL MOBILE COMMUNICATIONS GMBH, 85579 NEUBIBERG, DE

Effective date: 20130315

Owner name: INTEL DEUTSCHLAND GMBH, DE

Free format text: FORMER OWNER: INFINEON TECHNOLOGIES AG, 81669 MUENCHEN, DE

Effective date: 20130314

Owner name: INTEL DEUTSCHLAND GMBH, DE

Free format text: FORMER OWNER: INFINEON TECHNOLOGIES AG, 85579 NEUBIBERG, DE

Effective date: 20130315

Owner name: INTEL DEUTSCHLAND GMBH, DE

Free format text: FORMER OWNER: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH, 85579 NEUBIBERG, DE

Effective date: 20130326

Owner name: INTEL MOBILE COMMUNICATIONS GMBH, DE

Free format text: FORMER OWNER: INFINEON TECHNOLOGIES AG, 85579 NEUBIBERG, DE

Effective date: 20130315

Owner name: INTEL MOBILE COMMUNICATIONS GMBH, DE

Free format text: FORMER OWNER: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH, 85579 NEUBIBERG, DE

Effective date: 20130326

Owner name: INTEL MOBILE COMMUNICATIONS GMBH, DE

Free format text: FORMER OWNER: INTEL MOBILE COMMUNICATIONS GMBH, 85579 NEUBIBERG, DE

Effective date: 20130315

Owner name: INTEL MOBILE COMMUNICATIONS GMBH, DE

Free format text: FORMER OWNER: INFINEON TECHNOLOGIES AG, 81669 MUENCHEN, DE

Effective date: 20130314

R081 Change of applicant/patentee

Owner name: INTEL DEUTSCHLAND GMBH, DE

Free format text: FORMER OWNER: INTEL MOBILE COMMUNICATIONS GMBH, 85579 NEUBIBERG, DE

R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee