JP5630697B2 - Electronic components - Google Patents

Description

  The present invention relates to an electronic component used in a wireless communication apparatus, and more particularly to an electronic component in which a high-frequency circuit such as an amplifier semiconductor element and a filter is configured in a small size.

FIG. 13 is an example of a circuit block of a wireless communication device, and shows a high-frequency circuit unit of a wireless communication device for a wireless LAN (Local Area Network).
A filter FIL2, an amplifier PA, a filter FIL1, and a balun BAL1 are sequentially connected from the antenna ANT to a high-frequency switch SW that is connected to the antenna ANT and switches a connection between the transmission circuit TX and the reception circuit RX, and a path through which a transmission signal of the frequency f1 passes. Are connected in order from the antenna ANT to the path through which the reception signal of the frequency f2 passes. The filter FIL4, the low noise amplifier LNA, the filter FIL3, and the balun BAL2 are connected.

In the field of wireless communication devices such as cellular phones, the size of wireless communication devices themselves has been remarkably reduced, and accordingly, high-frequency circuit units and electronic components used therein have also been rapidly reduced in size. As an example of downsizing of electronic components, Patent Document 1 discloses a hybrid integrated circuit device in which components such as amplifier semiconductor elements are mounted on a multilayer substrate.
FIG. 14 is a cross-sectional view of the hybrid integrated circuit device 1000 (electronic component). The amplifier semiconductor element 1550 is mounted and soldered to the mounting electrode 1050 in the cavity portion of the multilayer substrate 1120, is connected to the terminal electrode 1300 on the surface layer of the multilayer substrate 1120 by a bonding wire 1600, and is sealed with a resin 1540. Mounting components 1500 and 1510 such as reactance elements and resistors are mounted on the surface of the multilayer substrate 1120, and are covered with a metal cap 2000.
A line conductor 1200 or the like is provided on the inner layer of the multilayer substrate 1120, and is connected to mounting components 1500 and 1510 provided on the surface layer via via holes 1310 or connection lines. A plurality of thermal vias 1010 are provided in substantially the entire lower portion of the amplifier semiconductor element 1550. The thermal via 1010 is connected to the mounting electrode 1050 and the ground electrode 1100 provided on the lower surface side of the multilayer substrate 1120.

  In general, amplifier semiconductor elements consume a large amount of power, so thermal vias are essential for multilayer substrates as a countermeasure against heat generation. As shown in FIG. 14, since the thermal via 1010 occupies most of the lower portion of the amplifier semiconductor element 1550, no other circuit can be provided in that region, which hinders downsizing of electronic components.

  In response to such a problem, in the high frequency module (electronic component) 1000 disclosed in the cited document 2 shown in FIG. 14, a power amplifier IC (amplifier semiconductor element) 1550 is mounted on the upper surface of the multilayer substrate 1120, and the multilayer substrate It is disclosed that a filter 1180 formed in the inner layer of 1120 is disposed almost directly under a power amplifier IC 1550 and a number of ground via holes of the filter 1180 are used as thermal vias 1030 for the power amplifier. With such a configuration, unlike the thermal via of the cited document 1, it is not necessary to connect the upper mounting electrode 1050 and the lower ground electrode 1100 through all the layers, and the total number of via holes is small. Therefore, the high-frequency module can be reduced in size.

JP 09-116091 A JP 2009-182903 A

Like the electronic component disclosed in the cited document 2, if another circuit block such as a filter or a balun is disposed under the amplifier semiconductor element, the electronic component can be made compact. However, in order to obtain a heat radiation effect using a via hole of a circuit block, in particular, a ground via connected to the ground without using a conventional thermal via, a large number of ground vias are required.
Therefore, the circuit configuration of the circuit block, the shape of the conductor pattern constituting the circuit element, the lamination arrangement, and the like are significantly limited, and there is a problem that the configuration becomes complicated. In addition, a circuit and a configuration that take heat dissipation performance into consideration along with high-frequency characteristics are required, making the design of a high-frequency circuit even more difficult.

  In recent years, semiconductor devices for amplifiers have been miniaturized and the amount of heat generated has also increased. With the miniaturization of semiconductor elements, the area facing the mounting electrode on the top of the stack decreases, and heat dissipation by the ground via of the circuit block cannot provide a sufficient effect, and the increase in thermal resistance becomes noticeable. There is also a problem that the efficiency of the element is lowered.

Also, the amplifier semiconductor element in the transmission path of the high-frequency circuit and the amplifier semiconductor element (for low-noise amplifier) in the reception path are arranged close to the upper surface of one stacked body, or the multi-band of the high-frequency circuit In some cases, amplifier semiconductor elements that handle high-frequency signals in different frequency bands are arranged close to each other.
When an acoustic wave element using surface acoustic waves or bulk acoustic waves is placed close to a semiconductor element for an amplifier and used as a filter, duplexer, or diplexer, a filter for the acoustic wave element is required unless sufficient heat dissipation characteristics are secured. There was also a problem that the characteristics changed.
Furthermore, when three or more circuit blocks are formed in the laminate, it is necessary to consider the problem of isolation.
Accordingly, an object of the present invention is to provide an electronic component that is excellent in heat dissipation of heat generated by a semiconductor element for an amplifier and excellent in electrical characteristics while being small.

According to a first aspect of the present invention, there is provided an electronic component comprising a multilayer body including an insulator layer and a conductor pattern, and an amplifier semiconductor element, wherein the multilayer body is formed in an inner layer on the upper layer side. electrode and a second ground electrode formed on the inner layer of the lower layer side, and a mounting electrode for connection to an amplifier semiconductor element mounting that in the first ground electrode and a plurality of via holes on the upper surface, the the lower surface second ground electrode And a third ground electrode connected by a plurality of via holes, and further, a mounting electrode, a first ground electrode, a second ground electrode, and a third ground electrode are connected to the stacked body, and the upper and lower surfaces of the stacked body are connected to each other. And a second shield connecting the first ground electrode and the second ground electrode, and the first and second shields are configured by cascading via hole groups including via holes that are continuous in the stacking direction. The first ground electrode and the second ground electrode of the laminate are partitioned into at least three regions by the first and second shields, and partitioned by the first and second shields and the first and second ground electrodes. In the first region located below the amplifier semiconductor element, a conductor pattern constituting a first circuit block is disposed, and the mounting electrode is disposed on a portion overlapping the first region and the first shield. The first shield and the second shield are used as a heat dissipation path of the amplifier semiconductor element, and a power supply line to the amplifier semiconductor element is provided between the upper surface of the stacked body and the first ground electrode. The electronic component is provided between the lower surface of the multilayer body and the second ground electrode .

The first region in the stack located below the amplifier semiconductor element is protected from electromagnetic interference by the first and second ground electrodes and the first and second shields. In the first region, a conductor pattern constituting the first circuit block is disposed, and for example, a circuit such as a filter, a balun, or a filter balun in which a filter and a balun are combined is formed.
According to the present invention, it is possible to reduce the size of an electronic component by effectively utilizing the partitioned region below the amplifier semiconductor element, and it is relatively easy to design with excellent electrical characteristics. Therefore, it is possible to provide an excellent electronic component without deteriorating the characteristics of the electric circuit configured as the first circuit block. In the present invention, it is not hindered to provide a ground via in the first circuit block.

  In the present invention, heat generated by the semiconductor element for amplifier is countered by the first shield and the second shield. The first shield is configured by cascading via hole groups each including a via hole that is continuous in the stacking direction and connects the mounting electrode on which the amplifier semiconductor element is mounted and the third ground electrode on the lower surface of the stack. It is a path responsible for heat conduction to the substrate side. The first shield is provided on the signal output side of the amplifier semiconductor element. In order to improve heat dissipation, the number of via hole groups may be plural, or the diameter of the via holes may be larger than the via holes serving as signal paths.

In the present invention, heat dissipation is enhanced by using the second shield as a secondary heat dissipation path. The sub heat dissipation path is configured by a plurality of via holes that connect the mounting electrode and the first ground electrode, a plurality of via holes that connect the second ground electrode and the third ground electrode, and a second shield. The second shield is formed by cascading via hole groups each including a via hole that connects the first ground electrode and the second ground electrode, and is continuous in the stacking direction. For this reason, it can function effectively as a sub heat dissipation path between the first and second ground electrodes.
The second shield is disposed at a position that does not overlap the amplifier semiconductor element in the stacking direction, and ensures a large first region. However, since the contribution to heat dissipation becomes smaller as the distance from the amplifier semiconductor element increases, it is preferable to determine the arrangement position in consideration of the effect.

In the present invention, a fourth ground electrode may be provided between the first ground electrode and the second ground electrode. The fourth ground electrode does not have to have a form that extends over substantially the entire surface of the insulator layer like the first ground electrode and the second ground electrode, and is provided on a part of one surface of the insulator layer or divided on one surface. It may be provided. In addition, the number of ground electrodes disposed between the first ground electrode and the second ground electrode is not limited to one layer, and includes a case where the ground electrodes are provided on a plurality of insulator layers.
Further, the second shield is configured such that a column position of the via hole group between the first ground electrode and the fourth ground electrode is different from a column position of the via hole group between the second ground electrode and the fourth ground electrode. It is also preferable to form For example, the column position of the via hole group between the first ground electrode and the fourth ground electrode is set near the amplifier semiconductor element, and the column position of the via hole group between the second ground electrode and the fourth ground electrode is relatively set. If the distance is changed to be far away, the size of the first region can be secured while preventing the heat dissipation effect of the second shield from being lowered.
In the first region, between the first ground electrode and the fourth ground electrode, a strip line or inductance conductor pattern that can be formed even in a relatively small planar region is disposed, and the second ground electrode By arranging a conductor pattern for capacitance that requires a relatively large planar area for formation between the fourth ground electrode, the first area can be used effectively.

In the present invention, it is preferable to arrange a conductor pattern constituting the second circuit block in the second region partitioned by the first shield and the first and second ground electrodes. The second circuit block is a circuit such as a filter, a matching circuit, a directional coupler, and a high frequency switch. In addition, it is preferable to arrange a conductor pattern constituting the third circuit block in the third region defined by the second shield and the first and second ground electrodes. The third circuit block is a circuit such as a balun or a filter. The first circuit block and the third circuit block are not connected, and a plurality of terminal electrodes are formed on the lower surface of the laminate, and one of the input ports of the first circuit block is connected to one of them. The other one is connected to the output port of the third circuit block.

  In the present invention, it is also preferable to mount an acoustic wave element on the upper surface overlapping the second region or the third region of the laminate. The acoustic wave element is a SAW (Surface Acoustic Wave) filter, FBAR (Film Bulk Acoustic Resonator) type, SMR (Solid Mounted Resonator) type, or other BAW (bulk acoustic wave) filter.

  According to the present invention, it is possible to provide an electronic component that is small in size and excellent in electrical characteristics even if a plurality of circuit blocks are incorporated without hindering heat dissipation of heat generated by the amplifier semiconductor element.

It is a top view of the electronic component which concerns on one embodiment of this invention. It is X-X 'sectional drawing of the electronic component which concerns on one embodiment of this invention. It is the top view which expanded a part of insulating layer which shows the inner layer structure of the electronic component which concerns on one embodiment of this invention. It is the other top view which expanded a part of insulating layer which shows the inner layer structure of the electronic component which concerns on one embodiment of this invention. It is a circuit block diagram which shows the structure of the electronic component which concerns on one embodiment of this invention. It is an equivalent circuit diagram which shows the structure of the electronic component which concerns on one embodiment of this invention. It is sectional drawing of the electronic component which concerns on the other embodiment of this invention. It is an external appearance perspective view of the electronic component which concerns on the other embodiment of this invention. It is an equivalent circuit diagram which shows the structure of the electronic component which concerns on the other embodiment of this invention. It is a top view of the lower surface side of the electronic component which concerns on the other embodiment of this invention. It is a disassembled perspective view which shows the internal structure of the electronic component which concerns on the other embodiment of this invention. It is a top view of the upper surface side of the electronic component which concerns on the other embodiment of this invention. It is a circuit block diagram which shows the structural example of the high frequency circuit part of a radio | wireless communication apparatus. It is sectional drawing which shows the internal structure of the conventional electronic component. It is sectional drawing which shows the other internal structure of the conventional electronic component.

The present invention will be described in detail below with reference to the drawings. FIG. 1 is a top view of an electronic component according to an embodiment of the present invention, FIG. 2 is a cross-sectional view thereof, and FIGS. 3 and 4 are partial plan views showing an example of an inner layer structure of a laminate constituting the electronic component. FIG. FIG. 5 is a circuit block diagram showing the configuration of the electronic component, and FIG. 6 is an equivalent circuit diagram thereof.
The electronic component of the present invention includes a laminated body including an insulator layer and a conductor pattern, and an amplifier semiconductor element and a chip component mounted on the surface. As the insulator layer, dielectric ceramics, resin, or a composite material of resin and ceramic can be used. Laminating is performed using a known method. For example, when dielectric ceramics are used, LTCC (low temperature co-fired ceramic) technology or HTCC (high temperature co-fired ceramic) technology is used.

In the case of LTCC technology, the laminate 100 is made of, for example, a ceramic dielectric that can be sintered at a low temperature of 1000 ° C. or less as an insulator layer, and a conductive paste such as Ag or Cu is printed to form a predetermined conductor pattern. The plurality of ceramic green sheets having a thickness of 10 to 200 μm are used, stacked, and sintered integrally.
Examples of ceramic dielectrics that can be sintered at low temperatures include ceramics having Al, Si, and Sr as main components and Ti, Bi, Cu, Mn, Na, K, etc. as auxiliary components, Al, Mg, Si, and Gd. And ceramics containing Al, Si, Zr and Mg.

The laminated body 100 has an upper surface on which an amplifier semiconductor element and a chip component are mounted, and a lower surface on which terminal electrodes and the like are formed. A first ground electrode 10a is formed on the inner layer on the upper surface side (also referred to as the upper layer side), and a second ground electrode 10b is formed on the inner layer on the lower surface side (also referred to as the lower layer side).
As shown in FIG. 1, terminal electrodes for mounting the amplifier semiconductor element 60 and the chip component 90 and wire bonding are formed on the upper surface of the laminate 100. The mounting electrode 11 for mounting the amplifier semiconductor element 60 is provided with a plurality of via holes 20 on almost one surface thereof. In the figure, the amplifier semiconductor element 60 is indicated by a broken line, the bonding wire BW is indicated by a dotted line, and the via hole 20 of the lower mounting electrode 11 is indicated by a black circle and a circle in X to clarify the arrangement. Yes.
Generally, a via hole is used for electrical connection and heat dissipation, and it is filled exclusively with a metal conductor. The metal conductor is preferably packed tightly, but may have a hollow portion as long as the purpose of use is not impaired.

The first and second ground electrodes 10a and 10b are formed in a conductor pattern that covers almost the entire surface of the insulator layer, and the third ground electrode 12 is a conductor pattern that covers a wide area including the central portion of the lower surface of the multilayer body 100. It is formed with.
A terminal electrode 95 for mounting on the circuit board is formed around the third ground electrode 12. The terminal electrode 95 also has electrical functions as input / output ports P1, P2 +, P2-, ground ports, power supply ports Vcc1, Vcc2, Vatt, Vb, Vd and the like.
In this embodiment, the input / output terminal P1 is an unbalanced end, and the input / output terminals P2 + and P2- are balanced ends. Further, although the terminal electrode on the lower surface is LGA (Land Grid Array), BGA (Ball Grid Array) or the like can also be adopted, and a terminal structure provided on the side surface of the laminated body may be used.

As shown in the XX ′ sectional view of FIG. 2, the mounting electrode 11 is connected to the first ground electrode 10 a by a plurality of via holes 20. A terminal electrode 95 and a third ground electrode 12 for mounting on the circuit board are formed on the lower surface of the multilayer body 100, and the third ground electrode 12 is connected to the second ground electrode 10 b through a plurality of via holes 20. The second ground electrode 10b is connected to a terminal electrode 95 functioning as a ground port through a via hole.
A part of the via hole 20 constitutes a via hole group including via holes continuous in the stacking direction. The first shield 30 reaching the upper and lower surfaces of the multilayer body is configured by connecting the mounting electrode 11, the first ground electrode 10 a, the second ground electrode 10 b, and the third ground electrode 12 in cascade via hole groups. In FIG. 1, the via holes 20 shown in black circles arranged more closely in columns than other via holes and arranged in three rows constitute the first shield 30.
The first shield 30 is below the signal output side of the amplifier semiconductor element 60 and is formed in a region that does not exceed 1/2 of the area of the mounting electrode 11. Since the signal output side of the amplifier semiconductor element 60 is more likely to generate heat than other parts, the heat radiation effect to the circuit board is increased by providing the first shield 30 below the part.

The present invention further includes a second shield 35 for connecting the first ground electrode 10a and the second ground electrode 10b. FIG. 3 is an enlarged partial plan view showing a part of the insulator layer S1 on which the first ground electrode 10a is formed, and FIG. 4 is an insulator located between the first ground electrode 10a and the second ground electrode 10b. It is a plane partial enlarged view showing a part of layer S2.
Similar to the first shield 30, the second shield 35 is configured by cascading via hole groups including the via holes 20 that are continuous in the stacking direction. 3 and 4, the via holes 20 constituting the first shield 30 are black circles, the via holes 20 constituting the second shield 35 are circled in a lattice, and the via holes connected to the conductor pattern constituting the first circuit block are ×. Circles, via holes 21 serving as paths for high-frequency signals and semiconductor control signals are indicated by white circles. The via hole 21 and the via hole 20 configured in a layer having no ground electrode are larger-diameter via holes than the via hole 20 having a layer having a ground electrode.
The second shield 35 is formed at a predetermined interval from the first shield 30 and is provided at a position that does not overlap with the amplifier semiconductor element 60 in the stacking direction. Here, it is configured substantially in parallel, but is not particularly limited, and the columns may not be linear.

The stacked body 100 includes at least three regions (a first region 71, a second region 51, and a third region) by the first shield 30 and the second shield 35, and the first ground electrode 10a and the second ground electrode 10b. An area 81) is partitioned.
The first ground electrode 10a and the second ground electrode 10b are formed in a conductor pattern that covers almost the entire surface of the insulator layer S2, but are arranged around the via hole 21 that carries the connection between the layers of the signal path and in each region. A portion where unnecessary parasitic capacitance is generated between the conductive pattern and the conductive pattern is formed by removing the conductive pattern.

  The first region 71 sandwiched between the first shield 30 and the second shield 35 is located below the mounting electrode 11. The conductor pattern which comprises the 1st circuit block 70 which comprises a high frequency circuit is arrange | positioned there. A conductor pattern constituting the second circuit block 50 is arranged in the second region 51 defined by the first shield 30, the first ground electrode 10a, and the second ground electrode 10b. A conductor pattern constituting the third circuit block 80 is arranged in the third region 81 defined by the second shield 35, the first ground electrode 10a, and the second ground electrode 10b.

  In this embodiment, as shown in FIGS. 5 and 6, the first circuit block 70 configured in the first region 71 is a band-pass filter, and the second circuit block 50 configured in the second region 51 is a low-pass filter. The third circuit block 80 configured in the third region 81 is a balun. In the present invention, the circuit block arranged in each region is not particularly limited. However, the circuit block connected to the output stage side of the amplifier semiconductor element 60 is exclusively a filter or a matching circuit, and the input stage side includes a filter. , Baluns, or filter baluns that combine these functions are often arranged.

In FIG. 2, the connection between the circuit blocks is indicated by arrows connecting the regions 51, 71, 81 to the terminal electrodes on the lower surface and the upper surface. The circuit blocks are appropriately connected via connection means such as via holes and connection lines (conductor patterns) not shown.
The terminal electrode 95 at the lower left in the drawing is connected to the third circuit block 80. The third circuit block 80 is connected to the first circuit block 70. Note that the connection between the first and third circuit blocks is performed using connection means provided in the laminate 100, or other circuit blocks such as filters provided on the circuit board without being connected in the laminate 100. There is also a case of connecting via
The first circuit block 70 is connected to the terminal electrode Bt1 on the upper surface, and is connected to the input terminal P1a of the amplifier semiconductor element 60 via the bonding wire BW. The output terminal P1b of the amplifier semiconductor element 60 is connected to the terminal electrode M1 on the upper surface by a plurality of bonding wires BW, and the terminal electrode M1 is connected to the lower right terminal electrode 95 via the via hole and the second circuit block 50. .

  Each region 51, 71, 81 is electromagnetically partitioned by the first and second shields 30, 35, and the first and second ground electrodes 10a, 10b. Each power supply terminal Vcc1, Vcc2, Vatt, Vb, Vd and the power supply line to the amplifier semiconductor element 60 and the balun 80 are connected between the first ground electrode 10a and the upper surface of the laminated body 100, and the second ground electrode 10b. It is formed in an insulator layer between the lower surface of the multilayer body 100 and suppresses interference between circuit blocks formed in each region and interference between a circuit board, a mounted component, and a power line.

  Thermal energy from the amplifier semiconductor element 60 is radiated to the circuit board exclusively through the first shield 30, but a part of the plurality of via holes 20 provided below the mounting electrode 11, the first ground electrode 10 a, The heat is radiated to the circuit board through the second shield 35, the second ground electrode 10b, and the plurality of via holes 20 provided between the second ground electrode 10b and the third ground electrode. Since the second shield 35 is formed of via holes arranged in a dense column, heat conduction between the first ground electrode 10a and the second ground electrode 10b can be efficiently performed. In the present invention, the first shield 30 is used as the main heat dissipation path of the semiconductor element for amplifier, and the second shield 35 is used as the sub heat dissipation path to improve the heat dissipation performance.

FIG. 7 shows a cross-sectional view of an electronic component of another embodiment. 2 is different from the electronic component shown in FIG. 2 in that a fourth ground electrode 10c is provided between the first ground electrode 10a and the second ground electrode 10b.
Usually, the circuit block provided in each region is configured as an LC circuit using reactance elements. The strip line and the inductance element are easily affected by electromagnetic interference, and the capacitance element requires a relatively large area compared to the inductance element to form the electrode pattern. Therefore, if each region is divided by the fourth ground electrode 10c and the electrode pattern constituting the inductance element and the electrode pattern constituting the capacitance element are arranged separately, the limited region in the stacked body is effectively used. It is possible to make the electronic component less susceptible to the influence of electromagnetic interference.

  FIG. 7 shows an example in which, in the first region 71, an electrode pattern constituting the strip line 70a (inductance element) is formed on the upper side in the drawing, and an electrode pattern constituting the capacitance element 70b is formed on the lower region. . A region constituting the strip line 70a by making the position of the via hole constituting the second shield 35 different between the first and fourth ground electrodes 10a, 10c and between the second and fourth ground electrodes 10b, 10c. In this case, a large portion of the plane area constituting the capacitance element 70b can be secured. Although the length of the second shield 35 connecting the first and second ground electrodes is increased, the heat dissipation performance is maintained. Note that the fourth ground electrode 10 c may be formed only in the first region 71.

  FIG. 8 is a perspective view of an electronic component according to an embodiment of the present invention. The electronic component 1 is used in a high frequency transmission / reception circuit unit of a wireless LAN wireless communication device, and includes a plurality of filters and a balun, and a high frequency amplifier, a low noise amplifier, and a high frequency switch are mounted on a laminate and integrated. It has become.

  FIG. 9 is an equivalent circuit diagram of the high-frequency component. An SPDT (single pole double throw type) high frequency switch 40 is disposed in the antenna port ANT via a matching circuit 45. A balun 80, a filter 70, a high frequency amplifier 60, a matching circuit 50, and a filter 54 are provided in the path of the transmission signal, and a balun 82, a filter 72, a low noise amplifier 61, and a filter 52 are provided in the path of the reception signal. The respective semiconductor elements constituting the high-frequency switch 40, the high-frequency amplifier 60, and the low-noise amplifier 61 are mounted on the multilayer body 100, and other circuits are built in the multilayer body 100 by conductor patterns. Note that some circuit elements such as matching circuits such as a DC cut capacitor, a high frequency amplifier 60, and a low noise amplifier 61 are mounted on the laminate 100. Semiconductor elements used for the high-frequency amplifier 60, the low-noise amplifier 61, the high-frequency switch 40, and chip components such as capacitance that cannot be incorporated in the multilayer body 100 are mounted on the multilayer body 100 and sealed with a resin 120.

  FIG. 10 is a bottom plan view of the electronic component. A plurality of terminal electrodes are formed on the lower surface side, and the reference numerals given to the terminal electrodes correspond to the ports of the equivalent circuit of the electronic component shown in FIG.

A third ground electrode 12 connected to the upper second ground electrode 10b (GND4) through a via hole is provided in the center of the lower surface to provide a stable ground potential and improve the connection strength with the circuit board.
Each terminal electrode is formed on each side surface around the third ground electrode 12, and an antenna port ANT and an unconnected port NC are formed on the first side surface together with the ground port GND. The input port Pa of the filter 70 and the output port Pb of the balun 80 are formed along with the voltage ports Vcc1, Vatt, Vb, and Vcc2 on the second side surface on the lower side of the figure adjacent to the first side surface. An output port Pc of the filter 72 and an input port Pd of the balun 82 are formed along with the voltage supply terminals Vcl, Vbl, Vr, and Vt on the third side surface on the upper side in the figure facing the second side surface. On the fourth side surface, input (balanced) ports P2 + and P2- of the balun 80 and output (balanced) ports P4 + and P4- of the balun 82 are formed together with the voltage supply terminal Vd and the ground port GND.

FIG. 11 is an exploded perspective view showing an outline of a stacked arrangement of circuits such as filters and baluns of electronic components according to an embodiment of the present invention. Although the stacked body 100 is formed of 18 layers, the layer between the insulator layer L4 and the insulator layer L5 and the layer between the insulator layer L5 and the insulator layer L6 are omitted in the drawing.
The electronic component 1 of the present invention has a structure including ground electrodes on different insulator layers L3, L7, L9, and L11. A fourth ground electrode 10c (GND2, GND3) is provided between the first ground electrode 10a (GND1) and the second ground electrode 10b (GND4), and the ground electrodes GND1 to GND4 are electrically connected to each other. The laminated body 100 is divided into seven regions A to G, which are connected by a plurality of shields configured by a plurality of via holes. In the figure, the via holes are connected to the ground electrodes GND1 to GND by black circles, and those used for other connections are indicated by white circles.

  A mounting electrode 11 is formed on a portion of the upper surface of the multilayer body 100 located above the region B, and the amplifier semiconductor element 60 is mounted thereon. A first shield 30 extending from the upper surface of the multilayer body 100 to the third ground electrode 12 on the lower surface is formed between the region B and the region C, and a second shield 35 is formed between the region A and the region B. . Similarly to the second shield 35, a shield is formed between the other regions by the via hole 20 that connects the first ground electrode 10a and the second ground electrode 10b, and functions as a secondary heat dissipation path together with the electromagnetic section. To do.

  A balun 80 is formed in the region A, a filter 70 is formed in the region B, a conductor pattern of the filter 54 and the matching circuit 50 is formed in the region C, a balun 82 is formed in the region D, a filter 72 is formed in the region E, and a filter is formed in the region F. 52 conductor patterns are formed, and the conductor pattern of the matching circuit 45 is formed in the region G.

  The power supply line to the amplifier or the like is formed in the insulator layers L2 and L12 outside the first and second ground electrodes 10a and 10b. In this way, the positions where the plurality of power supply lines are stacked are limited and separated from the conductor pattern constituting the circuit block, so that each of them is less susceptible to noise. A via hole connected to the ground electrode is provided between the power lines so that interference is reduced.

FIG. 12 is a plan view showing an arrangement state of terminal electrodes and mounted components formed on the upper surface of the laminate. The reference numerals correspond to the reference numerals assigned to the ports of the equivalent circuit shown in FIG. 12, but only the main ones are shown and the others are omitted.
Port Bt1 of filter 70 formed by a conductor pattern in the multilayer body, ports M1 and M2 of matching circuit 50, ports Lt1 and Lt2 of filter 54, port A1 of matching circuit 45, port Br3 of filter 72, port Br1 of filter 52 , Br2 are all connected to a terminal electrode formed on the upper surface of the laminate 100. Therefore, the electrical connection between the circuits is performed by the bonding wire BW used for the connection with the mounted chip component or the semiconductor element such as an amplifier or a switch.

  The electronic component 1 according to the present invention divides the inside of the multilayer body as a plurality of electromagnetically shielded regions by a plurality of ground electrodes at different lamination positions and a shield that electrically connects the ground electrodes. The conductor patterns constituting the circuit block are arranged in different areas. Since each region is in a shielded state, each circuit block is configured to be less susceptible to noise from other circuits. With such a configuration, even the laminated body 100 including a plurality of circuit blocks is reduced in size, can prevent interference between circuit blocks and the like, and can efficiently dissipate heat generated by the semiconductor to the circuit board.

  According to the present invention, it is possible to provide an electronic component that is small in size and excellent in electrical characteristics even if a plurality of circuit blocks are incorporated without hindering heat dissipation of heat generated by the amplifier semiconductor element.

Reference Signs List 1 electronic component 10a first ground electrode 10b second ground electrode 10c fourth ground electrode 11 mounting electrode 12 third ground electrode 20 via hole 30 first shield 35 second shield

Claims (6)

An electronic component comprising a laminate including an insulator layer and a conductor pattern, and a semiconductor element for an amplifier,
The laminated body includes a first ground electrode formed in an inner layer on the upper layer side, a second ground electrode formed in an inner layer on the lower layer side, and an amplifier connected to the first ground electrode and a plurality of via holes on the upper surface. A mounting electrode for mounting a semiconductor element, and a third ground electrode connected to the second ground electrode by a plurality of via holes on the lower surface,
Furthermore, the stacked body is connected to the mounting electrode, the first ground electrode, the second ground electrode, and the third ground electrode, and the first shield extending to the upper and lower surfaces of the stacked body, the first ground electrode, and the second ground. A second shield connecting the electrode;
The first and second shields are configured by cascading via hole groups formed of via holes that are continuous in the stacking direction, and the first and second shields are provided between the first ground electrode and the second ground electrode of the stacked body. Divided into at least three areas,
A conductor pattern constituting a first circuit block is disposed in a first region defined by the first and second shields and the first and second ground electrodes, and located under the amplifier semiconductor element ,
The mounting electrode is formed in a portion overlapping the first region and the first shield,
The first shield and the second shield serve as a heat dissipation path of the amplifier semiconductor element ,
An electronic component comprising a power supply line to the amplifier semiconductor element provided between an upper surface of the multilayer body and a first ground electrode, and between a lower surface of the multilayer body and a second ground electrode. . A fourth ground electrode is provided between the first ground electrode and the second ground electrode;
The second shield is configured such that a column position of the via hole group between the first ground electrode and the fourth ground electrode is different from a column position of the via hole group between the second ground electrode and the fourth ground electrode , The regions defined by the first, second and fourth ground electrodes, the first shield and the second shield are formed so as to have different sizes in the planar region,
A filter is configured in the first region, an electrode pattern configuring an inductance element is formed in a region between the first ground electrode and the fourth ground electrode, and a planar region is larger than a region configuring the inductance element 2. The electronic component according to claim 1, wherein an electrode pattern constituting a capacitance element is formed in a region between the second ground electrode and the fourth ground electrode . The second shield, the electronic component according to claim 1 or 2, characterized in that provided in a position that does not cover the mounting electrode and the stacking direction for the amplifier semiconductor element mounting.   The conductor pattern which comprises a 2nd circuit block is arrange | positioned in the 2nd area | region divided by the 1st shield and the 1st and 2nd ground electrode, The Claim 1 thru | or 3 characterized by the above-mentioned. Electronic components. A conductor pattern constituting a third circuit block is disposed in a third region defined by the second shield and the first and second ground electrodes, and the first circuit block and the third circuit block are connected to each other. The input port of the first circuit block is connected to one of the plurality of terminal electrodes formed on the lower surface of the laminate, and the output port of the third circuit block is connected to the other one. The electronic component according to any one of claims 1 to 4, wherein   The electronic component according to claim 1, wherein a surface acoustic wave element is mounted on an upper surface overlapping the second region or the third region of the laminate.

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