JP5573897B2 - Bonding structure and mounting structure using the same - Google Patents

Description

  The present invention relates to a bonding structure when a semiconductor device is mounted on a substrate, and more particularly to a bonding structure that relieves stress applied to the bonding structure and a mounting structure using the bonding structure.

  A semiconductor device typified by a large scale integrated circuit (hereinafter referred to as LSI) is usually mounted on a printed circuit board or the like. FIG. 1A shows a general semiconductor device mounting structure 200. The LSI chip 1 has a plurality of LSI chip electrode pads 8 as shown in FIG. 1B. Further, the substrate 2 has a plurality of substrate electrode pads 9 as shown in FIG. 1C.

  The LSI chip electrode pad 8 and the substrate electrode pad 9 are generally circular and are joined by solder bumps 7 to form a joined structure 20. FIG. 2 shows a perspective view of a general joining structure 20. The solder bumps 7 generally have a barrel shape (barrel shape). The LSI chip 1 is made of silicon, and the substrate 2 is made of resin or ceramics.

  Here, when the mounting structure 200 itself generates heat or a device in which the mounting structure 200 is incorporated generates heat, stress is applied to the solder bumps 7 due to the difference in linear expansion coefficient between the LSI chip 1 and the substrate 2. Will be added. The stress is concentrated on the circumference of the junction between the LSI chip electrode pad 8 and the solder bump 7 and the junction between the substrate electrode pad 9 and the solder bump 7. Further, the greatest stress is generated along a straight line going to the center of the LSI chip 1 (LSI chip center 21), particularly a diagonal line going from the corner of the LSI chip 1 to the center.

  A technique for relaxing this stress is disclosed in Patent Document 1. Here, when the solder bump is melted, the LSI chip is pulled up with respect to the substrate to stretch the solder bump so that the bump shape is not a barrel shape but a drum shape (a drum shape). The drum-type solder bump has a smaller contact angle with the LSI chip or the electrode pad of the substrate than the barrel-type solder bump, so that the stress at the joint can be relaxed.

  Patent Document 2 discloses an electrode pad that enhances the release of stress during thermal cycle operation. Here, the electrode pad shape has a shape elongated in a direction perpendicular to the edge of the device.

Japanese Patent Laid-Open No. 10-223693 Japanese Patent Application Laid-Open No. 11-219968

  In general barrel-shaped solder bumps, stress is concentrated at the joint between the LSI chip and the electrode pads of the board and the solder bumps during the thermal cycle operation due to the difference in the linear expansion coefficient between the LSI chip and the board. There is a problem that reliability of the system is lowered.

  In order to relieve this stress, Patent Document 1 discloses a method in which an LSI chip is lifted with respect to a substrate when the solder bump is melted, and the solder bump is stretched to form a drum shape. However, in this case, in order to form a desired drum-shaped solder bump, it is necessary to precisely control the distance between the LSI chip and the substrate. Therefore, there is a problem that a special mounting apparatus having a mechanism for holding a dummy bump having a large size and holding an LSI chip or a substrate precisely is required.

  Patent Document 2 discloses a method of increasing the release of stress during thermal cycle operation by making the electrode pad shape elongated in a direction perpendicular to the edge of the device. However, this method does not take measures against the stress generated along the straight line toward the center of the LSI chip, which is the largest stress during the thermal cycle.

  The present invention has been made in view of the above-described present situation, and is a joint structure that alleviates stress concentration at the joint between a solder bump and an electrode pad during a thermal cycle, and particularly, has the largest stress. An object of the present invention is to provide a joint structure obtained by a simple method that does not require a special mounting apparatus that relieves stress along a straight line that leads to the center of an LSI chip, and a mounting structure using the same. Yes.

  A bonding structure for bonding a first structure and a second structure, wherein the bonding structure is bonded to a first electrode pad to be bonded to the first structure and the second structure. A second electrode pad; a first electrode pad; and a bump bonded to the second electrode pad, wherein the first electrode pad and the second electrode pad have at least one straight side. Each of the straight line sides of the first electrode pad and the straight line side of the second electrode pad are each directed toward the center of the first structure. And the one straight line side of the first electrode pad is on the center side of the first structure with respect to the other side, the second The one straight side of the electrode pad has an outer periphery of the first structure relative to the other side. If the one straight side of the first electrode pad is on the outer peripheral side of the first structure relative to the other side, the one straight side of the second electrode pad Is a junction structure on the center side of the first structure with respect to the other side.

  In addition, the first structure body, the second structure body, and the bonding structure body, the bonding structure body is bonded to the first electrode pad and the second structure body to be bonded to the first structure body. A first electrode pad and a bump bonded to the second electrode pad, wherein the first electrode pad and the second electrode pad are at least one side of a straight line. The one straight side of the first electrode pad and the one straight side of the second electrode pad are each directed toward the center of the first structure. When arranged with a predetermined angle with respect to a straight line and the side of the one straight line of the first electrode pad is on the center side of the first structure with respect to the other side, The one straight line side of the second electrode pad has an outer periphery of the first structure relative to the other side. If the one straight side of the first electrode pad is on the outer peripheral side of the first structure relative to the other side, the one straight side of the second electrode pad Is a mounting structure, which is a joint structure, on the center side of the first structure with respect to the other side.

  According to the present invention, it is a joint structure that alleviates stress concentration at the joint between a solder bump and an LSI chip or an electrode pad of a substrate during a thermal cycle, and is particularly at the center of an LSI chip where the greatest stress is generated. It is possible to provide a joining structure obtained by a simple method that does not require a special mounting apparatus that relieves stress along a straight line toward the surface, and a mounting structure using the same.

It is a figure which shows the cross-sectional structure of the existing mounting structure. It is a figure which shows the LSI chip structure of the existing mounting structure. It is a figure which shows the board | substrate structure of the existing mounting structure. It is a perspective view which shows the structure of the existing joining structure. It is a figure which shows the cross-sectional structure of the mounting structure of embodiment of this invention. It is a figure which shows the LSI chip structure of the mounting structure of embodiment of this invention. It is a figure which shows the board | substrate structure of the mounting structure of embodiment of this invention. It is a top view which shows the structure of the junction structure of embodiment of this invention. It is a perspective view which shows the structure of the junction structure of embodiment of this invention. It is a figure which shows arrangement | positioning of the joining structure which performs stress distribution simulation. It is a figure which shows the result of the stress distribution simulation of the LSI chip electrode pad of the junction structure of embodiment of this invention. It is a figure which shows the result of the stress distribution simulation of the LSI chip electrode pad of the junction structure of embodiment of this invention. It is a figure which shows the result of the stress distribution simulation of the LSI chip electrode pad of the existing junction structure. It is a figure which shows the result of the stress distribution simulation of the board | substrate electrode pad of the existing junction structure. It is a top view which shows the structure of the junction structure of embodiment of this invention. It is a top view which shows the structure of the junction structure of embodiment of this invention. It is a top view which shows the structure of the junction structure of embodiment of this invention. It is a top view which shows the structure of the junction structure of embodiment of this invention. It is a top view which shows the structure of the junction structure of embodiment of this invention. It is a top view which shows the structure of the junction structure of embodiment of this invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the preferred embodiments described below are technically preferable to implement the present invention, but the scope of the invention is not limited to the following.

  FIG. 3A shows the mounting structure 100 according to the embodiment of the present invention. The LSI chip 1 has a plurality of LSI chip electrode pads 3 and 5 as shown in FIG. 3B. The substrate 2 has a plurality of substrate electrode pads 4 and 6 as shown in FIG. 3C. The LSI chip electrode pad 3 and the substrate electrode pad 4 are triangular in the present embodiment, and are substantially equilateral triangles. Further, the LSI chip electrode pad 5 and the substrate electrode pad 6 may be a general circle or the triangle of the present embodiment.

  The LSI chip electrode pad 3 and the substrate electrode pad 4 are bonded by the bump 7 to form the bonding structure 10 of the present embodiment. Further, the LSI chip electrode pad 5 and the substrate electrode pad 6 are bonded together by bumps 7 to form a bonded structure 11. FIG. 3C shows the position of the LSI chip 1 on the substrate 2 after mounting as an outer periphery 27 of the LSI chip.

  The LSI chip electrode pads 3 and 5 and the substrate electrode pads 4 and 6 are made of a metal having excellent conductivity such as copper, for example, and a film of gold or solder alloy having excellent solder wettability is formed on the surface thereof. Yes. The bump 7 is made of, for example, general solder or lead-free solder. The LSI chip 1 is mainly made of silicon, and the substrate 2 is made of resin or ceramics.

  As a manufacturing method of the present embodiment, a general LSI chip mounting method can be used. That is, in forming the electrode pad, it is possible to form the electrode pad by photolithography and etching after forming a copper film to be an electrode by a plating method or the like. Alternatively, after forming the frame of the electrode with a photoresist, copper may be embedded in the electrode portion by a plating method or the like to lift off the photoresist. Furthermore, after solder bumps are formed on the electrode pads, the LSI chip and the substrate are aligned, and the temperature is further controlled so that the LSI chip electrode and the substrate electrode are joined via the solder bumps. An LSI chip can be mounted on a substrate.

  A joining structure 10 according to an embodiment of the present invention will be described with reference to FIGS. 4A and 4B. FIG. 4A is a top view showing the configuration of the joint structure according to the embodiment of the present invention. FIG. 4B is a perspective view showing the configuration of the joint structure according to the embodiment of the present invention.

  4A and 4B, the straight line toward the LSI chip center direction 25 includes, for example, a case where the straight line extends along the diagonal line 26 in the rectangular LSI chip shown in FIG. 3B. An LSI chip electrode pad linear side 23, which is one side of a triangle forming the LSI chip electrode pad 3, has a desired angle with respect to a straight line toward the LSI chip center direction 25, and is preferably substantially vertical, and The other side of the triangle forming the LSI chip electrode pad 3 is arranged on the LSI chip center 21 side. On the other hand, the substrate electrode pad straight side 24, which is one side of the triangle forming the substrate electrode pad 4, has a desired angle with respect to the straight line toward the LSI chip center direction 25, and is preferably substantially vertical, and the substrate The other side of the triangle forming the electrode pad 4 is arranged on the outer peripheral side opposite to the LSI chip center 21. Here, the term “substantially vertical” refers to a range in which the effect of being vertical can be obtained, and includes, for example, a range of manufacturing variations.

  The LSI chip electrode pad 3 and the substrate electrode pad 4 are bonded together by bumps 7 to form a bonded structure 10. That is, the LSI chip electrode pad straight side 23 and the substrate electrode pad straight side 24 are located on the opposite side to the bump center 22 of the bump filling the space between the LSI chip electrode pad 3 and the substrate electrode pad 4. Alternatively, it can be assumed to be in a substantially point-symmetrical position. Alternatively, it may be located on the opposite side of the center of the space between the LSI chip electrode pad 3 and the substrate electrode pad 4 or at a substantially point-symmetrical position.

  When the mounting structure 100 itself generates heat or a device in which the mounting structure 100 is incorporated generates heat, stress is applied to the bonding structure 10 due to the difference in the linear expansion coefficient between the LSI chip 1 and the substrate 2. The stress is concentrated on the joint between the LSI chip electrode pad 3 and the bump 7 and the joint between the substrate electrode pad 4 and the bump 7. Further, the greatest stress is generated along a straight line toward the center of the LSI chip 1, particularly along a diagonal line 26 from the corner of the LSI chip 1 toward the center.

  The stress distribution generated at the joint was calculated by simulation. As the stress, Mises stress representing a stress value projected onto a uniaxial tensile or compressive stress in a stress field in which a load is applied in multiple directions from multiple directions was used. FIG. 5 shows the arrangement of the joint structure 12 used in the simulation. The bonding structure 12 is the bonding structure 10 of the present embodiment shown in FIG. 4B or the general bonding structure 20 shown in FIG. 2, and is bonded to the LSI chip and the substrate.

  The arrangement of the bonding structure 12 is as shown in FIG. 5 and is 144 pieces of 12 × 12 pieces. In consideration of the object of arrangement, the stress distribution was calculated for the 36 joining structures 12 of 6 × 6 painted in black in FIG. Further, since the calculation is simplified and the effect of the bonding structure 10 of the present embodiment can be remarkably confirmed with respect to the general bonding structure 20, the bonding surrounded by the broken line A that generates the largest stress in FIG. 2 is the normal bonding structure 20 shown in FIG. 2, and the bonding surrounded by the broken line A is the bonding structure 10 shown in FIG. 4B in the present embodiment, or the bonding structure 20 shown in FIG. 2 as a comparative example. did.

  The main calculation conditions are as follows: the linear expansion coefficient of LSI chip is 3 ppm / ° C., the size is equivalent to 26 mm × 26 mm, the thickness is 1 mm, the linear expansion coefficient of the substrate is 32 ppm / ° C., the size is equivalent to 56 mm × 50 mm, and the thickness is 1. When the electrode pad is circular, the diameter is 0.5 mm, the bump height is 0.5 mm, and the temperature condition is 25 ° C. to 150 ° C. The stress distribution of the joint structure surrounded by the broken line A at the right end of FIG. 5 that generates the largest stress is shown below.

  FIG. 6A shows the stress distribution of the LSI chip electrode pad 3 and FIG. 6B shows the stress distribution of the substrate electrode pad 4 for the bonding structure 10 of the present embodiment. In FIGS. 6A and 6B, the corners of the triangular pad are rounded. This is because when the pad is actually manufactured, the corner is rounded due to the manufacturing process. As a comparative example, FIG. 7A shows the stress distribution of the LSI chip electrode pad 8 and FIG. 7B shows the stress distribution of the substrate electrode pad 9 for the bonding structure 20 using a general circular electrode pad.

  6A and 6B, it can be seen that the stress distribution of the triangular LSI chip electrode pad 3 and the electrode pad 4 is a distribution in which the maximum stress is generated in the outer peripheral portion of the pad along the straight line toward the LSI chip center direction 25. . The maximum stress is 1720 MPa on the LSI center side for the LSI chip electrode pad 3, 1733 MPa on the opposite side to the LSI center side (hereinafter referred to as the outer peripheral side), and 1687 MPa on the LSI center side for the substrate electrode pad 4, and 1970 MPa on the outer peripheral side. It was.

  On the other hand, from FIGS. 7A and 7B, the stress distribution of the circular LSI chip electrode pad 8 and the electrode pad 8 is also maximum at the outer periphery of the pad along the straight line toward the LSI chip center direction 25, as in the case of the triangle. It can be seen that the stress distribution is generated. For the LSI chip electrode pad 8, the maximum stress was 2300 MPa on the LSI center side, 2045 MPa on the outer periphery side, and for the substrate electrode pad 9, 1790 MPa on the LSI center side, and 2208 MPa on the outer periphery side.

  Comparing the maximum stress values based on the above stress distribution simulation results, the triangular pad is reduced by 25% on the center side of the LSI chip electrode pad, reduced by 15% on the outer peripheral side, and on the central side of the substrate electrode pad with respect to the circular pad It was a 6% decrease and an 11% decrease on the outer periphery. As described above, it has been clarified that the stress inside the bonded structure can be reduced by changing the electrode pad structure from a circular shape to a triangular shape and the bonded structure 10 shown in FIGS. 4A and 4B.

  The reason why the maximum stress is reduced in the stress distribution of the triangular pad with respect to the circular pad is that the stress is dispersed because the portion where the maximum stress is generated is a straight line. That is, the maximum stress is generated in the direction along the center direction of the LSI chip, but in this embodiment, one side of a straight line constituting the triangular pad is arranged in a direction perpendicular to the direction along the center direction of the LSI chip. Therefore, the stress is distributed on this straight line and does not concentrate on one point. As a result, stress can be reduced. On the other hand, in the circular pad, the stress increases in the center direction of the LSI chip along the circumferential curve, so that the stress increases.

  In a triangular pad, whether one side of a straight line should be arranged on the center side or the outer peripheral side of the LSI chip depends on the thickness and size of the LSI chip and the substrate. When the rigidity of the substrate is higher than that of the LSI chip because the substrate is thicker than the LSI chip, the dimensions are large, the Young's modulus is high, etc., the stress on the LSI chip electrode pad 3 on the center side of the LSI chip 1 increases. . In such a case, as shown in FIGS. 4A and 4B, the LSI chip electrode pad linear side 23 is arranged on the center side and the corners are arranged on the outer peripheral side.

  In the substrate electrode pad 4, on the contrary, the stress on the outer peripheral side increases corresponding to the LSI chip electrode 3, so that the substrate electrode pad straight side 24 is on the outer peripheral side and the corner is on the central side as shown in FIGS. 4A and 4B. To place. By adopting the joint structure 10 of this configuration, stress distribution by one side of the straight line is effectively performed on the side where the stress is large, and since the original stress is small at the corner, as shown in FIGS. 6A and 6B. Furthermore, the triangular pad realizes a stress distribution having a smaller maximum stress than the circular pad.

  When the LSI chip electrode pad 3 and the substrate electrode pad 4 of the bonding structure 10 of the present embodiment are higher in rigidity than the substrate, the LSI chip electrode pad 3 and the substrate electrode pad 4 are opposite to the arrangements shown in FIGS. 4A and 4B. One side of the triangle forming the electrode pad 3 is arranged substantially perpendicular to the straight line toward the center of the LSI chip and on the outer peripheral side of the LSI chip, while one side of the triangle forming the substrate electrode pad 4 is the center of the LSI chip It can also be arranged substantially perpendicular to the straight line going in the direction and on the LSI chip center side.

  When the LSI chip 1 is a quadrangle as shown in FIG. 3B, the joint structure 10 composed of the triangular LSI chip electrode pad 3, the substrate electrode pad 4, and the solder bump 7 is at least the farthest distance from the center of the LSI chip 1. It occupies at least one of the four of the four located on the outermost periphery on 26, and the other joint structure may be a general joint structure 20. The largest stress is generated along the diagonal line 26 from the corner of the LSI chip 1 toward the center, and the stress increases toward the outer periphery thereof. Therefore, the outer peripheral joint structure is the joint structure 10 of the present embodiment. More effective. However, not only the outer peripheral portion but also the entire bonding structure can be the bonding structure 10 of the present embodiment, and the bonding structure at an arbitrary position can be the bonding structure 10 of the present embodiment. Is.

  In the present embodiment, the triangle forming the electrode pad is a regular triangle. However, if the electrode pad is a polygon having at least one side that is a straight line, it has the effect of reducing the maximum stress in the stress distribution.

  Therefore, as in the bonding structure 13 shown in FIG. 8, a structure in which the triangular LSI chip electrode pad 30, the substrate electrode pad 40, and the bump 70 are formed by extending a regular triangle in the direction along the center direction of the LSI chip, As shown in the bonding structure 14 shown in FIG. 9, the triangular LSI chip electrode pad 31, the substrate electrode pad 41, and the bump 71 are combined by squashing a regular triangle in a direction along the center direction of the LSI chip. Can do.

  Further, as in the bonding structure 15 shown in FIG. 10, a quadrilateral LSI chip electrode pad 32, a substrate electrode pad 42, and a bump 72 are combined, or as in the bonding structure 16 shown in FIG. The LSI chip electrode pad 33, the substrate electrode pad 43, and the bump 73 can be combined.

  Further, the electrode pad may have any polygonal shape such as a hexagon or an octagon in addition to the above. In the above case, for the purpose of reducing the stress inside the joint structure, it is desirable to make the stress easy to disperse by making the length of one side arranged in a direction substantially perpendicular to the direction along the center direction of the LSI chip as long as possible. .

  The shape of the electrode pad need not be a polygon, but can be a polygon having at least one side that is a straight line. That is, as in the bonding structure 17 shown in FIG. 12, the LSI chip electrode pad 34, the substrate electrode pad 44, and the bump 74 having a polygonal shape in which one side is a straight line and the other side is a curve are combined. be able to.

  Further, the LSI chip electrode pad and the substrate electrode pad do not necessarily have the same shape and size and the same polygon. That is, like the bonding structure 18 shown in FIG. 13, the LSI chip electrode pad 35 and the substrate electrode pad 45 are different in shape, and the bump 75 can be combined.

  In this embodiment, the shape of the LSI chip is a quadrangle. However, the shape of the LSI chip is not limited to a quadrangle, and can be any polygon, circle, or ellipse. At this time, as for the arrangement of the electrodes of the junction structure of the present embodiment, one side of the straight line forming the electrode pad has a desired angle with respect to the straight line toward the center of the LSI chip, preferably in a substantially vertical direction. By arranging, the stress inside the joint structure can be relaxed.

  As described above, according to the embodiment of the present invention, it is a bonding structure that alleviates the stress concentration at the bonding portion between the bump and the electrode pad during a thermal cycle, and particularly in an LSI chip that generates the largest stress. It is possible to provide a joining structure obtained by a simple method that relieves stress along a straight line toward the center and does not require a special mounting apparatus, and a mounting structure using the same.

  Moreover, although a part or all of said embodiment can be described also as the following additional remarks, it is not restricted to the following.

Appendix (Appendix 1)
A joining structure for joining the first structure and the second structure,
The bonding structure includes a first electrode pad bonded to the first structure, a second electrode pad bonded to the second structure, the first electrode pad, and the second electrode pad. And bumps to be joined,
The first electrode pad and the second electrode pad are polygons having at least one straight side;
The one straight line side of the first electrode pad and the one straight line side of the second electrode pad are respectively predetermined with respect to a straight line toward the center of the first structure. Arranged with an angle,
When the one straight side of the first electrode pad is on the center side of the first structure with respect to the other side, the one straight side of the second electrode pad is the other side. On the outer peripheral side of the first structure relative to the side,
When the one straight line side of the first electrode pad is on the outer peripheral side of the first structure with respect to the other side, the one straight line side of the second electrode pad is another A junction structure on the center side of the first structure with respect to a side.
(Appendix 2)
A joining structure for joining the first structure and the second structure,
The bonding structure includes a first electrode pad bonded to the first structure, a second electrode pad bonded to the second structure, the first electrode pad, and the second electrode pad. And bumps to be joined,
The first electrode pad and the second electrode pad are polygons having at least one straight side;
The one straight line side of the first electrode pad and the one straight line side of the second electrode pad are respectively predetermined with respect to a straight line toward the center of the first structure. Arranged with an angle,
The bonding structure, wherein the one straight side of the first electrode pad and the one straight side of the second electrode pad are point-symmetric with respect to a center point of the bump.
(Appendix 3)
A joining structure for joining the first structure and the second structure,
The bonding structure includes a first electrode pad bonded to the first structure, a second electrode pad bonded to the second structure, the first electrode pad, and the second electrode pad. And bumps to be joined,
The first electrode pad and the second electrode pad are polygons having at least one straight side;
The one straight line side of the first electrode pad and the one straight line side of the second electrode pad are respectively predetermined with respect to a straight line toward the center of the first structure. Arranged with an angle,
The one straight side of the first electrode pad and the one straight side of the second electrode pad are the center of the space between the first electrode pad and the second electrode pad. A junction structure that is point-symmetric with respect to a point.
(Appendix 4)
The joining structure according to any one of appendices 1 to 3, wherein the predetermined angle is substantially vertical.
(Appendix 5)
The joining structure according to any one of appendices 1 to 4, wherein the first structure is a semiconductor chip.
(Appendix 6)
The joining structure according to any one of appendices 1 to 5, wherein the second structure is a substrate.
(Appendix 7)
The joining structure according to any one of appendices 1 to 6, wherein the first electrode pad and the second electrode pad include copper, gold, or solder.
(Appendix 8)
The joint structure according to any one of appendices 1 to 7, wherein the bump includes solder.
(Appendix 9)
The joining structure according to any one of appendices 1 to 8, wherein the polygon is a polygon.
(Appendix 10)
The joining structure according to any one of appendices 1 to 9, wherein the polygon is a triangle.
(Appendix 11)
The joining structure according to any one of appendices 1 to 9, wherein the polygon is an equilateral triangle.
(Appendix 12)
A first structure, a second structure, and a joined structure;
The bonded structure includes a first electrode pad bonded to the first structure, a second electrode pad bonded to the second structure, the first electrode pad, and the second electrode. A bump to be bonded to the pad,
The first electrode pad and the second electrode pad are polygons having at least one straight side;
The one straight line side of the first electrode pad and the one straight line side of the second electrode pad are respectively predetermined with respect to a straight line toward the center of the first structure. Arranged with an angle,
When the one straight side of the first electrode pad is on the center side of the first structure with respect to the other side, the one straight side of the second electrode pad is the other side. On the outer peripheral side of the first structure relative to the side,
When the one straight line side of the first electrode pad is on the outer peripheral side of the first structure with respect to the other side, the one straight line side of the second electrode pad is another A mounting structure, which is a joint structure on a center side of the first structure with respect to a side.
(Appendix 13)
A first structure, a second structure, and a joined structure;
The bonded structure includes a first electrode pad bonded to the first structure, a second electrode pad bonded to the second structure, the first electrode pad, and the second electrode. A bump to be bonded to the pad,
The first electrode pad and the second electrode pad are polygons having at least one straight side;
The one straight line side of the first electrode pad and the one straight line side of the second electrode pad are respectively predetermined with respect to a straight line toward the center of the first structure. Arranged with an angle,
The one straight line side of the first electrode pad and the one straight line side of the second electrode pad are point-symmetrical with respect to a central point of the bump; Mounting structure.
(Appendix 14)
A first structure, a second structure, and a joined structure;
The bonded structure includes a first electrode pad bonded to the first structure, a second electrode pad bonded to the second structure, the first electrode pad, and the second electrode. A bump to be bonded to the pad,
The first electrode pad and the second electrode pad are polygons having at least one straight side;
The one straight line side of the first electrode pad and the one straight line side of the second electrode pad are respectively predetermined with respect to a straight line toward the center of the first structure. Arranged with an angle,
The one straight side of the first electrode pad and the one straight side of the second electrode pad are the center of the space between the first electrode pad and the second electrode pad. A mounting structure that is a joint structure that is point-symmetric with respect to a point.
(Appendix 15)
15. The mounting structure according to any one of appendices 12 to 14, wherein the predetermined angle is substantially vertical.
(Appendix 16)
16. The mounting structure according to any one of appendices 12 to 15, wherein the first structure is a semiconductor chip.
(Appendix 17)
The mounting structure according to any one of appendices 12 to 16, wherein the second structure is a substrate.
(Appendix 18)
18. The mounting structure according to any one of appendices 12 to 17, wherein the first electrode pad and the second electrode pad include copper, gold, or solder.
(Appendix 19)
The mounting structure according to any one of appendices 12 to 18, wherein the bump includes solder.
(Appendix 20)
The mounting structure according to any one of appendices 12 to 19, wherein the polygon is a polygon.
(Appendix 21)
The mounting structure according to any one of appendices 12 to 20, wherein the polygon is a triangle.
(Appendix 22)
The mounting structure according to any one of appendices 12 to 20, wherein the polygon is an equilateral triangle.
(Appendix 23)
The mounting structure according to any one of appendices 12 to 22, wherein the number of the joint structures is one or more.
(Appendix 24)
24. The mounting structure according to any one of appendices 12 to 23, wherein the joint structure is disposed on an outer peripheral portion of the first structure.
(Appendix 25)
25. The mounting structure according to any one of appendices 12 to 24, wherein the first structure is a quadrangle, and the joint structure is disposed at least at one place on an outermost peripheral portion on a diagonal line of the quadrangle.

DESCRIPTION OF SYMBOLS 1 LSI chip 2 Substrate 3 LSI chip electrode pad 4 Substrate electrode pad 5 LSI chip electrode pad 6 Substrate electrode pad 7 Bump 8 LSI chip electrode pad 9 Substrate electrode pad 10 Joining structure 11 Joining structure 20 Joining structure 21 LSI chip center 22 Bump center 23 LSI chip electrode pad straight side 24 Substrate electrode pad straight side 25 LSI chip center direction 26 Diagonal line 27 Outer periphery of LSI chip 100 Mounting structure 200 Mounting structure

Claims (9)

A joining structure for joining the first structure and the second structure,
The bonding structure includes a first electrode pad bonded to the first structure, a second electrode pad bonded to the second structure, the first electrode pad, and the second electrode pad. And bumps to be joined,
The first electrode pad and the second electrode pad are polygons having at least one straight side;
The one straight line side of the first electrode pad and the one straight line side of the second electrode pad are respectively predetermined with respect to a straight line toward the center of the first structure. Arranged with an angle,
When the one straight side of the first electrode pad is on the center side of the first structure with respect to the other side, the one straight side of the second electrode pad is the other side. On the outer peripheral side of the first structure relative to the side,
When the one straight line side of the first electrode pad is on the outer peripheral side of the first structure with respect to the other side, the one straight line side of the second electrode pad is another A junction structure on the center side of the first structure with respect to a side. A joining structure for joining the first structure and the second structure,
The bonding structure includes a first electrode pad bonded to the first structure, a second electrode pad bonded to the second structure, the first electrode pad, and the second electrode pad. And bumps to be joined,
The first electrode pad and the second electrode pad are polygons having at least one straight side;
The one straight line side of the first electrode pad and the one straight line side of the second electrode pad are respectively predetermined with respect to a straight line toward the center of the first structure. Arranged with an angle,
The bonding structure, wherein the one straight side of the first electrode pad and the one straight side of the second electrode pad are point-symmetric with respect to a center point of the bump.   The joining structure according to claim 1, wherein the predetermined angle is substantially vertical. The joint structure according to claim 1, wherein the polygon is an equilateral triangle. A first structure, a second structure, and a joined structure;
The bonded structure includes a first electrode pad bonded to the first structure, a second electrode pad bonded to the second structure, the first electrode pad, and the second electrode. A bump to be bonded to the pad,
The first electrode pad and the second electrode pad are polygons having at least one straight side;
The one straight line side of the first electrode pad and the one straight line side of the second electrode pad are respectively predetermined with respect to a straight line toward the center of the first structure. Arranged with an angle,
When the one straight side of the first electrode pad is on the center side of the first structure with respect to the other side, the one straight side of the second electrode pad is the other side. On the outer peripheral side of the first structure relative to the side,
When the one straight line side of the first electrode pad is on the outer peripheral side of the first structure with respect to the other side, the one straight line side of the second electrode pad is another A mounting structure, which is a joint structure on a center side of the first structure with respect to a side. The mounting structure according to claim 5, wherein the predetermined angle is substantially vertical. The mounting structure according to claim 5, wherein the number of the bonding structures is one or more. The mounting structure according to claim 5, wherein the joint structure is disposed on an outer peripheral portion of the first structure. The mounting structure according to any one of claims 5 to 8, wherein the first structure is a quadrangle, and the joining structure is arranged at least at one place on an outermost peripheral part on a diagonal line of the quadrangle.

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