JP5553496B2 - 開口部側壁に形成した高分子の処理により高アスペクト比の開口部におけるエッチプロファイルの屈曲と湾曲を防止する方法 - Google Patents
開口部側壁に形成した高分子の処理により高アスペクト比の開口部におけるエッチプロファイルの屈曲と湾曲を防止する方法 Download PDFInfo
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- 150000002500 ions Chemical class 0.000 claims description 26
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- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 11
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- 238000005530 etching Methods 0.000 claims description 8
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- 238000000151 deposition Methods 0.000 claims description 4
- -1 argon ions Chemical class 0.000 claims description 3
- 238000000992 sputter etching Methods 0.000 claims description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 claims 1
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- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- 239000006227 byproduct Substances 0.000 description 2
- 238000010494 dissociation reaction Methods 0.000 description 2
- 230000005593 dissociations Effects 0.000 description 2
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- 229920005597 polymer membrane Polymers 0.000 description 2
- 239000002243 precursor Substances 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
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- 239000011248 coating agent Substances 0.000 description 1
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- 239000012212 insulator Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
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- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 239000002861 polymer material Substances 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32091—Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32137—Radio frequency generated discharge controlling of the discharge by modulation of energy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/3244—Gas supply means
- H01J37/32449—Gas control, e.g. control of the gas flow
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- Engineering & Computer Science (AREA)
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- Chemical & Material Sciences (AREA)
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- Microelectronics & Electronic Packaging (AREA)
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Description
Claims (15)
- 基板上の誘電体層に高アスペクト比のコンタクト開口部を形成するためのプラズマイオンエッチングの実行方法であり、
誘電体層を覆うフォトレジスト層にコンタクト開口部の位置と直径を規定する開口部を形成し、
基板をプラズマリアクタチャンバ内に載置し、
チャンバ内にフッ化炭素又はフッ化炭化水素ガス、及びアルゴンガスを導入し、
所望のプラズマエッチ処理に対応する公称RFバイアス電力レベルのRFバイアス電力を前記基板に継続的に結合しながら、RF電力を前記チャンバへ結合することによって、前記誘電体層にコンタクト開口部を、高分子膜を前記コンタクト開口部の側壁に堆積しながら前記開口部と整合させてエッチングし、
前記公称RFバイアス電力レベルの1.5倍を超え、バースト間の時間よりも短い持続時間の周期的なバーストによって、高RFバイアス電力レベルのRFバイアス電力を前記基板に結合することを含む、前記高分子膜をアルゴンイオンとイオン衝突させることによって、前記側壁上の前記高分子膜の導電性を上昇させることを含む方法。 - 前記公称RFバイアス電力レベルが所望のエッチプロファイルに対応し、前記高RFバイアス電力レベルが前記高分子膜の分子構造をより導電性の高い構造へと変化させるに十分である請求項1記載の方法。
- 前記公称RFバイアス電力レベルが500ワットから4キロワットであり、前記高RFバイアス電力レベルが5キロワットから10キロワットである請求項2記載の方法。
- 前記高RFバイアス電力レベルの前記バーストの持続時間がミリ秒から1秒であり、バースト間の時間が1秒以上である請求項3記載の方法。
- 前記高RFバイアス電力レベルが前記高分子膜で少なくとも5ジーメンス/mの導電性を生じさせるに十分なものである請求項1記載の方法。
- 前記高RFバイアス電力レベルが前記高分子膜で10−11秒以下の1/e放電時間を達成するに十分なものである請求項1記載の方法。
- 基板上の誘電体層に高アスペクト比のコンタクト開口部を形成するためのプラズマイオンエッチングの実行方法であり、
公称電力レベルのエッチRFバイアス電力を基板に継続的に印加しながら、第1ガス流量でフッ化炭素又はフッ化炭化水素ガスを、前記基板を納めたチャンバ内に導入し、RF電力を前記チャンバに結合することによって、基板上の誘電体層にコンタクト開口部を、高分子膜を前記コンタクト開口部の側壁に堆積しながらエッチングし、
前記側壁上の前記高分子膜の導電性を前記高分子膜のイオン衝突により上昇させることを含み、前記高分子膜の前記イオン衝突がアルゴンガスを第2ガス流量でチャンバに導入し、公称電力レベルのエッチRFバイアス電力よりも高い少なくとも1キロワットのバースト間の時間よりも短い持続時間の周期的なバーストによって、イオン衝突RFバイアス電力を基板に印加することを含む方法。 - 前記イオン衝突RFバイアス電力が前記公称電力レベルの少なくとも1.5倍の電力レベルである請求項7記載の方法。
- チャンバに半導体元素を含有する処理ガスを第3ガス流量で導入することを更に含む請求項7記載の方法。
- 半導体元素を含有する前記処理ガスが半導体元素のフッ化物を含む請求項9記載の方法。
- 前記第3ガス流量が前記第1ガス流量の0.5〜1.5倍である請求項9記載の方法。
- 前記第2ガス流量が前記第1ガス流量の2〜7倍の範囲である請求項7記載の方法。
- 前記バーストの持続時間がバースト間の時間未満である請求項8記載の方法。
- 前記エッチRFバイアス電力の継続的な印加が前記エッチRFバイアス電力を第1RF発生装置から供給することを含み、
前記イオン衝突RFバイアス電力の印加が前記イオン衝突RFバイアス電力をゲートスイッチを介して第2RF発生装置から供給することを含む請求項7記載の方法。 - 前記フッ化炭素/フッ化炭化水素ガスがC2F4、C4F6、CH2F2又はC4F8の少なくとも1つを含む請求項7記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/861,032 US7846846B2 (en) | 2007-09-25 | 2007-09-25 | Method of preventing etch profile bending and bowing in high aspect ratio openings by treating a polymer formed on the opening sidewalls |
US11/861,032 | 2007-09-25 |
Publications (3)
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JP2009124109A JP2009124109A (ja) | 2009-06-04 |
JP2009124109A5 JP2009124109A5 (ja) | 2012-12-20 |
JP5553496B2 true JP5553496B2 (ja) | 2014-07-16 |
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JP2008240357A Expired - Fee Related JP5553496B2 (ja) | 2007-09-25 | 2008-09-19 | 開口部側壁に形成した高分子の処理により高アスペクト比の開口部におけるエッチプロファイルの屈曲と湾曲を防止する方法 |
Country Status (6)
Country | Link |
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US (1) | US7846846B2 (ja) |
EP (1) | EP2043139A2 (ja) |
JP (1) | JP5553496B2 (ja) |
KR (1) | KR101019930B1 (ja) |
CN (1) | CN101447425B (ja) |
TW (1) | TWI367527B (ja) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
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US20100330805A1 (en) * | 2007-11-02 | 2010-12-30 | Kenny Linh Doan | Methods for forming high aspect ratio features on a substrate |
KR101575190B1 (ko) * | 2010-02-12 | 2015-12-08 | 삼성전자주식회사 | 윗면과 바닥면의 시디차가 없는 깊은 트렌치를 갖는 반도체 및 제조방법 |
CN101866848B (zh) * | 2010-04-29 | 2012-05-30 | 中微半导体设备(上海)有限公司 | 一种刻蚀有机物层的等离子刻蚀方法 |
US9165785B2 (en) | 2013-03-29 | 2015-10-20 | Tokyo Electron Limited | Reducing bowing bias in etching an oxide layer |
US9275869B2 (en) * | 2013-08-02 | 2016-03-01 | Lam Research Corporation | Fast-gas switching for etching |
KR102203460B1 (ko) | 2014-07-11 | 2021-01-18 | 삼성전자주식회사 | 나노구조 반도체 발광소자의 제조방법 |
KR20160119329A (ko) | 2015-04-02 | 2016-10-13 | 삼성전자주식회사 | 반도체 소자의 미세패턴 형성방법 |
KR102345979B1 (ko) | 2015-04-30 | 2021-12-31 | 삼성디스플레이 주식회사 | 표시 장치 및 그 제조 방법 |
CN111063655A (zh) * | 2018-10-17 | 2020-04-24 | 无锡华润上华科技有限公司 | 一种半导体器件的制造方法 |
CN111785604A (zh) * | 2019-04-04 | 2020-10-16 | 中微半导体设备(上海)股份有限公司 | 气体喷淋头、制作方法及包括气体喷淋头的等离子体装置 |
US20220362803A1 (en) * | 2019-10-18 | 2022-11-17 | Lam Research Corporation | SELECTIVE ATTACHMENT TO ENHANCE SiO2:SiNx ETCH SELECTIVITY |
US11437230B2 (en) | 2020-04-06 | 2022-09-06 | Applied Materials, Inc. | Amorphous carbon multilayer coating with directional protection |
US20220223431A1 (en) * | 2020-12-28 | 2022-07-14 | American Air Liquide, Inc. | High conductive passivation layers and method of forming the same during high aspect ratio plasma etching |
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GB9616225D0 (en) * | 1996-08-01 | 1996-09-11 | Surface Tech Sys Ltd | Method of surface treatment of semiconductor substrates |
US6187685B1 (en) * | 1997-08-01 | 2001-02-13 | Surface Technology Systems Limited | Method and apparatus for etching a substrate |
US6228775B1 (en) | 1998-02-24 | 2001-05-08 | Micron Technology, Inc. | Plasma etching method using low ionization potential gas |
JP4153606B2 (ja) * | 1998-10-22 | 2008-09-24 | 東京エレクトロン株式会社 | プラズマエッチング方法およびプラズマエッチング装置 |
EP1131847B1 (en) * | 1998-11-04 | 2010-02-17 | Surface Technology Systems Plc | A method for etching a substrate |
JP2002110647A (ja) | 2000-09-29 | 2002-04-12 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
JP5174319B2 (ja) * | 2005-11-11 | 2013-04-03 | 株式会社日立ハイテクノロジーズ | エッチング処理装置およびエッチング処理方法 |
US7713430B2 (en) * | 2006-02-23 | 2010-05-11 | Micron Technology, Inc. | Using positive DC offset of bias RF to neutralize charge build-up of etch features |
KR100763514B1 (ko) | 2006-06-30 | 2007-10-04 | 삼성전자주식회사 | 반도체 장치의 개구 형성 방법 및 이를 이용한 반도체 장치제조 방법 |
US7682986B2 (en) * | 2007-02-05 | 2010-03-23 | Lam Research Corporation | Ultra-high aspect ratio dielectric etch |
US20080203056A1 (en) * | 2007-02-26 | 2008-08-28 | Judy Wang | Methods for etching high aspect ratio features |
-
2007
- 2007-09-25 US US11/861,032 patent/US7846846B2/en not_active Expired - Fee Related
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2008
- 2008-09-05 TW TW097134225A patent/TWI367527B/zh not_active IP Right Cessation
- 2008-09-18 KR KR1020080091587A patent/KR101019930B1/ko not_active IP Right Cessation
- 2008-09-19 JP JP2008240357A patent/JP5553496B2/ja not_active Expired - Fee Related
- 2008-09-24 CN CN2008101612758A patent/CN101447425B/zh not_active Expired - Fee Related
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KR20090031822A (ko) | 2009-03-30 |
JP2009124109A (ja) | 2009-06-04 |
TW200924050A (en) | 2009-06-01 |
EP2043139A2 (en) | 2009-04-01 |
CN101447425A (zh) | 2009-06-03 |
KR101019930B1 (ko) | 2011-03-08 |
US20090081876A1 (en) | 2009-03-26 |
US7846846B2 (en) | 2010-12-07 |
CN101447425B (zh) | 2011-06-01 |
TWI367527B (en) | 2012-07-01 |
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