JP5544824B2 - Manufacturing method of chip resistor - Google Patents

Manufacturing method of chip resistor Download PDF

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JP5544824B2
JP5544824B2 JP2009248650A JP2009248650A JP5544824B2 JP 5544824 B2 JP5544824 B2 JP 5544824B2 JP 2009248650 A JP2009248650 A JP 2009248650A JP 2009248650 A JP2009248650 A JP 2009248650A JP 5544824 B2 JP5544824 B2 JP 5544824B2
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metal plate
resistor
chip resistor
punching
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ひかり 奥原
厚 田中
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Koa Corp
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Description

本発明は、電流検出用途に適する低抵抗値のチップ抵抗器の製造方法に係り、特に抵抗合金材料からなる金属板抵抗体の両端に導電率の高い金属導体よりなる電極を固定した金属板抵抗器の製造方法に関する。   The present invention relates to a method of manufacturing a low-resistance chip resistor suitable for current detection applications, and in particular, a metal plate resistor in which electrodes made of a metal conductor having high conductivity are fixed at both ends of a metal plate resistor made of a resistance alloy material. The present invention relates to a method for manufacturing a container.

Cu−Ni系合金やNi−Cr系合金等の抵抗合金材料からなる金属板抵抗体の両端に、Cu等の導電率の高い金属導体よりなる半田接続用の電極を固定した、ミリオーム程度の低抵抗値を有するチップ抵抗器が知られている。   A solder connection electrode made of a metal conductor having a high conductivity such as Cu is fixed to both ends of a metal plate resistor made of a resistance alloy material such as a Cu-Ni alloy or a Ni-Cr alloy. A chip resistor having a resistance value is known.

従来、この種のチップ抵抗器では、金属板抵抗体の両電極間の部分に、レーザ加工等によって切り込み溝を設け、電流の流れ経路に迂回路を形成することにより、抵抗器の抵抗値を所定値に調整することが行われている(特許文献1,2参照)。   Conventionally, in this type of chip resistor, a notch groove is provided by laser processing or the like in a portion between both electrodes of the metal plate resistor, and a detour is formed in the current flow path, thereby reducing the resistance value of the resistor. Adjustment to a predetermined value is performed (see Patent Documents 1 and 2).

特開2002−57009号公報JP 2002-57009 A 特開2006−228980号公報JP 2006-228980 A

このような金属板抵抗体にレーザーによって加工を施すには、相当な出力が必要であり、加工時間も要するため、製造コストの面で不利となる。また、従来は抵抗値を測定しながら切り込みを形成するが、個々のチップ抵抗器の状態では、取扱いが困難という問題もある。そして、金属板は板厚が安定しているため、個片化してチップ抵抗器にする際の打抜き形状が安定していれば、抵抗値もある程度の範囲に収まる。しかし、高精度の要求に対しては、抵抗値の微調整が必要となる場合がある。また、製品の仕様に合わせて抵抗値を調整できるようにすれば、1つの製造ラインで複数種類の抵抗値仕様の製品を製造することも可能になり、効率化を図ることができる。   In order to process such a metal plate resistor with a laser, considerable output is required and processing time is required, which is disadvantageous in terms of manufacturing cost. Conventionally, the notch is formed while measuring the resistance value, but there is a problem that handling is difficult in the state of each chip resistor. Since the thickness of the metal plate is stable, if the punching shape when the metal plate is divided into chip resistors is stable, the resistance value is within a certain range. However, there are cases where fine adjustment of the resistance value is required for high accuracy requirements. Further, if the resistance value can be adjusted in accordance with the product specification, it is possible to manufacture a plurality of types of resistance value specification products on a single production line, thereby improving efficiency.

本発明は、上述の事情に基づいてなされたもので、簡素な製造工程で低コストで製造でき、且つ多様な抵抗値仕様に対応が可能な金属板抵抗体を用いたチップ抵抗器の製造方法を提供することを目的とする。   The present invention has been made based on the above-described circumstances, and can be manufactured at a low cost with a simple manufacturing process, and a chip resistor manufacturing method using a metal plate resistor capable of responding to various resistance value specifications. The purpose is to provide.

本発明のチップ抵抗器の製造方法は、所定の抵抗材料からなる金属板を準備する工程と、金属板にパンチング加工により貫通孔を形成する工程と、貫通孔を含む所定領域を覆う保護膜を形成する工程と、保護膜に覆われた貫通孔の一部を含み、保護膜の両側部に出た金属板を含む領域を、その周囲をパンチング加工により打抜いて画定することによって一のチップ抵抗器とする分離工程と、からなることを特徴とする。 The chip resistor manufacturing method of the present invention includes a step of preparing a metal plate made of a predetermined resistance material, a step of forming a through hole in the metal plate by punching, and a protective film covering a predetermined region including the through hole. forming, comprise a portion of the through hole covered with the protective film, a region including the metal plate leaving on both sides of the protective film, one chip by defining it have punching the periphery by punching And a separation step of making a resistor .

本発明によれば、金属板にパンチング加工により貫通孔を形成し、保護膜と電極被膜を形成後パンチング加工により打抜き個片化するので、シート状の金属板から多数のチップ抵抗器を簡易に量産できる。これにより、簡素な製造工程で、低コストで金属板抵抗体を用いたチップ抵抗器を量産でき、且つ多様な抵抗値仕様に対応が可能である。 According to the present invention, a through hole is formed in a metal plate by punching, and after forming a protective film and an electrode film, punching is performed to form individual pieces. Can be mass-produced. As a result, a chip resistor using a metal plate resistor can be mass-produced with a simple manufacturing process at low cost, and various resistance value specifications can be supported.

(a)(b)(c)は本発明の実施例1の貫通孔の形成段階を示す平面図である。(A) (b) (c) is a top view which shows the formation step of the through-hole of Example 1 of this invention. (a)(b)は保護膜の形成段階を示す平面図とそのxx線に沿った断面図であり、(c)電極被膜の形成段階を示す断面図であり、(d)は個片化の段階を示す平面図であり、(e)(f)は個片化したチップ抵抗器の平面図と断面図である。(A) and (b) are a plan view showing a formation stage of a protective film and a cross-sectional view along the line xx, (c) a cross-sectional view showing a formation stage of an electrode film, and (d) is an individualization. FIG. 5E is a plan view and a cross-sectional view of a chip resistor separated into individual pieces. 上記チップ抵抗器の斜視図である。It is a perspective view of the said chip resistor. 貫通孔Aの形成方法を示す平面図と断面図である。2A and 2B are a plan view and a cross-sectional view illustrating a method for forming a through hole A. 貫通孔Bの形成方法を示す平面図と断面図である。2A and 2B are a plan view and a cross-sectional view illustrating a method for forming a through hole B. 貫通孔の各種形状例を示す平面図である。It is a top view which shows the example of various shapes of a through-hole. チップ抵抗器の構造例を示す平面図である。It is a top view which shows the structural example of a chip resistor. チップ抵抗器の他の構造例を示す平面図である。It is a top view which shows the other structural example of a chip resistor. (a)は本発明の実施例2の保護膜の形成段階を示す平面図であり、(b)は一部打抜きトリミング段階を示す平面図であり、(c)は個片化段階を示す平面図であり、(d)は個片化したチップ抵抗器の平面図である。(A) is a top view which shows the formation stage of the protective film of Example 2 of this invention, (b) is a top view which shows a part punching trimming stage, (c) is a plane which shows an individualization stage It is a figure and (d) is a top view of the chip resistor separated into pieces.

以下、本発明の実施形態について、図1乃至図9を参照して説明する。なお、各図中、同一または相当する部材または要素には、同一の符号を付して説明する。   Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 9. In addition, in each figure, the same code | symbol is attached | subjected and demonstrated to the same or equivalent member or element.

図1および図2は、本発明の実施例1の金属板抵抗体を用いたチップ抵抗器の製造工程を示す。まず、図1(a)に示すように、Cu−Ni系、Ni−Cr系などの抵抗合金材料板材であるシート状の金属板11を準備する。金属板11は圧延加工された長尺の金属材料を所定の大きさにカットしたものである。そして、金属板11の所定の個所にプローブをあてて、金属板11の抵抗値を測定する。圧延された金属材料はその厚みが安定しているものの、本発明の抵抗器においては非常に高精度の特性が必要となるため、金属板11そのものが有する抵抗値の微妙なバラツキ(主には厚みのバラツキによる)は、得られる抵抗器の精度に影響する。   1 and 2 show a manufacturing process of a chip resistor using a metal plate resistor of Example 1 of the present invention. First, as shown in FIG. 1A, a sheet-like metal plate 11 that is a resistance alloy material plate material such as a Cu—Ni-based material or a Ni—Cr-based material is prepared. The metal plate 11 is obtained by cutting a long metal material that has been rolled into a predetermined size. Then, a probe is applied to a predetermined portion of the metal plate 11 and the resistance value of the metal plate 11 is measured. Although the thickness of the rolled metal material is stable, the resistor of the present invention requires very high-accuracy characteristics. Therefore, the resistance of the metal plate 11 itself varies slightly (mainly The thickness variation) affects the accuracy of the resulting resistor.

このため予め金属板11の抵抗値を測定し、得られた抵抗値から、第1貫通孔Aと第2貫通孔Bとの相対的な位置関係を定める。すなわち、第1貫通孔Aと第2貫通孔Bの形成位置を微調整することによって、一の金属板11と他の金属板11との抵抗値バラツキを調整する。次いで、図中破線で示す個片となる抵抗器領域12の一方の側縁に跨る第1貫通孔Aをプレスによるパンチング加工により形成する。抵抗器領域12は図示するように金属板11にマトリクス状に配置されるが、最初に最上段の1列12Aについて、各抵抗器領域12に第1貫通孔Aをそれぞれ形成する。   Therefore, the resistance value of the metal plate 11 is measured in advance, and the relative positional relationship between the first through hole A and the second through hole B is determined from the obtained resistance value. That is, the resistance value variation between one metal plate 11 and another metal plate 11 is adjusted by finely adjusting the formation positions of the first through hole A and the second through hole B. Subsequently, the 1st through-hole A which straddles one side edge of the resistor area | region 12 used as the piece shown with a broken line in a figure is formed by the punching process by a press. The resistor regions 12 are arranged in a matrix on the metal plate 11 as shown in the figure. First, first through holes A are formed in each resistor region 12 for the uppermost row 12A.

そして、図1(b)に示すように、抵抗器領域12の他方の側縁に跨る第2貫通孔Bを、第1列12Aについて順次各抵抗器領域12にパンチング加工により形成する。これにより、第1列12Aの各抵抗器領域12に、第1貫通孔Aと第2貫通孔Bとを形成する。   And as shown in FIG.1 (b), the 2nd through-hole B ranging over the other side edge of the resistor area | region 12 is sequentially formed in each resistor area | region 12 by punching process about the 1st row | line 12A. Thereby, the first through hole A and the second through hole B are formed in each resistor region 12 of the first row 12A.

次に、図1(c)に示すように、第2列12Bの各抵抗器領域12に、まずパンチング加工により第1貫通孔Aを形成し、その終了後パンチング加工により第2貫通孔Bを形成する工程を繰り返す。これにより、第2列12Bの各抵抗器領域12に、第1貫通孔Aと第2貫通孔Bとを順次形成する。そして、図示はしないが第3列以下の抵抗器領域12について同様の工程を繰り返し、金属板の全面の抵抗器領域に第1貫通孔と第2貫通孔とを配置する。   Next, as shown in FIG. 1C, first through holes A are first formed by punching in each resistor region 12 of the second row 12B, and after that, the second through holes B are formed by punching. Repeat the forming process. Thereby, the first through hole A and the second through hole B are sequentially formed in each resistor region 12 of the second row 12B. And although not shown in figure, the same process is repeated about the resistor area | region 12 below a 3rd row, and a 1st through-hole and a 2nd through-hole are arrange | positioned in the resistor area | region of the whole surface of a metal plate.

次に、図2(a)(b)に示すように、第1貫通孔Aおよび第2貫通孔Bを含む領域を覆う保護膜13を金属板11の上面に形成する。保護膜13は図示するように抵抗器領域12の中央部分を被覆するように帯状のパターンで形成し、その両側が金属板11の露出面となる。保護膜13は帯状のパターンの他、後述(図9)に示す抵抗器領域毎の格子状のパターンにしてもよい。金属板11の下面には、その略全面を被覆する保護膜14を形成する。保護膜13,14の材料としてはエポキシ樹脂等が好適である。形成順は、保護膜14を形成してから、保護膜13を形成してもよい。   Next, as shown in FIGS. 2A and 2B, a protective film 13 covering the region including the first through hole A and the second through hole B is formed on the upper surface of the metal plate 11. As shown in the figure, the protective film 13 is formed in a strip-like pattern so as to cover the central portion of the resistor region 12, and both sides thereof become exposed surfaces of the metal plate 11. The protective film 13 may be a lattice pattern for each resistor region shown in FIG. A protective film 14 is formed on the lower surface of the metal plate 11 to cover substantially the entire surface. As a material for the protective films 13 and 14, an epoxy resin or the like is suitable. The protective film 13 may be formed after the protective film 14 is formed.

そして、図2(c)に示すように、保護膜13に覆われていない金属板11の露出部分に電極となる金属材料からなる電極被膜15を形成する。電極被膜15は、保護膜13が形成されていない、抵抗合金材料からなる金属板11の露出面にメッキにより形成することが好ましい。一例として、電解メッキにより、Cu、Ni、Snの順番で金属層を重ねて形成する。電極被膜の形成方法としては、上記のほかに、スパッタリング、蒸着などの方法もある。この場合、保護膜13など、金属被膜を形成しない個所は、レジストやメタルマスクで覆う。その他に、電極ペーストをスクリーン印刷することで電極被膜15を形成してもよい。製造工程や接続信頼性等を考慮すると、電解メッキ法により形成することが好ましい。   Then, as shown in FIG. 2C, an electrode film 15 made of a metal material that becomes an electrode is formed on the exposed portion of the metal plate 11 that is not covered with the protective film 13. The electrode film 15 is preferably formed by plating on the exposed surface of the metal plate 11 made of a resistance alloy material, on which the protective film 13 is not formed. As an example, the metal layers are formed in an order of Cu, Ni, and Sn by electrolytic plating. In addition to the above, the electrode film can be formed by sputtering, vapor deposition, or the like. In this case, the portions such as the protective film 13 where the metal film is not formed are covered with a resist or a metal mask. In addition, the electrode film 15 may be formed by screen printing of an electrode paste. In consideration of the manufacturing process, connection reliability, and the like, it is preferable to form by an electrolytic plating method.

次に、図2(d)(e)に示すように、個片打抜き用のパンチで、個片化する。すなわち、金属板11上の一対の電極被膜15,15と、電極被膜の間に保護膜13が形成された領域であって、第1貫通孔Aの一部と、第2貫通孔Bの一部とを含む抵抗器領域12を破線に沿ってパンチング加工により打抜くことで、図2(e)(f)に示すチップ抵抗器20が得られる。図示の例は一区画のみを示しているが、各抵抗器領域12の破線に沿ってパンチング加工により打抜くことで、1枚の金属板シートから多数のチップ抵抗器20が得られる。   Next, as shown in FIGS. 2D and 2E, it is separated into individual pieces by punches for individual piece punching. That is, it is a region where the protective film 13 is formed between the pair of electrode films 15 and 15 on the metal plate 11 and the electrode film, and a part of the first through hole A and one of the second through holes B. The chip resistor 20 shown in FIGS. 2E and 2F is obtained by punching the resistor region 12 including the portion by punching along the broken line. Although the illustrated example shows only one section, a large number of chip resistors 20 can be obtained from one metal plate sheet by punching by punching along the broken lines of each resistor region 12.

図3はこのチップ抵抗器20の斜視図である。Cu−Ni系、Ni−Cr系などの抵抗合金材料からなる抵抗体21の下面両端にメッキ層等からなる電極被膜25,25を備え、その間が保護膜23により被覆されている。金属板抵抗体21には電極配置方向と直交する方向に伸びる長孔形状である第1貫通孔Aおよび第2貫通孔Bを備え、これにより電流の迂回路が形成され、所要の抵抗値に調整される。そして、金属板抵抗体11の上面は保護膜14により被覆され、ミリオーム程度の高精度の低抵抗値が得られる面実装に好適なチップ抵抗器となっている。   FIG. 3 is a perspective view of the chip resistor 20. Electrode coatings 25, 25 made of a plating layer or the like are provided on both ends of the lower surface of the resistor 21 made of a resistance alloy material such as a Cu—Ni-based or Ni—Cr-based material. The metal plate resistor 21 is provided with a first through hole A and a second through hole B which are elongated holes extending in a direction orthogonal to the electrode arrangement direction, thereby forming a current detour and obtaining a required resistance value. Adjusted. The upper surface of the metal plate resistor 11 is covered with a protective film 14, which is a chip resistor suitable for surface mounting that can obtain a highly accurate low resistance value of about milliohms.

図4および図5はパンチング加工による貫通孔A,Bの形成の具体例を示す。台座31は金属板11の外周/周縁に固定される枠状の治具で、縦横に移動してパンチ位置を規定する。金属板11には位置決め穴17を備え、これがピン31aにより台座11に固定され、台座31が移動することで、金属板11の貫通孔形成個所の位置合わせを行う。パンチ32とダイ33の位置は固定で、台座31が移動し、位置合わせ後にパンチ32が下降することで、金属板11に貫通孔を形成する。   4 and 5 show specific examples of forming the through holes A and B by punching. The pedestal 31 is a frame-shaped jig fixed to the outer periphery / periphery of the metal plate 11 and moves vertically and horizontally to define the punch position. The metal plate 11 is provided with a positioning hole 17, which is fixed to the pedestal 11 by a pin 31a, and the pedestal 31 moves to align the through hole forming portion of the metal plate 11. The positions of the punch 32 and the die 33 are fixed, the pedestal 31 moves, and the punch 32 descends after alignment, thereby forming a through hole in the metal plate 11.

図4は貫通孔Aの形成例を示し、左端の抵抗器領域12に貫通孔Aを形成後、台座31が移動し、次の抵抗器領域12に貫通孔Aをパンチ32およびダイ33により形成し、さらに次の抵抗器領域12の貫通孔Aの形成位置に移動することを示している。1列について貫通孔Aの形成が終了すると、図5に示すように、上記と同様に貫通孔Bを形成する。一列について貫通孔A,Bの形成が終了すると、次の列に移動し、同様に貫通孔A,Bを形成し、これを繰り返し、金属板11の全面の抵抗器領域12に貫通孔A,Bを形成する。上記の例は貫通孔をひとつずつ形成する例だが、一度に複数箇所、貫通孔を形成するパンチを使用してもよい。   FIG. 4 shows an example of forming the through hole A. After the through hole A is formed in the leftmost resistor region 12, the pedestal 31 moves, and the through hole A is formed in the next resistor region 12 by the punch 32 and the die 33. In addition, it is shown that the position moves to the formation position of the through hole A in the next resistor region 12. When the formation of the through holes A is completed for one row, the through holes B are formed in the same manner as described above, as shown in FIG. When the formation of the through-holes A and B is completed for one row, the process moves to the next row, and the through-holes A and B are similarly formed. B is formed. Although the above example is an example in which through holes are formed one by one, punches that form through holes at a plurality of locations at a time may be used.

図6は、貫通孔の各種形状例を示す。貫通孔の形状は色々考えられるが、図6(a)(b)に示すように、電流経路がスムーズとなるように丸みを帯びた形状とすることが好ましい。また、図6(a)(c)に示すように、抵抗値の調整範囲が比較的広く取れるように長孔形状とすることが好ましい。従って、両者を満たす形状として特に好ましいのは図6(a)に示す長孔形状である。   FIG. 6 shows various shape examples of the through holes. Although various shapes of the through holes are conceivable, as shown in FIGS. 6A and 6B, it is preferable to have a rounded shape so that the current path is smooth. Also, as shown in FIGS. 6A and 6C, it is preferable to have a long hole shape so that the adjustment range of the resistance value can be made relatively wide. Accordingly, the shape of the long hole shown in FIG.

また、抵抗体21の打抜き形状も、角は丸みを帯びていることが好ましい。角張った形状だと、バリが発生したり、個々のチップ抵抗器の搬送や梱包の際に搬送装置や梱包材を痛めたりする等のおそれがある。抵抗体21の打抜きに際しては、一の金型を用いている。このため打抜き形状は安定し、製品寸法のバラツキが生じることは殆どない。一方、金属板11そのものの抵抗値バラツキは、貫通孔A,Bの形成位置を調整することによって抑えているため、抵抗体21の打抜きに際して一の金型を用いても、抵抗器20の抵抗値は高精度に保つことができる。   The punched shape of the resistor 21 is also preferably rounded at the corners. If the shape is square, burrs may occur or the transport device or packing material may be damaged when transporting or packing individual chip resistors. When the resistor 21 is punched, a single mold is used. For this reason, the punching shape is stable and there is almost no variation in product dimensions. On the other hand, the resistance value variation of the metal plate 11 itself is suppressed by adjusting the positions where the through holes A and B are formed. The value can be kept highly accurate.

図7は、抵抗器20の具体的な構造・寸法例を示し、抵抗器の両側面からそれぞれ1本ずつ貫通孔A,Bを形成した例である。抵抗器を個片化した時に、貫通孔A,Bが中心軸A,Bの交点(抵抗器の中心)Oで点対称となることが好ましい。点対称になっていないと、実装した際の方向によって、インダクタンスが変わる等の部品に方向性が出てしまう問題が生じるからである。   FIG. 7 shows an example of a specific structure / dimension of the resistor 20, and is an example in which one through hole A, B is formed from each side surface of the resistor. When the resistors are singulated, it is preferable that the through holes A and B are point-symmetrical at the intersection point O (center of the resistor) O of the central axes A and B. If it is not point-symmetric, there will be a problem that the directivity of components such as inductance changes depending on the mounting direction.

抵抗体21はNi−Cr系抵抗合金材料であり、厚みが0.1mmであり、比抵抗=130μΩ・cmである。電極25はCuメッキ層である。寸法例としては、b=0.2、e=0.35、f=1.30、g=1.25(単位:mm)である。
貫通孔切り込み深さa(mm)、抵抗体幅gに対する切り込み深さaの比率a/g(%)に対応した抵抗値(mΩ)の例は下記のとおりである。
The resistor 21 is a Ni—Cr resistance alloy material, has a thickness of 0.1 mm, and a specific resistance = 130 μΩ · cm. The electrode 25 is a Cu plating layer. Examples of dimensions are b = 0.2, e = 0.35, f = 1.30, and g = 1.25 (unit: mm).
Examples of the resistance value (mΩ) corresponding to the through hole cutting depth a (mm) and the ratio of the cutting depth a to the resistor width g a / g (%) are as follows.

Figure 0005544824
Figure 0005544824

表のとおり、深さaを調整することで抵抗値の調整が可能となる。このため、予め固片化する前の金属板11の抵抗値を測定しておけば、個片化した際の抵抗値を算出できるので、当該算出結果から深さaを定めれば、得られる抵抗器の抵抗値をより高精度にすることができる。なお、a/g(抵抗体の幅に対してどのくらいまで切込みを入れるか)については、70%を上限とすることが好ましい。抵抗体の一部において幅が極端に狭くなると、抵抗体の強度、特性等において好ましくない。また、bは、プレス加工上、抵抗材料の厚みとの関係で決める。概ね、抵抗材料の厚みの1.5〜2倍程度以上とすることが好ましい。また、本例においては深さaを調整するようにしたが、貫通孔A,Bの間隔dを調整することも可能である。   As shown in the table, the resistance value can be adjusted by adjusting the depth a. For this reason, if the resistance value of the metal plate 11 before solidification is measured in advance, the resistance value when the metal plate 11 is separated can be calculated. Therefore, if the depth a is determined from the calculation result, it can be obtained. The resistance value of the resistor can be made more accurate. In addition, about a / g (how much cutting is made with respect to the width of the resistor), it is preferable to set the upper limit to 70%. If the width is extremely narrow in a part of the resistor, it is not preferable in terms of strength, characteristics, etc. of the resistor. Further, b is determined in relation to the thickness of the resistance material in terms of press working. In general, the thickness is preferably about 1.5 to 2 times the thickness of the resistance material. In this example, the depth a is adjusted, but the distance d between the through holes A and B can also be adjusted.

なお、貫通孔の配置は図8に示すようにしてもよい。ただし、上記同様、実装時のインダクタンス等を考慮して、方向性がないようにしておくことが好ましい。このため、貫通孔D,Eは同じyの長さにしておき、中心軸Bに対称に配置し、貫通孔Cを中心軸C上に配置することが好ましい。例えば、yは一定として、xのみ可変するようにして、抵抗値を調整するようにしてもよい。   The arrangement of the through holes may be as shown in FIG. However, in the same manner as described above, it is preferable that there is no directivity in consideration of inductance at the time of mounting. For this reason, it is preferable that the through holes D and E have the same y length, are arranged symmetrically with respect to the central axis B, and the through holes C are arranged on the central axis C. For example, the resistance value may be adjusted such that y is constant and only x is variable.

図9は、本発明の実施例2の金属板チップ抵抗器の製造工程を示す。貫通孔A,Bの形成工程は実施例1の図1(a)-(c)に示すものと同じである。図9(a)は実施例1の図2(a)に対応した図であるが、本実施例の保護膜13aのパターンは図示するように、個々の抵抗器領域12ごとに分かれた格子状(マトリクス状)のパターンにしている。このようなパターンにすると、保護膜の絶縁材料の使用量を低減できる。また、電解メッキにより電極膜を形成する場合の、膜厚のバラツキの低減や、金属板11の反りの抑制等に寄与する。   FIG. 9 shows a manufacturing process of the metal plate chip resistor according to the second embodiment of the present invention. The formation process of the through holes A and B is the same as that shown in FIGS. FIG. 9 (a) is a diagram corresponding to FIG. 2 (a) of the first embodiment, but the pattern of the protective film 13a of the present embodiment is a lattice shape divided for each resistor region 12 as shown in the figure. The pattern is (matrix). With such a pattern, the amount of insulating material used for the protective film can be reduced. In addition, when the electrode film is formed by electrolytic plating, this contributes to reduction in film thickness variation, suppression of warpage of the metal plate 11, and the like.

図9(b)は抵抗器領域12の一部打抜きおよび抵抗値調整工程を示す。本実施例では図中ハッチングで示す領域40をパンチング加工により打ち抜く。これにより電極の一方側(符号41で示す破線部分)のみが母体金属板11に接続された状態になり、電極の他方側が絶縁分離された状態となる。このようにすると、プローブ42,42を電極15,15に接触させることで、個々の抵抗器の抵抗値測定ができるので、抵抗体の側面を切削工具で削る等の方法で、更に抵抗値の微調整ができる。貫通孔A,Bによって既に抵抗値は概略調整されているので、ここでの微調整は簡易となる。   FIG. 9B shows a partial punching of the resistor region 12 and a resistance value adjusting process. In this embodiment, a region 40 indicated by hatching in the drawing is punched by punching. As a result, only one side of the electrode (broken line portion denoted by reference numeral 41) is connected to the base metal plate 11, and the other side of the electrode is insulated and separated. In this way, since the resistance values of the individual resistors can be measured by bringing the probes 42 and 42 into contact with the electrodes 15 and 15, the resistance value can be further reduced by a method such as cutting the side surface of the resistor with a cutting tool. Fine adjustment is possible. Since the resistance value has already been roughly adjusted by the through holes A and B, the fine adjustment here is simple.

そして、母体金属板11との接続部である抵抗器領域の辺41をパンチング加工により切断することで、個片化したチップ抵抗器20が得られる。このチップ抵抗器20は実施例1の製造方法で製造されたものと同一の図3に示す構造を有する。図示の例は一区画のみ示すが、順次パンチング加工により辺41を切断することで、1枚の金属板から多数のチップ抵抗器が得られることも実施例1と同様である。   And the chip | tip resistor 20 separated into pieces is obtained by cut | disconnecting the side 41 of the resistor area | region which is a connection part with the base metal plate 11 by punching. The chip resistor 20 has the same structure shown in FIG. 3 as that manufactured by the manufacturing method of the first embodiment. Although the illustrated example shows only one section, it is the same as in the first embodiment that a large number of chip resistors can be obtained from one metal plate by sequentially cutting the side 41 by punching.

これまで本発明の一実施形態について説明したが、本発明は上述の実施形態に限定されず、その技術的思想の範囲内において種々異なる形態にて実施されてよいことは言うまでもない。   Although one embodiment of the present invention has been described so far, it is needless to say that the present invention is not limited to the above-described embodiment, and may be implemented in various forms within the scope of the technical idea.

本発明は、抵抗合金材料からなる金属板抵抗体の両端に導電率の高い金属導体よりなる電極を固定したチップ抵抗器の製造に好適に利用可能である。   INDUSTRIAL APPLICABILITY The present invention can be suitably used for manufacturing a chip resistor in which electrodes made of a metal conductor having high conductivity are fixed to both ends of a metal plate resistor made of a resistance alloy material.

Claims (7)

所定の抵抗材料からなる金属板を準備する工程と、
金属板にパンチング加工により第1貫通孔を形成する工程と、
第1貫通孔を形成した後に、金属板にパンチング加工により第2貫通孔を形成する工程と、
第1貫通孔および第2貫通孔を含む領域を覆う保護膜を形成する工程と、
保護膜に覆われていない抵抗材料の露出部分に電極となる金属材料からなる電極被膜を形成する工程と、
一対の電極被膜と、電極被膜の間に保護膜が形成された領域であって、第1貫通孔の一部と、第2貫通孔の一部とを含む領域を、パンチング加工により打抜いて一のチップ抵抗器とする個片化工程と、からなるチップ抵抗器の製造方法。
Preparing a metal plate made of a predetermined resistance material;
Forming a first through hole in a metal plate by punching;
Forming a second through hole by punching a metal plate after forming the first through hole;
Forming a protective film covering a region including the first through hole and the second through hole;
Forming an electrode film made of a metal material to be an electrode on the exposed portion of the resistive material not covered with the protective film;
A pair of electrode coating, a region where the protective film is formed between the electrode coating, a part of the first through hole, a region including a portion of the second through-hole, and have punching by punching A chip resistor manufacturing method comprising the step of dividing into one chip resistor.
第1貫通孔および第2貫通孔は、電極配置方向と直交する方向に伸びる長孔形状である、請求項1に記載のチップ抵抗器の製造方法。   The method for manufacturing a chip resistor according to claim 1, wherein the first through hole and the second through hole have a long hole shape extending in a direction orthogonal to the electrode arrangement direction. 電極配置方向と直交する方向に、第1貫通孔および/または第2貫通孔の形成位置を調整する、請求項1に記載のチップ抵抗器の製造方法。   The manufacturing method of the chip resistor according to claim 1, wherein the formation position of the first through hole and / or the second through hole is adjusted in a direction orthogonal to the electrode arrangement direction. 個片化工程は、第1貫通孔の一部と第2貫通孔の一部とが、個片化された抵抗器の中心に対して点対称または線対称となるように打抜く、請求項1に記載のチップ抵抗器の製造方法。   The singulation step is stamped so that a part of the first through hole and a part of the second through hole are point-symmetric or line-symmetric with respect to the center of the singulated resistor. 2. A method for manufacturing a chip resistor according to 1. 金属板にマトリクス状に抵抗器領域を配置し、1列の各抵抗器領域に第1貫通孔を順次形成し、その後第2貫通孔を順次形成し、これを繰り返し、金属板の全面の抵抗器領域に第1貫通孔と第2貫通孔とを配置する、請求項1に記載のチップ抵抗器の製造方法。   Resistor areas are arranged in a matrix on the metal plate, and first through holes are sequentially formed in each row of resistor areas, and then second through holes are sequentially formed. The manufacturing method of the chip resistor according to claim 1 which arranges the 1st penetration hole and the 2nd penetration hole in a device field. 所定の抵抗材料からなる金属板を準備する工程と、Preparing a metal plate made of a predetermined resistance material;
金属板にパンチング加工により貫通孔を形成する工程と、  Forming a through hole in a metal plate by punching;
貫通孔を含む所定領域を覆う保護膜を形成する工程と、  Forming a protective film covering a predetermined region including the through hole; and
保護膜により覆われた貫通孔の一部を含み、保護膜の両側部に出た金属板を含む領域を、その周囲をパンチング加工により打抜いて画定することによって一のチップ抵抗器とする分離工程と、からなるチップ抵抗器の製造方法。  Separation of a region including a part of a through hole covered with a protective film and including a metal plate protruding on both sides of the protective film by punching the periphery by punching to form one chip resistor And a method of manufacturing a chip resistor.
分離工程は、一部を母体金属板に接続した状態とする第1分離工程と、The separation step includes a first separation step in which a part is connected to the base metal plate,
母体金属板に接続された一部を切断することにより一のチップ抵抗器とする第2分離工程とからなる請求項6に記載のチップ抵抗器の製造方法。  The chip resistor manufacturing method according to claim 6, further comprising a second separation step in which a part connected to the base metal plate is cut to form one chip resistor.
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