TWI296120B - - Google Patents

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TWI296120B
TWI296120B TW94118659A TW94118659A TWI296120B TW I296120 B TWI296120 B TW I296120B TW 94118659 A TW94118659 A TW 94118659A TW 94118659 A TW94118659 A TW 94118659A TW I296120 B TWI296120 B TW I296120B
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Taiwan
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alloy
resistance
alloy plate
copper
resistor
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TW94118659A
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Chinese (zh)
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TW200643993A (en
Inventor
Qing-Lin Ji
song-hong Xu
yong-fa Zhang
Yao-Zhen Ceng
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Prosperity Dielectrics Co Ltd
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Priority to TW094118659A priority Critical patent/TW200643993A/en
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Description

1296120 九、發明說明: 【發明所屬之技術領域】 本考X明係關於一種銅端極合金晶片電阻器之製造方 法’特別是關於-種包括有在選定之合金板頂面及底面分 別結合-銅箱層、沖模、形成一防鍍層、蝕刻、去除防鍍 層、進行阻值修整、塑脂注模、沖模分離而形成複數個合 金電阻單體等序列步驟之合金晶片電阻器製造方法。 【先前技術】 查傳統表面黏著型晶片電阻器一般是以厚膜印刷製程 予以製造,其主要係在選定之陶瓷基板上經過一序列之印 刷,雷射修整,銅端極,電鍍製程在該陶瓷基板上形成所 需之電阻器。 【發明内容】 然而,以傳統厚膜印刷製程技術製造電阻器時,在較 大功率之電阻器及超低電阻值時,很難做到如合金材料的 穩定特性,尤其在高精度的電流檢知器之應用,這也是目 前技術趨勢。 因此,本發明之主要目的即是提供一種合金晶片電阻 器之製造方法,以使合金晶片電阻器不論在產品電功率、 良率、製程簡便性等各方面,皆能符合產業之需求。 本發明之另一目的是提供一種具有高精確阻值之合金 晶片電阻器製造方法,在本發明之製程中,可在適當程序 中,依據所需阻值精度,對該合金板進行阻值修整微調之 1296120 步驟。 本發明為解決習知技術之問題所採用之技術手段係依 據所需阻值,選用一合金板材料,並在該選定之合金板頂 面及底面分別結合一銅箔層,以形成一具有雙面銅箔層之 合金板,然後依據所需阻值,將該具有雙面銅箔層之合金 板依預定形狀進行沖模,以在該合金板形成複數個連續之 合金電阻區段。在每一個合金電阻區段之兩側端面形成一 Φ 防鍍層,再進行蝕刻程序。然後在該合金電阻區段之合金 板進行塑脂注模,最後將各個合金電阻區段予以沖模分 離,而形成複數個合金電阻單體。 本發明較佳實施例中,在前述之去除防鍍層步驟之 後,更包括依所需阻值精度,對該合金板進行阻值修整微 調之步驟。在經過阻值修整微調之步驟之後,可將每一個 電阻器之阻值誤差調整到所需的預定範圍以内。 相較於現有技術,本發明之合金晶片電阻器可將選定 Φ 之合金材料依據本發明之製程簡易地製作出符合所需阻值 精度之合金晶片電阻器,而在產品良率方面,本發明之製 程因有導電良好之銅端極可準確掌握其整個製程,故其產 品良率可以提昇。而在本發明之合金晶片電阻器產品之阻 值精確度方面,本發明合金晶片電阻器可簡易地在適當程 序中,依據所需阻值精度,對該合金板進行阻值修整微調 之步驟。經過阻值修整微調之步驟之後,可將每一個電阻 器之阻值誤差調整到所需的預定要求以内。本發明在沖模 時,係可一次一組複數個晶片電阻器一起加工,可有效提 1296120 高生產效率,降低成本。 本發明所採用的具體實施例,將藉由以下之實施例及 附呈圖式作進一步之說明。 【實施方式】 參閱第一圖所示,其係顯示本發明在一合金板丨之頂 面及底面分別結合一上銅箔層2、及一下鋼箔層3以形成一 ^ 具雙面銅猪層合金板1⑻之立體圖,而第二圖係顯示第一 圖中2-2斷面之剖視圖。該合金板i之材料選用係依據所 需之電阻而定,例如該合金板之材料可為鎳、鉻合金板。 參閱第三圖所示,依據所需阻值,將該具雙面銅箔層 合金板100依預定形狀進行沖模,以在該具雙面銅羯層合 金板100形成複數個連續之合金電阻區段H。在此實施例 中,係以沖模方式將該具雙面銅箔層合金板1〇〇兩側邊部 份21予以沖除。 • 完成沖模之後,在每一個合金電阻區段Η之兩側端面 心成防鑛層22(參閱第四圖所示),如可在該合金電阻區 段Η中定義出一蝕刻區域H1。該防鍍層22可以習用印刷 機之方式進行印刷而形成。而該防鍍層22之印刷係依不同 電阻值而印有不同寬度之防鍍層。 接著,進行蝕刻程序,以將未被防鍍層22蓋覆之銅箔 層2予以蝕刻,使該蝕刻區域之合金板丨表面曝露出(如第 五圖所示)。然後,即可將該防鍍層22予以去除(如第六圖 所不),以利進行下一個製程。 1296120 在完成防鍍層22之去除之後,可進行阻值修整微調之 步驟。參閱第七圖所示,其係在該合金電阻區段Η之適當 阻值修整位置23處,依所需阻值精度,以雷射修整設備對 該合金板1進行阻值修整微調之步驟。經過阻值修整微調 之步驟之後,可將每一個電阻器之阻值誤差調整到所需的 1 %以内。 經過上述步驟完成之產品,即可以塑模注模之技術進 行合金電阻區段之塑脂注模4,參閱第八圖所示,以保護電 阻體並達到絕緣之目的。 完成塑脂注模之步驟之後,即可將各個合金電阻區段 Η予以沖模分離,而形成複數個合金電阻單體5,並在該合 金電阻單體5之兩側端形成銅端極51、52(如第九圖所 示)。 在該合金電阻單體5之銅端極51、52表面可以再形成 銅端極材料6(如第十圖所示),例如可以電鍍之技術將鎳層 及錫層順序地電鍍形成該合金電阻單體5之兩銅端極51、 52表面,以利曰後實際應用時之銲鍚作業。 在實際產品化時,可在各個合金電阻單體5之塑脂注 模4表面,印上電阻值,然後以包裝機包裝成帶狀,並捲 為成捲之型態。 藉由上述之本發明實施例可知,本發明確具產業上之 利用價值。惟以上之實施例說明,僅為本發明之較佳實施 例說明,凡習於此項技術者當可依據本發明之上述實施例 說明而作其它種種之改良及變化。然而這些依據本發明實 8 1296120 施例所作的種種改良及變化,當仍屬於本發明之發明精神 及界定之專利範圍内。 【圖式簡單說明】 第一圖係顯示本發明在一合金板之頂面及底面分別結合一 上銅箔層、及一下銅箔層以形成一具雙面銅箔層合 金板之立體圖。 第二圖係顯示第一圖中2-2斷面之剖視圖。 第三圖係顯示本發明中,依據所需阻值將該具雙面銅箔層 合金板進行沖模後之示意圖。 第四圖係顯示本發明中,在每一個合金電阻區段之兩側端 面形成一防鍍層之示意圖。 第五圖係顯示本發明在進行蝕刻程序時之示意圖。 第六圖係顯示本發明將該防鍍層予以去除之示意圖。 第七圖係顯示本發明在進行阻值修整微調時之示意圖。 第八圖係顯示本發明在進行塑脂注模時之示意圖。 第九圖係顯示本發明將各個合金電阻區段予以沖模分離, 而形成複數個合金電阻單體之示意圖。 第十圖係顯示本發明在合金電阻單體之銅端極表面形成銅 端極材料之示意圖。 【主要元件符號說明】 100 具雙面銅羯層合金板 1 合金板 1296120 2 銅箔層 3 銅箔層 21 側邊部份 22 防鍍層 23 阻值修整位置 4 塑脂注模 5 合金電阻單體 51 > 52 銅端極 6 銅端極材料 Η 合金電阻區段 HI 名虫刻區域1296120 IX. Description of the invention: [Technical field to which the invention pertains] This test is related to a method for manufacturing a copper terminal alloy wafer resistor, which is specifically related to the combination of the top and bottom surfaces of the selected alloy plate. An alloy wafer resistor manufacturing method for a copper box layer, a die, a plating prevention layer, an etching prevention, an anti-plating layer, a resistance trimming, a plastic injection molding, and a die separation to form a plurality of alloy resistor monomers. [Prior Art] The conventional surface-adhesive chip resistors are generally manufactured by a thick film printing process, which is mainly subjected to a series of printing on a selected ceramic substrate, laser trimming, copper terminal, and electroplating process in the ceramic. A desired resistor is formed on the substrate. SUMMARY OF THE INVENTION However, when manufacturing resistors by conventional thick film printing process technology, it is difficult to achieve stable characteristics such as alloy materials in the case of high-power resistors and ultra-low resistance values, especially in high-precision current inspection. The application of the device, this is also the current technology trend. SUMMARY OF THE INVENTION Accordingly, it is a primary object of the present invention to provide a method for fabricating an alloy wafer resistor such that the alloy wafer resistor can meet the needs of the industry regardless of product electrical power, yield, and ease of manufacture. Another object of the present invention is to provide a method for manufacturing an alloy wafer resistor having a high precision resistance. In the process of the present invention, the alloy plate can be subjected to resistance trimming according to the required resistance accuracy in a proper procedure. Fine tune the 1296120 step. The technical means adopted by the present invention for solving the problems of the prior art is to select an alloy plate material according to the required resistance value, and to bond a copper foil layer on the top surface and the bottom surface of the selected alloy plate respectively to form a double The alloy plate of the copper foil layer is then die-formed according to a desired resistance value to the alloy plate having the double-sided copper foil layer to form a plurality of continuous alloy resistance sections on the alloy plate. A Φ anti-plating layer is formed on both end faces of each of the alloy resistance sections, and an etching process is performed. Then, the alloy plate of the alloy resistance section is subjected to plastic injection molding, and finally the respective alloy resistance sections are die-divided to form a plurality of alloy resistance monomers. In the preferred embodiment of the present invention, after the step of removing the anti-plating layer, the step of trimming and trimming the alloy plate according to the required resistance accuracy is further included. After the step of trimming and trimming, the resistance error of each resistor can be adjusted to within the required predetermined range. Compared with the prior art, the alloy wafer resistor of the present invention can easily produce an alloy wafer resistor conforming to the required resistance accuracy according to the process of the present invention, and the invention is in terms of product yield. The process can improve the product yield because of the well-conducted copper end electrode. In the resistance precision of the alloy wafer resistor product of the present invention, the alloy wafer resistor of the present invention can be easily subjected to the step of trimming and fine-tuning the alloy plate in accordance with the required resistance accuracy in an appropriate procedure. After the step of trimming and trimming, the resistance error of each resistor can be adjusted to the required predetermined requirement. The invention can process a plurality of chip resistors at a time in the die, which can effectively improve the production efficiency and reduce the cost of the 1296120. The specific embodiments of the present invention will be further described by the following examples and the accompanying drawings. [Embodiment] Referring to the first figure, it is shown that the upper surface and the bottom surface of an alloy plate are respectively combined with a copper foil layer 2 and a lower steel foil layer 3 to form a double-sided copper pig. A perspective view of the layered alloy sheet 1 (8), and a second view showing a cross-sectional view of the section 2-2 in the first figure. The material selection of the alloy plate i depends on the required electrical resistance. For example, the material of the alloy plate may be a nickel or chromium alloy plate. Referring to the third figure, the double-sided copper foil alloy plate 100 is die-formed according to a predetermined shape to form a plurality of continuous alloy resistance regions in the double-sided copper-clad alloy plate 100. Section H. In this embodiment, the side edge portions 21 of the double-sided copper foil layer alloy sheet 1 are punched out by die. • After the die is completed, the anti-mining layer 22 is formed on both end faces of each of the alloy resistance sections (see the fourth figure), and an etched region H1 can be defined in the alloy resistance section Η. The plating resist 22 can be formed by printing by a conventional printing machine. The printing of the anti-plating layer 22 is printed with different widths of anti-plating layers depending on the resistance values. Next, an etching process is performed to etch the copper foil layer 2 not covered by the plating resist 22 to expose the surface of the alloy plate of the etched region (as shown in Fig. 5). The anti-plating layer 22 can then be removed (as shown in Figure 6) for the next process. 1296120 After the removal of the plating resist 22 is completed, the step of trimming and trimming can be performed. Referring to the seventh figure, it is a step of trimming and fine-tuning the alloy plate 1 by a laser trimming device according to the required resistance precision at the appropriate resistance trimming position 23 of the alloy resistance section. After the step of trimming and trimming, the resistance error of each resistor can be adjusted to within 1%. After the above steps are completed, the plastic injection molding of the alloy resistance section can be carried out by the technique of injection molding, as shown in the eighth figure, to protect the resistor body and achieve the purpose of insulation. After the step of molding the plastic injection molding, the respective alloy resistance sections are die-separated to form a plurality of alloy resistor monomers 5, and copper end poles 51 are formed at both sides of the alloy resistor unit 5, 52 (as shown in the ninth figure). A copper terminal material 6 (as shown in FIG. 10) may be further formed on the surface of the copper terminal 51, 52 of the alloy resistor unit 5, and the nickel layer and the tin layer may be sequentially plated to form the alloy resistor, for example, by electroplating. The surface of the two copper end poles 51 and 52 of the single body 5 is used for the soldering operation in the actual application. In the actual productization, the resistance value can be printed on the surface of the plastic injection mold 4 of each alloy resistor unit 5, and then packaged into a strip shape in a packaging machine, and wound into a roll form. As can be seen from the above embodiments of the present invention, the present invention has industrial use value. However, the above embodiments are merely illustrative of the preferred embodiments of the present invention, and those skilled in the art can make various other modifications and changes in accordance with the embodiments of the present invention. However, the various modifications and variations of the embodiments of the present invention are still within the scope of the invention and the scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS The first figure shows a perspective view of a double-sided copper foil laminated gold plate bonded to a top surface and a bottom surface of an alloy sheet, respectively, with a copper foil layer and a copper foil layer. The second figure shows a cross-sectional view of the section 2-2 in the first figure. The third figure shows a schematic view of the double-sided copper foil alloy sheet after die-cut according to the required resistance value in the present invention. The fourth figure shows a schematic view of forming an anti-plating layer on both end faces of each of the alloy resistance sections in the present invention. The fifth figure shows a schematic view of the present invention when an etching process is performed. The sixth figure shows a schematic view of the present invention for removing the plating resist. The seventh figure shows a schematic diagram of the present invention when performing resistance trimming and fine adjustment. The eighth figure shows a schematic view of the present invention when performing plastic injection molding. The ninth figure shows a schematic diagram of the present invention in which individual alloy resistor sections are die-divided to form a plurality of alloy resistor monomers. The tenth figure shows a schematic view of the present invention for forming a copper terminal material on the copper terminal surface of an alloy resistor unit. [Main component symbol description] 100 double-sided copper enamel alloy plate 1 alloy plate 1296120 2 copper foil layer 3 copper foil layer 21 side portion 22 anti-plating layer 23 resistance trimming position 4 plastic injection molding 5 alloy resistance monomer 51 > 52 copper end 6 copper end material Η alloy resistance section HI name insect engraved area

Claims (1)

1296120 十、申請專利範圍: 1. 一種銅端極合金晶片電阻器之製造方法,包括下列步驟: (a) 依據所需阻值,選用一合金板材料; (b) 在該合金板之頂面及底面分別結合一銅箔層,以形成 一具有雙面銅箔層之合金板; (c) 依據所需阻值,將該具有雙面銅箔層之合金板依預定 形狀進行沖模,以在該合金板形成複數個連續之合金 電阻區段; (d) 在每一個合金電阻區段之兩側端面形成一防鍍層; (e) 進行蝕刻程序,將未被防鍍層蓋覆之銅箔層予以蝕 刻,使該蝕刻區域之合金板表面曝露出; (f) 將該防鍍層予以去除; (g) 在該合金電阻區段之合金板進行塑脂注模; (h) 將各個合金電阻區段予以沖模分離,而形成複數個合 金電阻單體。 2. 如申請專利範圍第1項之銅端極合金晶片電阻器之製造方 法,其中沖模係一次一組複數個晶片電阻器一起加工。 3. 如申請專利範圍第1項之銅端極合金晶片電阻器之製造方 法,其中步驟(f)之後,在去除防鍍層之後,更包括依所 需阻值精度,對該合金板進行阻值修整微調之步驟。 11 1296120 4·如申明專㈣圍第丨項之鋼端極合金晶片電阻器之製造方 法’其中步驟⑻之後,更包括在該合金f阻單體之兩個 銅端極形成銅端極材料之步驟。 5·如申睛專利範圍第4項之銅端極合金晶片電阻器之製造方 去,其中該合金電阻單體之銅端極材料係包括有一鎳層及 一錫層。1296120 X. Patent application scope: 1. A method for manufacturing a copper terminal alloy chip resistor, comprising the following steps: (a) selecting an alloy plate material according to the required resistance; (b) top surface of the alloy plate And a bottom surface is respectively combined with a copper foil layer to form an alloy plate having a double-sided copper foil layer; (c) according to the required resistance value, the alloy plate having the double-sided copper foil layer is die-shaped according to a predetermined shape to The alloy plate forms a plurality of continuous alloy resistance sections; (d) forming an anti-plating layer on both end faces of each of the alloy resistance sections; (e) performing an etching process to form a copper foil layer not covered by the anti-plating layer Etching to expose the surface of the alloy plate of the etched region; (f) removing the anti-plating layer; (g) performing a plastic injection molding on the alloy plate of the alloy resistance section; (h) placing each alloy resistance region The segments are separated by a die to form a plurality of alloy resistor monomers. 2. The method of manufacturing a copper terminal alloy chip resistor according to claim 1, wherein the die is processed together with a plurality of chip resistors at a time. 3. The method for manufacturing a copper terminal alloy chip resistor according to claim 1, wherein after the step (f), after removing the anti-plating layer, the resistance of the alloy plate is further included according to the required resistance precision. Steps to trim fine-tuning. 11 1296120 4·If the manufacturing method of the steel terminal alloy chip resistor of the above-mentioned item (4), the second step of the alloy, the copper terminal material is formed at the two copper terminals of the alloy f-blocking monomer. step. 5. The copper terminal alloy chip resistor of claim 4, wherein the copper terminal material of the alloy resistor comprises a nickel layer and a tin layer. 1212
TW094118659A 2005-06-06 2005-06-06 Manufacturing method for resistor of alloy chip with end copper electrode TW200643993A (en)

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