JP5535003B2 - Semiconductor wafer cooling system - Google Patents

Semiconductor wafer cooling system Download PDF

Info

Publication number
JP5535003B2
JP5535003B2 JP2010182728A JP2010182728A JP5535003B2 JP 5535003 B2 JP5535003 B2 JP 5535003B2 JP 2010182728 A JP2010182728 A JP 2010182728A JP 2010182728 A JP2010182728 A JP 2010182728A JP 5535003 B2 JP5535003 B2 JP 5535003B2
Authority
JP
Japan
Prior art keywords
cooling
semiconductor wafer
tray
mounting surface
cooling pipe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2010182728A
Other languages
Japanese (ja)
Other versions
JP2012043916A (en
Inventor
貴也 野口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2010182728A priority Critical patent/JP5535003B2/en
Priority to CN201410488398.8A priority patent/CN104362113A/en
Priority to CN2011101809113A priority patent/CN102376527A/en
Priority to DE102011079806.4A priority patent/DE102011079806B4/en
Priority to KR1020110078919A priority patent/KR101294114B1/en
Publication of JP2012043916A publication Critical patent/JP2012043916A/en
Application granted granted Critical
Publication of JP5535003B2 publication Critical patent/JP5535003B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/02—Details
    • H01J37/20—Means for supporting or positioning the objects or the material; Means for adjusting diaphragms or lenses associated with the support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H01L21/67109—Apparatus for thermal treatment mainly by convection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6838—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices

Description

この発明は、例えば放射線を照射する際の被照射物である半導体ウエハを載置して冷却するトレイを備える半導体ウエハ冷却装置に関する。   The present invention relates to a semiconductor wafer cooling apparatus including a tray for placing and cooling a semiconductor wafer, which is an object to be irradiated when irradiated with radiation, for example.

ｐ型半導体材料中で電子が再結合する時間、あるいはｎ型半導体材料でホールが再結合する時間のことを少数キャリアのライフタイムという。導通後に残る少数キャリアがより迅速に再結合するようにライフタイムを制御する必要があり、このライフタイム制御は、金や白金等の重金属を拡散したり電子やプロトン等の荷電粒子を照射することにより行われる。   The time for electrons to recombine in the p-type semiconductor material or the time for holes to recombine in the n-type semiconductor material is called the minority carrier lifetime. It is necessary to control the lifetime so that minority carriers remaining after conduction recombine more quickly. This lifetime control can diffuse heavy metals such as gold and platinum or irradiate charged particles such as electrons and protons. Is done.

このような放射線照射工程における半導体ウエハの温度上昇を防ぐために、半導体ウエハを載置するトレイに、冷却水などの冷媒が流れる冷却配管を設けてウエハを冷却する。例えば特許文献１に記載の電子線照射用被処理物搬送装置では、被処理物を載置するトレイと密着する水冷板の内部に冷却配管が蛇行配置されており、当該冷却配管を流れる冷却水によって被処理物を冷却する構成となっている。   In order to prevent the temperature rise of the semiconductor wafer in such a radiation irradiation process, a cooling pipe through which a coolant such as cooling water flows is provided on the tray on which the semiconductor wafer is placed to cool the wafer. For example, in the electron beam irradiation workpiece transfer device described in Patent Document 1, cooling pipes meander in the water cooling plate that is in close contact with the tray on which the workpieces are placed, and cooling water that flows through the cooling pipes. Thus, the workpiece is cooled.

特開平１０−３１２７６４号公報JP-A-10-312764

特許文献１のように冷却配管を蛇行配置することによって、１本の冷却配管によってトレイの全面を冷却することが可能である。しかし、このような冷却配管の配置構造では、冷却配管の真上に位置する部分と配管間の真上に位置する部分とでトレイの冷却性能が異なるため、半導体ウエハとトレイの接触位置によって単一のウエハ内でも温度差が生じてしまう。さらに、上流と下流では冷媒の温度が異なるため、トレイ上の載置位置によってウエハ間で温度差が生じてしまう。   By arranging the cooling pipes in a meandering manner as in Patent Document 1, the entire surface of the tray can be cooled by one cooling pipe. However, in such a cooling pipe arrangement structure, the cooling performance of the tray is different between the part located directly above the cooling pipe and the part located directly between the pipes. A temperature difference occurs even within one wafer. Further, since the temperature of the refrigerant differs between upstream and downstream, a temperature difference occurs between the wafers depending on the mounting position on the tray.

また、被照射物である半導体ウエハに反りがあると、同一半導体ウエハ内においてトレイと接触している部分とそうでない部分が発生し、これらの部分に温度差が生じてしまう。   In addition, if the semiconductor wafer as the irradiation object is warped, a portion in contact with the tray and a portion not in the same semiconductor wafer are generated, and a temperature difference is generated between these portions.

このような半導体ウエハの面内やウエハ間で生じる温度差によって、半導体ウエハから切り出して製作する半導体デバイスにおいてライフタイムやその他の電気特性にばらつきが生じるという問題があった。   There is a problem that the lifetime and other electrical characteristics vary in a semiconductor device manufactured by cutting out from a semiconductor wafer due to a temperature difference generated in the plane of the semiconductor wafer or between the wafers.

本発明は上述の問題点に鑑み、例えば放射線照射工程において被照射物たる半導体ウエハの温度ばらつきを抑制しつつ冷却する半導体ウエハ冷却装置の提供を目的とする。   In view of the above-described problems, an object of the present invention is to provide a semiconductor wafer cooling apparatus that cools a semiconductor wafer that is an object to be irradiated while suppressing temperature variations in the radiation irradiation process.

本発明の第１の半導体ウエハ冷却装置は、半導体ウエハを載置する載置面を有するトレイと、前記トレイ内に配置され、前記載置面上に載置された前記半導体ウエハを冷却する冷媒が流れる冷却配管と、前記載置面に開口を有して前記トレイに設けられ、前記載置面上に載置された前記半導体ウエハを吸着する真空配管と、を備え、冷却配管は冷媒が互いに逆方向に流れる一対の冷却配管であり、冷却配管の夫々は複数の枝配管を並列接続した構成であり、一方の冷却配管を構成する枝配管は載置面に平行な面内で他方の冷却配管を構成する枝配管と交互に配置される。 A first semiconductor wafer cooling apparatus according to the present invention includes a tray having a mounting surface on which a semiconductor wafer is mounted, and a refrigerant that is disposed in the tray and cools the semiconductor wafer mounted on the mounting surface. a cooling pipe flow, provided in said tray has an opening on the mounting surface, and a vacuum pipe for sucking the semiconductor wafer mounted on the mounting surface, the cooling pipe is a refrigerant A pair of cooling pipes that flow in opposite directions, each of the cooling pipes has a configuration in which a plurality of branch pipes are connected in parallel, and the branch pipes that constitute one cooling pipe are in the plane parallel to the placement surface. Ru is interleaved with the branch pipe constituting the cooling pipe.

本発明の第２の半導体ウエハ冷却装置は、半導体ウエハを載置する載置面を有するトレイと、前記トレイ内に配置され、前記載置面上に載置された前記半導体ウエハを冷却する冷媒が流れる一対の冷却配管とを備え、前記冷却配管の夫々は複数の配管を並列接続した構成であり、一方の前記冷却配管を構成する配管は前記載置面に平行な面内で他方の前記冷却配管を構成する配管と交互に配置される。 A second semiconductor wafer cooling apparatus according to the present invention includes a tray having a mounting surface on which a semiconductor wafer is mounted, and a refrigerant that is disposed in the tray and cools the semiconductor wafer mounted on the mounting surface. Each of the cooling pipes has a configuration in which a plurality of pipes are connected in parallel, and the pipes constituting one of the cooling pipes are in the plane parallel to the mounting surface, and the other Alternatingly arranged with the piping constituting the cooling piping.

本発明の第３の半導体ウエハ冷却装置は、半導体ウエハを載置する載置面を有するトレイと、前記トレイ内に前記載置面に渡って面状に設けられ、前記載置面上に載置された前記半導体ウエハを冷却する冷媒が流れる冷却配管と、を備え、冷却配管は、載置面側に設けられた第一の冷却配管と、第一の冷却配管に対し載置面とは反対の側に設けられた第二の冷却配管とを備え、第一、第二の冷却配管内を冷媒が互いに逆方向に流れる。 A third semiconductor wafer cooling apparatus according to the present invention is provided in a planar shape across a placement surface in the tray, the tray having a placement surface for placing a semiconductor wafer, and placed on the placement surface. A cooling pipe through which a coolant for cooling the placed semiconductor wafer flows, and the cooling pipe is a first cooling pipe provided on the mounting surface side and a mounting surface with respect to the first cooling pipe and a second cooling pipe provided on the opposite side, first, Ru flows a second cooling in the pipe in opposite directions refrigerant.

本発明の第１の半導体ウエハ冷却装置は、載置面に開口を有してトレイに設けられ、載置面上に載置された半導体ウエハを吸着する真空配管を備え、冷却配管は冷媒が互いに逆方向に流れる一対の冷却配管であり、冷却配管の夫々は複数の枝配管を並列接続した構成であり、一方の冷却配管を構成する枝配管は載置面に平行な面内で他方の冷却配管を構成する枝配管と交互に配置されるため、半導体ウエハ間や半導体ウエハ面内での温度差を抑制することが可能である。 A first semiconductor wafer cooling device of the present invention includes a vacuum pipe that has an opening on a mounting surface and is provided on a tray and that adsorbs a semiconductor wafer mounted on the mounting surface. A pair of cooling pipes that flow in opposite directions, each of the cooling pipes has a configuration in which a plurality of branch pipes are connected in parallel, and the branch pipes that constitute one cooling pipe are in the plane parallel to the placement surface. because being interleaved with the branch pipe constituting the cooling pipe, it is possible to suppress the temperature difference between the semiconductor wafer and a semiconductor wafer surface.

本発明の第２の半導体ウエハ冷却装置において、一対の冷却配管の夫々は複数の配管を並列接続した構成であり、一方の前記冷却配管を構成する配管は前記載置面に平行な面内で他方の前記冷却配管を構成する配管と交互に配置されることにより、各配管と半導体ウエハまでの距離は等しくなる。冷却配管２ａ，２ｂで冷却水の流れる方向を反対向きにすれば、トレイのどこに半導体ウエハを載置しても均等に冷却することが可能で、ウエハ間の温度ムラを抑制することが出来る。 In the second semiconductor wafer cooling apparatus of the present invention, each of the pair of cooling pipes has a configuration in which a plurality of pipes are connected in parallel, and the pipes constituting one of the cooling pipes are in a plane parallel to the mounting surface. By alternately arranging the other cooling pipes, the distances between the pipes and the semiconductor wafer are equal. If the cooling water flows in the cooling pipes 2a and 2b in opposite directions, the semiconductor wafer can be evenly cooled no matter where the semiconductor wafer is placed on the tray, and temperature unevenness between the wafers can be suppressed.

本発明の第３の半導体ウエハ冷却装置は、トレイ内に載置面に渡って面状に設けられ、載置面上に載置された半導体ウエハを冷却する冷媒が流れる冷却配管を備えるため、トレイの全面をムラなく冷却することができ、ウエハ面内の温度差を抑制する。また、冷却配管は、載置面側に設けられた第一の冷却配管と、第一の冷却配管に対し載置面とは反対の側に設けられた第二の冷却配管とを備え、第一、第二の冷却配管内を冷媒が互いに逆方向に流れる。よって、第一、第二の冷却配管の上流側と下流側の温度差が緩和され、ウエハ間の温度差を抑制する。 Since the third semiconductor wafer cooling device of the present invention includes a cooling pipe that is provided in a planar shape across the mounting surface in the tray and through which a coolant that cools the semiconductor wafer mounted on the mounting surface flows. The entire surface of the tray can be cooled evenly, and the temperature difference within the wafer surface is suppressed. The cooling pipe includes a first cooling pipe provided on the mounting surface side, and a second cooling pipe provided on the side opposite to the mounting surface with respect to the first cooling pipe, The refrigerant flows through the first and second cooling pipes in opposite directions. Therefore, the temperature difference between the upstream side and the downstream side of the first and second cooling pipes is alleviated, and the temperature difference between the wafers is suppressed.

実施の形態１の半導体ウエハ冷却装置の構成図である。1 is a configuration diagram of a semiconductor wafer cooling device according to a first embodiment. 実施の形態２の半導体ウエハ冷却装置の構成図である。FIG. 6 is a configuration diagram of a semiconductor wafer cooling device according to a second embodiment. 実施の形態３の半導体ウエハ冷却装置の構成図である。FIG. 6 is a configuration diagram of a semiconductor wafer cooling device according to a third embodiment. 実施の形態３の半導体ウエハ冷却装置の構成図である。FIG. 6 is a configuration diagram of a semiconductor wafer cooling device according to a third embodiment. 実施の形態４の半導体ウエハ冷却装置の構成図である。FIG. 6 is a configuration diagram of a semiconductor wafer cooling device according to a fourth embodiment. 実施の形態４の半導体ウエハ冷却装置の構成図である。FIG. 6 is a configuration diagram of a semiconductor wafer cooling device according to a fourth embodiment. 実施の形態５の半導体ウエハ冷却装置の構成図である。FIG. 10 is a configuration diagram of a semiconductor wafer cooling device according to a fifth embodiment. 実施の形態５の半導体ウエハ冷却装置の変形例の構成図である。FIG. 10 is a configuration diagram of a modified example of the semiconductor wafer cooling device of the fifth embodiment. 実施の形態６の半導体ウエハ冷却装置の構成図である。FIG. 10 is a configuration diagram of a semiconductor wafer cooling device according to a sixth embodiment.

（実施の形態１）
図１は、実施の形態１の半導体ウエハ冷却装置の構成図であり、図１（ａ）は平面図、図１（ｂ）は図１（ａ）におけるＡ−Ａ断面図である。 (Embodiment 1)
1A and 1B are configuration diagrams of the semiconductor wafer cooling apparatus according to the first embodiment, in which FIG. 1A is a plan view and FIG. 1B is a cross-sectional view taken along line AA in FIG.

本実施の形態の半導体ウエハ冷却装置において、トレイ１にはその載置面に複数の半導体ウエハ１０が載置される。トレイ１の内部には冷却配管２が形成されており、冷却配管２を流れる例えば冷却水などの冷媒によって半導体ウエハ１０の冷却が行われる。例えば、冷却配管２は図１（ａ）に示すようにトレイ１の両端間で折り返し状に配置（蛇行配置）された１本の冷却配管である。   In the semiconductor wafer cooling apparatus of the present embodiment, a plurality of semiconductor wafers 10 are placed on the placement surface of the tray 1. A cooling pipe 2 is formed inside the tray 1, and the semiconductor wafer 10 is cooled by a coolant such as cooling water flowing through the cooling pipe 2. For example, the cooling pipe 2 is a single cooling pipe arranged in a folded manner (meandering arrangement) between both ends of the tray 1 as shown in FIG.

さらにトレイ１の内部には、冷却配管２に干渉しないように真空配管３が形成され、トレイ１の載置面には真空配管３の開口が形成される。真空配管３内部は真空ポンプによって減圧された状態にあり、トレイ１の載置面に設けられた開口を通して半導体ウエハ１０をトレイ１の載置面に真空吸着させることが可能である。   Further, a vacuum pipe 3 is formed inside the tray 1 so as not to interfere with the cooling pipe 2, and an opening of the vacuum pipe 3 is formed on the mounting surface of the tray 1. The inside of the vacuum pipe 3 is in a state of being depressurized by a vacuum pump, and the semiconductor wafer 10 can be vacuum-sucked to the mounting surface of the tray 1 through an opening provided on the mounting surface of the tray 1.

すなわち、本実施の形態の半導体ウエハ冷却装置は、半導体ウエハ１０を載置する載置面を有するトレイ１と、トレイ１内に配置され、載置面上に載置された半導体ウエハ１０を冷却する冷媒が流れる冷却配管２と、載置面に開口を有してトレイ１に設けられ、載置面上に載置された半導体ウエハ１０を吸着する真空配管３とを備える。真空配管３で真空吸着されることにより、半導体ウエハ１０はトレイ１に対して隙間を設けることなくその全面がトレイ１と接触する。半導体ウエハ１０は全面がムラなくトレイ１によって冷却されるため、ウエハ面内での温度ムラが小さくなるという効果を奏する。   That is, the semiconductor wafer cooling apparatus according to the present embodiment cools the tray 1 having a mounting surface on which the semiconductor wafer 10 is mounted, and the semiconductor wafer 10 that is disposed in the tray 1 and mounted on the mounting surface. A cooling pipe 2 through which the refrigerant flows, and a vacuum pipe 3 that has an opening on the mounting surface and is provided on the tray 1 and sucks the semiconductor wafer 10 mounted on the mounting surface. By being vacuum-sucked by the vacuum pipe 3, the entire surface of the semiconductor wafer 10 contacts the tray 1 without providing a gap with respect to the tray 1. Since the entire surface of the semiconductor wafer 10 is cooled by the tray 1 without unevenness, the temperature unevenness within the wafer surface is reduced.

なお、図１には半導体ウエハ１０の中心に位置するよう真空配管３の開口を設けた場合の例を示しているが、開口の数を増やすことによって半導体ウエハ１０とトレイ１との密着性をさらに高めることが可能である。   Although FIG. 1 shows an example in which the opening of the vacuum pipe 3 is provided so as to be positioned at the center of the semiconductor wafer 10, the adhesion between the semiconductor wafer 10 and the tray 1 can be improved by increasing the number of openings. Further enhancement is possible.

＜効果＞
本実施の形態の半導体ウエハ冷却装置によれば、既に述べた通り以下の効果を奏する。すなわち、本実施の形態の半導体ウエハ冷却装置は、半導体ウエハ１０を載置する載置面を有するトレイ１と、トレイ１内に配置され、載置面上に載置された半導体ウエハ１０を冷却する冷媒が流れる冷却配管２と、載置面に開口を有してトレイ１に設けられ、載置面上に載置された半導体ウエハ１０を吸着する真空配管３とを備える。真空配管３で真空吸着されることにより、半導体ウエハ１０はトレイ１に対して隙間を設けることなくその全面がトレイ１と接触するため、半導体ウエハ１０は全面がムラなくトレイ１によって冷却され、ウエハ面内での温度ムラが小さくなるという効果を奏する。 <Effect>
According to the semiconductor wafer cooling apparatus of the present embodiment, the following effects can be obtained as already described. That is, the semiconductor wafer cooling apparatus according to the present embodiment cools the tray 1 having a mounting surface on which the semiconductor wafer 10 is mounted, and the semiconductor wafer 10 that is disposed in the tray 1 and mounted on the mounting surface. A cooling pipe 2 through which the refrigerant flows, and a vacuum pipe 3 that has an opening on the mounting surface and is provided on the tray 1 and sucks the semiconductor wafer 10 mounted on the mounting surface. Since the entire surface of the semiconductor wafer 10 is in contact with the tray 1 without providing a gap with respect to the tray 1 by being vacuum-sucked by the vacuum pipe 3, the entire surface of the semiconductor wafer 10 is cooled by the tray 1 without unevenness. There is an effect that temperature unevenness in the surface is reduced.

（実施の形態２）
図２は、実施の形態２の半導体ウエハ冷却装置の構成図である。本実施の形態の半導体ウエハ冷却装置において、トレイ１にはその載置面に複数の半導体ウエハ１０（図１参照）が載置される。トレイ１の内部には冷却配管２が形成されており、冷却配管２を流れる例えば冷却水などの冷媒によって半導体ウエハ１０の冷却が行われる。冷却配管２はトレイ１の両端間で折り返し状に配置（蛇行配置）された１本の冷却配管である。 (Embodiment 2)
FIG. 2 is a configuration diagram of the semiconductor wafer cooling apparatus according to the second embodiment. In the semiconductor wafer cooling apparatus of the present embodiment, a plurality of semiconductor wafers 10 (see FIG. 1) are placed on the placement surface of the tray 1. A cooling pipe 2 is formed inside the tray 1, and the semiconductor wafer 10 is cooled by a coolant such as cooling water flowing through the cooling pipe 2. The cooling pipe 2 is a single cooling pipe arranged in a folded shape (meandering arrangement) between both ends of the tray 1.

半導体ウエハ１０から切り出される正方形チップの一辺をａ（ｍｍ）とし、冷却配管２の側壁厚みをｂ（ｍｍ）とした場合に、冷却配管２の隣り合う配管との距離（配管間隔）ｃ（ｍｍ）が   When one side of the square chip cut out from the semiconductor wafer 10 is a (mm) and the side wall thickness of the cooling pipe 2 is b (mm), the distance (pipe interval) c (mm) between adjacent pipes of the cooling pipe 2 )But

Figure 0005535003
Figure 0005535003

を満たすようにする。例えば正方形チップの一辺をａ＝２２．５（ｍｍ）、冷却配管２の側壁厚みをｂ＝１．２５（ｍｍ）とすると、配管間隔ｃ≦８．７５（ｍｍ）となる。このような構成により、少なくとも正方形チップの１／２以上の範囲の直下に冷却配管２が構成されるため、冷却効率が向上する。 To satisfy. For example, if one side of the square chip is a = 22.5 (mm) and the side wall thickness of the cooling pipe 2 is b = 1.25 (mm), the pipe interval c ≦ 8.75 (mm). With such a configuration, the cooling pipe 2 is configured immediately below a range of at least 1/2 of the square chip, so that the cooling efficiency is improved.

なお、本実施の形態の半導体ウエハ冷却装置に、実施の形態１で述べた真空配管３を適用すれば、冷却効率の向上に加えてウエハ面内での温度ムラが小さくすることが出来る。   If the vacuum pipe 3 described in the first embodiment is applied to the semiconductor wafer cooling apparatus of the present embodiment, the temperature unevenness in the wafer surface can be reduced in addition to the improvement of the cooling efficiency.

＜効果＞
本実施の形態の半導体ウエハ冷却装置によれば、既に述べたとおり以下の効果を奏する。すなわち、本実施の形態の半導体ウエハ冷却装置において、冷却配管２はトレイ１内に両端間で折り返し状に配置された一の冷却配管であり、半導体ウエハ１０から切り出す正方形チップの一辺をａ（ｍｍ）とし、冷却配管２の側壁厚みをｂ（ｍｍ）とした場合に、冷却配管２の隣り合う配管との距離ｃ（ｍｍ）が式（１）を満たすことにより、少なくとも正方形チップの１／２以上の範囲の直下に冷却配管２が構成されるため、冷却効率が向上する。 <Effect>
According to the semiconductor wafer cooling apparatus of the present embodiment, the following effects can be obtained as described above. That is, in the semiconductor wafer cooling apparatus of the present embodiment, the cooling pipe 2 is one cooling pipe arranged in a folded shape between both ends in the tray 1, and one side of the square chip cut out from the semiconductor wafer 10 is a (mm). ), And the side wall thickness of the cooling pipe 2 is b (mm), the distance c (mm) between the cooling pipe 2 and the adjacent pipe satisfies the formula (1), so that at least 1/2 of the square chip. Since the cooling pipe 2 is configured immediately below the above range, the cooling efficiency is improved.

（実施の形態３）
図３、図４は実施の形態３の半導体ウエハ冷却装置の構成図である。本実施の形態の半導体ウエハ冷却装置において、トレイ１にはその載置面に複数の半導体ウエハ１０（図１参照）が載置される。トレイ１の内部には一対の冷却配管２ａ，２ｂが形成されており、冷却配管２ａ，２ｂを互いに逆方向に流れる例えば冷却水などの冷媒によって半導体ウエハ１０の冷却が行われる。 (Embodiment 3)
3 and 4 are configuration diagrams of the semiconductor wafer cooling apparatus according to the third embodiment. In the semiconductor wafer cooling apparatus of the present embodiment, a plurality of semiconductor wafers 10 (see FIG. 1) are placed on the placement surface of the tray 1. A pair of cooling pipes 2a and 2b are formed inside the tray 1, and the semiconductor wafer 10 is cooled by a coolant such as cooling water flowing in the cooling pipes 2a and 2b in opposite directions.

冷却配管２ａ，２ｂは夫々、複数の枝配管が並列に接続された構成であり、冷却配管２ａの枝配管と冷却配管２ｂの枝配管はトレイ１の載置面に平行な面において交互に配置される。   Each of the cooling pipes 2 a and 2 b has a configuration in which a plurality of branch pipes are connected in parallel, and the branch pipes of the cooling pipe 2 a and the branch pipes of the cooling pipe 2 b are alternately arranged on a plane parallel to the mounting surface of the tray 1. Is done.

図４（ａ）はトレイ１の裏面側（載置面と反対の面）から冷却配管２ａ，２ｂを見た図であり、図４（ｂ）は図４（ａ）のＡ側から冷却配管２ａ，２ｂを見た図、図４（ｃ）は図４（ａ）のＢ側から冷却配管２ａ，２ｂを見た図、図４（ｄ）は図３のＣ側から冷却配管２ａ，２ｂを見た図である。   4A is a view of the cooling pipes 2a and 2b from the back side (the surface opposite to the mounting surface) of the tray 1, and FIG. 4B is a cooling pipe from the A side of FIG. 4A. FIG. 4C is a view of the cooling pipes 2a and 2b from the B side of FIG. 4A, and FIG. 4D is a view of the cooling pipes 2a and 2b from the C side of FIG. FIG.

冷却配管２ａ，２ｂを構成する複数の配管はトレイ１の載置面に平行な面において交互に配置されるため、各配管と半導体ウエハ１０までの距離は等しく、さらに冷却配管２ａ，２ｂで冷却水の流れる方向が異なるため、トレイ１のどこに半導体ウエハ１０を載置しても均等に冷却することが可能で、ウエハ間の温度ムラを抑制することが出来る。   Since the plurality of pipes constituting the cooling pipes 2a and 2b are alternately arranged on a plane parallel to the mounting surface of the tray 1, the distances between the pipes and the semiconductor wafer 10 are equal, and the cooling pipes 2a and 2b are further cooled Since the direction of water flow is different, it is possible to cool the semiconductor wafer 10 wherever the semiconductor wafer 10 is placed on the tray 1 and to suppress temperature unevenness between the wafers.

また、トレイ１の両端部では冷却配管２ｂをトレイ１の裏面側にずらすことによって、互いに干渉することなくトレイ１の短手方向に冷却配管２ａ，２ｂを配設している。   Further, at both ends of the tray 1, the cooling pipes 2 a and 2 b are arranged in the short direction of the tray 1 without interfering with each other by shifting the cooling pipe 2 b toward the back side of the tray 1.

なお、本実施の形態の半導体ウエハ冷却装置に、実施の形態１で述べた真空配管３を適用すれば、ウエハ間の温度ムラの抑制とともにウエハ面内での温度ムラが小さくすることが出来る。   If the vacuum pipe 3 described in the first embodiment is applied to the semiconductor wafer cooling apparatus of the present embodiment, the temperature unevenness in the wafer surface can be reduced while suppressing the temperature unevenness between the wafers.

＜効果＞
本実施の形態の半導体ウエハ冷却装置は、半導体ウエハ１０を載置する載置面を有するトレイ１と、トレイ１内に配置され、載置面上に載置された半導体ウエハ１０を冷却する冷媒が互いに逆方向に流れる一対の冷却配管２ａ，２ｂとを備え、冷却配管２ａ，２ｂの夫々は複数の枝配管を並列接続した構成であり、一方の冷却配管２ａを構成する枝配管は前記載置面に平行な面内で他方の冷却配管２ｂを構成する枝配管と交互に配置される。これにより、トレイ１上の温度ムラが抑制されるためウエハ間やウエハ面内での温度ばらつきが減少する。 <Effect>
The semiconductor wafer cooling apparatus according to the present embodiment includes a tray 1 having a mounting surface on which the semiconductor wafer 10 is mounted, and a refrigerant that is disposed in the tray 1 and cools the semiconductor wafer 10 mounted on the mounting surface. Are provided with a pair of cooling pipes 2a and 2b that flow in opposite directions, and each of the cooling pipes 2a and 2b has a configuration in which a plurality of branch pipes are connected in parallel. They are arranged alternately with the branch pipes constituting the other cooling pipe 2b in a plane parallel to the mounting surface. As a result, temperature variations on the tray 1 are suppressed, so that temperature variations between wafers and within the wafer surface are reduced.

（実施の形態４）
図５は、実施の形態４の半導体ウエハ冷却装置の構成図である。図５（ａ）はトレイ１の平面図、図５（ｂ）は図５（ａ）のＢ−Ｂ断面図である。本実施の形態の半導体ウエハ冷却装置において、トレイ１にはその載置面に複数の半導体ウエハ１０が載置される。トレイ１の内部には冷却配管２が形成されており、冷却配管２を流れる例えば冷却水などの冷媒によって半導体ウエハ１０の冷却が行われる。冷却配管２は例えばトレイ１の両端間で折り返し状に配置（蛇行配置）された１本の冷却配管である。 (Embodiment 4)
FIG. 5 is a configuration diagram of the semiconductor wafer cooling apparatus according to the fourth embodiment. 5A is a plan view of the tray 1, and FIG. 5B is a cross-sectional view taken along the line BB in FIG. 5A. In the semiconductor wafer cooling apparatus of the present embodiment, a plurality of semiconductor wafers 10 are placed on the placement surface of the tray 1. A cooling pipe 2 is formed inside the tray 1, and the semiconductor wafer 10 is cooled by a coolant such as cooling water flowing through the cooling pipe 2. The cooling pipe 2 is, for example, one cooling pipe arranged in a folded shape (meandering arrangement) between both ends of the tray 1.

さらに、本実施の形態の半導体ウエハ冷却装置は、半導体ウエハ１０の外周部をトレイ１の載置面に対して押圧するクランプリング４を備えている。クランプリング４には様々な構成が考えられるが、例えば図５（ｂ）に示すクランプリング４は３本の脚が冷却配管２と干渉することなくトレイ１の内部に埋め込まれており、当該脚がモータ駆動によってトレイ１の載置面に対して垂直方向に移動することによって、クランプリング４が半導体ウエハ１０の外周部に当接、押圧する。   Furthermore, the semiconductor wafer cooling apparatus of the present embodiment includes a clamp ring 4 that presses the outer peripheral portion of the semiconductor wafer 10 against the mounting surface of the tray 1. Various configurations can be considered for the clamp ring 4. For example, the clamp ring 4 shown in FIG. 5B has three legs embedded in the tray 1 without interfering with the cooling pipe 2. Is moved in the direction perpendicular to the mounting surface of the tray 1 by driving the motor, so that the clamp ring 4 comes into contact with and presses the outer peripheral portion of the semiconductor wafer 10.

これにより半導体ウエハ１０とトレイ１の載置面との密着性が向上するため、半導体ウエハ１０は全面がムラなくトレイ１によって冷却され、ウエハ面内での温度ムラが小さくなるという効果を奏する。   As a result, the adhesion between the semiconductor wafer 10 and the mounting surface of the tray 1 is improved, so that the entire surface of the semiconductor wafer 10 is cooled by the tray 1 without unevenness, and the temperature unevenness within the wafer surface is reduced.

あるいは、図６に示すように、トレイ１と一体にネジ１ａを形成し、ローレットナット５を用いてクランプリング４を上からトレイ１の載置面に押さえつける構成にしても良い。このような場合はトレイ１に埋め込む構成部材を必要としないので、冷却配管２との干渉を考慮せずにクランプリング４を配置することが出来る。   Alternatively, as shown in FIG. 6, a screw 1 a may be formed integrally with the tray 1, and the clamp ring 4 may be pressed against the placement surface of the tray 1 from above using a knurled nut 5. In such a case, a component member to be embedded in the tray 1 is not required, so that the clamp ring 4 can be disposed without considering interference with the cooling pipe 2.

なお、本実施の形態の半導体ウエハ冷却装置に、実施の形態１〜３で述べた構成を適用することも可能である。   Note that the configurations described in the first to third embodiments can be applied to the semiconductor wafer cooling apparatus of the present embodiment.

＜効果＞
本実施の形態の半導体ウエハ冷却装置は、半導体ウエハ１０を載置する載置面を有するトレイ１と、トレイ１内に配置され、載置面上に載置された半導体ウエハ１０を冷却する冷媒が流れる冷却配管２と、載置面上に載置された半導体ウエハ１０の外周部に載置面の反対側から当接して半導体ウエハ１０を載置面に押圧するクランプリング４と、を備える。これにより半導体ウエハ１０とトレイ１の載置面との密着性が向上するため、半導体ウエハ１０は全面がムラなくトレイ１によって冷却され、ウエハ面内での温度ムラが小さくなるという効果を奏する。 <Effect>
The semiconductor wafer cooling apparatus according to the present embodiment includes a tray 1 having a mounting surface on which the semiconductor wafer 10 is mounted, and a refrigerant that is disposed in the tray 1 and cools the semiconductor wafer 10 mounted on the mounting surface. And a clamp ring 4 that contacts the outer periphery of the semiconductor wafer 10 placed on the placement surface from the opposite side of the placement surface and presses the semiconductor wafer 10 against the placement surface. . As a result, the adhesion between the semiconductor wafer 10 and the mounting surface of the tray 1 is improved, so that the entire surface of the semiconductor wafer 10 is cooled by the tray 1 without unevenness, and the temperature unevenness within the wafer surface is reduced.

（実施の形態５）
図７は実施の形態５の半導体ウエハ冷却装置の構成図である。図７（ａ）は半導体ウエハ冷却装置の平面図、図７（ｂ），（ｃ）は図７（ａ）のＣ−Ｃ断面図である。本実施の形態の半導体ウエハ冷却装置において、トレイ１にはその載置面に複数の半導体ウエハ１０（図１参照）が載置される。図７（ａ）に示すように本実施の形態の半導体ウエハ冷却装置ではトレイ１の内部が中空形状となっている。 (Embodiment 5)
FIG. 7 is a configuration diagram of the semiconductor wafer cooling apparatus according to the fifth embodiment. FIG. 7A is a plan view of the semiconductor wafer cooling apparatus, and FIGS. 7B and 7C are CC cross-sectional views of FIG. 7A. In the semiconductor wafer cooling apparatus of the present embodiment, a plurality of semiconductor wafers 10 (see FIG. 1) are placed on the placement surface of the tray 1. As shown in FIG. 7A, in the semiconductor wafer cooling apparatus of the present embodiment, the inside of the tray 1 has a hollow shape.

言い換えれば、トレイ１内には載置面に渡って面状の冷却配管６が設けられており、冷却配管６を流れる例えば冷却水などの冷媒によって半導体ウエハ１０の冷却が行われる。通常の冷却配管であれば、トレイ１において配管のある部分の真上と配管のない部分（配管間）の真上とに温度差が生じてしまうが、このように面状の冷却配管６を設けることによってトレイ１の全面がムラなく冷却され、ウエハ面内の温度差を抑制することが出来る。   In other words, a planar cooling pipe 6 is provided in the tray 1 across the mounting surface, and the semiconductor wafer 10 is cooled by a coolant such as cooling water flowing through the cooling pipe 6. In the case of normal cooling piping, a temperature difference occurs between the portion of the tray 1 where the piping is located and the portion where the piping is not located (between the piping). By providing, the entire surface of the tray 1 is cooled without unevenness, and the temperature difference in the wafer surface can be suppressed.

図７（ｂ）には、面状の冷却配管６を唯一つ設けた場合を例示しているが、図７（ｃ）に示すように、載置面に近い側の第一の冷却配管６ａと、第一の冷却配管６ａに対して載置面とは反対の側に設けた第二の冷却配管６ｂの二段構成にしても良い。冷却配管６ａ，６ｂにおいて冷媒流方向を反対向きにすることにより、冷却配管６ａ，６ｂの上流側と下流側の温度差が緩和され、ウエハ間の温度差を抑制することが出来る。   FIG. 7B illustrates a case where only one planar cooling pipe 6 is provided, but as shown in FIG. 7C, the first cooling pipe 6a on the side close to the mounting surface. In addition, a two-stage configuration of a second cooling pipe 6b provided on the side opposite to the mounting surface with respect to the first cooling pipe 6a may be used. By making the refrigerant flow directions opposite to each other in the cooling pipes 6a and 6b, the temperature difference between the upstream side and the downstream side of the cooling pipes 6a and 6b is alleviated, and the temperature difference between the wafers can be suppressed.

なお、後述する実施の形態６の冷媒流方向切替手段を図７（ｂ）の半導体ウエハ冷却装置に適用することにより、より一層ウエハ間の温度差を抑制することが出来る。   Note that the temperature difference between the wafers can be further suppressed by applying the refrigerant flow direction switching means of the sixth embodiment described later to the semiconductor wafer cooling apparatus of FIG. 7B.

＜変形例＞
図８は、本実施の形態の半導体ウエハ冷却装置の変形例の構成を示す平面図である。変形例では、冷却配管６に冷媒を導入する供給経路と、冷却配管６を通過した冷媒が外部に流出する流出経路をそれぞれ複数設ける。図８ではそれぞれ３つの経路を設けた場合を例示している。このように冷媒の供給経路と流出経路を複数に分岐することによって、冷却配管６内に冷媒が滞留することを防ぐ。 <Modification>
FIG. 8 is a plan view showing a configuration of a modified example of the semiconductor wafer cooling apparatus of the present embodiment. In the modification, a plurality of supply paths for introducing the refrigerant into the cooling pipe 6 and a plurality of outflow paths through which the refrigerant that has passed through the cooling pipe 6 flows out are provided. FIG. 8 illustrates a case where three paths are provided. In this way, the refrigerant supply path and the outflow path are branched into a plurality of parts, thereby preventing the refrigerant from staying in the cooling pipe 6.

＜効果＞
本実施の形態の半導体ウエハ冷却装置は、半導体ウエハ１０を載置する載置面を有するトレイ１と、トレイ１内に載置面に渡って面状に設けられ、載置面上に載置された半導体ウエハ１０を冷却する冷媒が流れる冷却配管６とを備えるため、トレイ１の全面がムラなく冷却され、ウエハ面内の温度差を抑制することが出来る。 <Effect>
The semiconductor wafer cooling device of the present embodiment is provided with a tray 1 having a mounting surface on which a semiconductor wafer 10 is mounted, and is provided in a planar shape across the mounting surface in the tray 1 and mounted on the mounting surface. Since the cooling pipe 6 through which the cooling medium for cooling the semiconductor wafer 10 flows is provided, the entire surface of the tray 1 is cooled evenly, and the temperature difference within the wafer surface can be suppressed.

また、冷却配管２は載置面側に設けられた第一の冷却配管６ａと、第一の冷却配管６aに対し載置面とは反対の側に設けられた第二の冷却配管６ｂとを備えることとし、第一、第二の冷却配管６ａ，６ｂ内を冷媒が互いに逆方向に流れるようにすれば、冷却配管６ａ，６ｂの上流側と下流側の温度差が緩和され、ウエハ間の温度差を抑制することが出来る。   The cooling pipe 2 includes a first cooling pipe 6a provided on the mounting surface side, and a second cooling pipe 6b provided on the opposite side of the mounting surface with respect to the first cooling pipe 6a. If the refrigerant flows through the first and second cooling pipes 6a and 6b in opposite directions, the temperature difference between the upstream side and the downstream side of the cooling pipes 6a and 6b is alleviated, so The temperature difference can be suppressed.

さらに、冷媒を冷却配管６に導入する複数の供給経路と、冷媒を冷却配管６から外部に流出させる複数の流出経路とを備えることにより、冷媒が冷却配管６内に滞留することを防ぐ。   Furthermore, by providing a plurality of supply paths for introducing the refrigerant into the cooling pipe 6 and a plurality of outflow paths for allowing the refrigerant to flow out of the cooling pipe 6, the refrigerant is prevented from staying in the cooling pipe 6.

（実施の形態６）
図９は、本実施の形態の半導体ウエハ冷却装置の構成図である。本実施の形態の半導体ウエハ冷却装置において、トレイ１にはその載置面に複数の半導体ウエハ１０が載置される。トレイ１の内部には冷却配管２が形成されており、冷却配管２を流れる例えば冷却水などの冷媒によって半導体ウエハ１０の冷却が行われる。例えば、冷却配管２は図９に示すようにトレイ１の両端間で折り返し状に配置（蛇行配置）された１本の冷却配管である。 (Embodiment 6)
FIG. 9 is a configuration diagram of the semiconductor wafer cooling apparatus of the present embodiment. In the semiconductor wafer cooling apparatus of the present embodiment, a plurality of semiconductor wafers 10 are placed on the placement surface of the tray 1. A cooling pipe 2 is formed inside the tray 1, and the semiconductor wafer 10 is cooled by a coolant such as cooling water flowing through the cooling pipe 2. For example, the cooling pipe 2 is a single cooling pipe arranged in a folded shape (meandering arrangement) between both ends of the tray 1 as shown in FIG.

さらに、本実施の形態では冷却配管２内における冷媒の流れる方向を切り替える冷媒流方向切替手段を備える。図９には冷媒流方向切替手段の一例を示しているが、冷却配管２の供給経路と流出経路が連結配管９ａで連結され、連結配管９ａの上流側で供給経路と流出経路が連結配管９ｂで連結される。連結配管９ａ，９ｂには配管バルブ８ｂ、８ａが夫々設けられ、供給経路と流出経路の夫々において連結配管９ａ，９ｂの間に配管バルブ７ａ、７ｂが夫々設けられている。以上が冷媒流方向切替手段の構成である。   Furthermore, in this Embodiment, the refrigerant | coolant flow direction switching means which switches the direction through which the refrigerant | coolant flows in the cooling pipe 2 is provided. FIG. 9 shows an example of the refrigerant flow direction switching means. The supply path and the outflow path of the cooling pipe 2 are connected by a connecting pipe 9a, and the supply path and the outflow path are connected to the connecting pipe 9b on the upstream side of the connecting pipe 9a. Connected with Pipe valves 8b and 8a are provided in the connecting pipes 9a and 9b, respectively, and pipe valves 7a and 7b are provided between the connecting pipes 9a and 9b in the supply path and the outflow path, respectively. The above is the configuration of the refrigerant flow direction switching means.

配管バルブ７ａ、７ｂを開けて配管バルブ８ａ、８ｂを閉めると図の実線矢印の方向に冷媒が流れ、配管バルブ７ａ、７ｂを閉めて配管バルブ８ａ，８ｂを開けると図の点線矢印の方向に冷媒が流れる。このように適宜冷媒流方向を切り替えることによって、冷媒流の上流側と下流側で生じる温度差を緩和することが可能である。これによりウエハ間の温度差を抑制可能である。   When the piping valves 7a and 7b are opened and the piping valves 8a and 8b are closed, the refrigerant flows in the direction of the solid line arrow in the figure, and when the piping valves 7a and 7b are closed and the piping valves 8a and 8b are opened, the direction of the dotted line arrow in the figure The refrigerant flows. Thus, by appropriately switching the refrigerant flow direction, it is possible to reduce the temperature difference that occurs between the upstream side and the downstream side of the refrigerant flow. Thereby, the temperature difference between wafers can be suppressed.

なお、本実施の形態の冷媒流方向切替手段は、実施の形態１，２，４，５の半導体ウエハ冷却装置に適用することが可能で、ウエハ間の温度差を抑制する効果を奏する。   The refrigerant flow direction switching means of the present embodiment can be applied to the semiconductor wafer cooling apparatus of the first, second, fourth, and fifth embodiments, and has an effect of suppressing the temperature difference between the wafers.

＜効果＞
本実施の形態の半導体ウエハ冷却装置は、半導体ウエハを載置する載置面を有するトレイ１と、トレイ１内に配置され、載置面上に載置された半導体ウエハ１０を冷却する冷媒が流れる冷却配管２と、冷却配管２内における冷媒の流れる方向を切り替える冷媒流方向切替手段とを備える。これにより、冷媒流の上流側と下流側で生じる温度差を緩和し、ウエハ間の温度差を抑制することが出来る。 <Effect>
The semiconductor wafer cooling apparatus according to the present embodiment includes a tray 1 having a placement surface on which a semiconductor wafer is placed, and a coolant that cools the semiconductor wafer 10 placed in the tray 1 and placed on the placement surface. The cooling pipe 2 which flows and the refrigerant | coolant flow direction switching means which switches the direction through which the refrigerant | coolant flows in the cooling pipe 2 are provided. Thereby, the temperature difference produced between the upstream side and the downstream side of the refrigerant flow can be relaxed, and the temperature difference between the wafers can be suppressed.

（その他）
以上、本発明を種々の実施例について説明したが、これらの実施例を適宜に組み合わせて本発明を実施することが可能である。 (Other)
While the present invention has been described with respect to various embodiments, it is possible to implement the present invention by appropriately combining these embodiments.

１ トレイ、１ａ ネジ ２，２ａ，２ｂ，６，６ａ，６ｂ 冷却配管、３ 真空配管、４ クランプリング、５ ローレットナット、７ａ，７ｂ，８ａ，８ｂ 配管バルブ、９ａ，９ｂ 連結配管、１０ 半導体ウエハ。   1 Tray, 1a Screw 2, 2a, 2b, 6, 6a, 6b Cooling piping, 3 Vacuum piping, 4 Clamp ring, 5 Knurl nut, 7a, 7b, 8a, 8b Piping valve, 9a, 9b Connecting piping, 10 Semiconductor wafer .

Claims (6)

半導体ウエハを載置する載置面を有するトレイと、
前記トレイ内に配置され、前記載置面上に載置された前記半導体ウエハを冷却する冷媒が流れる冷却配管と、
前記載置面に開口を有して前記トレイに設けられ、前記載置面上に載置された前記半導体ウエハを吸着する真空配管と、を備え、
前記冷却配管は前記冷媒が互いに逆方向に流れる一対の冷却配管であり、
前記冷却配管の夫々は複数の枝配管を並列接続した構成であり、
一方の前記冷却配管を構成する枝配管は前記載置面に平行な面内で他方の前記冷却配管を構成する枝配管と交互に配置される、
半導体ウエハ冷却装置。 A tray having a mounting surface for mounting a semiconductor wafer;
A cooling pipe arranged in the tray and through which a coolant for cooling the semiconductor wafer placed on the placement surface flows;
Provided in the tray has an opening on the mounting surface, and a vacuum pipe for sucking the semiconductor wafer mounted on the mounting surface,
The cooling pipe is a pair of cooling pipes in which the refrigerant flows in opposite directions,
Each of the cooling pipes has a configuration in which a plurality of branch pipes are connected in parallel.
The branch pipes constituting one of the cooling pipes are alternately arranged with the branch pipes constituting the other cooling pipe in a plane parallel to the placement surface.
Semiconductor wafer cooling device. 半導体ウエハを載置する載置面を有するトレイと、A tray having a mounting surface for mounting a semiconductor wafer;
前記トレイ内に配置され、前記載置面上に載置された前記半導体ウエハを冷却する冷媒が互いに逆方向に流れる一対の冷却配管とを備え、A pair of cooling pipes arranged in the tray and having coolants for cooling the semiconductor wafer placed on the placement surface flowing in opposite directions;
前記冷却配管の夫々は複数の枝配管を並列接続した構成であり、Each of the cooling pipes has a configuration in which a plurality of branch pipes are connected in parallel.
一方の前記冷却配管を構成する枝配管は前記載置面に平行な面内で他方の前記冷却配管を構成する枝配管と交互に配置される半導体ウエハ冷却装置。The semiconductor wafer cooling apparatus in which the branch pipes constituting one of the cooling pipes are alternately arranged with the branch pipes constituting the other cooling pipe in a plane parallel to the mounting surface. 前記載置面上に載置された前記半導体ウエハの外周部に前記載置面の反対側から当接して前記半導体ウエハを前記載置面に押圧するクランプリングをさらに備える、請求項１又は２に記載の半導体ウエハ冷却装置。The clamp ring which contacts the outer peripheral part of the said semiconductor wafer mounted on the said mounting surface from the other side of the said mounting surface, and presses the said semiconductor wafer to the said mounting surface is further provided. The semiconductor wafer cooling device described in 1. 半導体ウエハを載置する載置面を有するトレイと、
前記トレイ内に前記載置面に渡って面状に設けられ、前記載置面上に載置された前記半導体ウエハを冷却する冷媒が流れる冷却配管と、を備え、
前記冷却配管は、
前記載置面側に設けられた第一の冷却配管と、
前記第一の冷却配管に対し前記載置面とは反対の側に設けられた第二の冷却配管とを備え、
前記第一、第二の冷却配管内を前記冷媒が互いに逆方向に流れる、
半導体ウエハ冷却装置。 A tray having a mounting surface for mounting a semiconductor wafer;
A cooling pipe that is provided in a planar shape across the placement surface in the tray and through which a coolant that cools the semiconductor wafer placed on the placement surface flows;
The cooling pipe is
A first cooling pipe provided on the mounting surface side, and
A second cooling pipe provided on the opposite side of the mounting surface with respect to the first cooling pipe,
The refrigerant flows in opposite directions in the first and second cooling pipes,
Semiconductor wafer cooling device. 前記冷媒を前記冷却配管に導入する複数の供給経路と、A plurality of supply paths for introducing the refrigerant into the cooling pipe;
前記冷媒を前記冷却配管から外部に流出させる複数の流出経路とをさらに備える請求項４に記載の半導体ウエハ冷却装置。The semiconductor wafer cooling device according to claim 4, further comprising a plurality of outflow paths through which the refrigerant flows out of the cooling pipe. 前記冷却配管内における冷媒の流れる方向を切り替える冷媒流方向切替手段をさらに備える、請求項４又は５に記載の半導体ウエハ冷却装置。The semiconductor wafer cooling device according to claim 4, further comprising a refrigerant flow direction switching unit that switches a flow direction of the refrigerant in the cooling pipe.
JP2010182728A 2010-08-18 2010-08-18 Semiconductor wafer cooling system Active JP5535003B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2010182728A JP5535003B2 (en) 2010-08-18 2010-08-18 Semiconductor wafer cooling system
CN201410488398.8A CN104362113A (en) 2010-08-18 2011-06-30 Semiconductor wafer cooling apparatus
CN2011101809113A CN102376527A (en) 2010-08-18 2011-06-30 Semiconductor Wafer Cooling Device
DE102011079806.4A DE102011079806B4 (en) 2010-08-18 2011-07-26 semiconductor wafer cooling device
KR1020110078919A KR101294114B1 (en) 2010-08-18 2011-08-09 Semiconductor wafer cooling apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010182728A JP5535003B2 (en) 2010-08-18 2010-08-18 Semiconductor wafer cooling system

Publications (2)

Publication Number Publication Date
JP2012043916A JP2012043916A (en) 2012-03-01
JP5535003B2 true JP5535003B2 (en) 2014-07-02

Family

ID=45557470

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010182728A Active JP5535003B2 (en) 2010-08-18 2010-08-18 Semiconductor wafer cooling system

Country Status (4)

Country Link
JP (1) JP5535003B2 (en)
KR (1) KR101294114B1 (en)
CN (2) CN104362113A (en)
DE (1) DE102011079806B4 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018125461A (en) * 2017-02-02 2018-08-09 東京エレクトロン株式会社 Workpiece processing device
JP7330017B2 (en) * 2019-08-22 2023-08-21 東京エレクトロン株式会社 HEAT MEDIUM CIRCUIT SYSTEM AND HEAT MEDIUM CIRCUIT SYSTEM CONTROL METHOD
CN112917108B (en) * 2021-03-15 2022-05-27 宁波江丰电子材料股份有限公司 Cooling disc body and processing method and application thereof

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0287630A4 (en) 1986-10-08 1989-07-25 Varian Associates Method and apparatus for constant angle of incidence scanning in ion beam systems.
KR960006958B1 (en) * 1993-02-06 1996-05-25 현대전자산업주식회사 Low temperature electrode structure of ecr etching apparatus
DE19600401A1 (en) 1996-01-08 1997-07-17 Siemens Ag Surface-mounted semiconductor device
WO1998005060A1 (en) * 1996-07-31 1998-02-05 The Board Of Trustees Of The Leland Stanford Junior University Multizone bake/chill thermal cycling module
JPH10312764A (en) * 1997-05-10 1998-11-24 Nissin High Voltage Co Ltd Device for transporting object to be treated with electron beam radiation
JP2000092815A (en) * 1998-09-10 2000-03-31 Canon Inc Stage device and aligner using the same
JP4432139B2 (en) * 1999-01-25 2010-03-17 株式会社ニコン Stage apparatus and exposure apparatus
JP4418051B2 (en) * 1999-06-16 2010-02-17 平田機工株式会社 Heat treatment equipment
JP2002075889A (en) * 2000-09-01 2002-03-15 Tokyo Electron Ltd Heat treatment system
KR100741896B1 (en) * 2000-10-18 2007-07-23 엘지.필립스 엘시디 주식회사 Fabrication Method for Liquid Crystal Display Panel
JP2002372351A (en) * 2001-06-14 2002-12-26 Ibiden Co Ltd Supporting container and semiconductor manufacturing/ inspecting equipment
KR20050068778A (en) * 2003-12-30 2005-07-05 동부아남반도체 주식회사 Cooling device for semiconductor wafer
KR100730381B1 (en) 2005-12-06 2007-06-19 (주)대하이노텍 electrostatic chuck of Semiconductor wafer and liquid crystal module
KR20070102918A (en) * 2006-10-16 2007-10-22 삼성전자주식회사 Temperature controllable wafer chuck apparatus and method of controlling temperature of the wafer chuck using the same
US7528392B2 (en) * 2006-11-27 2009-05-05 Varian Semiconductor Equipment Associates, Inc. Techniques for low-temperature ion implantation
JP4965287B2 (en) * 2007-03-14 2012-07-04 東京エレクトロン株式会社 Mounting table
KR100854974B1 (en) * 2007-04-25 2008-08-28 (주)리드 Substrate carrier and apparatus for manufacturing of light emitting diode
JP5121322B2 (en) * 2007-06-15 2013-01-16 株式会社東京精密 Prober and prober wafer chuck temperature control method
DE102008037387A1 (en) * 2008-09-24 2010-03-25 Aixtron Ag Method and device for depositing laterally structured layers by means of a shadow mask held magnetically on a substrate holder
JP2010098010A (en) * 2008-10-14 2010-04-30 Ulvac Japan Ltd Etching equipment and etching method

Also Published As

Publication number Publication date
CN102376527A (en) 2012-03-14
KR20120022619A (en) 2012-03-12
KR101294114B1 (en) 2013-08-08
JP2012043916A (en) 2012-03-01
CN104362113A (en) 2015-02-18
DE102011079806A1 (en) 2012-02-23
DE102011079806B4 (en) 2022-01-13

Similar Documents

Publication Publication Date Title
CN109791919B (en) Fluid delivery apparatus and method for cooling integrated circuit packages
JP5253430B2 (en) Power module
US9997432B2 (en) Semiconductor device and electronic component using the same
JP5535003B2 (en) Semiconductor wafer cooling system
CN102089875A (en) Bipolar electrostatic chuck
JP2009295878A (en) Heat exchange device
JP2013016794A (en) Cooling device for power module, and related method thereof
JP2014112587A (en) Thermoelectric module
CN108987359B (en) Heat sink and heat sink assembly
US20130306292A1 (en) Apparatus for the compact cooling of modules
KR102534505B1 (en) thermostat
JP2014063870A (en) Semiconductor cooling device
JP2011159663A (en) Semiconductor device
JP2011066341A (en) Method for manufacturing semiconductor device
JP2015126207A (en) Semiconductor device
KR20160127051A (en) Improved disc-shaped thyristor for a plurality of plated-through semiconductor components
JP2015218388A (en) Mask holder unit for film deposition
US11935767B2 (en) Temperature control device
JP2021097191A (en) Radiator
JP5437910B2 (en) Temperature control device
JP5871050B2 (en) Semiconductor device
JP2014093280A (en) Cooling structure of battery pack
KR102460816B1 (en) Conductive foil-based metallization of solar cells
CN106024891B (en) Semiconductor devices and integrated circuit including secondary trenches structure
JP2023140076A (en) Cooling device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20130121

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20131022

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20131217

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20140325

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20140422

R150 Certificate of patent or registration of utility model

Ref document number: 5535003

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250