JP5531983B2 - Method for manufacturing group III-V nitride semiconductor substrate - Google Patents

Method for manufacturing group III-V nitride semiconductor substrate Download PDF

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JP5531983B2
JP5531983B2 JP2011037613A JP2011037613A JP5531983B2 JP 5531983 B2 JP5531983 B2 JP 5531983B2 JP 2011037613 A JP2011037613 A JP 2011037613A JP 2011037613 A JP2011037613 A JP 2011037613A JP 5531983 B2 JP5531983 B2 JP 5531983B2
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真佐知 柴田
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本発明は、低転位密度を有するとともに表面におけるキャリア濃度分布が実質的に均一なIII−V族窒化物系半導体基板の製造方法に関する。 The present invention relates to a method for producing a group III-V nitride semiconductor substrate having a low dislocation density and a substantially uniform carrier concentration distribution on the surface.

窒化物半導体材料は禁制帯幅が充分大きく、バンド間遷移も直接遷移型であるため、短波長発光素子への適用が盛んに検討されている。また電子の飽和ドリフト速度が大きいこと、ヘテロ接合による2次元キャリアガスの利用が可能なこと等から、電子素子への応用も期待されている。   Nitride semiconductor materials have a sufficiently large forbidden band width and a direct transition type between band transitions. Therefore, application to short-wavelength light emitting devices has been actively studied. In addition, application to electronic devices is also expected due to the high saturation drift velocity of electrons and the use of two-dimensional carrier gas by heterojunction.

これらの素子を構成する窒化物半導体層は、有機金属気相成長法(MOVPE)、分子線気相成長法(MBE)、ハイドライド気相成長法(HVPE)等の気相成長法を用いて下地基板上にエピタキシャル成長を行うことにより得られる。ところが、窒化物半導体層と格子定数が整合する下地基板が存在しないため、良質の成長層を得ることが困難であり、得られる窒化物半導体層中には多くの結晶欠陥が含まれていた。結晶欠陥は素子特性の向上を阻害する要因であるので、これまで窒化物半導体層中の結晶欠陥を低減する検討が盛んに行われてきた。   The nitride semiconductor layer constituting these elements is formed by using a vapor phase growth method such as metal organic chemical vapor deposition (MOVPE), molecular beam vapor phase epitaxy (MBE), or hydride vapor phase epitaxy (HVPE). It is obtained by performing epitaxial growth on the substrate. However, since there is no underlying substrate having a lattice constant matching that of the nitride semiconductor layer, it is difficult to obtain a high-quality growth layer, and the obtained nitride semiconductor layer contains many crystal defects. Since crystal defects are a factor that hinders improvement in device characteristics, studies to reduce crystal defects in nitride semiconductor layers have been actively conducted so far.

結晶欠陥が比較的少ないIII族元素窒化物系結晶を得る方法として、サファイア等の異種基板上に低温堆積緩衝層(バッファ層)を形成し、その上にエピタキシャル成長層を形成する方法が知られている。低温堆積緩衝層を用いた結晶成長法では、まずサファイア等の基板上にAlN又はGaNを500℃付近で堆積し、アモルファス状の膜ないし一部多結晶を含む連続膜を形成する。これを1000℃付近に昇温することにより一部を蒸発させ、又は結晶化させて、密度の高い結晶核を形成する。これを成長の核として比較的結晶性のよいGaN膜が得られる。しかしながら、低温堆積緩衝層を形成する方法を用いても、得られる基板には貫通転位や空孔等の結晶欠陥が相当程度存在し、現在望まれている高性能の素子を得るには不充分であった。   As a method for obtaining a group III element nitride-based crystal with relatively few crystal defects, a method of forming a low temperature deposition buffer layer (buffer layer) on a dissimilar substrate such as sapphire and forming an epitaxial growth layer thereon is known. Yes. In the crystal growth method using a low-temperature deposition buffer layer, AlN or GaN is first deposited on a substrate such as sapphire at around 500 ° C. to form an amorphous film or a continuous film partially including polycrystal. By raising the temperature to around 1000 ° C., a part thereof is evaporated or crystallized to form high-density crystal nuclei. Using this as a growth nucleus, a GaN film with relatively good crystallinity can be obtained. However, even if a method for forming a low temperature deposition buffer layer is used, crystal defects such as threading dislocations and vacancies are present in the obtained substrate, which is insufficient to obtain a high-performance device that is currently desired. Met.

以上の事情に鑑み、結晶成長用の基板としてGaN基板を用い、この上に素子部を構成する半導体多層膜を形成する方法が盛んに検討されている。本明細書では、結晶成長用のGaN基板を自立したGaN基板(GaN自立基板)と呼ぶ。GaN自立基板を得る方法として、ELO(Epitaxial Lateral Overgrowth)技術が知られている。ELO法は、下地基板に開口部を有するマスクを形成し、開口部からラテラル成長させることにより転位の少ないGaN層を得る技術である。特開平11-251253号は、このELO法を用いてサファイア基板上にGaN層を形成した後、サファイア基板をエッチング等により除去し、GaN自立基板を得ることを提案している。   In view of the above circumstances, a method of using a GaN substrate as a crystal growth substrate and forming a semiconductor multilayer film constituting an element portion thereon has been actively studied. In this specification, a GaN substrate for crystal growth is referred to as a self-standing GaN substrate (GaN free-standing substrate). An ELO (Epitaxial Lateral Overgrowth) technique is known as a method for obtaining a GaN free-standing substrate. The ELO method is a technique for obtaining a GaN layer with few dislocations by forming a mask having an opening on a base substrate and laterally growing from the opening. JP-A-11-251253 proposes that after forming a GaN layer on a sapphire substrate using this ELO method, the sapphire substrate is removed by etching or the like to obtain a GaN free-standing substrate.

ELO法をさらに発展させた方法として、FIELO(Facet-Initiated Epitaxial Lateral Overgrowth)法(A. Usui, et al., Jpn. J. Appl. Phys. Vol. 36 (1997) pp. L.899-L.902)が開発された。FIELO法は、酸化シリコンマスクを用いて選択成長を行う点でELO法と共通するが、選択成長の際にマスク開口部にファセットを形成する点で相違している。ファセットを形成することにより、転位の伝搬方向を変え、エピタキシャル成長層の上面に至る貫通転位を低減する。FIELO法を用いて、例えばサファイア等の下地基板上に厚膜のGaN層を成長させ、その後下地基板を除去すれば、結晶欠陥の比較的少ない良質のGaN自立基板を得ることができる。   The FELO (Facet-Initiated Epitaxial Lateral Overgrowth) method (A. Usui, et al., Jpn. J. Appl. Phys. Vol. 36 (1997) pp. L.899-L .902) was developed. The FIELO method is common to the ELO method in that selective growth is performed using a silicon oxide mask, but differs in that facets are formed in the mask opening during selective growth. By forming facets, the propagation direction of dislocations is changed, and threading dislocations reaching the upper surface of the epitaxial growth layer are reduced. If a thick GaN layer is grown on a base substrate such as sapphire using the FIELO method, and then the base substrate is removed, a high-quality GaN free-standing substrate with relatively few crystal defects can be obtained.

低転位のGaN自立基板を得る方法として、DEEP(Dislocation Elimination by the Epi-growth with Inverted-Pyramidal Pits)法が開発された(K. Motoki et. al., Jpn. J. Appl. Phys. Vol.40、特開2003-165799号)。DEEP法は、GaAs基板上にパターニングした窒化珪素等のマスクを用いてGaNを成長させることにより、結晶表面に意図的にファセット面で囲まれたピットを複数形成し、前記ピットの底部に転位を集積させることにより、その他の領域を低転位化するものである。   A DEEP (Dislocation Elimination by the Epi-growth with Inverted-Pyramidal Pits) method has been developed as a method for obtaining a low-dislocation GaN free-standing substrate (K. Motoki et. Al., Jpn. J. Appl. Phys. Vol. 40, Japanese Patent Laid-Open No. 2003-165799). In the DEEP method, GaN is grown using a mask made of silicon nitride or the like patterned on a GaAs substrate to form a plurality of pits intentionally surrounded by facet surfaces on the crystal surface, and dislocations are formed at the bottom of the pits. By accumulating, other regions are lowered in dislocation.

ELO法やDEEP法で得られたGaN基板は、通常アズグロウンの状態では、その表面にピットやヒロック等のモフォロジが現れており、そのままではデバイス作製のためのエピタキシャル層を成長させることが難しい。このため、基板表面を研磨加工して鏡面に仕上げてから、デバイス作製に使用するのが一般的である。   A GaN substrate obtained by ELO or DEEP usually has morphology such as pits and hillocks on its surface in an as-grown state, and it is difficult to grow an epitaxial layer for device fabrication. For this reason, the substrate surface is generally polished to a mirror finish and then used for device fabrication.

このような状況下において、特開2003-178984号(特許文献1)は、転位密度の低いIII族窒化物系半導体基板の製造方法として、基材上に第一のIII族窒化物系半導体層が設けられた下地基板または第一のIII族窒化物系半導体からなる下地基板上に金属膜を形成し、水素ガスまたは水素含有化合物ガスを含む雰囲気中で前記下地基板を熱処理して前記第一のIII族窒化物系半導体層中に空隙を形成し、前記金属膜の上に第二のIII族窒化物系半導体層を形成する方法を提案した。特許文献1の実施例14及び図16には、断面の蛍光顕微鏡像において、黒い帯状のスジが消滅し、サファイア基板との剥離面の近傍にほぼ均一な状態で黒い影が観測されるGaN自立基板が記載されている。この現象について、特許文献1は、キャリアガス中の水素混合量を増やしたことにより、欠陥が表面まで引き継がれるのが抑制されたと記載している。   Under such circumstances, Japanese Patent Laid-Open No. 2003-178984 (Patent Document 1) discloses a first group III nitride semiconductor layer on a base material as a method for producing a group III nitride semiconductor substrate having a low dislocation density. A metal film is formed on the base substrate or the base substrate made of the first group III nitride semiconductor, and the base substrate is heat-treated in an atmosphere containing hydrogen gas or a hydrogen-containing compound gas. A method has been proposed in which voids are formed in the group III nitride semiconductor layer and a second group III nitride semiconductor layer is formed on the metal film. In Example 14 and FIG. 16 of Patent Document 1, in the fluorescent microscope image of the cross section, the black band-like streak disappears, and a black shadow is observed in a substantially uniform state in the vicinity of the separation surface from the sapphire substrate. A substrate is described. Regarding this phenomenon, Patent Document 1 describes that the defect is suppressed from being taken over to the surface by increasing the amount of hydrogen mixed in the carrier gas.

特開2003-178984号公報Japanese Patent Laid-Open No. 2003-178984

このような方法で作製したGaN自立基板は転位密度が低減されているものの、基板表面におけるキャリア濃度にばらつきがあることが分かった。そもそも基板面内でのキャリア濃度分布は、SiやGaAsといった従来から用いられている半導体基板では、その製造方法からしてあり得ない問題であったが、GaN自立基板では、厚くエピタキシャル成長した結晶を基板として用いるので、基板中に局所的にキャリア濃度の不均一な領域が存在し得る。GaN自立基板の低転位化を狙って成長界面にファセットを出しながら結晶成長を行うと、どうしてもファセット面とその他の面では結晶成長速度に差が生じるので、両者の間で不純物の実効的な偏析係数に差が生じ、不純物の分布、即ちキャリア濃度にばらつきが生じてしまう。キャリア濃度の異なる領域は、ファセット成長した領域の履歴として現れるので、結晶成長方向に延びた形で分布する。キャリア濃度の異なる領域が基板表面まで到達すれば、必然的に基板表面にキャリア濃度のばらつきが生じてしまう。   Although the GaN free-standing substrate produced by such a method has a reduced dislocation density, it has been found that the carrier concentration on the substrate surface varies. In the first place, the carrier concentration distribution in the surface of the substrate was a problem that could not be achieved by the manufacturing method of a conventional semiconductor substrate such as Si or GaAs. Since it is used as a substrate, a region having a nonuniform carrier concentration may locally exist in the substrate. If crystal growth is performed while faceting the growth interface with the aim of lowering the dislocation of the GaN free-standing substrate, there will be a difference in the crystal growth rate between the facet and other surfaces, so effective segregation of impurities between the two A difference occurs in the coefficient, and the impurity distribution, that is, the carrier concentration varies. The regions having different carrier concentrations appear as a history of the facet grown region, and are distributed in a form extending in the crystal growth direction. If regions with different carrier concentrations reach the substrate surface, inevitably variations in carrier concentration occur on the substrate surface.

GaN基板の表面にキャリア濃度の不均一な領域が存在していると、その上に成長したGaNエピタキシャル層に表面凹凸が生じやすくなることが分かった。すなわち、下地となるGaN基板が鏡面研磨されていても、エピタキシャル層の表面が荒れるという現象が起こることが分かった。表面モフォロジの均一なGaNエピタキシャル層でないと、その上にデバイスを形成したときに特性の劣化やばらつき等の原因となる。   It has been found that if a region with a non-uniform carrier concentration exists on the surface of the GaN substrate, surface irregularities are likely to occur in the GaN epitaxial layer grown thereon. In other words, it has been found that even when the underlying GaN substrate is mirror-polished, the epitaxial layer surface becomes rough. If a GaN epitaxial layer having a uniform surface morphology is not formed, it may cause deterioration or dispersion of characteristics when a device is formed thereon.

結晶成長界面にファセット面で囲まれたピットを出しながら結晶を成長させると、ピットの底部に転位が集積する。集積した転位は全て合体するわけではなく、モヤモヤと広がった高転位領域を形成する。転位がモヤモヤと集まった領域には、不純物の拡散によりキャリア濃度が局所的に不均一な領域が形成されると考えられる。   When a crystal is grown while a pit surrounded by a facet surface is formed at the crystal growth interface, dislocations accumulate at the bottom of the pit. Not all the accumulated dislocations are united, but forms a high dislocation region that spreads out. In the region where dislocations are gathered, it is considered that a region where the carrier concentration is locally non-uniform is formed by impurity diffusion.

ピットの底部に集積する転位の数を少なく抑えたGaN結晶でも、その表面にキャリア濃度の不均一分布が生じることがある。そうしたGaN結晶基板上にGaNエピタキシャル層を成長させると、表面に凹凸のモフォロジが現れる。表面凹凸の度合いは、転位が多く集積した領域を有するGaN基板と比較して大差ない。このことから、エピタキシャル表面に現れる凹凸は、転位密度ではなく、キャリア濃度の局所的な分布に起因していると考えられる。   Even in a GaN crystal in which the number of dislocations accumulated at the bottom of the pits is reduced, a non-uniform distribution of carrier concentration may occur on the surface. When a GaN epitaxial layer is grown on such a GaN crystal substrate, an uneven morphology appears on the surface. The degree of surface irregularity is not much different from that of a GaN substrate having a region where many dislocations are accumulated. From this, it is considered that the unevenness appearing on the epitaxial surface is caused by local distribution of carrier concentration, not dislocation density.

特許文献1のようにキャリアガス中の水素混合量を増やしたり、結晶成長の途中で結晶成長条件を変える等の手段によりファセット成長を終息させたりすると、結晶成長界面が平坦化し、表面のキャリア濃度分布が均一化する可能性がある。しかし、基板表面のキャリア濃度分布をほぼ均一に制御するという技術的思想は従来全くなかったため、基板表面の研磨によりキャリア濃度分布の均一な領域を削り取ってしまい、その結果、鏡面仕上げした基板表面では、キャリア濃度が大きくばらついているということが往々にして起こる。キャリア濃度分布の均一な表面層がどの程度の厚さで必要かという点について、従来全く検討がされていなかったので、せっかくキャリア濃度分布の均一な表面層を有するGaN基板が作製されたとしても、鏡面仕上げ加工により表面層がほとんど失われるか、薄くなり過ぎてしまうことが多い。このように、低転位でかつ表面におけるキャリア濃度のばらつきが小さく、その上に形成するデバイスに欠陥が生じないようなGaN基板を安定的に作製することはできなかった。   If the amount of hydrogen mixed in the carrier gas is increased as in Patent Document 1 or facet growth is terminated by means such as changing the crystal growth conditions during crystal growth, the crystal growth interface is flattened, and the surface carrier concentration Distribution may be uniform. However, since there has never been a technical idea to control the carrier concentration distribution on the substrate surface almost uniformly, the region of the carrier concentration distribution is scraped off by polishing the substrate surface. Often, carrier concentrations vary widely. The thickness of the surface layer with a uniform carrier concentration distribution has not been studied at all so far, so even if a GaN substrate having a surface layer with a uniform carrier concentration distribution is prepared. In many cases, the surface layer is almost lost or becomes too thin by mirror finishing. As described above, it has been impossible to stably produce a GaN substrate that has low dislocations and a small variation in carrier concentration on the surface and does not cause defects in devices formed thereon.

従って、本発明の目的は、低転位密度であるとともに、キャリア濃度のばらつきが小さい表面層を十分な厚さで有するIII−V族窒化物系半導体の自立基板の製造方法を提供することである。 Accordingly, an object of the present invention is to provide a method for producing a free-standing substrate of a III-V nitride semiconductor having a sufficient thickness of a surface layer having a low dislocation density and a small variation in carrier concentration. .

上記目的に鑑み鋭意研究の結果、本発明者は、(a) III−V族窒化物系半導体基板上に、特性の揃った発光素子を歩留まり良く形成するためには、転位密度が均一に低減されているだけでなく、キャリア濃度の面内均一性が良いことが重要であり、(b) III−V族窒化物系半導体基板の表面近傍(少なくとも深さ100μmまでの領域)におけるキャリア濃度分布が実質的に均一であれば、その上に成長させるGaN系エピタキシャル層の表面モフォロジや特性の均一性が阻害されることがないこと、逆に(c) キャリア濃度の実質的に均一な表面層が100μmより薄いと、その上にGaN系のエピタキシャル層を成長させた時に、基板のキャリア濃度分布を反映したような表面モフォロジの荒れや、混晶組成の不均一が生じることを発見した。 As a result of diligent research in view of the above object, the present inventor has found that (a) a dislocation density is uniformly reduced in order to form a light emitting device with uniform characteristics on a III-V nitride semiconductor substrate with a high yield. In addition, it is important that the in-plane uniformity of the carrier concentration is good. (B) The carrier concentration in the vicinity of the surface of the III-V nitride semiconductor substrate (at least up to a depth of 100 μm) If the distribution is substantially uniform, the surface morphology and the uniformity of the characteristics of the GaN-based epitaxial layer grown thereon are not disturbed, and conversely (c) a surface with a substantially uniform carrier concentration. It was discovered that when the layer is thinner than 100 μm, when a GaN-based epitaxial layer is grown on it, surface morphology that reflects the carrier concentration distribution of the substrate, and mixed crystal composition non-uniformity occur. .

III−V族窒化物系半導体基板の成長初期に意図的に成長界面にファセットを出現させることにより転位の伝搬方向を曲げて、基板表面に達する転位を少なくするとともに、結晶成長過程の途中で成長界面を平坦化すれば、転位密度を増やすことなく(低転位密度のまま)、表面におけるキャリア濃度分布が均一な基板を成長させることができる。成長界面を平坦化するための条件としては、気相成長の途中でキャリアガス中の水素分圧を増加させるのが効果的であるが、結晶成長初期から水素分圧やGaCl分圧がある程度高い場合には、結晶成長過程の途中で成長条件を変更しなくても成長界面を平坦化することができる。その他に、III−V族窒化物系半導体の横方向成長を促進させる不純物(Mg等)を添加する方法によっても、成長界面を平坦化することができる。   By deliberately appearing facets at the growth interface in the early stage of III-V nitride semiconductor substrate growth, the dislocation propagation direction is bent to reduce the number of dislocations reaching the surface of the substrate and to grow during the crystal growth process. If the interface is flattened, a substrate having a uniform carrier concentration distribution on the surface can be grown without increasing the dislocation density (while maintaining a low dislocation density). As a condition for flattening the growth interface, it is effective to increase the hydrogen partial pressure in the carrier gas during vapor phase growth, but the hydrogen partial pressure and GaCl partial pressure are somewhat high from the beginning of crystal growth. In some cases, the growth interface can be planarized without changing the growth conditions during the crystal growth process. In addition, the growth interface can be planarized also by a method of adding an impurity (such as Mg) that promotes the lateral growth of the III-V nitride semiconductor.

本発明は上記発見に基づいてなされたものであり、低転位でかつ表面のキャリア濃度分布が均一なために、結晶性が良く均一なGaN系のエピタキシャル層を成長させることのできるIII−V族窒化物系半導体基板の製造方法を提供するものである。 The present invention has been made on the basis of the above discovery, and since it has low dislocations and a uniform carrier concentration distribution on the surface, it can grow a uniform GaN-based epitaxial layer with good crystallinity. A method for manufacturing a nitride-based semiconductor substrate is provided.

本発明の第一の態様による自立したIII−V族窒化物系半導体基板の製造方法は、III−V族窒化物系半導体結晶の成長の初期又は途中の段階では結晶成長界面に複数の凹凸を出しながら結晶成長を行い、次いで前記凹凸を埋めるように結晶成長を行って前記結晶成長界面を平坦化し、さらに平坦化した結晶成長界面の形状を保ったまま前記III−V族窒化物系半導体層が400μm以上1mm以下の厚さになるまで結晶成長を継続し、結晶成長終了後に表面から少なくとも100μmの深さまでの表面層の断面の蛍光顕微鏡像に、高明度領域と低明度領域の境界が存在しないように基板表面を研磨することを特徴とする。 The self-supporting group III-V nitride semiconductor substrate manufacturing method according to the first aspect of the present invention has a plurality of irregularities at the crystal growth interface at the initial stage or in the middle of the group III-V nitride semiconductor crystal growth. Crystal growth is performed while the crystal is grown, and then the crystal growth interface is flattened to flatten the crystal growth interface, and the III-V group nitride semiconductor layer is maintained while maintaining the flattened crystal growth interface shape. Crystal growth continues until the thickness reaches 400 μm or more and 1 mm or less, and the boundary between the high-lightness region and the low-lightness region exists in the cross-sectional fluorescence microscopic image of the surface layer from the surface to a depth of at least 100 μm after the crystal growth is completed. The substrate surface is polished so as not to occur.

本発明の第二の態様による自立したIII−V族窒化物系半導体基板の製造方法は、異種基板の上面にIII−V族窒化物系半導体層をエピタキシャル成長により形成した後、前記III−V族窒化物系半導体層と前記異種基板とを分離する工程を含む自立したIII−V族窒化物系半導体基板の製造方法であって、前記III−V族窒化物系半導体層の成長の初期又は途中の段階では結晶成長界面に複数の凹凸を出しながら結晶成長を行い、次いで前記凹凸を埋めるように結晶成長を行って結晶成長界面を平坦化し、さらに平坦化した結晶成長界面の形状を保ったまま前記III−V族窒化物系半導体層が400μm以上1mm以下の厚さになるまで結晶成長を継続し、結晶成長終了後に表面から少なくとも100μmの深さまでの表面層の断面の蛍光顕微鏡像に、高明度領域と低明度領域の境界が存在しないように基板表面を研磨することを特徴とする。 The self-supporting group III-V nitride semiconductor substrate manufacturing method according to the second aspect of the present invention includes forming a group III-V nitride semiconductor layer on an upper surface of a heterogeneous substrate by epitaxial growth, and then the group III-V group. A method of manufacturing a self-supporting group III-V nitride semiconductor substrate including a step of separating a nitride semiconductor layer and the heterogeneous substrate, wherein the growth of the group III-V nitride semiconductor layer is in the initial stage or in the middle In this stage, the crystal growth is performed while projecting a plurality of irregularities on the crystal growth interface, and then the crystal growth is performed so as to fill the irregularities, thereby flattening the crystal growth interface and maintaining the flattened crystal growth interface shape. Crystal growth is continued until the group III-V nitride semiconductor layer has a thickness of 400 μm or more and 1 mm or less. After the crystal growth is completed, a fluorescence microscope image of a cross section of the surface layer from the surface to a depth of at least 100 μm is highlighted. Degree region and low brightness region Wherein the boundary of polishing the substrate surface so as not to exist.

結晶成長終了後に成長界面に複数の凹凸を出しながら成長した領域の少なくとも一部又は全てを除去しても良い。結晶成長の初期又は途中の段階で結晶成長界面に形成する凹凸の凹部の、成長方向と平行な断面での形状が、ファセット面で囲まれたV字型又は逆台形型であっても良い。結晶成長の初期又は途中の段階で結晶成長界面に形成する凹凸の凹部が、ファセット面で囲まれたすり鉢状の形状を有しても良い。After the crystal growth is completed, at least a part or all of the grown region may be removed while projecting a plurality of irregularities on the growth interface. The shape of the concave and convex recesses formed at the crystal growth interface in the initial or middle stage of crystal growth in a cross section parallel to the growth direction may be a V shape or an inverted trapezoidal shape surrounded by facet surfaces. The concave and convex recesses formed at the crystal growth interface at the initial stage or in the middle of the crystal growth may have a mortar shape surrounded by facets.

結晶成長の少なくとも一部をHVPE法により行っても良い。結晶成長の途中で結晶成長界面の凹凸を埋めるために、成長雰囲気ガスの水素濃度やIII族原料の分圧をそれまでより高くしても良い。At least part of the crystal growth may be performed by the HVPE method. In order to fill the unevenness of the crystal growth interface during the crystal growth, the hydrogen concentration of the growth atmosphere gas and the partial pressure of the group III material may be made higher than before.

本発明のIII−V族窒化物系半導体基板の表面は(0001)のIII族面であるのが好ましい。   The surface of the III-V nitride semiconductor substrate of the present invention is preferably a (0001) group III surface.

本発明のIII−V族窒化物系半導体基板において、表面の転位密度は裏面の転位密度より少ないのが好ましい。   In the group III-V nitride semiconductor substrate of the present invention, the dislocation density on the front surface is preferably smaller than the dislocation density on the back surface.

本発明のIII−V族窒化物系半導体基板は、GaN又はAlGaNからなる層を含むのが好ましい。III−V族窒化物系半導体結晶に不純物がドープされているのが好ましい。   The III-V nitride semiconductor substrate of the present invention preferably includes a layer made of GaN or AlGaN. It is preferable that the group III-V nitride semiconductor crystal is doped with impurities.

本発明のIII−V族窒化物系半導体基板において、III−V族窒化物系半導体結晶の少なくとも一部はHVPE法により成長したものであるのが好ましい。   In the group III-V nitride semiconductor substrate of the present invention, it is preferable that at least part of the group III-V nitride semiconductor crystal is grown by the HVPE method.

本発明によれば、転位密度が低く、かつ表面におけるキャリア濃度の実質的に均一な自立したIII−V族窒化物系半導体基板が安定的に得られる。本発明の自立したIII−V族窒化物系半導体基板を用いることにより、設計通りの発光素子や電子素子等のデバイスを歩留り良く製造することが可能となる。   According to the present invention, a self-supporting group III-V nitride semiconductor substrate having a low dislocation density and a substantially uniform carrier concentration on the surface can be stably obtained. By using the self-supporting group III-V nitride semiconductor substrate of the present invention, it becomes possible to manufacture devices such as light emitting elements and electronic elements as designed with high yield.

本発明のGaN自立基板の構成を示す概略断面図である。It is a schematic sectional drawing which shows the structure of the GaN self-supporting substrate of this invention. 本発明(参考例1)のGaN自立基板の断面を示す蛍光顕微鏡写真である。It is a fluorescence micrograph which shows the cross section of the GaN self-supporting substrate of this invention ( reference example 1). 従来例(比較例1)のGaN自立基板の断面を示す蛍光顕微鏡写真である。It is a fluorescence micrograph which shows the cross section of the GaN self-supporting substrate of a prior art example (comparative example 1). 本発明のGaN自立基板の製造工程の一例(実施例2)を示す概略図である。It is the schematic which shows an example (Example 2) of the manufacturing process of the GaN self-supporting substrate of this invention. 本発明のGaN自立基板の製造工程の他の例(実施例3)を示す概略図である。It is the schematic which shows the other example (Example 3) of the manufacturing process of the GaN self-supporting substrate of this invention. 本発明のGaN自立基板の表面におけるキャリア濃度分布を示すグラフである。It is a graph which shows carrier concentration distribution in the surface of the GaN self-supporting substrate of this invention. 本発明のGaN自立基板の裏面におけるキャリア濃度分布を示すグラフである。It is a graph which shows carrier concentration distribution in the back surface of the GaN self-supporting substrate of this invention. 本発明のGaN自立基板の製造工程のさらに他の例(実施例4)を示す概略図である。It is the schematic which shows the further another example (Example 4) of the manufacturing process of the GaN self-supporting substrate of this invention. 本発明のGaN自立基板の製造工程のさらに他の例(実施例5)を示す概略図である。It is the schematic which shows the further another example (Example 5) of the manufacturing process of the GaN self-supporting substrate of this invention. 本発明(実施例5)のGaN自立基板の断面を示す蛍光顕微鏡写真である。It is a fluorescence micrograph which shows the cross section of the GaN self-supporting substrate of this invention (Example 5). 本発明のGaN自立基板の製造工程のさらに他の例(実施例6)を示す概略図である。It is the schematic which shows the further another example (Example 6) of the manufacturing process of the GaN self-supporting substrate of this invention.

本明細書における用語「自立した基板」とは、自らの形状を保持できるだけでなく、ハンドリングに不都合が生じない程度の強度を有する基板をいう。このような強度を有するためには、自立基板の厚さを400μm以上とするのが好ましい。また素子形成後の劈開の容易性等を考慮して、自立基板の厚さを1mm以下とするのが好ましい。自立基板が厚すぎると劈開が困難となり、劈開面に凹凸が生じる。この結果、たとえば半導体レーザ等に適用した場合、反射のロスによるデバイス特性の劣化が問題となる。 The term “self-supporting substrate” in this specification refers to a substrate that not only can retain its shape but also has a strength that does not cause inconvenience in handling. In order to have such strength, it is preferable that the thickness of the free-standing substrate is 400 μm or more. In consideration of easiness of cleavage after element formation, etc., the thickness of the self-supporting substrate is preferably 1 mm or less. If the self-supporting substrate is too thick, it becomes difficult to cleave, and the cleaved surface is uneven. As a result, when applied to, for example, a semiconductor laser, deterioration of device characteristics due to loss of reflection becomes a problem.

本発明を適用し得るIII−V族窒化物系半導体は、一般式:InxGayAl1-x-yN(ただし、0≦x≦1、0≦y≦1、及び0≦x+y≦1)で表すことができる。なかでも、強度、製造安定性等、基板材料に求められる特性を満足するという観点から、GaN、AlGaN等の半導体が特に好ましい。 The group III-V nitride semiconductor to which the present invention can be applied has a general formula: In x Ga y Al 1-xy N (where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, and 0 ≦ x + y ≦ 1) Can be expressed as Among these, semiconductors such as GaN and AlGaN are particularly preferable from the viewpoint of satisfying characteristics required for the substrate material such as strength and manufacturing stability.

結晶表面においてキャリア濃度が異なる領域は、目視では判別できないが、表面に紫外線を当てて結晶のフォトルミネッセンスを利用することにより、容易に検出することができる。六方晶系のC軸方向に成長させた結晶では、ファセット面で囲まれたピットはC軸方向から見て六角形か十二角形である。従って、その成長履歴は六角柱か十二角柱になるが、結晶成長の初期ではピットのサイズも小さいので、一般的に基板表面に向かって広がる六角錐又は十二角錐である。ファセットで囲まれた領域がピットでなく、FIELO等のELOのマスク成長によるストライプ状であれば、その履歴はストライプ方向に垂直な断面の形状が逆三角形の楔形か、逆台形の平板状又はそれに近い形状となる。   A region having a different carrier concentration on the crystal surface cannot be discriminated visually, but can be easily detected by applying ultraviolet light to the surface and utilizing the photoluminescence of the crystal. In a hexagonal crystal grown in the C-axis direction, the pits surrounded by the facet plane are hexagonal or dodecagonal when viewed from the C-axis direction. Therefore, the growth history is a hexagonal column or a dodecagonal column, but since the size of the pit is small at the initial stage of crystal growth, it is generally a hexagonal pyramid or a dodecagonal pyramid that spreads toward the substrate surface. If the area surrounded by facets is not a pit but a stripe shape due to the growth of an ELO mask such as FIELO, the history is that the cross-sectional shape perpendicular to the stripe direction is an inverted triangular wedge shape, an inverted trapezoidal flat plate shape, or Close shape.

キャリア濃度の異なる領域は、周囲とはっきりした境界を有するため、蛍光顕微鏡を用いれば、その画像のコントラストから容易に検出することができる。検出できる深さは、励起光として用いる紫外線の波長や強度によって異なるが、検出した像が試料の表面で見えているのか否かは、像が焦点を結ぶ位置から容易に判別できる。なおキャリア濃度の異なる領域の検出は、通常の走査電子顕微鏡(SEM)やカソードルミネッセンス(CL)でも容易に行うことができる。   Since regions having different carrier concentrations have a clear boundary with the surroundings, they can be easily detected from the contrast of the image using a fluorescence microscope. The depth that can be detected varies depending on the wavelength and intensity of the ultraviolet light used as the excitation light, but whether or not the detected image is visible on the surface of the sample can be easily determined from the position where the image is focused. Note that detection of regions having different carrier concentrations can be easily performed with a normal scanning electron microscope (SEM) or cathodoluminescence (CL).

本発明のIII−V族窒化物系半導体基板は、キャリア濃度の異なる各領域の太さが1mm以下であるのが好ましい。なぜならば、かかる基板を用いて作製するデバイス(例えば、レーザーダイオードや発光ダイオード)のチップサイズが1mm以下だからである。キャリア濃度の異なる領域の太さが1mm超であると、基板全面にチップを作製した際、キャリア濃度の異なる領域の境界がチップの中にかかってしまう確立が高くなり、デバイスの歩留りを大きく低下させる原因となる。もちろん、キャリア濃度の異なる領域の太さが1mm超であっても、表面のキャリア濃度の均一性は高い方が良く、本発明の有効性を阻害することはない。   In the III-V nitride semiconductor substrate of the present invention, the thickness of each region having a different carrier concentration is preferably 1 mm or less. This is because the chip size of a device (for example, a laser diode or a light emitting diode) manufactured using such a substrate is 1 mm or less. If the thickness of the region with different carrier concentration is more than 1 mm, when the chip is manufactured on the entire surface of the substrate, the probability that the boundary of the region with different carrier concentration is applied to the chip is increased, and the yield of the device is greatly reduced. Cause it. Of course, even if the thickness of the regions with different carrier concentrations is more than 1 mm, the uniformity of the carrier concentration on the surface is better and does not hinder the effectiveness of the present invention.

本発明の基板の表面は(0001)のIII族面であるのが望ましい。GaN系の結晶は極性が強く、III族面の方がV族面(窒素面)より化学的及び熱的に安定で、デバイスの作製が容易であるからである。   The surface of the substrate of the present invention is preferably a (0001) group III surface. This is because GaN-based crystals are more polar, the group III surface is more chemically and thermally stable than the group V surface (nitrogen surface), and the device is easy to fabricate.

本発明は、結晶成長中に結晶表面に伝搬する転位を低減するとともに、結晶表面におけるキャリア濃度の均一性を両立した基板を提供するので、得られる基板の転位密度は、裏面より表面の方が少ないという特徴を有する。例えば転位密度をエッチピット法等で測定した場合、表面での転位密度は裏面の転位密度の1/2以下であるのが望ましい。   Since the present invention provides a substrate that reduces dislocations propagating to the crystal surface during crystal growth and has a uniform carrier concentration on the crystal surface, the dislocation density of the obtained substrate is higher on the surface than on the back surface. It has the feature of few. For example, when the dislocation density is measured by the etch pit method or the like, it is desirable that the dislocation density on the front surface is 1/2 or less of the dislocation density on the back surface.

本発明のIII−V族窒化物系半導体基板を成長させる手段として、HVPE(ハイドライド気相成長)法を用いるのが望ましい。これは、HVPE法は結晶成長速度が速く、基板の作製に適するからである。   As a means for growing the III-V nitride semiconductor substrate of the present invention, it is desirable to use HVPE (hydride vapor phase epitaxy). This is because the HVPE method has a high crystal growth rate and is suitable for manufacturing a substrate.

III−V族窒化物系半導体基板のキャリア濃度の絶対値は、目的とするデバイスに合わせて適宜制御すべきであるから、一律に決めることはできない。従って、キャリア濃度のばらつきの大きさも、キャリア濃度の絶対値に応じて変わるべきであるため、一律に規定することはできない。例えば、目的とするSiドープn型のGaN基板のキャリア濃度が1×1017cm-3程度である場合、基板表面におけるキャリア濃度のばらつきは±25%以内であるのが好ましく、またキャリア濃度が5×1017cm-3程度である場合、基板表面におけるキャリア濃度のばらつきは±15%以内であるのが好ましく、またキャリア濃度が5×1018cm-3程度である場合、基板表面におけるキャリア濃度のばらつきは±10%以内であるのが望ましい。なお、目的とするSiドープn型のGaN基板のキャリア濃度が1×1017cm-3未満である場合、基板表面におけるキャリア濃度のばらつきは±100%以内であるのが好ましい。このように、基板のキャリア濃度によって好ましいキャリア濃度のばらつきが異なるのは、基板のキャリア濃度が低ければ低いほど、ばらつきが大きくなることによって及ぼされる影響が小さくなるからである。 Since the absolute value of the carrier concentration of the group III-V nitride semiconductor substrate should be appropriately controlled according to the target device, it cannot be determined uniformly. Accordingly, the magnitude of the carrier concentration variation should also be changed according to the absolute value of the carrier concentration, and cannot be defined uniformly. For example, when the carrier concentration of the target Si-doped n-type GaN substrate is about 1 × 10 17 cm −3 , the carrier concentration variation on the substrate surface is preferably within ± 25%, and the carrier concentration is When it is about 5 × 10 17 cm −3 , the carrier concentration variation on the substrate surface is preferably within ± 15%, and when the carrier concentration is about 5 × 10 18 cm −3 , the carrier on the substrate surface is The concentration variation is preferably within ± 10%. When the carrier concentration of the target Si-doped n-type GaN substrate is less than 1 × 10 17 cm −3 , the carrier concentration variation on the substrate surface is preferably within ± 100%. Thus, the preferable carrier concentration variation varies depending on the carrier concentration of the substrate because the lower the carrier concentration of the substrate, the smaller the influence exerted by the larger variation.

本発明の基板の導電型は、目的とするデバイスに合わせて適宜制御すべきであり、一律に決めることはできない。本発明の基板の導電型としては、例えば、Si、S、O等をドープしたn型や、MgやZn等をドープしたp型、FeやCr等をドープしたりn型とp型のドーパントを同時にドープしたりした半絶縁性が挙げられる。   The conductivity type of the substrate of the present invention should be appropriately controlled according to the target device, and cannot be determined uniformly. As the conductivity type of the substrate of the present invention, for example, n-type doped with Si, S, O, etc., p-type doped with Mg, Zn, etc., Fe-Cr, etc. doped or n-type and p-type dopants Semi-insulating properties such as doping at the same time.

本発明のIII−V族窒化物系半導体基板(例えば、GaN系基板)は、表面を鏡面研磨するのが望ましい。一般に、アズグロウンのGaN系エピタキシャル層表面には、ヒロック等の大きな凹凸や、ステップバンチングによって現れると思われる微少な凹凸が多数存在している。これらは、その上にエピタキシャル層を成長させたときのモフォロジや、膜厚、組成等を不均一にする要因となるばかりでなく、デバイス作製プロセスにおいても、フォトリソグラフィ工程の露光精度を落とす要因となる。従って、基板表面は平坦な鏡面であるのが望ましい。鏡面を研磨加工で得ようとすると、結晶の表面から数μm〜数百μmを削り落とす必要がある。本発明においては、研磨で表面層を削り落とした後でも、キャリア濃度の実質的に均一な層を100μm以上の厚さに残すことが必要である。従って、基板表面を研磨仕上げする場合、研磨代を見越して、結晶成長時にキャリア濃度の均一な層をあらかじめ厚く成長させておく必要がある。 The surface of the III-V nitride semiconductor substrate (eg, GaN substrate) of the present invention is preferably mirror-polished. In general, the surface of the as-grown GaN-based epitaxial layer has a large number of large irregularities such as hillocks and minute irregularities that appear to be caused by step bunching. These are not only factors that make the morphology, film thickness, composition, etc. of the epitaxial layer grown on it uneven, but also factors that reduce the exposure accuracy of the photolithography process in the device fabrication process. Become. Therefore, the substrate surface is preferably a flat mirror surface. In order to obtain a mirror surface by polishing, it is necessary to scrape several μm to several hundred μm from the surface of the crystal. In the present invention, it is necessary to leave a layer having a substantially uniform carrier concentration to a thickness of 100 μm or more even after the surface layer is scraped off by polishing. Therefore, when polishing the substrate surface, it is necessary to allow a layer having a uniform carrier concentration to grow thickly in advance during crystal growth in anticipation of the polishing allowance.

本発明のIII−V族窒化物系半導体基板の裏面も平坦に研磨加工するのが望ましい。一般に、III−V族窒化物系半導体(GaN等)の自立基板は、異種の下地基板にヘテロエピタキシャル成長させた後で剥離して得られることが多い。このため、剥離したままの基板の裏面は、梨地状に荒れていたり、下地基板の一部が付着していたりすることが多い。また基板の反りに起因して、平坦でないこともある。これらは、基板上にエピタキシャル層を成長させる際に、基板の温度分布の不均一を生じる原因となり、その結果、エピタキシャル層の均一性が低下したり、再現性が悪化したりする。   It is desirable that the back surface of the III-V nitride semiconductor substrate of the present invention be polished flat. In general, a free-standing substrate of a group III-V nitride semiconductor (such as GaN) is often obtained by heteroepitaxial growth on a different type of base substrate and then peeling off. For this reason, the back surface of the substrate that has been peeled off is often roughened in a satin state, or a part of the base substrate is often attached. Further, it may not be flat due to warpage of the substrate. These cause nonuniformity of the temperature distribution of the substrate when the epitaxial layer is grown on the substrate, and as a result, the uniformity of the epitaxial layer is lowered or the reproducibility is deteriorated.

なお、「鏡面研磨した表面から少なくとも100μmの深さまでの表面層」とは、鏡面研磨後の深さが少なくとも100μmである表面層」を意味する。従って、この表面層の鏡面研磨前の深さは、少なくとも100μm+鏡面研磨代とすべきである。また「キャリア濃度分布が実質的に均一である」とは、基板の位置によらずキャリア濃度分布が完全に一定であることを意味するのではなく、基板上に形成するデバイスの特性が一定になる程度にキャリア濃度のばらつきが小さいことを意味する。従って、例えばSiドープn型のGaN基板(キャリア濃度:5×1017cm-3程度)の場合、キャリア濃度のばらつきが±15%以内であることを意味する。 Incidentally, it means the "surface layer from mirror-polished surface to a depth of at least 100 [mu] m", the surface layer depth after mirror polishing of at least 100 [mu] m. " Therefore, the depth of this surface layer before mirror polishing should be at least 100 μm + mirror polishing allowance. Also, “the carrier concentration distribution is substantially uniform” does not mean that the carrier concentration distribution is completely constant regardless of the position of the substrate, but the characteristics of the device formed on the substrate are constant. This means that the carrier concentration variation is as small as possible. Therefore, for example, in the case of a Si-doped n-type GaN substrate (carrier concentration: about 5 × 10 17 cm −3 ), this means that the carrier concentration variation is within ± 15%.

本発明のIII−V族窒化物系半導体基板の製造方法において、厚く成長した結晶から切出した基板は、その表裏両面を研磨加工で仕上げるのが好ましい。結晶の切断面には、一般に切断時に導入されるソーマーク等の凹凸が存在しており、そのままでは良好なエピタキシャル成長を行うことが難しいためである。なお結晶の切断には、外周刃スライサー、内周刃スライサー、ワイヤーソー等を用いることができる。中でも、ワイヤーソーを用いるのが好ましい。   In the method for producing a group III-V nitride semiconductor substrate of the present invention, it is preferable that the front and back surfaces of the substrate cut out from the thickly grown crystal are finished by polishing. This is because the cut surface of the crystal generally has irregularities such as saw marks introduced at the time of cutting, and it is difficult to perform good epitaxial growth as it is. For cutting the crystal, an outer peripheral blade slicer, an inner peripheral blade slicer, a wire saw, or the like can be used. Among these, it is preferable to use a wire saw.

本発明はIII−V族窒化物系半導体(GaN等)の自立基板に適用されるが、本発明の技術的思想は下地基板をつけたままのGaN系エピタキシャル基板(テンプレート)にも応用可能である。   Although the present invention is applied to a III-V nitride semiconductor (GaN, etc.) free-standing substrate, the technical idea of the present invention can also be applied to a GaN epitaxial substrate (template) with a base substrate attached. is there.

本発明を以下の実施例によってさらに詳細に説明するが、本発明はそれらに限定されるものではない。   The present invention will be described in more detail with reference to the following examples, but the present invention is not limited thereto.

参考例1
サファイア基板上にGaNエピタキシャル層を成長させ、その後サファイア基板を除去することにより、図1に示すようにキャリア濃度の異なる領域2を含有する層と、キャリア濃度が実質的に均一な層とを有するGaN自立基板1を作製し、評価した。以下、本参考例のGaN自立基板の作製方法について、図4を参照して説明する。
Reference example 1
By growing a GaN epitaxial layer on the sapphire substrate and then removing the sapphire substrate, as shown in FIG. 1, there are a layer containing the region 2 having a different carrier concentration and a layer having a substantially uniform carrier concentration. A GaN free-standing substrate 1 was produced and evaluated. Hereinafter, a method of manufacturing the GaN free-standing substrate of this reference example will be described with reference to FIG.

まずサファイア基板11を用いて、HVPE法でGaNエピタキシャル層12aを成長させた。HVPE法は、III族元素のハロゲン化物であるGaClを、加熱した基板表面に輸送し、基板領域で、これをNH3と混合して、これらを反応させることにより基板上でGaN結晶を気相成長させる方法である。原料ガスはH2又はN2のようなキャリアガスとともに流す。基板領域の温度は、電気炉で1000℃に設定した。またGaN結晶の成長過程でドーピング原料ガスとしてSiH2Cl2を基板領域に供給することによりドーピングを行い、Siをドープした。 First, using the sapphire substrate 11, the GaN epitaxial layer 12a was grown by the HVPE method. The HVPE method transports GaCl, which is a halide of a group III element, to the heated substrate surface, mixes it with NH 3 in the substrate region, and reacts them to form a vapor phase of GaN crystals on the substrate. It is a way to grow. The source gas is flowed with a carrier gas such as H 2 or N 2 . The temperature of the substrate region was set to 1000 ° C. with an electric furnace. In addition, SiH was doped by supplying SiH 2 Cl 2 as a doping source gas to the substrate region during the growth of the GaN crystal.

原料となるGaCl及びNH3の分圧は、基板領域でそれぞれ5×10-3 atm及び0.3 atmとした。キャリアガスとして2%のH2と98%のN2の混合ガスを用いた。この条件で、サファイア基板11上にGaN結晶12aの核が3次元の島状に生成し、次いで結晶核の側壁にファセット面が現れて、結晶成長が進行していった(工程(b))。この様子は、成長時間を変えて炉外に取り出した基板表面及び断面を顕微鏡観察することにより、確認した。 The partial pressures of the raw material GaCl and NH 3 were 5 × 10 −3 atm and 0.3 atm in the substrate region, respectively. A mixed gas of 2% H 2 and 98% N 2 was used as a carrier gas. Under these conditions, the GaN crystal 12a nuclei were generated in a three-dimensional island shape on the sapphire substrate 11, and then facet surfaces appeared on the side walls of the crystal nuclei, and crystal growth proceeded (step (b)). . This state was confirmed by observing the substrate surface and cross-section taken out of the furnace with a microscope under a different growth time.

成長時間を長くするに従って、GaN結晶12aの頂上部は平坦化し(工程(c))、その後結晶同士が横方向に成長して互いに結合し、表面の平坦化が進行した。しかし、成長界面は完全には平坦化せず、表面には多くのピット13が存在する状態で結晶成長は進行した(工程(d))。ピット13は、真上から見ると直径が数μm〜数十μm程度のほぼ円形であった。(d) に相当する試料の断面の蛍光顕微鏡像を観察したところ、サファイア基板の界面からGaNの表面に存在するピット13の底部までつながる暗い領域14が観察された。この領域14は、ドーパントの取り込み量が少なく、キャリア濃度が周囲より低いものと考えられる。実際、蛍光顕微鏡像において暗い領域を狙ってSIMS分析を行い、周囲の領域と比較したところ、暗い領域ではSiの濃度が3×1017cm-3であったのに対し、周囲の領域でのSiの濃度は7×1017cm-3と2倍以上であった。 As the growth time was lengthened, the top of the GaN crystal 12a was flattened (step (c)), and then the crystals grew laterally and joined to each other, and the surface flattened. However, the growth interface was not completely flattened, and crystal growth proceeded with many pits 13 on the surface (step (d)). The pit 13 was substantially circular with a diameter of about several μm to several tens of μm when viewed from directly above. When a fluorescent microscopic image of the cross section of the sample corresponding to (d) was observed, a dark region 14 was observed that was connected from the interface of the sapphire substrate to the bottom of the pits 13 present on the surface of the GaN. This region 14 is considered to have a small amount of dopant incorporation and have a lower carrier concentration than the surroundings. Actually, SIMS analysis was performed aiming at the dark area in the fluorescence microscope image, and when compared with the surrounding area, the concentration of Si was 3 × 10 17 cm -3 in the dark area, whereas in the surrounding area, The concentration of Si was 7 × 10 17 cm −3 or more.

(d) の状態までGaN結晶12aを成長させた後、原料ガス流量をそのままにして、キャリアガスだけ10%のH2と90%のN2の混合ガスに切替えてGaN結晶の成長を続けた。その結果、GaN結晶12aの成長界面12cは平坦化する傾向が見られた(工程(e))。GaN結晶12aの成長界面が平坦化した後、さらに100μm以上の厚さにGaN結晶12bを成長させた。成長界面が平坦化した後に成長した領域12bの断面を蛍光顕微鏡で観察したところ、新たに明度の異なる領域は発生していないことが分かった。即ち、明度の異なる領域14はGaN結晶12の途中(成長界面12c)で終端し(工程(f))、GaN結晶12の最外面まで到達していないことが確認された。GaN結晶12の実測蛍光顕微鏡像を図2に示す。一部のピットがまだ終端せずに表面まで到達しているが、大多数のピットはGaN結晶12の途中で終端し、結晶表面から少なくとも10μmの深さの範囲における蛍光顕微鏡像の明度はほぼ均一になっていることが確認できた。 After the GaN crystal 12a was grown to the state of (d), the growth of the GaN crystal was continued by switching the carrier gas only to the mixed gas of 10% H 2 and 90% N 2 with the raw material gas flow rate unchanged. . As a result, the growth interface 12c of the GaN crystal 12a tended to be flattened (step (e)). After the growth interface of the GaN crystal 12a was flattened, the GaN crystal 12b was grown to a thickness of 100 μm or more. When the cross section of the region 12b grown after the growth interface was flattened was observed with a fluorescence microscope, it was found that a region having a different brightness was not newly generated. That is, it was confirmed that the region 14 with different brightness terminated in the middle of the GaN crystal 12 (growth interface 12c) (step (f)) and did not reach the outermost surface of the GaN crystal 12. A measured fluorescence microscope image of the GaN crystal 12 is shown in FIG. Some pits still reach the surface without terminating, but the majority of the pits terminate in the middle of the GaN crystal 12, and the brightness of the fluorescence microscope image in the depth range of at least 10 μm from the crystal surface is almost It was confirmed that it was uniform.

このようにしてサファイア基板11上に総厚さ250μmのGaN結晶12を成長させた。GaN結晶12の平均成長速度は約50μm/hであった。   In this way, a GaN crystal 12 having a total thickness of 250 μm was grown on the sapphire substrate 11. The average growth rate of the GaN crystal 12 was about 50 μm / h.

以上のようにしてGaNエピタキシャル層12を形成したサファイア基板11を反応管から取り出し、サファイア基板11を取り除き、GaN自立基板15を得た。サファイア基板を除去する方法として、サファイア基板は透過するが、GaNでは吸収されるような波長の高出力の紫外線レーザ光を、サファイア基板側から照射して、GaN結晶の界面付近を融解して除去する、いわゆるレーザーリフトオフ法を用いた。この他にも、例えば、機械的研磨、又は強アルカリ性あるいは強酸性薬品によるエッチングによりサファイア基板を除去することも可能である。またサファイア基板の除去に、荷電ビーム又は中性ビームによる物理的エッチングを行っても良い。   The sapphire substrate 11 on which the GaN epitaxial layer 12 was formed as described above was taken out of the reaction tube, the sapphire substrate 11 was removed, and a GaN free-standing substrate 15 was obtained. As a method of removing the sapphire substrate, the sapphire substrate is transmitted, but GaN laser is irradiated with high-power ultraviolet laser light with a wavelength that is absorbed by GaN, and the vicinity of the interface of the GaN crystal is melted and removed. The so-called laser lift-off method was used. In addition to this, it is also possible to remove the sapphire substrate by, for example, mechanical polishing or etching with a strong alkali or strong acid chemical. Moreover, you may perform the physical etching by a charged beam or a neutral beam for the removal of a sapphire substrate.

こうして得られたGaN自立基板15の表面及び裏面をそれぞれ10μmづつ除去し、鏡面研磨加工することにより、平坦性を向上させた。GaN自立基板15の最終厚さは230μmであり、ピンセットを用いたハンドリングにも十分に耐える強度を有していた。GaN自立基板15の断面の蛍光顕微鏡観察により、GaN自立基板15の表面近傍(少なくとも10μmの深さまで)にはキャリア濃度の異なる領域がほぼないことが確認できた。   The flatness was improved by removing the surface and the back surface of the GaN free-standing substrate 15 thus obtained by 10 μm each and performing mirror polishing. The final thickness of the GaN free-standing substrate 15 was 230 μm, and the strength was sufficient to withstand handling using tweezers. By observing the cross section of the GaN free-standing substrate 15 with a fluorescence microscope, it was confirmed that there were almost no regions with different carrier concentrations near the surface of the GaN free-standing substrate 15 (up to a depth of at least 10 μm).

このGaN自立基板15の表面及び裏面におけるキャリア濃度分布を、van der Pauw法により基板の直径方向に5mmの間隔で測定した。結果を図6及び図7に示す。図6に示すように、GaN自立基板15の表面におけるキャリア濃度は6.9×1017cm-3〜7.6×1017cm-3の範囲内であり、十分に均一であることが確認できた。これに対して、図7に示すように、GaN自立基板15の裏面におけるキャリア濃度は2.7×1017cm-3〜7.1×1017cm-3と、大きくばらついていることが判明した。 The carrier concentration distribution on the front and back surfaces of the GaN free-standing substrate 15 was measured by a van der Pauw method at intervals of 5 mm in the diameter direction of the substrate. The results are shown in FIGS. As shown in FIG. 6, the carrier concentration on the surface of the GaN free-standing substrate 15 is in the range of 6.9 × 10 17 cm −3 to 7.6 × 10 17 cm −3 , and was confirmed to be sufficiently uniform. On the other hand, as shown in FIG. 7, it has been found that the carrier concentration on the back surface of the GaN free-standing substrate 15 varies greatly from 2.7 × 10 17 cm −3 to 7.1 × 10 17 cm −3 .

このGaN自立基板15上に、MOVPE法を用いて、GaNのエピタキシャル膜を1μm成長させ、その表面モフォロジを調べたところ、基板全面にわたって均一な鏡面状態になっていることが確認された。   A GaN epitaxial film was grown by 1 μm on the GaN free-standing substrate 15 using the MOVPE method, and its surface morphology was examined. It was confirmed that the entire surface of the substrate was in a uniform mirror state.

比較例1
原料となるGaCl及びNH3の分圧を基板領域でそれぞれ5×10-3 atm及び0.3 atmとし、キャリアガスとして2%のH2と98%のN2の混合ガスを用いた以外参考例1と同様にして、サファイア基板上にGaNの厚膜結晶を成長させた。その結果、GaNの厚さが300μmになるまで、表面にある多くのピットは埋まらずに残ったままであった。
Comparative Example 1
Reference Example 1 except that the partial pressures of the raw material GaCl and NH 3 were 5 × 10 −3 atm and 0.3 atm in the substrate region, respectively, and a mixed gas of 2% H 2 and 98% N 2 was used as the carrier gas. In the same manner, a GaN thick film crystal was grown on the sapphire substrate. As a result, many pits on the surface remained unfilled until the GaN thickness reached 300 μm.

この基板を反応管から取り出し、前述のレーザーリフトオフ法を用いて、サファイア基板を取り除き、GaN自立基板を得た。GaN自立基板の表裏両面をそれぞれ30μm及び10μmの深さまで鏡面研磨することにより、平坦性を向上させた。鏡面研磨により、基板の表面に残っていたピットはほとんど消失した。GaN自立基板の最終厚さは260μmであった。   The substrate was taken out from the reaction tube, and the sapphire substrate was removed using the laser lift-off method described above to obtain a GaN free-standing substrate. Flatness was improved by mirror-polishing both the front and back sides of the GaN free-standing substrate to a depth of 30 μm and 10 μm, respectively. Due to the mirror polishing, most of the pits remaining on the surface of the substrate disappeared. The final thickness of the GaN free-standing substrate was 260 μm.

GaN自立基板の断面を蛍光顕微鏡を用いて観察したところ、図3に示すように、表面と裏面をつなぐような楔型状で周囲とは明度の異なる領域が基板内部に多数存在していることが分かった。   When the cross section of the GaN free-standing substrate was observed using a fluorescence microscope, as shown in FIG. 3, there were many wedge-shaped regions connecting the front surface and the back surface and having different brightness from the surroundings. I understood.

このGaN自立基板の表面及び裏面におけるキャリア濃度分布を、van der Pauw法により基板の直径方向に5mmの間隔で測定した。その結果、基板表面におけるキャリア濃度は2.4×1017cm-3〜7.7×1017cm-3と大きくばらついており、裏面におけるキャリア濃度のばらつき(2.6×1017cm-3〜8.1×1017cm-3)と大差がないことが判明した。 The carrier concentration distribution on the front and back surfaces of this GaN free-standing substrate was measured at 5 mm intervals in the diameter direction of the substrate by the van der Pauw method. As a result, the carrier concentration on the substrate surface varies greatly from 2.4 × 10 17 cm −3 to 7.7 × 10 17 cm −3, and the carrier concentration variation on the back surface (2.6 × 10 17 cm −3 to 8.1 × 10 17 cm -3 ) and no significant difference.

このGaN自立基板上に、MOVPE法を用いて、GaNのエピタキシャル膜を1μm成長させ、その表面モフォロジを調べたところ、基板の全面に直径10〜60μm程度の、テラス状の凹凸が多数発生していることが確認された。これらの凹凸は、実際にデバイスを作製する際に、障害となることが予想される。   On this GaN free-standing substrate, a GaN epitaxial film was grown by 1 μm using the MOVPE method, and when the surface morphology was examined, many terrace-shaped irregularities with a diameter of about 10 to 60 μm were generated on the entire surface of the substrate. It was confirmed that These irregularities are expected to be obstacles when actually manufacturing a device.

実施例2
HVPE法の結晶成長条件を僅かに変えた以外実質的に参考例1と同様にして、サファイア基板上にGaNエピタキシャル層を成長させ、その後サファイア基板を除去することにより図1に示すGaN自立基板を作製し、評価した。以下、本実施例のGaN自立基板の作製方法を図4を参照して説明する。
Example 2
A GaN free-standing substrate shown in FIG. 1 is obtained by growing a GaN epitaxial layer on the sapphire substrate and then removing the sapphire substrate in substantially the same manner as in Reference Example 1 except that the crystal growth conditions of the HVPE method are slightly changed. Prepared and evaluated. Hereinafter, a method of manufacturing the GaN free-standing substrate of this example will be described with reference to FIG.

まずサファイアのC面基板11を用いて、参考例1と同じHVPE法によりGaNエピタキシャル層12aを成長させた。基板領域の温度は電気炉で1050℃に設定した。原料となるGaCl及びNH3の分圧は、基板領域でそれぞれ6×10-3atm及び0.4 atmとし、キャリアガスとして、はじめから10%のH2と90%のN2の混合ガスを用いた。GaN結晶の成長過程で、ドーピング原料ガスとしてSiH2Cl2を基板領域に供給することによりドーピングを行い、GaN結晶にSiをドープした。 First, using a sapphire C-plane substrate 11, a GaN epitaxial layer 12a was grown by the same HVPE method as in Reference Example 1. The temperature of the substrate region was set to 1050 ° C. in an electric furnace. The partial pressures of GaCl and NH 3 as raw materials were 6 × 10 −3 atm and 0.4 atm, respectively, in the substrate region, and a mixed gas of 10% H 2 and 90% N 2 was used as a carrier gas from the beginning. . During the growth process of the GaN crystal, doping was performed by supplying SiH 2 Cl 2 as a doping source gas to the substrate region, and the GaN crystal was doped with Si.

まずGaN結晶12aの核がサファイア基板11上に3次元の島状に生成し、次いで結晶核12aの側壁にファセット面が現れて、結晶成長が進行していった(工程(b))。この様子は、成長時間を変えて炉外に取り出した基板表面及び断面を顕微鏡観察することにより、確認した。成長時間を長くするに従って、GaN結晶12aの頂上部は上面を(0001)Ga面として平坦化し、その後結晶同士は横方向に成長して互いに結合し、表面の平坦化が進行した(工程(c))。さらに同条件で結晶成長を続けたところ、GaN結晶12aの成長界面にあったピットは自然に終端し、平坦化する傾向が見られた(工程(e))。こうして、GaN結晶12aの成長界面12cが平坦化した後も、さらに100μm以上の厚さまでGaN結晶12bの成長を継続した。   First, nuclei of the GaN crystal 12a were generated in a three-dimensional island shape on the sapphire substrate 11, and then facet surfaces appeared on the side walls of the crystal nucleus 12a, and crystal growth proceeded (step (b)). This state was confirmed by observing the substrate surface and cross-section taken out of the furnace with a microscope under a different growth time. As the growth time is lengthened, the top of the GaN crystal 12a is flattened with the upper surface as the (0001) Ga plane, and then the crystals grow laterally and bond to each other, and the flattening of the surface proceeds (step (c) )). Furthermore, when crystal growth was continued under the same conditions, the pits at the growth interface of the GaN crystal 12a terminated spontaneously and a tendency to flatten was observed (step (e)). Thus, even after the growth interface 12c of the GaN crystal 12a was flattened, the growth of the GaN crystal 12b was continued to a thickness of 100 μm or more.

成長界面が自然に平坦化した後に成長した領域12bでは、断面の蛍光顕微鏡観察により、新たに明度の異なる領域が発生していないことが確認された。すなわち、明度の異なる領域14はGaN結晶12の途中で終端し(工程(f))、結晶の最外面まで到達しなかった。   In the region 12b grown after the growth interface was naturally flattened, it was confirmed by observation of the cross section with a fluorescence microscope that no new region having different brightness was generated. That is, the region 14 with different brightness terminated in the middle of the GaN crystal 12 (step (f)) and did not reach the outermost surface of the crystal.

このようにしてサファイア基板11上に総厚さ550μmのGaN結晶12を成長させた。GaN結晶12の平均成長速度は約65μm/hであった。   In this way, a GaN crystal 12 having a total thickness of 550 μm was grown on the sapphire substrate 11. The average growth rate of the GaN crystal 12 was about 65 μm / h.

この基板を反応管から取り出し、前述のレーザーリフトオフ法を用いて、サファイア基板11を取り除き、GaN自立基板15を得た。GaN自立基板15の表裏両面を鏡面研磨加工することにより、表面を30μm及び裏面を90μm除去し、平坦性を向上させた。鏡面研磨により、GaN自立基板の最終厚さは430μmとなった。   This substrate was taken out from the reaction tube, and the sapphire substrate 11 was removed by using the laser lift-off method described above to obtain a GaN free-standing substrate 15. The front and back surfaces of the GaN free-standing substrate 15 were mirror-polished to remove 30 μm on the front surface and 90 μm on the back surface, thereby improving the flatness. By mirror polishing, the final thickness of the GaN free-standing substrate was 430 μm.

このGaN自立基板15の表面及び裏面におけるキャリア濃度分布を、van der Pauw法により基板の直径方向に5mmの間隔で測定した。その結果、基板表面におけるキャリア濃度は0.9×1018cm-3〜1.6×1018cm-3の範囲内であり、十分に均一であることが確認できた。これに対して、基板裏面におけるキャリア濃度は4.7×1017cm-3〜13.1×1017cm-3と大きくばらついていることが判明した。 The carrier concentration distribution on the front and back surfaces of the GaN free-standing substrate 15 was measured by a van der Pauw method at intervals of 5 mm in the diameter direction of the substrate. As a result, the carrier concentration on the substrate surface was in the range of 0.9 × 10 18 cm −3 to 1.6 × 10 18 cm −3 and was confirmed to be sufficiently uniform. On the other hand, the carrier concentration on the back surface of the substrate was found to vary greatly from 4.7 × 10 17 cm −3 to 13.1 × 10 17 cm −3 .

得られたGaN自立基板15の断面を蛍光顕微鏡観察したところ、基板表面から深さ100μm以上の領域にわたって、明度の異なる領域が存在していないことが確認された。   When the cross section of the obtained GaN free-standing substrate 15 was observed with a fluorescence microscope, it was confirmed that there were no regions having different brightness over a region having a depth of 100 μm or more from the substrate surface.

実施例3
ボイド形成剥離法(Void-assisted Separation Method:VAS法)を用いてサファイア基板上にGaNエピタキシャル層を成長させ、その後、サファイア基板を除去することによりGaN自立基板を作製し、評価した。VAS法の詳細は特願2002-64345号に記載されているが、簡単に言うと、サファイア基板とGaN成長層との間に、網目構造を有する窒化チタンの薄膜を挟み込んで結晶成長を行う方法である。以下、本実施例のGaN自立基板の作製方法を図5を参照して説明する。
Example 3
A GaN epitaxial layer was grown on a sapphire substrate by using a void-assisted separation method (VAS method), and then the sapphire substrate was removed to prepare and evaluate a GaN free-standing substrate. The details of the VAS method are described in Japanese Patent Application No. 2002-64345. To put it simply, a method of crystal growth by sandwiching a thin film of titanium nitride having a network structure between a sapphire substrate and a GaN growth layer. It is. Hereinafter, a method of manufacturing the GaN free-standing substrate of this example will be described with reference to FIG.

直径2インチの単結晶サファイアC面基板21上に、MOVPE法により、トリメチルガリウム(TMG)とNH3を原料として、アンドープGaN層22を300 nmの厚さに成長させた(工程(b))。次にこのGaNエピタキシャル基板上に、金属Ti膜23を20 nmの厚さに蒸着し(工程(c))、これを電気炉に入れて、20%のNH3と80%のH2の混合ガスの気流中で、1050℃×20 minの熱処理を施した。その結果、GaN層22の一部がエッチングされて高密度の空隙が発生した層24に変化するとともに、金属Ti膜23が窒化されて、表面にサブミクロンの微細な穴が高密度に形成されたTiN層25に変化した。その結果、(d) に示す構造の基板が得られた。 An undoped GaN layer 22 was grown to a thickness of 300 nm using trimethylgallium (TMG) and NH 3 as raw materials on a single-crystal sapphire C-plane substrate 21 with a diameter of 2 inches (process (b)). . Next, a metal Ti film 23 is deposited on the GaN epitaxial substrate to a thickness of 20 nm (step (c)) and placed in an electric furnace to mix 20% NH 3 and 80% H 2 . Heat treatment at 1050 ° C. × 20 min was performed in a gas stream. As a result, a part of the GaN layer 22 is etched to change to a layer 24 in which high-density voids are generated, and the metal Ti film 23 is nitrided to form fine submicron holes on the surface with high density. Changed to TiN layer 25. As a result, a substrate having the structure shown in (d) was obtained.

この基板をHVPE炉に入れ、GaN結晶26を全体で400μmの厚さに堆積させた。まずGaN結晶26aの成長に用いた原料はNH3とGaClで、キャリアガスとして5%のH2と95%のN2の混合ガスを用いた。成長条件は、常圧、基板温度1040℃であった。供給ガス中のGaCl及びNH3の分圧は、成長の開始時には、それぞれ8×10-3atm及び5.6×10-2atmであり、V/III比を7とした。またGaN結晶26aの成長過程で、ドーピング原料ガスとしてSiH2Cl2を基板領域に供給することによりSiのドーピングを行った。 This substrate was put into an HVPE furnace, and a GaN crystal 26 was deposited to a total thickness of 400 μm. First, the raw materials used for the growth of the GaN crystal 26a were NH 3 and GaCl, and a mixed gas of 5% H 2 and 95% N 2 was used as a carrier gas. The growth conditions were normal pressure and a substrate temperature of 1040 ° C. The partial pressures of GaCl and NH 3 in the feed gas were 8 × 10 −3 atm and 5.6 × 10 −2 atm, respectively, at the start of growth, and the V / III ratio was 7. In addition, Si was doped by supplying SiH 2 Cl 2 as a doping source gas to the substrate region during the growth process of the GaN crystal 26a.

GaNの核26aがまず基板21上に3次元の島状に生成し(工程(e))、次いで結晶同士が横方向に成長して互いに結合し、表面の平坦化が進行していった(工程(f))。この様子は、成長時間を変えて炉外に取り出した基板表面及び断面を顕微鏡観察することにより確認した。成長時間を長くするに従って、GaN結晶26aの成長界面におけるピット27の数は減少していったが、完全にはなくならず、表面には依然多くのピットが存在する状態で、結晶成長は進行した。ピット27は、真上から見ると直径が数μm〜数十μm程度のほぼ円形か12角形であった。(f) に相当する試料の断面の蛍光顕微鏡像では、基板21の界面からGaN表面に存在するピット27の底部までつながる暗い領域28が認められた。この領域28は、ドーパントの取り込み量が少なく、キャリア濃度が周囲より低いものと考えられる。   First, GaN nuclei 26a are formed in a three-dimensional island shape on the substrate 21 (step (e)), and then the crystals grow laterally and bond to each other, and the surface flattening proceeds ( Step (f)). This state was confirmed by observing the substrate surface and cross-section taken out of the furnace with different growth times under a microscope. As the growth time increased, the number of pits 27 at the growth interface of the GaN crystal 26a decreased, but it did not disappear completely, and crystal growth proceeded with many pits still existing on the surface. did. The pit 27 was almost circular or dodecagonal with a diameter of several μm to several tens of μm when viewed from directly above. In the fluorescence microscopic image of the cross section of the sample corresponding to (f), a dark region 28 that is connected from the interface of the substrate 21 to the bottom of the pit 27 existing on the GaN surface was observed. In this region 28, it is considered that the amount of dopant taken in is small and the carrier concentration is lower than the surroundings.

(f) に示す状態までGaN結晶26aを成長させた後、供給ガス中のGaCl分圧だけ12×10-2atmに増大させて結晶成長を続けたところ、ピット27が終端して、GaN結晶26aの成長界面はさらに平坦化する傾向が見られた(工程(g))。GaN結晶26aの成長界面26cが平坦化した後、さらに200μm以上の厚さにGaN結晶26bの成長を継続した。成長界面の平坦化後に成長した領域26bでは、断面の蛍光顕微鏡観察により、明度の異なる領域が新たに発生していないことが判明した。すなわち、明度の異なる領域28はGaN結晶26の途中で終端し(工程(h))、GaN結晶の最外面まで到達していないことが確認できた。 After growing the GaN crystal 26a to the state shown in (f), the crystal growth was continued by increasing the GaCl partial pressure in the supply gas to 12 × 10 −2 atm. The growth interface of 26a tended to flatten further (step (g)). After the growth interface 26c of the GaN crystal 26a was flattened, the growth of the GaN crystal 26b was further continued to a thickness of 200 μm or more. In the region 26b grown after the flattening of the growth interface, it was found by observation with a cross-sectional fluorescence microscope that a region having a different brightness was not newly generated. That is, it was confirmed that the region 28 having different brightness was terminated in the middle of the GaN crystal 26 (step (h)) and did not reach the outermost surface of the GaN crystal.

GaN結晶成長の終了後HVPE装置を冷却する過程で、GaN層26はボイド層を境にサファイアの下地基板から自然に剥離し、GaN自立基板30が得られた(工程(i))。このGaN自立基板基板30の表裏両面を鏡面研磨加工することにより表面を20μm及び裏面を50μm除去し、平坦性を向上させた。鏡面研磨により、GaN自立基板30の最終厚さは330μmとなった(工程(j))。   In the process of cooling the HVPE apparatus after completion of the GaN crystal growth, the GaN layer 26 was naturally separated from the sapphire base substrate with the void layer as a boundary, and a GaN free-standing substrate 30 was obtained (step (i)). The front and back surfaces of the GaN free-standing substrate substrate 30 were mirror-polished to remove the front surface by 20 μm and the back surface by 50 μm, thereby improving the flatness. By mirror polishing, the final thickness of the GaN free-standing substrate 30 became 330 μm (step (j)).

得られたGaN自立基板30の表面及び裏面におけるキャリア濃度分布をvan der Pauw法により基板の直径方向に5mmの間隔で測定した。その結果、基板表面におけるキャリア濃度は9.2×1017〜10.1×1017cm-3の範囲内であり、十分に均一であることが確認できた。これに対して、基板裏面におけるキャリア濃度は2.8×1017cm-3〜8.8×1017cm-3と、大きくばらついていることが判明した。またこのGaN自立基板30の断面を蛍光顕微鏡観察したところ、表面から深さ100μm以上の領域にわたって明度の異なる領域が存在していないことが確認された。 The carrier concentration distribution on the front and back surfaces of the obtained GaN free-standing substrate 30 was measured by a van der Pauw method at intervals of 5 mm in the diameter direction of the substrate. As a result, it was confirmed that the carrier concentration on the substrate surface was in a range of 9.2 × 10 17 to 10.1 × 10 17 cm −3 and was sufficiently uniform. On the other hand, the carrier concentration on the back surface of the substrate was found to vary greatly from 2.8 × 10 17 cm −3 to 8.8 × 10 17 cm −3 . Further, when the cross section of the GaN free-standing substrate 30 was observed with a fluorescence microscope, it was confirmed that there were no regions having different brightness over a region having a depth of 100 μm or more from the surface.

GaN自立基板30の表面及び裏面における転位密度を測定した。表面における転位密度は、燐酸と硫酸の加熱混合液中にGaN自立基板30を浸漬し、エッチングにより生じたピットの数を計数することにより求めた。また裏面における転位密度は、plan-viewの透過型電子顕微鏡(TEM)観察像から求めた。その結果、このGaN自立基板30の表面における転位密度は4.2±1×106 cm-2であり、裏面における転位密度は7.2 ±1×108 cm-2であることが判明した。 The dislocation density on the front and back surfaces of the GaN free-standing substrate 30 was measured. The dislocation density on the surface was determined by immersing the GaN free-standing substrate 30 in a heated mixed solution of phosphoric acid and sulfuric acid and counting the number of pits generated by etching. The dislocation density on the back surface was determined from a plan-view transmission electron microscope (TEM) observation image. As a result, it was found that the dislocation density on the surface of this GaN free-standing substrate 30 was 4.2 ± 1 × 10 6 cm −2 and the dislocation density on the back surface was 7.2 ± 1 × 10 8 cm −2 .

実施例4
実施例3と同様にVAS法を用いて、サファイア基板上にGaNエピタキシャル層を成長させ、その後サファイア基板を除去することによりGaN自立基板を作製し、評価した。以下、本実施例のGaN自立基板の作製方法を、図8を参照して説明する。
Example 4
In the same manner as in Example 3, a GaN epitaxial layer was grown on the sapphire substrate using the VAS method, and then the sapphire substrate was removed to prepare and evaluate a GaN free-standing substrate. Hereinafter, a method of manufacturing the GaN free-standing substrate of this example will be described with reference to FIG.

直径2インチの単結晶サファイアC面基板31上に、MOVPE法により、TMGとNH3を原料として、アンドープGaN層32を300 nmの厚さに成長させた(工程(b))。このGaNエピタキシャル基板上に、金属Ti膜33を20 nmの厚さに蒸着し(工程(c))、これを電気炉に入れて、20%のNH3と80%のH2の混合ガスの気流中で、1050℃×20 minの熱処理を施した。その結果、GaN層32の一部がエッチングされて高密度の空隙が発生した層34に変化するとともに、Ti層33は窒化されて、表面にサブミクロンの微細な穴が高密度に形成されたTiN層35に変化した。その結果、(d) に示す構造の基板が得られた。 On the single crystal sapphire C-plane substrate 31 having a diameter of 2 inches, an undoped GaN layer 32 was grown to a thickness of 300 nm using TMG and NH 3 as raw materials by the MOVPE method (step (b)). On this GaN epitaxial substrate, a metal Ti film 33 is deposited to a thickness of 20 nm (step (c)), and this is put into an electric furnace to mix a mixed gas of 20% NH 3 and 80% H 2 . Heat treatment at 1050 ° C. × 20 min was performed in an air stream. As a result, a part of the GaN layer 32 is etched to change to a layer 34 in which high-density voids are generated, and the Ti layer 33 is nitrided to form submicron fine holes at a high density on the surface. Changed to TiN layer 35. As a result, a substrate having the structure shown in (d) was obtained.

この基板をHVPE炉に入れ、GaN結晶36を550μmの厚さに堆積させた。結晶成長に用いた原料はNH3とGaClで、キャリアガスとして5%のH2と95%のN2の混合ガスを用いた。成長条件は、常圧、基板温度1040℃であった。供給ガス中のGaCl及びNH3の分圧は、結晶成長の開始時には、それぞれ8×10-3atm及び5.6×10-2atmであり、V/III比は7とした。またGaN結晶の成長過程で、ドーピング原料ガスとしてSiH2Cl2を基板領域に供給することによりSiのドーピングを行った。 This substrate was placed in an HVPE furnace, and GaN crystal 36 was deposited to a thickness of 550 μm. The raw materials used for crystal growth were NH 3 and GaCl, and a mixed gas of 5% H 2 and 95% N 2 was used as a carrier gas. The growth conditions were normal pressure and a substrate temperature of 1040 ° C. The partial pressures of GaCl and NH 3 in the supply gas were 8 × 10 −3 atm and 5.6 × 10 −2 atm, respectively, at the start of crystal growth, and the V / III ratio was 7. In addition, Si was doped by supplying SiH 2 Cl 2 as a doping source gas to the substrate region during the GaN crystal growth process.

はじめにGaNの核36aが基板31上に3次元の島状に生成し(工程(e))、次いで結晶同士が横方向に成長して互いに結合し、表面の平坦化が進行していった(工程(f))。この様子は、成長時間を変えて炉外に取り出した基板表面及び断面を顕微鏡観察することにより、確認した。成長時間を長くするに従って、GaN結晶36aの成長界面におけるピット37の数は減少していったが、完全にはなくならず、表面には依然多くのピットが存在する状態で、結晶成長は進行した。ピット37は、真上から見ると直径が数μm〜数十μm程度のほぼ円形か12角形であった。(f) に相当する試料の断面の蛍光顕微鏡像では、基板の界面からGaN表面に存在するピット37の底部までつながる暗い領域38が観察された。この領域38は、ドーパントの取り込み量が少なく、キャリア濃度が周囲より低いものと考えられる。   First, GaN nuclei 36a are formed in a three-dimensional island shape on the substrate 31 (step (e)), and then crystals grow laterally and bond to each other, and the surface flattening proceeds ( Step (f)). This state was confirmed by observing the substrate surface and cross-section taken out of the furnace with a microscope under a different growth time. As the growth time was increased, the number of pits 37 at the growth interface of the GaN crystal 36a decreased, but it did not disappear completely, and crystal growth proceeded with many pits still existing on the surface. did. The pit 37 was almost circular or dodecagonal with a diameter of about several μm to several tens of μm when viewed from directly above. In the fluorescence microscopic image of the cross section of the sample corresponding to (f), a dark region 38 was observed that connected from the interface of the substrate to the bottom of the pits 37 present on the GaN surface. This region 38 is considered to have a small amount of dopant incorporation and a lower carrier concentration than the surroundings.

(f) に示す状態までGaN結晶36aを成長させた後、供給ガス中のGaCl分圧だけ12×10-2atmに増やして成長を続けたところ、ピット37が終端し、GaN結晶36aの成長界面は、さらに平坦化する傾向が見られた(工程(g))。この時点までに、約80μmの厚さのGaN結晶36aが成長していた。GaN結晶36aの成長界面の平坦化後、さらに470μmの厚さにGaN結晶36bの成長を継続した。成長界面の平坦化後に成長した領域36bでは、断面の蛍光顕微鏡観察により明度の異なる領域の新たな発生が認められなかった。すなわち、明度の異なる領域38はGaN結晶36の途中で終端してしまい(工程(h))、結晶の最外面まで到達していないことが確認できた。 After growing the GaN crystal 36a to the state shown in (f) and then increasing the GaCl partial pressure in the supply gas to 12 × 10 -2 atm, the pit 37 terminated and the growth of the GaN crystal 36a There was a tendency for the interface to further flatten (step (g)). By this time, a GaN crystal 36a having a thickness of about 80 μm had grown. After planarization of the growth interface of the GaN crystal 36a, the growth of the GaN crystal 36b was further continued to a thickness of 470 μm. In the region 36b grown after the flattening of the growth interface, no new generation of regions with different brightness was observed by observation of the cross section with a fluorescence microscope. That is, it was confirmed that the region 38 with different brightness terminated in the middle of the GaN crystal 36 (step (h)) and did not reach the outermost surface of the crystal.

結晶成長の終了後HVPE装置を冷却する過程で、GaN層36はボイド層を境に下地基板31から自然に剥離し、GaN自立基板40が得られた(工程(i))。このGaN自立基板40の表裏両面を鏡面研磨加工することにより、表面及び裏面をそれぞれ20μm及び100μmの深さまで除去し、平坦性を向上させた。鏡面研磨により、GaN自立基板40の最終厚さは430μmとなった。   In the process of cooling the HVPE apparatus after completion of the crystal growth, the GaN layer 36 was naturally separated from the base substrate 31 with the void layer as a boundary, and a GaN free-standing substrate 40 was obtained (step (i)). The front and back surfaces of the GaN free-standing substrate 40 were mirror-polished to remove the front and back surfaces to a depth of 20 μm and 100 μm, respectively, thereby improving the flatness. By mirror polishing, the final thickness of the GaN free-standing substrate 40 was 430 μm.

得られたGaN自立基板40の表面及び裏面におけるキャリア濃度分布をvan der Pauw法により基板の直径方向に5mmの間隔で測定した。その結果、基板表面におけるキャリア濃度は9.2×1017cm-3〜10.1×1017cm-3の範囲内であり、十分に均一であることが確認できた。また基板裏面におけるキャリア濃度は8.8×1017cm-3〜10.8×1017cm-3と、表面と大きく変わらないことが判明した。このGaN自立基板40の断面を蛍光顕微鏡観察したところ、基板内部には明度の異なる領域が存在していないことが確認された。 The carrier concentration distribution on the front and back surfaces of the obtained GaN free-standing substrate 40 was measured by a van der Pauw method at intervals of 5 mm in the diameter direction of the substrate. As a result, it was confirmed that the carrier concentration on the substrate surface was in the range of 9.2 × 10 17 cm −3 to 10.1 × 10 17 cm −3 and was sufficiently uniform. It was also found that the carrier concentration on the back surface of the substrate was 8.8 × 10 17 cm −3 to 10.8 × 10 17 cm −3, which was not significantly different from the surface. When the cross section of the GaN free-standing substrate 40 was observed with a fluorescence microscope, it was confirmed that there were no regions with different brightness within the substrate.

実施例5
FIELO法(A. Usui, et al., Jpn. J. Appl. Phys. Vol. 36 (1997), pp. L.899-L.902)を用いてサファイア基板上にGaNエピタキシャル層を成長させ、その後サファイア基板を除去することによりGaN自立基板を作製し、評価した。以下、本実施例のGaN自立基板の作製方法を、図9を参照して説明する。
Example 5
Using the FIELO method (A. Usui, et al., Jpn. J. Appl. Phys. Vol. 36 (1997), pp. L.899-L.902), a GaN epitaxial layer is grown on the sapphire substrate, Thereafter, a GaN free-standing substrate was fabricated by removing the sapphire substrate and evaluated. Hereinafter, a method of manufacturing the GaN free-standing substrate of this example will be described with reference to FIG.

直径2インチの単結晶サファイアC面基板41上に、MOVPE法により、TMGとNH3を原料として、アンドープGaN層42を600 nmの厚さに成長させた(工程(b))。次にこのGaNエピタキシャル基板上に熱CVD法によりSiO2膜を0.5μmの厚さに堆積し、フォトリソグラフィによりSiO2膜に<11-20>と平行にストライプ状の窓を開け、GaN層42を露出させた(工程(c))。窓の幅は3μmであり、SiO2マスク43の幅は7μmであった。 On the single crystal sapphire C-plane substrate 41 having a diameter of 2 inches, an undoped GaN layer 42 was grown to a thickness of 600 nm using TMG and NH 3 as raw materials by the MOVPE method (step (b)). Next, a SiO 2 film is deposited to a thickness of 0.5 μm on this GaN epitaxial substrate by a thermal CVD method, and a stripe-like window is opened in parallel with <11-20> on the SiO 2 film by photolithography to obtain a GaN layer 42 Was exposed (step (c)). The width of the window was 3 μm, and the width of the SiO 2 mask 43 was 7 μm.

この基板をHVPE炉に入れ、GaN結晶44を全体で500μmの厚さに堆積させた。結晶成長に用いた原料はNH3とGaClで、キャリアガスとして5%のH2と95%のN2の混合ガスを用いた。成長条件は、常圧、基板温度1040℃であった。結晶成長の開始時には、供給ガス中のGaCl及びNH3の分圧はそれぞれ8×10-3atm及び5.6×10-2atmとし、V/III比は7とした。GaN結晶の成長過程では、ドーピング原料ガスとしてSiH2Cl2を基板領域に供給することにより、Siのドーピングを行った。 This substrate was placed in an HVPE furnace, and a GaN crystal 44 was deposited to a total thickness of 500 μm. The raw materials used for crystal growth were NH 3 and GaCl, and a mixed gas of 5% H 2 and 95% N 2 was used as a carrier gas. The growth conditions were normal pressure and a substrate temperature of 1040 ° C. At the start of crystal growth, the partial pressures of GaCl and NH 3 in the supply gas were 8 × 10 −3 atm and 5.6 × 10 −2 atm, respectively, and the V / III ratio was 7. In the GaN crystal growth process, Si was doped by supplying SiH 2 Cl 2 as a doping source gas to the substrate region.

GaN結晶44は、はじめ窓部の下地GaN上に選択的に成長し、<11-20>と平行なストライプ状に配列した。<11-20>と垂直な断面は、(d) に模式的に示すようになっていた。   The GaN crystals 44 were first selectively grown on the underlying GaN in the window, and were arranged in stripes parallel to <11-20>. The cross section perpendicular to <11-20> was as shown schematically in (d).

マスクの溝部が埋まると、SiO2マスク43上ではGaN結晶44aは基板全面を覆うように横方向に成長した。このとき、ストライプ状に伸びたGaN結晶44aの側面にはファセット面が現れ、隣の結晶と会合する領域には、断面がV字型の溝45が出現した(工程(e))。この様子は、成長時間を変えて炉外に取り出した基板表面及び断面を顕微鏡観察することにより、確認した。 When the groove of the mask was filled, the GaN crystal 44a grew in the lateral direction on the SiO 2 mask 43 so as to cover the entire surface of the substrate. At this time, a facet surface appeared on the side surface of the GaN crystal 44a extending in a stripe shape, and a V-shaped groove 45 appeared in a region associated with the adjacent crystal (step (e)). This state was confirmed by observing the substrate surface and cross-section taken out of the furnace with a microscope under a different growth time.

(e) に相当する試料の断面の蛍光顕微鏡像には、SiO2マスク43との界面からGaN表面に存在するV字溝45の底部までつながる暗い領域46が認められた。この領域46は、ドーパントの取り込み量が少なく、キャリア濃度が周囲より低い領域であった。 In the fluorescence microscopic image of the cross section of the sample corresponding to (e), a dark region 46 connected from the interface with the SiO 2 mask 43 to the bottom of the V-shaped groove 45 existing on the GaN surface was observed. This region 46 was a region where the amount of dopant incorporated was small and the carrier concentration was lower than the surroundings.

そのまま結晶成長時間を長くすると、結晶成長は成長界面に前述のV字型の溝45を残したまま進行していったが、これらの溝45は成長の進行とともに次第に埋まり、GaN結晶44aの厚さが100μmを超える頃には、平坦な表面を有するGaN膜となった(工程(f))。   If the crystal growth time is increased as it is, the crystal growth proceeds while leaving the aforementioned V-shaped grooves 45 at the growth interface, but these grooves 45 are gradually filled as the growth proceeds, and the thickness of the GaN crystal 44a increases. When the thickness exceeded 100 μm, a GaN film having a flat surface was obtained (step (f)).

GaN結晶44aの成長界面を平坦化させた後、さらに約400μmの厚さまでGaN結晶44bの成長を継続した。GaN結晶断面の蛍光顕微鏡観察の結果、成長界面の平坦化後に成長した領域には新たに明度の異なる領域が発生していなかった。すなわち、明度の異なる領域46はGaN結晶44の途中で終端してしまい(工程(g))、結晶の最外面まで到達していないことが観察された。   After flattening the growth interface of the GaN crystal 44a, the growth of the GaN crystal 44b was continued to a thickness of about 400 μm. As a result of observing the cross section of the GaN crystal with a fluorescence microscope, there was no new region with different brightness in the region grown after the growth interface was flattened. That is, it was observed that the regions 46 with different brightness terminated in the middle of the GaN crystal 44 (step (g)) and did not reach the outermost surface of the crystal.

こうして総厚さ約500μmのGaN結晶44が得られた。GaN結晶44の平均成長速度は約75μm/hであった。この基板を反応管から取り出し、前述のレーザーリフトオフ法により、サファイア基板41を取り除き、GaN自立基板50を得た(工程(h))。   Thus, a GaN crystal 44 having a total thickness of about 500 μm was obtained. The average growth rate of the GaN crystal 44 was about 75 μm / h. The substrate was taken out from the reaction tube, and the sapphire substrate 41 was removed by the laser lift-off method described above to obtain a GaN free-standing substrate 50 (step (h)).

GaN自立基板50の表裏両面を鏡面研磨加工することにより、表面及び裏面をそれぞれ20μm及び60μmづつ除去し、平坦性を向上させた(工程(i))。GaN自立基板50の最終厚さは420μmあった。基板断面の蛍光顕微鏡観察の結果、基板の表側の大部分(380μmの厚さ)にキャリア濃度の異なる領域がないことが判明した。このGaN自立基板50の断面の蛍光顕微鏡像を図10に示す。   The front and back surfaces of the GaN free-standing substrate 50 were mirror-polished to remove the front and back surfaces by 20 μm and 60 μm, respectively, thereby improving the flatness (step (i)). The final thickness of the GaN free-standing substrate 50 was 420 μm. As a result of observing the cross section of the substrate with a fluorescence microscope, it was found that there was no region with a different carrier concentration in most of the front side of the substrate (thickness of 380 μm). FIG. 10 shows a fluorescence microscope image of a cross section of the GaN free-standing substrate 50.

このGaN自立基板50の表面及び裏面におけるキャリア濃度分布をvan der Pauw法により基板の直径方向に5mmの間隔で測定した。その結果、基板表面におけるキャリア濃度は6.6×1017cm-3〜7.2×1017cm-3の範囲内であり、十分に均一であることが確認できた。これに対して、基板裏面におけるキャリア濃度は1.7×1017cm-3〜7.2×1017cm-3と、大きくばらついていることが判明した。 The carrier concentration distribution on the front and back surfaces of the GaN free-standing substrate 50 was measured by a van der Pauw method at intervals of 5 mm in the diameter direction of the substrate. As a result, it was confirmed that the carrier concentration on the substrate surface was in the range of 6.6 × 10 17 cm −3 to 7.2 × 10 17 cm −3 and was sufficiently uniform. On the other hand, the carrier concentration on the back surface of the substrate was found to vary greatly from 1.7 × 10 17 cm −3 to 7.2 × 10 17 cm −3 .

このGaN自立基板50上に、MOVPE法によりGaNのエピタキシャル膜を1μmの厚さに成長させ、その表面モフォロジを調べたところ、基板全面にわたって均一な鏡面状態になっていることが確認された。   A GaN epitaxial film was grown to a thickness of 1 μm on the GaN free-standing substrate 50 by the MOVPE method, and its surface morphology was examined. As a result, it was confirmed that the entire surface of the substrate was in a uniform mirror state.

実施例6
参考例1と同じ方法及び条件で、図11に示すように、直径50 mmのサファイア基板11上にまずキャリア濃度が異なる領域14を含む第一のGaN層12aを成長させ(工程(a)〜(d))、次いで成長界面12cを平坦化することにより(工程(e))、キャリア濃度が均一な第二のGaN層12bを成長させた(工程(f))。参考例1と異なる点は、キャリア濃度が均一な第二のGaN層12bを厚さ約20 mmまで連続して成長させたことである。
Example 6
As shown in FIG. 11, first, a first GaN layer 12a including a region 14 having a different carrier concentration is grown on a sapphire substrate 11 having a diameter of 50 mm under the same method and conditions as in Reference Example 1 (steps (a) to (a)). (d)) Next, the growth interface 12c was flattened (step (e)) to grow a second GaN layer 12b having a uniform carrier concentration (step (f)). The difference from Reference Example 1 is that the second GaN layer 12b having a uniform carrier concentration was continuously grown to a thickness of about 20 mm.

厚さ約20 mmの第二のGaN層12bを、サファイア基板11が付いたままの状態で固定治具に貼り付け、ダイヤモンド砥粒を電着したワイヤーソーを用いて切断した。GaN結晶12bの切断は、結晶の成長方向に垂直(サファイア基板11表面に平行)に行った(工程(g))。こうして、厚く成長した第二のGaN層12bから、直径50 mm及び厚さ450μmのGaN基板12dを19枚切出した。切出した各GaN基板の表裏両面を鏡面研磨し、無色透明のGaN自立基板12dを得た(工程(h))。   The second GaN layer 12b having a thickness of about 20 mm was attached to a fixing jig with the sapphire substrate 11 still attached, and was cut using a wire saw electrodeposited with diamond abrasive grains. The GaN crystal 12b was cut perpendicular to the crystal growth direction (parallel to the surface of the sapphire substrate 11) (step (g)). Thus, 19 GaN substrates 12d having a diameter of 50 mm and a thickness of 450 μm were cut out from the thickly grown second GaN layer 12b. Both the front and back surfaces of each cut GaN substrate were mirror-polished to obtain a colorless and transparent GaN free-standing substrate 12d (step (h)).

こうして得られた各GaN自立基板12dの任意の表面及び断面を蛍光顕微鏡で観察したところ、明度が異なる領域は全く観察されなかった。   When arbitrary surfaces and cross sections of the GaN free-standing substrates 12d thus obtained were observed with a fluorescence microscope, no regions with different brightness were observed at all.

各GaN自立基板12dの表面におけるキャリア濃度分布をvan der Pauw法により基板の直径方向に5mmの間隔で測定したところ、キャリア濃度は6.9×1017cm-3〜7.4×1017cm-3の範囲内であり、十分に均一であることが確認できた。 When the carrier concentration distribution on the surface of each GaN free-standing substrate 12d is measured at 5 mm intervals in the diameter direction of the substrate by the van der Pauw method, the carrier concentration is in the range of 6.9 × 10 17 cm −3 to 7.4 × 10 17 cm −3 . It was confirmed that the film was sufficiently uniform.

各GaN自立基板12d上にMOVPE法によりGaNのエピタキシャル膜を2μmの厚さに成長させ、その表面モフォロジを調べたところ、基板全面にわたって均一な鏡面状態になっていることが確認された。   A GaN epitaxial film was grown to a thickness of 2 μm on each GaN free-standing substrate 12d by the MOVPE method, and when the surface morphology was examined, it was confirmed that the entire surface of the substrate was in a uniform mirror state.

以上本発明を実施例に基づいて詳細に説明したが、これらは例示であり、それらの各プロセスの組合せ等にいろいろな変形例が可能なこと、またそうした変形例も本発明の範囲にあることは当業者に理解されるところである。たとえば、実施例において、GaN結晶成長の一部にMOVPE法を組合せても良い。また結晶成長の初期又は途中の段階で、結晶成長界面に複数の凹凸を出しながら成長を行わせるために、従来技術として知られている、SiO2等のマスクを用いるELO技術を組合せて用いても良い。実施例では下地基板にサファイア基板を用いたが、GaAsやSi、ZrB2、ZnO等の従来GaN系エピタキシャル層用基板として報告例のある基板は、すべて適用が可能である。 The present invention has been described in detail on the basis of the embodiments. However, these are exemplifications, and various modifications can be made to combinations of the respective processes, and such modifications are also within the scope of the present invention. Will be understood by those skilled in the art. For example, in the embodiment, the MOVPE method may be combined with part of the GaN crystal growth. In addition, in order to cause the growth to occur while projecting a plurality of irregularities at the crystal growth interface in the initial or middle stage of crystal growth, it is used in combination with ELO technology using a mask such as SiO 2 known as the prior art. Also good. In the examples, a sapphire substrate is used as the base substrate, but any substrate that has been reported as a conventional GaN-based epitaxial layer substrate such as GaAs, Si, ZrB 2 , or ZnO can be applied.

下地基板の除去後、熱処理により、GaN基板の表面におけるキャリア濃度分布を均一化させても良い。これは、GaN結晶を1000℃前後の高温に保持することにより、結晶表面の原子(又は分子)が、マストランスポートにより再構成される現象を利用するものである。ただしこの方法では、改質される表面の深さに限りがあるので、本発明ほどは均質化の効果が得られない。   After removing the base substrate, the carrier concentration distribution on the surface of the GaN substrate may be made uniform by heat treatment. This utilizes the phenomenon in which atoms (or molecules) on the crystal surface are reconstructed by mass transport by holding the GaN crystal at a high temperature around 1000 ° C. However, in this method, since the depth of the surface to be modified is limited, the effect of homogenization cannot be obtained as much as in the present invention.

実施例ではGaNの自立基板の製造方法を例示したが、勿論AlGaNの自立基板に適用することもできる。   In the embodiment, the method for manufacturing a GaN free-standing substrate is exemplified, but it is of course applicable to an AlGaN free-standing substrate.

1,15,30,40,50・・・GaN自立基板
2,14,28,38,46・・・キャリア濃度の異なる領域
11,21,31,41・・・サファイア基板
12,26,36,44・・・GaN結晶
12a,26a,36a,44a・・・キャリア濃度の異なる領域を含有しない層
12b,26b,36b,44b・・・キャリア濃度が実質的に均一な層
13,27,37・・・ファセット面で囲まれたピット
23,33・・・金属チタン
24,34・・・空隙を有するGaN結晶
25,35・・・網目構造の窒化チタン
42・・・MOVPE成長GaN下地結晶層
43・・・SiO2マスク
45・・・断面V字型の溝
1,15,30,40,50 ... GaN free-standing substrate 2,14,28,38,46 ... regions with different carrier concentrations
11, 21, 31, 41 ... Sapphire substrate
12, 26, 36, 44 ... GaN crystal
12a, 26a, 36a, 44a ... Layers that do not contain regions with different carrier concentrations
12b, 26b, 36b, 44b ... Layers with substantially uniform carrier concentration
13, 27, 37 ... Pit surrounded by facets
23, 33 ... titanium metal
GaN crystal with voids
25, 35 ... Network-structured titanium nitride
42 ・ ・ ・ MOVPE-grown GaN base crystal layer
43 ・ ・ ・ SiO 2 mask
45 ・ ・ ・ V-shaped groove

Claims (13)

III−V族窒化物系半導体結晶の成長の初期又は途中の段階では結晶成長界面に複数の凹凸を出しながら結晶成長を行い、次いで前記凹凸を埋めるように結晶成長を行って前記結晶成長界面を平坦化し、さらに平坦化した結晶成長界面の形状を保ったまま前記III−V族窒化物系半導体層が400μm以上1mm以下の厚さになるまで結晶成長を継続し、結晶成長終了後に表面から少なくとも100μmの深さまでの表面層の断面の蛍光顕微鏡像に、高明度領域と低明度領域の境界が存在しないように基板表面を研磨することを特徴とする自立したIII−V族窒化物系半導体基板の製造方法。At the initial stage or in the middle of the growth of the group III-V nitride semiconductor crystal, the crystal growth is performed while projecting a plurality of irregularities on the crystal growth interface, and then the crystal growth is performed so as to fill the irregularities. Crystal growth is continued until the thickness of the group III-V nitride semiconductor layer becomes 400 μm or more and 1 mm or less while maintaining the shape of the flattened crystal growth interface, and at least from the surface after the crystal growth is completed. A self-supporting group III-V nitride semiconductor substrate characterized in that the substrate surface is polished so that the boundary between the high brightness region and the low brightness region does not exist in the fluorescence microscope image of the cross section of the surface layer up to a depth of 100 μm Manufacturing method. 異種基板の上面にIII−V族窒化物系半導体層をエピタキシャル成長により形成した後、前記III−V族窒化物系半導体層と前記異種基板とを分離する工程を含む自立したIII−V族窒化物系半導体基板の製造方法であって、前記III−V族窒化物系半導体層の成長の初期又は途中の段階では結晶成長界面に複数の凹凸を出しながら結晶成長を行い、次いで前記凹凸を埋めるように結晶成長を行って結晶成長界面を平坦化し、さらに平坦化した結晶成長界面の形状を保ったまま前記III−V族窒化物系半導体層が400μm以上1mm以下の厚さになるまで結晶成長を継続し、結晶成長終了後に表面から少なくとも100μmの深さまでの表面層の断面の蛍光顕微鏡像に、高明度領域と低明度領域の境界が存在しないように基板表面を研磨することを特徴とするIII−V族窒化物系半導体基板の製造方法。A self-supporting group III-V nitride including a step of separating a group III-V nitride semiconductor layer and the heterogeneous substrate after forming a group III-V nitride semiconductor layer on the upper surface of the heterogeneous substrate by epitaxial growth A method of manufacturing a semiconductor substrate, wherein crystal growth is performed while projecting a plurality of irregularities at a crystal growth interface at an initial stage or in the middle of the growth of the group III-V nitride semiconductor layer, and then the irregularities are filled. Crystal growth is performed to flatten the crystal growth interface, and the crystal growth is continued until the thickness of the III-V nitride semiconductor layer becomes 400 μm or more and 1 mm or less while maintaining the flattened crystal growth interface shape. Continue and polish the substrate surface so that the boundary between the high brightness region and the low brightness region does not exist in the fluorescence microscope image of the cross section of the surface layer from the surface to a depth of at least 100 μm after the crystal growth is completed. -Group V nitride The method of manufacturing a semiconductor substrate. 請求項1又は2に記載のIII−V族窒化物系半導体基板の製造方法において、結晶成長終了後に成長界面に複数の凹凸を出しながら成長した領域の少なくとも一部を除去することを特徴とするIII−V族窒化物系半導体基板の製造方法。3. The method of manufacturing a group III-V nitride semiconductor substrate according to claim 1, wherein at least a part of the grown region is removed while projecting a plurality of irregularities on the growth interface after the crystal growth is completed. A method for manufacturing a group III-V nitride semiconductor substrate. 請求項1又は2に記載のIII−V族窒化物系半導体基板の製造方法において、結晶成長終了後に成長界面に複数の凹凸を出しながら成長した領域を全て除去することを特徴とするIII−V族窒化物系半導体基板の製造方法。3. The method of manufacturing a group III-V nitride semiconductor substrate according to claim 1 or 2, wherein after the crystal growth is finished, all the grown regions are removed while projecting a plurality of irregularities on the growth interface. A method for manufacturing a group nitride semiconductor substrate. 請求項1〜4のいずれかに記載のIII−V族窒化物系半導体基板の製造方法において、結晶成長の初期又は途中の段階で結晶成長界面に形成する凹凸の凹部の、成長方向と平行な断面での形状が、ファセット面で囲まれたV字型又は逆台形型であることを特徴とするIII−V族窒化物系半導体基板の製造方法。The method for manufacturing a group III-V nitride semiconductor substrate according to any one of claims 1 to 4, wherein the concave and convex recesses formed in the crystal growth interface at an initial stage or in the middle of the crystal growth are parallel to the growth direction. A method for producing a group III-V nitride semiconductor substrate, wherein the cross-sectional shape is a V-shape or an inverted trapezoidal shape surrounded by a facet plane. 請求項1〜5のいずれかに記載のIII−V族窒化物系半導体基板の製造方法において、結晶成長の初期又は途中の段階で結晶成長界面に形成する凹凸の凹部が、ファセット面で囲まれたすり鉢状の形状を有することを特徴とするIII−V族窒化物系半導体基板の製造方法。6. The method for manufacturing a group III-V nitride semiconductor substrate according to claim 1, wherein the concave and convex concave portions formed at the crystal growth interface at the initial stage or in the middle of the crystal growth are surrounded by facet surfaces. A method for producing a group III-V nitride semiconductor substrate characterized by having a mortar shape. 請求項1〜6のいずれかに記載のIII−V族窒化物系半導体基板の製造方法において、結晶成長の少なくとも一部をHVPE法により行うことを特徴とするIII−V族窒化物系半導体基板の製造方法。7. The method for producing a group III-V nitride semiconductor substrate according to claim 1, wherein at least part of the crystal growth is performed by an HVPE method. Manufacturing method. 請求項1〜7のいずれかに記載のIII−V族窒化物系半導体基板の製造方法において、結晶成長の途中で結晶成長界面の凹凸を埋めるために、成長雰囲気ガスの水素濃度をそれまでより高くすることを特徴とするIII−V族窒化物系半導体基板の製造方法。The method of manufacturing a group III-V nitride semiconductor substrate according to any one of claims 1 to 7, wherein the hydrogen concentration of the growth atmosphere gas is set higher than before in order to fill the irregularities of the crystal growth interface during the crystal growth. A method for producing a group III-V nitride semiconductor substrate, characterized by comprising increasing the height. 請求項1〜8のいずれかに記載のIII−V族窒化物系半導体基板の製造方法において、結晶成長の途中で結晶成長界面の凹凸を埋めるために、III族原料の分圧をそれまでより高くすることを特徴とするIII−V族窒化物系半導体基板の製造方法。The method for producing a group III-V nitride semiconductor substrate according to any one of claims 1 to 8, wherein the partial pressure of the group III raw material is set higher than before in order to fill the unevenness of the crystal growth interface during the crystal growth. A method for producing a group III-V nitride semiconductor substrate, characterized by comprising increasing the height. 請求項1〜のいずれかに記載のIII−V族窒化物系半導体基板の製造方法において、基板表面が(0001)のIII族面であることを特徴とするIII−V族窒化物系半導体基板の製造方法In the claims 1-9 production method of the III-V nitride semiconductor substrate according to any one of, III-V nitride semiconductor, wherein the substrate surface is a Group III surface of (0001) A method for manufacturing a substrate. 請求項1〜10のいずれかに記載のIII−V族窒化物系半導体基板の製造方法において、表面の転位密度が裏面の転位密度より少ないことを特徴とするIII−V族窒化物系半導体基板の製造方法The method for producing a group III-V nitride semiconductor substrate according to any one of claims 1 to 10 , wherein the dislocation density on the front surface is lower than the dislocation density on the back surface. Manufacturing method . 請求項1〜11のいずれかに記載のIII−V族窒化物系半導体基板の製造方法において、GaN又はAlGaNからなる層を含むことを特徴とするIII−V族窒化物系半導体基板の製造方法In the claims 1-11 production method of the III-V nitride semiconductor substrate according to any one of method of the III-V nitride semiconductor substrate, characterized in that it comprises a layer made of GaN or AlGaN . 請求項1〜12のいずれかに記載のIII−V族窒化物系半導体基板の製造方法において、III−V族窒化物系半導体結晶に不純物がドープされていることを特徴とするIII−V族窒化物系半導体基板の製造方法
The group III-V nitride semiconductor substrate according to any one of claims 1 to 12 , wherein the group III-V nitride semiconductor crystal is doped with an impurity. A method for manufacturing a nitride semiconductor substrate.
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