JP5508244B2 - Manufacturing method of semiconductor light emitting device - Google Patents

Manufacturing method of semiconductor light emitting device Download PDF

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JP5508244B2
JP5508244B2 JP2010276842A JP2010276842A JP5508244B2 JP 5508244 B2 JP5508244 B2 JP 5508244B2 JP 2010276842 A JP2010276842 A JP 2010276842A JP 2010276842 A JP2010276842 A JP 2010276842A JP 5508244 B2 JP5508244 B2 JP 5508244B2
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light emitting
semiconductor light
sealing member
electrode
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JP2012124443A (en
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嘉将 木下
和昭 反町
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Citizen Holdings Co Ltd
Citizen Electronics Co Ltd
Citizen Watch Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568Temporary substrate used as encapsulation process aid
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19Manufacturing methods of high density interconnect preforms

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Description

本発明は、半導体発光素子を樹脂等で封止し、外部基板との接続電極を備える半導体発光装置及びその製造方法に関する。   The present invention relates to a semiconductor light emitting device in which a semiconductor light emitting element is sealed with a resin or the like and a connection electrode with an external substrate is provided, and a manufacturing method thereof.

半導体発光素子(以後とくに断らない限りLED素子と呼ぶ)を樹脂等で封止し、外部基板との接続電極を備える半導体発光装置(以後とくに断らない限りLED装置と呼ぶ)のなかで、反射剤が入った封止部材でLED素子の側面を封止したLED装置が知られている(例えば特許文献1)。   In a semiconductor light emitting device (hereinafter referred to as an LED device unless otherwise specified), a semiconductor light emitting device (hereinafter referred to as an LED device unless otherwise specified) is sealed with a resin or the like. There is known an LED device in which a side surface of an LED element is sealed with a sealing member containing (for example, Patent Document 1).

特許文献1の図1を図11に示す。図11は、反射剤入りの第1封止樹脂6がLEDチップ4(LED素子)の周囲を埋めるようにしたLED装置の断面図である。LEDチップ4は、セラミック材により作られたリフレクトケース1の中央に配置され、リフレクトケース1は四角錘状の開口2を備えている。LEDチップ4はリードフレーム3aにダイボンディングされ、LEDチップ4の上面電極はリードフレーム3bとボンディングワイヤ5により接続している。   FIG. 1 of Patent Document 1 is shown in FIG. FIG. 11 is a cross-sectional view of the LED device in which the first sealing resin 6 containing the reflective agent fills the periphery of the LED chip 4 (LED element). The LED chip 4 is disposed in the center of a reflector case 1 made of a ceramic material, and the reflector case 1 includes a square pyramid-shaped opening 2. The LED chip 4 is die-bonded to the lead frame 3 a, and the upper surface electrode of the LED chip 4 is connected to the lead frame 3 b by a bonding wire 5.

このLEDチップ4は、エピタキシャル発光層から青色光が発光し、ZnSe基板から黄色光が発光する。この黄色光と青色光のうち側方に向かう光は第1封止樹脂6の反射材で反射しLEDチップ4内へ戻される。下方に向かう光はLEDチップ4の底面に形成された反射層(図示せず)で反射される。このようにして最終的に青色光及び黄色光の全てがLEDチップ4の上面から出射する。この結果、二色混合が効果的に行われ高輝度の白色光が得られる。   The LED chip 4 emits blue light from the epitaxial light emitting layer and emits yellow light from the ZnSe substrate. Of the yellow light and the blue light, the light directed to the side is reflected by the reflecting material of the first sealing resin 6 and returned into the LED chip 4. The downward light is reflected by a reflective layer (not shown) formed on the bottom surface of the LED chip 4. In this way, all of blue light and yellow light are finally emitted from the upper surface of the LED chip 4. As a result, two-color mixing is effectively performed, and high brightness white light is obtained.

LED素子側面を白色反射性部材でとり囲むと、LED装置としては、LED素子側面から出射し有効利用しにくい光線をLED素子上面方向に向かわせられるため光利用効率が向上する。しかしながら特許文献1のリードフレーム3bやリフレクトケース1のようにLED素子(LEDチップ4)を実装するための回路基板があるとLED装置が厚くなる。そこで薄型化に向け実装用回路基板を備えないLED装置が望まれる。   When the LED element side surface is surrounded by a white reflective member, the light utilization efficiency of the LED device is improved because the light emitted from the LED element side surface and difficult to use effectively can be directed toward the LED element upper surface. However, if there is a circuit board for mounting the LED element (LED chip 4) like the lead frame 3b and the reflective case 1 of Patent Document 1, the LED device becomes thick. Therefore, an LED device that does not include a circuit board for mounting is desired to reduce the thickness.

このようなLED装置は例えば特許文献2の図2Dに示されている。特許文献2の図2A〜Dを図12(a)〜(d)に示す。図12(d)に示した薄型パッケージ電子デバイス216(LED装置)は、下部に電気接続部202,204,206(接続電極)を備え、電気接続部204上には接着剤218を介して電子デバイス208(LED素子)がダイボンドされ、固定材214(封止部材)で電気接続部202,204,206及び電子デバイス208をモールド固定している。なお、電気接続部202,206と電子デバイス208はワイヤボンド210,212で接続している。   Such an LED device is shown, for example, in FIG. 2A to 2D of Patent Document 2 are shown in FIGS. A thin package electronic device 216 (LED device) shown in FIG. 12 (d) includes electrical connection portions 202, 204, and 206 (connection electrodes) at the lower portion, and an electronic device is provided on the electrical connection portion 204 via an adhesive 218. The device 208 (LED element) is die-bonded, and the electrical connection portions 202, 204, 206 and the electronic device 208 are fixed by molding using a fixing material 214 (sealing member). The electrical connection parts 202 and 206 and the electronic device 208 are connected by wire bonds 210 and 212.

図12(a)〜(d)によりこの薄型パッケージ電子デバイス216の製造方法を説明する。基板200上には3つの電気接続部202,204,206(トレース又はパッド等)が設けられている(a)。電子デバイス208は電気接続部204の上に接着剤218により搭載され、電子デバイス208と電気接続部202,206をワイヤボンド210,212で結合する(b)。次に電子デバイス208と電気接続部202〜206、ワイヤボンド210,212を固定剤214で封止固定する(c)。最後に基板200を除去し、電気接続部202〜206が薄型パッケージ電子デバイス216上のパッケージ接続部として露出する(d)。   A method for manufacturing the thin package electronic device 216 will be described with reference to FIGS. On the substrate 200, three electrical connection portions 202, 204, 206 (traces or pads) are provided (a). The electronic device 208 is mounted on the electrical connection portion 204 by an adhesive 218, and the electronic device 208 and the electrical connection portions 202 and 206 are coupled by wire bonds 210 and 212 (b). Next, the electronic device 208, the electrical connection portions 202 to 206, and the wire bonds 210 and 212 are sealed and fixed with a fixing agent 214 (c). Finally, the substrate 200 is removed, and the electrical connection portions 202 to 206 are exposed as package connection portions on the thin package electronic device 216 (d).

特開2002−43625号公報 (図1)JP 2002-43625 A (FIG. 1) 特開2006−173605号公報 (図2A〜D)JP 2006-173605 A (FIGS. 2A to 2D)

特許文献2のように電極を備えた基板にLED素子を実装し、封止部材でLED素子とともに基板表面をモールドしてから、基板だけを除去し封止部材下面に電極だけを残す製造方法では、電極と基板がLED素子の実装に耐えられるようにしっかり接着していなければならないため基板除去に困難がともなう。   In a manufacturing method in which an LED element is mounted on a substrate having electrodes as in Patent Document 2, the substrate surface is molded together with the LED element with a sealing member, and then only the substrate is removed and only the electrode is left on the lower surface of the sealing member. Since the electrodes and the substrate must be firmly bonded so that they can withstand the mounting of the LED element, it is difficult to remove the substrate.

そこで本発明は、この課題を解決するため、実装用回路基板がなくても、高い発光効率を維持したまま製造し易いLED装置製造方法の提供を目的とする。
The present invention, this order problem to solve, even without mounting the circuit board, and an object thereof is to provide a manufacturing method of easily LED device manufactured while maintaining high luminous efficiency.

上記課題を解決するため本発明は、バンプ電極を有する半導体発光素子と、該半導体発光素子から出射する光を波長変換する蛍光体層と、少なくとも該半導体発光素子の側面を封止する封止部材と、外部基板との接続をとる接続電極とを備える半導体発光装置において、
前記蛍光体層は前記半導体発光素子の上面に形成され、
前記封止部材は反射剤を含み、前記半導体発光素子の側面とともに前記バンプ電極を除く前記半導体発光素子の下面を封止し、
前記封止部材と前記バンプ電極の下面の高さが略一致し、
前記接続電極が前記封止部材及び前記バンプ電極の下面に接し、メッキ電極からなることを特徴とする。
In order to solve the above-described problems, the present invention provides a semiconductor light emitting device having a bump electrode, a phosphor layer that converts the wavelength of light emitted from the semiconductor light emitting device, and a sealing member that seals at least the side surface of the semiconductor light emitting device. And a semiconductor light emitting device comprising a connection electrode for connecting to an external substrate,
The phosphor layer is formed on the upper surface of the semiconductor light emitting device,
The sealing member includes a reflective agent, and seals a lower surface of the semiconductor light emitting element excluding the bump electrode together with a side surface of the semiconductor light emitting element,
The height of the bottom surface of the sealing member and the bump electrode substantially matches,
The connection electrode is in contact with the lower surface of the sealing member and the bump electrode and is made of a plating electrode.

上記構成の半導体発光素子は、蛍光体層が半導体発光素子の上面に形成され、反射剤を含む封止部材で半導体発光素子の側面とともに底面(下面)を封止している。蛍光体層を半導体発光素子の上面に形成する方法は、周知の塗布法や印刷法が適用できるため工程としては容易である。また反射剤を含む封止部材で半導体発光素子の側面と底面を封止しているため、半導体発光素子から出射する光は吸収される分を除いて全て上方に向かうため発光効率が高い。   In the semiconductor light emitting device having the above-described configuration, the phosphor layer is formed on the upper surface of the semiconductor light emitting device, and the bottom surface (lower surface) is sealed together with the side surface of the semiconductor light emitting device by a sealing member including a reflective agent. A method of forming the phosphor layer on the upper surface of the semiconductor light emitting device is easy as a process because a known coating method or printing method can be applied. In addition, since the side surface and the bottom surface of the semiconductor light emitting element are sealed with a sealing member containing a reflective agent, the light emitted from the semiconductor light emitting element is directed upward except for the amount absorbed, so that the light emission efficiency is high.

またこの半導体発光装置において、封止部材と半導体発光素子のバンプ電極は下面の高さが略一致しており、接続電極が封止部材の下面に形成される。この接続電極はメッキ電極からなる。バンプ電極の下面の高さが略一致しているため、周知のメッキ法で封止部材の下面にメッキ電極を容易に形成できる。この結果、従来から知られている基板を除去して電極パターンを封止部材下面に残す半導体発光装置比べ、本発明の半導体発光装置は著しく製造が容易になる。   In this semiconductor light emitting device, the height of the bottom surface of the sealing member and the bump electrode of the semiconductor light emitting element are substantially the same, and the connection electrode is formed on the bottom surface of the sealing member. This connection electrode consists of a plating electrode. Since the height of the lower surface of the bump electrode is substantially the same, the plated electrode can be easily formed on the lower surface of the sealing member by a known plating method. As a result, the semiconductor light-emitting device of the present invention is significantly easier to manufacture than the conventional semiconductor light-emitting device that removes the substrate and leaves the electrode pattern on the lower surface of the sealing member.

上記課題を解決するため本発明は、バンプ電極を有する半導体発光素子の上面に該半導体発光素子から出射する光を波長変換する蛍光体層を形成するとともに、少なくとも該半導体発光素子側面を封止部材で封止し、該封止部材の底面には接続電極を形成する半導体発光装置の製造方法において、
上面に粘着層を備える支持基板に前記バンプ電極が形成された面を上に向けて複数の前記半導体発光素子を配置する素子配置工程と、
前記複数の半導体発光素子の側面とともに前記バンプ電極を有する面を、反射剤を含む前記封止部材で封止する封止工程と、
前記封止部材と前記バンプ電極の高さが一致するように該封止部材又は該バンプ電極を削る研磨工程と、
前記封止部材で前記複数の半導体発光素子が連結した集合体の前記バンプ電極が露出した面にメッキ法で前記接続電極を形成する電極形成工程と、
前記集合体を切断して個片化する個片化工程と
を備えることを特徴とする。
In order to solve the above problems, the present invention forms a phosphor layer for wavelength-converting light emitted from a semiconductor light emitting element on the upper surface of the semiconductor light emitting element having a bump electrode, and at least seals the side surface of the semiconductor light emitting element. In the method for manufacturing a semiconductor light emitting device, in which the connection electrode is formed on the bottom surface of the sealing member,
An element arrangement step of arranging a plurality of the semiconductor light emitting elements with a surface on which the bump electrode is formed on a support substrate having an adhesive layer on an upper surface thereof;
A sealing step of sealing a surface having the bump electrode together with side surfaces of the plurality of semiconductor light emitting elements with the sealing member containing a reflective agent;
A polishing step of scraping the sealing member or the bump electrode so that the height of the sealing member and the bump electrode coincides;
An electrode forming step of forming the connection electrode by a plating method on a surface where the bump electrode of the assembly in which the plurality of semiconductor light emitting elements are connected by the sealing member is exposed;
And an individualization step of cutting the aggregate into pieces.

上記の製造方法により製造される半導体発光装置は、半導体発光素子の側面及び底面(バンプ電極が形成された面)が反射剤を含む封止部材で囲まれているため発光効率が高い。また封止部材で複数の半導体発光素子が連結した集合体のバンプ電極露出側の面が平坦であるため、メッキ法で接続電極が簡単に形成できることから製造が容易である。   The semiconductor light emitting device manufactured by the above manufacturing method has high light emission efficiency because the side surface and the bottom surface (surface on which the bump electrode is formed) of the semiconductor light emitting element are surrounded by the sealing member containing the reflective agent. Further, since the surface on the bump electrode exposed side of the assembly in which a plurality of semiconductor light emitting elements are connected by the sealing member is flat, the connection electrode can be easily formed by a plating method, so that the manufacture is easy.

前記メッキ法が電解メッキ法であることが好ましい。   The plating method is preferably an electrolytic plating method.

前記電極形成工程の後に前記集合体を前記支持基板から剥離し、接続電極を形成した面を下にして新たな支持基板上に配置してから、前記集合体上面に前記蛍光体層を形成しても良い。   After the electrode forming step, the assembly is peeled off from the support substrate, and is placed on a new support substrate with the surface on which the connection electrode is formed facing down, and then the phosphor layer is formed on the upper surface of the assembly. May be.

前記半導体発光素子が連結して配列したウェハーに前記蛍光体層を形成し、該ウェハーを個片化して得られた前記半導体発光素子を前記支持基板に配置しても良い。   The phosphor layer may be formed on a wafer in which the semiconductor light emitting elements are connected and arranged, and the semiconductor light emitting element obtained by separating the wafer into individual pieces may be disposed on the support substrate.

以上のように本発明の半導体発光層装置及びその製造方法は、リードフレーム等の実装用回路基板がなくても、高い発光効率を維持したまま簡単に製造できる。   As described above, the semiconductor light emitting layer device and the manufacturing method thereof of the present invention can be easily manufactured while maintaining high light emission efficiency even without a mounting circuit board such as a lead frame.

本発明の第1実施形態におけるLED装置の断面図。The sectional view of the LED device in a 1st embodiment of the present invention. 図1の部分拡大図。The elements on larger scale of FIG. 図1に示したLED装置の製造方法の説明図。Explanatory drawing of the manufacturing method of the LED apparatus shown in FIG. 図1に示したLED装置の製造方法の説明図。Explanatory drawing of the manufacturing method of the LED apparatus shown in FIG. 本発明の第2実施形態におけるLED装置の断面図。Sectional drawing of the LED apparatus in 2nd Embodiment of this invention. 図5の部分拡大図。The elements on larger scale of FIG. 図5に示したLED素子の製造方法の説明図。Explanatory drawing of the manufacturing method of the LED element shown in FIG. 本発明の第3実施形態におけるLED装置の断面図。Sectional drawing of the LED apparatus in 3rd Embodiment of this invention. 参考例のLED素子の電極面を示す平面図。The top view which shows the electrode surface of the LED element of a reference example. 本発明の第4実施形態におけるLED素子の説明図。Explanatory drawing of the LED element in 4th Embodiment of this invention. 従来のLED装置の断面図。Sectional drawing of the conventional LED device. 従来のLED装置の断面図及びその工程図。Sectional drawing of the conventional LED device, and its process drawing.

以下、添付図1〜10を参照しながら本発明の好適な実施形態について詳細に説明する。なお図面の説明において、同一または相当要素には同一の符号を付し、重複する説明は省略する。また説明のため部材の縮尺は適宜変更している。さらに特許請求の範囲に記載した発明特定事項との関係をカッコ内に記載している。
(第1実施形態)
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS. In the description of the drawings, the same or equivalent elements will be denoted by the same reference numerals, and redundant description will be omitted. For the sake of explanation, the scale of the members is changed as appropriate. Furthermore, the relationship with the invention specific matter described in the claims is described in parentheses.
(First embodiment)

図1により本発明の第1実施形態におけるLED装置10(半導体発光装置)の構造を説明する。図1は本実施形態のLED装置10の断面図である。LED装置10において、接続電極17は上面でLED素子18のバンプ電極14と接続している。LED素子18は2個のバンプ電極14の上に半導体層13とサファイア基板12が積層している。LED素子18の側面及びバンプ電極14を除く底面(下面)は、反射剤を含む封止部材11で封止されている。LED素子18及び封止部材11の上面には蛍光体層15が形成され、蛍光体層15に透明樹脂層16が積層している。封止部材11とバンプ電極14の下部の高さは一致しており、バンプ電極14を含む封止部材11の底面に接続電極17が形成されている。   The structure of the LED device 10 (semiconductor light emitting device) in the first embodiment of the present invention will be described with reference to FIG. FIG. 1 is a cross-sectional view of the LED device 10 of the present embodiment. In the LED device 10, the connection electrode 17 is connected to the bump electrode 14 of the LED element 18 on the upper surface. In the LED element 18, the semiconductor layer 13 and the sapphire substrate 12 are laminated on the two bump electrodes 14. The side surface of the LED element 18 and the bottom surface (lower surface) excluding the bump electrode 14 are sealed with a sealing member 11 containing a reflective agent. A phosphor layer 15 is formed on the upper surfaces of the LED element 18 and the sealing member 11, and a transparent resin layer 16 is laminated on the phosphor layer 15. The height of the lower part of the sealing member 11 and the bump electrode 14 is the same, and the connection electrode 17 is formed on the bottom surface of the sealing member 11 including the bump electrode 14.

封止部材11において反射剤は酸化チタンであり、バインダはシリコーン樹脂である。同様に蛍光体層15は蛍光体粒子をシリコーン樹脂に混練したものであり、透明樹脂層16もシリコーン樹脂である。接続電極17は電解メッキ法で形成したメッキ電極である。LED素子18は青色発光ダイオードである。   In the sealing member 11, the reflective agent is titanium oxide, and the binder is silicone resin. Similarly, the phosphor layer 15 is obtained by kneading phosphor particles in a silicone resin, and the transparent resin layer 16 is also a silicone resin. The connection electrode 17 is a plating electrode formed by electrolytic plating. The LED element 18 is a blue light emitting diode.

接続電極17は図の上から、メッキ用共通電極で使ったTiW、電解メッキ法で形成したCu,Ni,Auが積層し10μm程度の厚さになる。サファイア基板12は厚さが80〜120μm、半導体層13は厚さが7μm程度であり、バンプ電極14は電解メッキ法で形成すれば厚さが10〜30μm程度になる。LED素子18から下方向に出射した光を効率良く上方に向けるには、LED素子18の下面に設けた封止部材11の厚さが30μm以上あることが好ましい。蛍光体層15及び透明樹脂層16は厚さが100μm程度である。   The connection electrode 17 has a thickness of about 10 μm by laminating TiW used for the common electrode for plating and Cu, Ni, Au formed by electrolytic plating from the top of the figure. The sapphire substrate 12 has a thickness of 80 to 120 μm, the semiconductor layer 13 has a thickness of about 7 μm, and the bump electrode 14 has a thickness of about 10 to 30 μm if formed by electrolytic plating. In order to efficiently direct light emitted downward from the LED element 18 upward, the thickness of the sealing member 11 provided on the lower surface of the LED element 18 is preferably 30 μm or more. The phosphor layer 15 and the transparent resin layer 16 have a thickness of about 100 μm.

図2によりLED装置10から出射する光の様子を説明する。図2は図1のAで囲んだ領域の拡大図に、半導体層13から出射した青色の光線L1,L2を書き加えたものである。半導体層13から出射する青色光のうち光線L1は、サファイア基板12、蛍光体層15及び透明樹脂層16を通りLED装置10から出射する。光線L2はサファイア基板12の側面を抜け封止部材11に侵入し、ここで反射剤により反射し再びサファイア基板12に戻り、蛍光体層15と透明樹脂層16を通りLED装置10から出射する。下に向かった光線(図示せず)は、下方の封止部材11、バンプ電極14、又はLED素子18の反射層(図示せず、バンプを有するLED素子は反射層を備えることが多い)で反射し上に向かう。以上のようにLED素子18の半導体層13から出射した光線L1,L2等は、吸収などの損失を除きサファイア基板12の上面を通ってLED装置10から出射する。蛍光体層15では青色光の一部が蛍光体により波長変換され、この波長変換された光と青色光の加色混合により白色化する。なお蛍光体層15の発光は等方的であるが下に向かった光線は前述の下に向かう青色光と同様にして上に向かう。   The state of light emitted from the LED device 10 will be described with reference to FIG. FIG. 2 is obtained by adding blue light beams L1 and L2 emitted from the semiconductor layer 13 to the enlarged view of the region surrounded by A in FIG. Of the blue light emitted from the semiconductor layer 13, the light ray L <b> 1 is emitted from the LED device 10 through the sapphire substrate 12, the phosphor layer 15, and the transparent resin layer 16. The light beam L2 passes through the side surface of the sapphire substrate 12 and enters the sealing member 11, where it is reflected by the reflecting agent, returns to the sapphire substrate 12 again, passes through the phosphor layer 15 and the transparent resin layer 16, and is emitted from the LED device 10. The light beam (not shown) directed downward is a reflective layer of the lower sealing member 11, bump electrode 14, or LED element 18 (not shown, LED elements having bumps often include a reflective layer). Reflect and head up. As described above, the light beams L1, L2 and the like emitted from the semiconductor layer 13 of the LED element 18 are emitted from the LED device 10 through the upper surface of the sapphire substrate 12 except for losses such as absorption. In the phosphor layer 15, part of the blue light is wavelength-converted by the phosphor, and whitened by additive mixing of the wavelength-converted light and the blue light. The phosphor layer 15 emits light in an isotropic manner, but the light beam directed downward is directed upward in the same manner as the blue light traveling downward.

図3と図4により本実施形態のLED装置10の製造方法を説明する。図3,4はLED装置10の製造方法の説明図である。(a)と(b)は、上面に粘着層を備える支持基板31にバンプ電極14が形成された面を上に向けて複数のLED素子18を配置する素子配置工程を示している。(a)で示した支持基板31はガラスからなり、上面に形成された粘着層(図示せず)は紫外線により粘着力を失う。支持基板31を準備したら、所定の間隔で支持基板31上にLED素子18を配置する(b)。このときサファイア基板12(番号は図1,2に示した)側を粘着させる。   A method for manufacturing the LED device 10 of this embodiment will be described with reference to FIGS. 3 and 4 are explanatory diagrams of the method for manufacturing the LED device 10. (A) And (b) has shown the element arrangement | positioning process which arrange | positions several LED element 18 with the surface in which the bump electrode 14 was formed in the support substrate 31 provided with the adhesion layer on the upper surface. The support substrate 31 shown in (a) is made of glass, and an adhesive layer (not shown) formed on the upper surface loses adhesive force due to ultraviolet rays. When the support substrate 31 is prepared, the LED elements 18 are arranged on the support substrate 31 at a predetermined interval (b). At this time, the sapphire substrate 12 (the numbers are shown in FIGS. 1 and 2) is adhered.

(c)は複数のLED素子18の側面とともにバンプ電極14を有する面を、反射剤を含む封止部材11で封止する封止工程である。封止部材11はバンプ電極14を覆うように塗布し、約150℃程度で硬化させる。   (C) is a sealing step of sealing the surface having the bump electrodes 14 together with the side surfaces of the plurality of LED elements 18 with the sealing member 11 containing a reflective agent. The sealing member 11 is applied so as to cover the bump electrode 14 and cured at about 150 ° C.

(d)は封止部材11とバンプ電極14の高さが一致するように封止部材11を削る研磨工程である。バンプ電極14の表面が現れるまで封止部材11を研磨する。このとき多少はバンプ電極14も研磨して良い。封止部材11を削るには研磨剤を使っても良いし、刃で研削しても良い。バンプ電極14上面の方が封止部材11上面より高い場合はバンプ電極14を削っても良い。この結果、バンプ電極14上面と封止部材11上面の高さを一致させることができる。また、封止部材11で複数のLED素子18が連結した集合体32ができあがる。   (D) is a polishing process in which the sealing member 11 is shaved so that the heights of the sealing member 11 and the bump electrode 14 coincide. The sealing member 11 is polished until the surface of the bump electrode 14 appears. At this time, the bump electrode 14 may be polished to some extent. To scrape off the sealing member 11, an abrasive may be used, or it may be ground with a blade. If the upper surface of the bump electrode 14 is higher than the upper surface of the sealing member 11, the bump electrode 14 may be removed. As a result, the height of the upper surface of the bump electrode 14 and the upper surface of the sealing member 11 can be matched. Moreover, the aggregate | assembly 32 which the some LED element 18 connected with the sealing member 11 is completed.

(e)〜(i)は集合体32のバンプ電極14の露出面にメッキ法で接続電極17を形成する電極形成工程を示している。まず集合体32の上面にTiWからなるメッキ用共通電極膜33を形成する(e)。次に感光性のレジスト膜34を塗布し、露光・現像により接続電極17を形成する領域を開口させる(f)。メッキ用共通電極膜33を使って開口部に電解メッキ法によりCu,Ni,Auが積層した金属層35を形成する(g)。レジスト膜34を除去する(h)。最後に金属層35をマスクとしてメッキ用共通電極膜33をエッチングする(i)。以上のようにしてTiW層上に金属層35を備えた接続電極17が集合体32の上面に形成される。   (E)-(i) has shown the electrode formation process in which the connection electrode 17 is formed in the exposed surface of the bump electrode 14 of the aggregate | assembly 32 by the plating method. First, a plating common electrode film 33 made of TiW is formed on the upper surface of the aggregate 32 (e). Next, a photosensitive resist film 34 is applied, and a region for forming the connection electrode 17 is opened by exposure / development (f). Using the common electrode film 33 for plating, a metal layer 35 in which Cu, Ni, and Au are laminated is formed in the opening by electrolytic plating (g). The resist film 34 is removed (h). Finally, the plating common electrode film 33 is etched using the metal layer 35 as a mask (i). As described above, the connection electrode 17 including the metal layer 35 on the TiW layer is formed on the upper surface of the assembly 32.

(j)は電極形成工程の後に集合体32を支持基板31から剥離し、接続電極17を形成した面を下にして新たな支持基板36上に配置し直す工程である。なお支持基板31を剥離する前に、ガラスからなる支持基板31を介して粘着層に紫外線を照射し粘着層の粘着力を失わせる。この結果、集合体32を容易に剥離できる。また支持基板36はダイシングシートである。   (J) is a step of separating the assembly 32 from the support substrate 31 after the electrode formation step and rearranging the assembly 32 on the new support substrate 36 with the surface on which the connection electrode 17 is formed facing down. Before the support substrate 31 is peeled off, the adhesive layer is irradiated with ultraviolet rays through the support substrate 31 made of glass to lose the adhesive force of the adhesive layer. As a result, the assembly 32 can be easily peeled off. The support substrate 36 is a dicing sheet.

(k)は集合体32上面に蛍光体層15を形成する工程である。シリコーン樹脂と蛍光体を混練した蛍光体ペーストを集合体32に塗布し約150℃で硬化させる。(l)は蛍光体層15上面に透明樹脂層16を形成する工程である。硬化前のシリコーン樹脂を塗布し約150℃で硬化させる。(m)は集合体32を切断してLED装置10に個片化する個片化工程である。   (K) is a step of forming the phosphor layer 15 on the upper surface of the aggregate 32. A phosphor paste obtained by kneading a silicone resin and a phosphor is applied to the aggregate 32 and cured at about 150 ° C. (L) is a step of forming the transparent resin layer 16 on the upper surface of the phosphor layer 15. A silicone resin before curing is applied and cured at about 150 ° C. (M) is an individualization step of cutting the assembly 32 into individual pieces into the LED device 10.

封止部材11、蛍光体層15、透明樹脂層16に含まれるシリコーン樹脂の本格的な硬化(架橋)はLED装置10に個片化した後で行なうのが好ましい。このようにすると硬化にともなう収縮の影響で起こる位置ズレを防止できる。また本実施形態では封止部材11、蛍光体層15のバインダをシリコーン樹脂としていたが、オルガノポリシロキサンのように焼結するとガラス質となる無機バインダであっても良い。このバインダも触媒により約150℃程度で硬化する。またバインダが無機質であるため耐熱性が高く光劣化が少ないという特徴もある。   Full-scale curing (crosslinking) of the silicone resin contained in the sealing member 11, the phosphor layer 15, and the transparent resin layer 16 is preferably performed after the LED device 10 is separated into individual pieces. By doing so, it is possible to prevent positional deviation caused by shrinkage due to curing. In this embodiment, the binder of the sealing member 11 and the phosphor layer 15 is a silicone resin. However, an inorganic binder that becomes glassy when sintered, such as organopolysiloxane, may be used. This binder is also cured at about 150 ° C. by the catalyst. Further, since the binder is inorganic, it has a feature of high heat resistance and little light deterioration.

本実施形態では接続電極17を形成するのに電解メッキ法を採用したが、電解メッキ法
に限らず蒸着法やスパッタ法、CVD法など他のメッキ法でも良い。しかしながら電解メッキ法は大気中及び低温で処理できるため扱いやすい。
In the present embodiment, the electroplating method is employed to form the connection electrode 17, but other plating methods such as an evaporation method, a sputtering method, and a CVD method may be used without being limited to the electroplating method. However, the electrolytic plating method is easy to handle because it can be processed in the air and at a low temperature.

蛍光体層15に含まれる蛍光体として緑色発光用の蛍光体が含まれる場合、LED素子18の青色発光波長の変動によりこの蛍光体の発光効率が変化することがある。すなわちLED素子18の発光波長がばらつくとLED装置10が出射する白色光の色度もばらつく。これを押さえ込むためには(b)の工程で配置するLED素子18の発光波長を揃えておき、(k)の工程で蛍光体層15の厚みを調整すれば良い。この結果、LED装置10の発光色を狭い範囲に収めることが可能となる。
(実施形態2)
When a phosphor for green light emission is included as the phosphor included in the phosphor layer 15, the luminous efficiency of the phosphor may change due to a change in the blue light emission wavelength of the LED element 18. That is, when the emission wavelength of the LED element 18 varies, the chromaticity of the white light emitted from the LED device 10 also varies. In order to suppress this, the emission wavelengths of the LED elements 18 arranged in the step (b) are aligned, and the thickness of the phosphor layer 15 may be adjusted in the step (k). As a result, the emission color of the LED device 10 can be kept within a narrow range.
(Embodiment 2)

図5により本発明の第2実施形態におけるLED装置40(半導体発光装置)の構造を説明する。図5は本実施形態のLED装置40の断面図である。LED装置40と図1に示した第1実施形態のLED装置10との主な差異は、図5において蛍光体層45がLED素子48の上面にのみ存在し、その蛍光体層45の側面が反射剤を含む封止部材41で封止されていることである。いっぽう図5において、接続電極47が封止部材41の底面に形成されその上面がLED素子48のバンプ電極44と接続していること、LED素子48が2個のバンプ電極44上に半導体層43とサファイア基板42が積層していること、LED素子48の側面及びバンプ電極44を除く底面が反射剤を含む封止部材41で封止されていることは、図1に示した第1実施形態のLED装置10と同等であり部材及びその厚みは共通する。なお図1と異なり透明樹脂層46は蛍光体層45と封止部材41の上面を覆っている。   The structure of the LED device 40 (semiconductor light emitting device) in the second embodiment of the present invention will be described with reference to FIG. FIG. 5 is a cross-sectional view of the LED device 40 of the present embodiment. The main difference between the LED device 40 and the LED device 10 of the first embodiment shown in FIG. 1 is that the phosphor layer 45 exists only on the upper surface of the LED element 48 in FIG. It is sealed with the sealing member 41 containing a reflective agent. On the other hand, in FIG. 5, the connection electrode 47 is formed on the bottom surface of the sealing member 41 and the top surface is connected to the bump electrode 44 of the LED element 48, and the LED element 48 is on the two bump electrodes 44. The sapphire substrate 42 and the side surface of the LED element 48 and the bottom surface excluding the bump electrode 44 are sealed with a sealing member 41 containing a reflective agent in the first embodiment shown in FIG. The LED device 10 is the same, and the members and the thickness thereof are common. Unlike FIG. 1, the transparent resin layer 46 covers the upper surfaces of the phosphor layer 45 and the sealing member 41.

図6によりLED装置40から出射する光の様子を説明する。図6は図5のBで囲んだ領域の拡大図に、半導体層43から出射した青色の光線L3,L4を書き加えたものである。光線L3,L4は図2に示した第1実施形態の光線L1,L2と同等である。図2との差異は、図6において蛍光体層45の存在する領域がLED素子48の上部に限定され、その蛍光体層45の側面が反射材を含む封止部材41で囲まれているため、図2に比べ斜め方向に出射する光が少なくなることである。このためLED装置40は出射方位角に依存する色度の変化が少ないという特徴がある。また点光源に近くなるのでレンズ等による配光制御が容易になる。   The state of the light emitted from the LED device 40 will be described with reference to FIG. FIG. 6 is obtained by adding blue light beams L3 and L4 emitted from the semiconductor layer 43 to the enlarged view of the region surrounded by B in FIG. The light beams L3 and L4 are equivalent to the light beams L1 and L2 of the first embodiment shown in FIG. The difference from FIG. 2 is that in FIG. 6, the region where the phosphor layer 45 exists is limited to the upper part of the LED element 48, and the side surface of the phosphor layer 45 is surrounded by a sealing member 41 including a reflective material. The light emitted in the oblique direction is less than that in FIG. For this reason, the LED device 40 is characterized in that there is little change in chromaticity depending on the outgoing azimuth angle. Further, since it is close to a point light source, light distribution control by a lens or the like is facilitated.

図7により上面に蛍光体層45を備えたLED素子48の製造方法を説明する。図7は図5に示したLED素子48の製造方法の説明図である。多数のLED素子48が連結して配列したウェハー51を準備する(a)。ウェハー51の上部はサファイア基板42となっており、下面にバンプ電極44が形成されている。ウェハー51上面に蛍光体層45を形成する(b)。すなわち蛍光体を含有するシリコーン樹脂ペーストを塗布し約150℃で硬化させる。次に所定の厚みになるよう蛍光体層45を研磨する(c)。最後に蛍光体層45とともにウェハー51を切断しLED素子48に個片化する(d)。   A method of manufacturing the LED element 48 having the phosphor layer 45 on the upper surface will be described with reference to FIG. FIG. 7 is an explanatory diagram of a method for manufacturing the LED element 48 shown in FIG. A wafer 51 in which a number of LED elements 48 are connected and arranged is prepared (a). The upper portion of the wafer 51 is a sapphire substrate 42, and the bump electrode 44 is formed on the lower surface. A phosphor layer 45 is formed on the upper surface of the wafer 51 (b). That is, a silicone resin paste containing a phosphor is applied and cured at about 150 ° C. Next, the phosphor layer 45 is polished to a predetermined thickness (c). Finally, the wafer 51 is cut together with the phosphor layer 45 and separated into LED elements 48 (d).

LED装置40は図3,4により説明した第1実施形態の製造工程と同等の工程で製造される。上面に粘着層を備える支持基板に蛍光体層45を備えた複数のLED素子48を配置する{図3(a),(b)の素子配置工程に相当}。このLED素子48の側面を封止部材41で封止する{図3(c)の封止工程に相当}。封止部材41とバンプ電極44の高さが一致するように封止部材41を削る{図3(d)の研磨工程に相当}。封止部材41にメッキ法で接続電極47を形成する{図3(e)〜(i)の電極形成工程に相当}。次に支持基板を換え透明樹脂層46を形成する{図4(j),(l)の工程に相当}。最後に封止部材41でLED素子48が連結した集合体を切断しLED装置40に個片化する{図4(m)の個片化工程に相当}。   The LED device 40 is manufactured by a process equivalent to the manufacturing process of the first embodiment described with reference to FIGS. A plurality of LED elements 48 each having a phosphor layer 45 are arranged on a support substrate having an adhesive layer on the upper surface {corresponding to the element arrangement step in FIGS. 3A and 3B}. The side surface of the LED element 48 is sealed with the sealing member 41 {corresponding to the sealing step in FIG. 3C}. The sealing member 41 is shaved so that the heights of the sealing member 41 and the bump electrode 44 coincide {corresponding to the polishing step in FIG. 3D}. The connection electrode 47 is formed on the sealing member 41 by a plating method {corresponding to the electrode formation step in FIGS. 3E to 3I}. Next, the support substrate is changed to form the transparent resin layer 46 {corresponding to the steps of FIGS. 4 (j) and (l)}. Finally, the assembly in which the LED elements 48 are connected by the sealing member 41 is cut and separated into individual LED devices 40 {corresponding to the individualization step in FIG. 4 (m)}.

本実施形態は蛍光体層45がLED素子48の上部にだけ存在するため高価な蛍光体を節約できる。また前述のように方位角による色度変化が少なく点光源に近い。さらにLED素子48は密集したウェハー51に対して蛍光体層45を形成するので製造効率が良い。蛍光体層45を形成してからLED装置40に個片化するまで高温(概ね300℃以上)の工程がないので、蛍光体層45のバインダとしてシリコーン樹脂などの有機物系バインダが使える。
(実施形態3)
In the present embodiment, since the phosphor layer 45 exists only on the LED element 48, an expensive phosphor can be saved. Further, as described above, there is little change in chromaticity due to the azimuth angle and it is close to a point light source. Further, since the LED element 48 forms the phosphor layer 45 on the dense wafer 51, the manufacturing efficiency is good. Since there is no process of high temperature (approximately 300 ° C. or higher) from the formation of the phosphor layer 45 to the LED device 40 being separated, an organic binder such as a silicone resin can be used as the binder of the phosphor layer 45.
(Embodiment 3)

図8により本発明の第3実施形態におけるLED装置50(半導体発光装置)の構造を説明する。図8は本実施形態のLED装置50の断面図である。LED装置50と図5に示した第2実施形態のLED装置40とは、図8において蛍光体層45上に透明層52、封止部材41の下に第2封止部材53があり、透明樹脂層46がないことが異なっている。もともと図1,5の透明樹脂層16,46の主な目的は、蛍光体層45に侵入した水分で蛍光体が劣化することを防ぐことであった。本実施形態では透明層52があるので透明樹脂層16,46が不要になる。透明層52は有機材料でも良いが、二酸化Si等の無機材料であれば厚さが数10nm程度で十分なバリア性が確保できる。また透明層52は、図7(c)で示した蛍光体層45を形成する工程の後にウェハー51に形成すれば良いので製造効率が高い。図4(l)に相当する工程も不要になるので、接続電極47を形成{図3(i)に相当する工程}した直後にLED装置50に個片化しても良い。また第2封止部材53は、封止部材11と接続電極47の間の熱膨張率の差や、接続電極47の密着性を改善するものである。
(第4実施形態)
The structure of the LED device 50 (semiconductor light emitting device) in the third embodiment of the present invention will be described with reference to FIG. FIG. 8 is a cross-sectional view of the LED device 50 of the present embodiment. The LED device 50 and the LED device 40 according to the second embodiment shown in FIG. 5 include a transparent layer 52 on the phosphor layer 45 and a second sealing member 53 below the sealing member 41 in FIG. The difference is that there is no resin layer 46. Originally, the main purpose of the transparent resin layers 16 and 46 in FIGS. 1 and 5 was to prevent the phosphor from deteriorating due to moisture intruding into the phosphor layer 45. In the present embodiment, since the transparent layer 52 is provided, the transparent resin layers 16 and 46 are not required. The transparent layer 52 may be an organic material, but if it is an inorganic material such as Si dioxide, a thickness of about several tens of nm can ensure a sufficient barrier property. Moreover, since the transparent layer 52 should just be formed in the wafer 51 after the process of forming the fluorescent substance layer 45 shown in FIG.7 (c), manufacturing efficiency is high. Since the process corresponding to FIG. 4L is not necessary, the LED device 50 may be singulated immediately after the connection electrode 47 is formed {process corresponding to FIG. 3I}. The second sealing member 53 improves the difference in coefficient of thermal expansion between the sealing member 11 and the connection electrode 47 and the adhesion of the connection electrode 47.
(Fourth embodiment)

第1〜3実施形態におけるLED素子18,48はフリップチップ実装向けに開発されたLED素子を流用できる。n型GaN層(以後n型半導体層と呼ぶ)に薄いp型GaN層(以後p型半導体層と呼ぶ)を積層したフリップチップ実装向けのLED素子ではカソード用にあてがうバンプ電極は1個であることが多い。そこで図9によりフリップチップ実装用のLED素子の電極面を説明する。図9は参考例として示したLED素子71,72の電極面の平面図であり、(a)がカソード用のn側バンプ14aが角部にある場合、(b)がn側バンプ14cが辺部にある場合を示している。   As the LED elements 18 and 48 in the first to third embodiments, LED elements developed for flip chip mounting can be used. In an LED element for flip chip mounting in which a thin p-type GaN layer (hereinafter referred to as p-type semiconductor layer) is laminated on an n-type GaN layer (hereinafter referred to as n-type semiconductor layer), there is one bump electrode applied to the cathode. There are many cases. Accordingly, the electrode surface of the LED element for flip chip mounting will be described with reference to FIG. FIG. 9 is a plan view of the electrode surfaces of the LED elements 71 and 72 shown as a reference example. FIG. 9A shows a case where the n-side bump 14a for the cathode is at a corner, and FIG. The case where it exists in a part is shown.

図9(a)においてカソード用のn側バンプ14aは、p型半導体層62aの一部を削って露出させたn半導体層61の露出部に形成されている。発光層はp型半導体層62aの占める領域とほぼ等しいので、発光層を広く取るためにはn半導体層61の露出部は小さいが好ましい。一方、n側バンプ14aはフリップチップ実装に際し大きいほど実装が容易になる。この結果、n側半導体層61の露出部は概ねフリップチップ実装に係わるデザインルールの最小値で決まる。なおp側バンプ14bはp型半導体層62a上に形成される。またn側バンプ14aは発光特性に影響の少ない箇所(本例では角部)に配置される。   In FIG. 9A, the n-side bump 14a for the cathode is formed on the exposed portion of the n-semiconductor layer 61 that is exposed by scraping a part of the p-type semiconductor layer 62a. Since the light emitting layer is almost equal to the region occupied by the p-type semiconductor layer 62a, the exposed portion of the n semiconductor layer 61 is preferably small in order to obtain a wide light emitting layer. On the other hand, the larger the n-side bump 14a is, the easier the mounting is. As a result, the exposed portion of the n-side semiconductor layer 61 is generally determined by the minimum value of the design rule related to flip chip mounting. The p-side bump 14b is formed on the p-type semiconductor layer 62a. Further, the n-side bump 14a is disposed at a location (corner portion in this example) having little influence on the light emission characteristics.

(b)も同様にp型半導体層62bの辺部を削ってn型半導体層61を露出させ、その露出部にn側バンプ14cが形成されている。なおp側バンプ14dはp型半導体層62b上に形成される。   Similarly in (b), the side portion of the p-type semiconductor layer 62b is cut to expose the n-type semiconductor layer 61, and the n-side bump 14c is formed in the exposed portion. The p-side bump 14d is formed on the p-type semiconductor layer 62b.

図9(a),(b)に示したLED素子71,72のようにn側バンプ14a,14cが中心から離れた位置にあると電流分布に偏りが生じてして発光効率を悪化させてしまう。そこで本発明の第4実施形態として電流分布を対称にして発光効率を改善せさることができるLED素子73を図10で示す。図10(a)は本実施形体におけるLED素子73の電極面を示す平面図、(b)は(a)のAA線に沿った断面図である。   If the n-side bumps 14a and 14c are located away from the center as in the LED elements 71 and 72 shown in FIGS. 9A and 9B, the current distribution is biased and the luminous efficiency is deteriorated. End up. Thus, as a fourth embodiment of the present invention, FIG. 10 shows an LED element 73 that can improve luminous efficiency by symmetric current distribution. FIG. 10A is a plan view showing an electrode surface of the LED element 73 in this embodiment, and FIG. 10B is a cross-sectional view taken along line AA in FIG.

図10(a)においてLED素子73の電極面を説明する。n型半導体層61は中央部と周辺部でp型半導体層62cから露出している。p型半導体層62cが占める領域にn側バンプ14eとp側バンプ14fがあり、n側バンプ14eとn型半導体層61は配線63で接続している。なお保護膜は図示していない。   The electrode surface of the LED element 73 will be described with reference to FIG. The n-type semiconductor layer 61 is exposed from the p-type semiconductor layer 62c at the central portion and the peripheral portion. An n-side bump 14e and a p-side bump 14f are present in a region occupied by the p-type semiconductor layer 62c, and the n-side bump 14e and the n-type semiconductor layer 61 are connected by a wiring 63. The protective film is not shown.

図10(b)においてLED素子73の断面を説明する。サファイア基板66上にはn型半導体層61が積層しており、図の左側ではさらにp型半導体層62c、金属膜64、p側バンプ14fが積層している。保護膜65の開口部において金属膜64を介してp型半導体層62cとp側バンプ14fが接続している。図の中央ではn型半導体層61上に金属膜64と配線63が積層しており、保護膜65の開口部において金属膜64を介してn型半導体層61と配線63が接続している。図の右側ではn型半導体層61上にp型半導体層62cと金属膜64、保護膜65、配線63、n側バンプ14eが積層している。n側バンプ14eは、配線63でn型半導体層61と接続する一方、保護膜65によりp側半導体層62cと絶縁している。金属膜64は反射膜や電気抵抗低減、原子拡散の防止などのため複数の金属を積層したものである。配線63はアルミニウム、保護膜65はポリイミドからなる。なお配線63はAuなど他の金属、保護膜65はSiNやSiO2などでも良い。   A cross section of the LED element 73 will be described with reference to FIG. An n-type semiconductor layer 61 is stacked on the sapphire substrate 66, and a p-type semiconductor layer 62c, a metal film 64, and a p-side bump 14f are further stacked on the left side of the drawing. In the opening of the protective film 65, the p-type semiconductor layer 62c and the p-side bump 14f are connected through the metal film 64. In the center of the figure, a metal film 64 and a wiring 63 are stacked on the n-type semiconductor layer 61, and the n-type semiconductor layer 61 and the wiring 63 are connected through the metal film 64 in the opening of the protective film 65. On the right side of the figure, a p-type semiconductor layer 62c, a metal film 64, a protective film 65, a wiring 63, and an n-side bump 14e are stacked on the n-type semiconductor layer 61. The n-side bump 14e is connected to the n-type semiconductor layer 61 by the wiring 63, and is insulated from the p-side semiconductor layer 62c by the protective film 65. The metal film 64 is formed by laminating a plurality of metals in order to reduce a reflection film, electrical resistance, and prevent atomic diffusion. The wiring 63 is made of aluminum, and the protective film 65 is made of polyimide. The wiring 63 may be another metal such as Au, and the protective film 65 may be SiN or SiO 2.

図10(a)において中央のn型半導体層61の露出部は、バンプが形成されていないので、小さな面積で良く、発光効率の損失を小さくできる。また配線63を使いn側バンプ14eをp型半導体層62c上に移動すると、n側バンプ14eとp側バンプ14fの距離を比較的広くできる。このLED73を図1のLED素子18に適用した場合、LED装置10の下面において接続電極17の間隔を広くとれるためマザー基板の配線及び実装ルールに適応し易くなる。すなわち図9に示した従来からしばしば使われるフリップチップ用のLED素子71,72を流用するより、本発明のLED装置においてはn型半導体層の露出部を電極面の中央の配置すること及びn側バンプをp型半導体層に積層することが為されたLED素子を使用すると発光効率や実装容易性が向上する。またLED素子73がLED素子48のように蛍光体層を予め備えていても良い。本発明のLED装置にLED素子73を使用する際、n側バンプ14eとp側バンプ14fの間に封止材が充填されるのでp側バンプと配線63の短絡は発生しづらくなっている。なおLED素子73はフリップチップ実装に使用しても良い。   In FIG. 10A, the exposed portion of the central n-type semiconductor layer 61 is not formed with bumps, so that the area may be small and the loss of light emission efficiency can be reduced. Further, if the n-side bump 14e is moved onto the p-type semiconductor layer 62c using the wiring 63, the distance between the n-side bump 14e and the p-side bump 14f can be made relatively large. When this LED 73 is applied to the LED element 18 of FIG. 1, the distance between the connection electrodes 17 can be increased on the lower surface of the LED device 10, so that it is easy to adapt to the wiring and mounting rules of the mother board. That is, rather than using the conventional flip chip LED elements 71 and 72 shown in FIG. 9, in the LED device of the present invention, the exposed portion of the n-type semiconductor layer is arranged at the center of the electrode surface and n When an LED element in which side bumps are stacked on a p-type semiconductor layer is used, luminous efficiency and ease of mounting are improved. Further, the LED element 73 may include a phosphor layer like the LED element 48 in advance. When the LED element 73 is used in the LED device of the present invention, since the sealing material is filled between the n-side bump 14e and the p-side bump 14f, a short circuit between the p-side bump and the wiring 63 is difficult to occur. The LED element 73 may be used for flip chip mounting.

第4実施形態ではn型半導体層の露出部は電極面の中央にあったが、図9(a),(b)のようにn型半導体層61の露出部が電極面の中央でなく、角部や辺部にあっても良い。図9(a),(b)のLED素子71,72に第4実施形態のように保護膜を追加し、n側バンプ14a,14cを大きくし、n側バンプ14a,14cを保護膜を介してp型半導体層62a,bと積層させれば、前述のようにマザー基板の配線及び実装ルールに適応し易くなる。   In the fourth embodiment, the exposed portion of the n-type semiconductor layer was at the center of the electrode surface, but the exposed portion of the n-type semiconductor layer 61 was not at the center of the electrode surface as shown in FIGS. It may be in a corner or a side. 9A and 9B, a protective film is added as in the fourth embodiment, the n-side bumps 14a and 14c are enlarged, and the n-side bumps 14a and 14c are interposed via the protective film. If the p-type semiconductor layers 62a and 62b are stacked, the wiring and mounting rules of the mother board can be easily adapted as described above.

10,40,50…LED装置(半導体発光装置)、
11,41…封止部材、
12,42…サファイア基板、
13,43…半導体層、
14,44…バンプ電極、
14a,c,e…n側バンプ(バンプ電極)、
14b,d,f…p側バンプ(バンプ電極)、
15,45…蛍光体層、
16,46…透明樹脂層、
17,47…接続電極、
18,48,71,72,73…LED素子(半導体発光素子)、
31,36…支持基板、
32…集合体、
33…メッキ用共通電極膜、
34…レジスト膜、
35…金属層、
51…ウェハー、
52…透明層、
53…第2封止部材、
61…n型半導体層、
62a〜c…p型半導体層、
63…配線、
64…金属膜、
65…保護膜、
66…サファイア基板、
L1,L2、L3,L4…光線。
10, 40, 50 ... LED device (semiconductor light emitting device),
11, 41 ... sealing member,
12, 42 ... sapphire substrate,
13, 43 ... semiconductor layer,
14, 44 ... bump electrodes,
14a, c, e ... n-side bumps (bump electrodes),
14b, d, f ... p side bump (bump electrode),
15, 45 ... phosphor layer,
16, 46 ... transparent resin layer,
17, 47 ... connection electrodes,
18, 48, 71, 72, 73 ... LED elements (semiconductor light emitting elements),
31, 36 ... support substrate,
32 ... Aggregates,
33 ... Common electrode film for plating,
34. Resist film,
35 ... metal layer,
51 ... wafer,
52 ... Transparent layer,
53. Second sealing member,
61 ... n-type semiconductor layer,
62a-c ... p-type semiconductor layer,
63 ... wiring,
64 ... metal film,
65 ... Protective film,
66 ... a sapphire substrate,
L1, L2, L3, L4 ... Light rays.

Claims (4)

バンプ電極を有する半導体発光素子の上面に該半導体発光素子から出射する光を波長変換する蛍光体層を形成するとともに、少なくとも該半導体発光素子側面を封止部材で封止し、該封止部材の底面には接続電極を形成する半導体発光装置の製造方法において、
上面に粘着層を備える支持基板に前記バンプ電極が形成された面を上に向けて複数の前記半導体発光素子を配置する素子配置工程と、
前記複数の半導体発光素子の側面とともに前記バンプ電極を有する面を、反射剤を含む前記封止部材で封止する封止工程と、
前記封止部材と前記バンプ電極の高さが一致するように該封止部材又は該バンプ電極を削る研磨工程と、
前記封止部材で前記複数の半導体発光素子が連結した集合体の前記バンプ電極が露出した面にメッキ法で前記接続電極を形成する電極形成工程と、
前記集合体を切断して個片化する個片化工程と
を備えることを特徴とする半導体発光装置の製造方法。
A phosphor layer for converting the wavelength of light emitted from the semiconductor light emitting element is formed on the upper surface of the semiconductor light emitting element having a bump electrode, and at least the side surface of the semiconductor light emitting element is sealed with a sealing member. In the manufacturing method of the semiconductor light emitting device in which the connection electrode is formed on the bottom surface,
An element arrangement step of arranging a plurality of the semiconductor light emitting elements with a surface on which the bump electrode is formed on a support substrate having an adhesive layer on an upper surface thereof;
A sealing step of sealing a surface having the bump electrode together with side surfaces of the plurality of semiconductor light emitting elements with the sealing member containing a reflective agent;
A polishing step of scraping the sealing member or the bump electrode so that the height of the sealing member and the bump electrode coincides;
An electrode forming step of forming the connection electrode by a plating method on a surface where the bump electrode of the assembly in which the plurality of semiconductor light emitting elements are connected by the sealing member is exposed;
A method for manufacturing a semiconductor light emitting device, comprising: an individualizing step of cutting the assembly into pieces.
前記メッキ法が電解メッキ法であることを特徴とする請求項に記載の半導体発光装置の製造方法。 The method of manufacturing a semiconductor light emitting device according to claim 1 , wherein the plating method is an electrolytic plating method. 前記電極形成工程の後に前記集合体を前記支持基板から剥離し、接続電極を形成した面を下にして新たな支持基板上に配置してから、前記集合体上面に前記蛍光体層を形成することを特徴とする請求項又はに記載の半導体発光装置の製造方法。 After the electrode forming step, the assembly is peeled off from the support substrate, and is placed on a new support substrate with the surface on which the connection electrode is formed facing down, and then the phosphor layer is formed on the upper surface of the assembly. The method for manufacturing a semiconductor light-emitting device according to claim 1 or 2 . 前記半導体発光素子が連結して配列したウェハーに前記蛍光体層を形成し、該ウェハーを個片化して得られた前記半導体発光素子を前記支持基板に配置することを特徴とする請求項又はに記載の半導体発光装置の製造方法。 The semiconductor light emitting element to form the phosphor layer wafer which is arranged by connecting the claim 1, characterized in that placing the semiconductor light emitting device obtained by dicing the wafer to the support substrate or 3. A method for producing a semiconductor light emitting device according to 2 .
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11552222B2 (en) 2020-05-21 2023-01-10 Lextar Electronics Corporation Display device

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5670249B2 (en) * 2011-04-14 2015-02-18 日東電工株式会社 Light emitting element transfer sheet manufacturing method, light emitting device manufacturing method, light emitting element transfer sheet, and light emitting device
JP6094062B2 (en) * 2012-06-01 2017-03-15 日亜化学工業株式会社 Light emitting device and manufacturing method thereof
JP5995579B2 (en) * 2012-07-24 2016-09-21 シチズンホールディングス株式会社 Semiconductor light emitting device and manufacturing method thereof
JP6149487B2 (en) 2012-11-09 2017-06-21 日亜化学工業株式会社 LIGHT EMITTING DEVICE MANUFACTURING METHOD AND LIGHT EMITTING DEVICE
CN105378950A (en) * 2013-04-11 2016-03-02 皇家飞利浦有限公司 Top emitting semiconductor light emitting device
JP6438648B2 (en) * 2013-11-15 2018-12-19 日亜化学工業株式会社 Semiconductor light emitting device and manufacturing method thereof
JP2015122452A (en) * 2013-12-25 2015-07-02 サンケン電気株式会社 Light-emitting device
JP6331389B2 (en) * 2013-12-27 2018-05-30 日亜化学工業株式会社 Light emitting device
EP3092665B1 (en) * 2014-01-08 2019-03-27 Lumileds Holding B.V. Wavelength converted semiconductor light emitting device
DE102014102810A1 (en) * 2014-03-04 2015-09-10 Osram Opto Semiconductors Gmbh Production of optoelectronic components
DE102014112883A1 (en) * 2014-09-08 2016-03-10 Osram Opto Semiconductors Gmbh Optoelectronic component
JP6131986B2 (en) * 2015-06-01 2017-05-24 日亜化学工業株式会社 Method for manufacturing light emitting device
TW201717334A (en) * 2015-11-05 2017-05-16 凌北卿 Package structure and method of manufacture
JP6384533B2 (en) * 2015-12-21 2018-09-05 日亜化学工業株式会社 Method for manufacturing light emitting device
US10199533B2 (en) 2015-12-21 2019-02-05 Nichia Corporation Method of manufacturing light emitting device
TWI586000B (en) * 2016-01-12 2017-06-01 行家光電股份有限公司 Recessed chip scale packaging light emitting device and manufacturing method of the same
US10615320B2 (en) 2016-01-12 2020-04-07 Maven Optronics Co., Ltd. Recessed chip scale packaging light emitting device and manufacturing method of the same
CN115881868A (en) * 2016-04-15 2023-03-31 苏州立琻半导体有限公司 Light emitting device
JP6848245B2 (en) 2016-07-27 2021-03-24 日亜化学工業株式会社 Light emitting device
JP6635007B2 (en) * 2016-11-30 2020-01-22 日亜化学工業株式会社 Light emitting device manufacturing method
JP7057503B2 (en) * 2018-08-16 2022-04-20 日亜化学工業株式会社 Light emitting module and its manufacturing method
JP6760350B2 (en) * 2018-10-25 2020-09-23 日亜化学工業株式会社 Light emitting device
CN111129259B (en) * 2018-10-31 2024-06-07 日亚化学工业株式会社 Light emitting device, light emitting module, light emitting device, and method for manufacturing light emitting module
JP6784319B2 (en) * 2018-10-31 2020-11-11 日亜化学工業株式会社 Light emitting device, light emitting module, light emitting device and manufacturing method of light emitting module
JP6806218B2 (en) * 2018-10-31 2021-01-06 日亜化学工業株式会社 Light emitting device, light emitting module, light emitting device and manufacturing method of light emitting module
KR102417584B1 (en) 2018-10-31 2022-07-05 니치아 카가쿠 고교 가부시키가이샤 Light emitting device, light emitting module, manufacturing method for light emitting device and munufacturing method for light emitting module
CN111490134A (en) 2019-01-29 2020-08-04 日亚化学工业株式会社 Method for manufacturing light emitting device
JP6933817B2 (en) 2019-04-05 2021-09-08 日亜化学工業株式会社 Manufacturing method of light emitting device
JP7393617B2 (en) 2019-04-26 2023-12-07 日亜化学工業株式会社 Light emitting device and manufacturing method thereof
US11398592B2 (en) 2019-09-25 2022-07-26 Nichia Corporation Method for manufacturing light emitting module and light emitting module
US12027501B2 (en) 2020-04-02 2024-07-02 Nichia Corporation Surface light source and method of manufacturing surface light source

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3537400B2 (en) * 2000-03-17 2004-06-14 松下電器産業株式会社 Semiconductor built-in module and method of manufacturing the same
JP5154039B2 (en) * 2006-08-21 2013-02-27 浜松ホトニクス株式会社 Semiconductor device and semiconductor device manufacturing method
JP5224173B2 (en) * 2008-03-07 2013-07-03 スタンレー電気株式会社 Semiconductor light emitting device
JP5521325B2 (en) * 2008-12-27 2014-06-11 日亜化学工業株式会社 Light emitting device and manufacturing method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11552222B2 (en) 2020-05-21 2023-01-10 Lextar Electronics Corporation Display device

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