JP5445344B2 - Power semiconductor device - Google Patents

Power semiconductor device Download PDF

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JP5445344B2
JP5445344B2 JP2010136204A JP2010136204A JP5445344B2 JP 5445344 B2 JP5445344 B2 JP 5445344B2 JP 2010136204 A JP2010136204 A JP 2010136204A JP 2010136204 A JP2010136204 A JP 2010136204A JP 5445344 B2 JP5445344 B2 JP 5445344B2
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power semiconductor
hole
semiconductor device
solder
electrode
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JP2012004226A (en
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康道 畑中
志織 井高
誠次 岡
博 吉田
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19107—Disposition of discrete passive components off-chip wires

Description

この発明は、例えばトランスファーモールドによるモールド樹脂封止型の電力用半導体装置に関する。   The present invention relates to a mold resin-sealed power semiconductor device using, for example, transfer molding.

従来の電力用半導体装置の外部引出し構造として、例えば、基板上に半田接合されたブシュに線材ピンを挟持し、この線材ピンを用いて基板とケーシングに取り付けられたパネルとを電気的に接続するものがある。この構成においては、前記ケーシング内にシリコーンゲルを充填し、基板、ブシュおよび線材ピンなどの各構成素子を絶縁している。ここで、基板とブシュとの半田接合方法としては、基板上のブシュ搭載位置に予め半田ペーストを印刷塗布し、次いで該ブシュを搭載位置に載置し、加熱により半田ペーストを流動化させて基板とブシュとを接合する方法が用いられている（特許文献１参照）。   As an external drawing structure of a conventional power semiconductor device, for example, a wire pin is sandwiched between bushes soldered on a substrate, and the substrate and the panel attached to the casing are electrically connected using the wire pin. There is something. In this configuration, the casing is filled with silicone gel to insulate each component such as the substrate, bushing, and wire rod. Here, as a soldering method between the substrate and the bush, the solder paste is printed and applied in advance to the bush mounting position on the substrate, and then the bush is placed on the mounting position, and the solder paste is fluidized by heating to form the substrate. And a bushing are used (see Patent Document 1).

特開２００１‐２９８１２９号公報JP 2001-298129 A

ところが、基板上のブシュ搭載位置は平面状をなしているため、基板とブシュとの接合時には、加熱により流動化した半田がブシュの直下部からブシュ外周部へと向かって濡れ広がる。そこで、上述のようなシリコーンゲルに代えてトランスファーモールドによるモールド樹脂での絶縁封止を行った場合、モールド樹脂と半田との接着強度が低いために、基板上に濡れ広がった半田を起点としてモールド樹脂の剥離が発生してしまい、電力用半導体装置の信頼性が低下してしまうという問題点があった。   However, since the bush mounting position on the substrate is planar, the solder fluidized by heating spreads wet from the bottom of the bush toward the outer periphery of the bush when the substrate and the bush are joined. Therefore, when insulation sealing is performed with a mold resin by transfer molding instead of the silicone gel as described above, since the adhesive strength between the mold resin and the solder is low, the mold starts from the solder that spreads on the substrate. There is a problem that the resin is peeled off and the reliability of the power semiconductor device is lowered.

この発明は、上述のような問題を解決するためになされたもので、モールド樹脂の剥離を防止し、信頼性の高い電力用半導体装置を得ることを目的とするものである。   The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a highly reliable power semiconductor device that prevents the mold resin from peeling off.

この発明に係る電力用半導体においては、一方の面に金属放熱体が接合され、他方の面に配線パターンが形成された絶縁層を有する回路基板と、配線パターンの素子搭載部に接合された電力用半導体素子と、配線パターンに設けられ、且つ外部端子と接続可能な円柱または円筒状をなした引出し用電極とを備え、回路基板、電力用半導体素子および引出し用電極の側面とをモールド樹脂で封止した電力用半導体装置であって、引出し用電極の外径と略同寸法の引出し用電極搭載用であり、開口面から底面に向かって幅広のテーパを有する第一の穴部を配線パターン上に設け、この第一の穴部に引出し用電極を嵌合して半田接合したことを特徴とするものである。 In the power semiconductor according to the present invention, the power is bonded to the circuit board having the insulating layer in which the metal radiator is bonded to one surface and the wiring pattern is formed on the other surface, and to the element mounting portion of the wiring pattern. Semiconductor circuit element and a columnar or cylindrical lead electrode provided in the wiring pattern and connectable to an external terminal, and the side surfaces of the circuit board, the power semiconductor element and the lead electrode are molded resin A sealed power semiconductor device for mounting an extraction electrode having the same size as the outer diameter of the extraction electrode. The wiring pattern includes a first hole having a wide taper from the opening surface toward the bottom surface. The lead electrode is provided on the first hole portion, and the lead electrode is fitted and soldered.

この発明によれば、配線パターン上に引出し用電極の外径と略同寸法の引出し電極搭載用であり、開口面から底面に向かって幅広のテーパを有する第一の穴部を設け、この第一の穴部に引出し用電極を嵌合して半田接合しているので、半田が配線パターン上へ濡れ広がることがなくなり、モールド樹脂の剥離を防止して信頼性の高い電力用半導体装置を得ることができる。 According to the present invention, the first hole portion having a taper that is wide from the opening surface toward the bottom surface is provided on the wiring pattern for mounting the extraction electrode having substantially the same size as the outer diameter of the extraction electrode. Since the extraction electrode is fitted and soldered in one hole, the solder does not spread over the wiring pattern, and the mold resin is prevented from being peeled off to obtain a highly reliable power semiconductor device. be able to.

この発明の実施の形態１に係る電力用半導体装置を示す断面図である。1 is a cross-sectional view showing a power semiconductor device according to a first embodiment of the present invention. この発明の実施の形態１に係る電力用半導体装置の引出し用電極設置部分を示す断面図である。It is sectional drawing which shows the extraction electrode installation part of the power semiconductor device which concerns on Embodiment 1 of this invention. この発明の実施の形態１に係る電力用半導体装置の電力用半導体素子設置部分を示す断面図である。It is sectional drawing which shows the power semiconductor element installation part of the power semiconductor device which concerns on Embodiment 1 of this invention. この発明の実施の形態１に係る電力用半導体装置の引出し用電極に外部端子が接続された状態を示す断面図である。It is sectional drawing which shows the state by which the external terminal was connected to the extraction electrode of the power semiconductor device which concerns on Embodiment 1 of this invention. この発明の実施の形態１に係る電力用半導体装置の製造方法における半田供給工程を示す断面図である。It is sectional drawing which shows the solder supply process in the manufacturing method of the semiconductor device for electric power which concerns on Embodiment 1 of this invention. この発明の実施の形態２に係る電力用半導体装置の引出し用電極設置部分を示す断面図である。It is sectional drawing which shows the extraction electrode installation part of the power semiconductor device which concerns on Embodiment 2 of this invention. この発明の実施の形態３に係る電力用半導体装置を示す断面図である。It is sectional drawing which shows the power semiconductor device which concerns on Embodiment 3 of this invention. この発明の実施の形態３に係る電力用半導体装置の引出し用電極に外部端子が接続された状態を示す断面図である。It is sectional drawing which shows the state by which the external terminal was connected to the extraction electrode of the power semiconductor device which concerns on Embodiment 3 of this invention. この発明の実施の形態４に係る電力用半導体装置の引出し用電極設置部分を示す断面図である。It is sectional drawing which shows the extraction electrode installation part of the power semiconductor device which concerns on Embodiment 4 of this invention. この発明の実施の形態４に係る電力用半導体装置の電力用半導体素子設置部分を示す断面図である。It is sectional drawing which shows the power semiconductor element installation part of the power semiconductor device which concerns on Embodiment 4 of this invention. この発明の実施の形態５に係る電力用半導体装置の引出し用電極設置部分を示す断面図である。It is sectional drawing which shows the extraction electrode installation part of the power semiconductor device which concerns on Embodiment 5 of this invention. この発明の実施の形態６に係る電力用半導体装置の電力用半導体素子設置部分を示す断面図である。It is sectional drawing which shows the power semiconductor element installation part of the power semiconductor device which concerns on Embodiment 6 of this invention. この発明の電力用半導体装置の製造方法における他の半田供給工程を示す断面図である。It is sectional drawing which shows the other solder supply process in the manufacturing method of the semiconductor device for electric power of this invention.

実施の形態１．
図１ないし５は、この発明を実施するための実施の形態１に係る電力用半導体装置を示すものであって、図１はその断面図、図２は引出し用電極設置部分を示す断面図、図３は電力用半導体素子設置部分を示す断面図、図４は該装置に外部端子が挿入された様子を示す断面図、図５はその製造方法における半田供給工程を示す断面図である。なお、以下の各図において、同一符号は同一または相当の構成を示す。 Embodiment 1 FIG.
1 to 5 show a power semiconductor device according to Embodiment 1 for carrying out the present invention, in which FIG. 1 is a cross-sectional view thereof, and FIG. 2 is a cross-sectional view showing an extraction electrode installation portion. 3 is a cross-sectional view showing a power semiconductor element installation portion, FIG. 4 is a cross-sectional view showing an external terminal inserted into the apparatus, and FIG. 5 is a cross-sectional view showing a solder supplying process in the manufacturing method. In the following drawings, the same reference numerals indicate the same or corresponding configurations.

図１において、電力用半導体装置１００は、回路基板８を備えており、この回路基板８は、該装置１００を放熱するための金属放熱体１と、この金属放熱体１の一方の面に接合された絶縁層２と、絶縁層２上に設けられた配線パターン３とを有している。この配線パターン３上には、電力用半導体素子５および円筒状の引出し用電極６が搭載されている。この引出し用電極６の両端部には、それぞれ端面に向かって内径が大きくなるようにテーパ６ａ、６ｂが形成されている。なお、これは必ずしも設ける必要はない。また、配線パターン３上には、断面が凹状の第一の穴部７ａと断面が凹状の第三の穴部１５ａとが設けられており、第一の穴部７ａには引出し用電極６が、第三の穴部１５ａには電力用半導体素子５がそれぞれ嵌合され接合されている。そして、第一の穴部７ａの底面には断面が凹状の第二の穴部７ｂが設けられ、第三の穴部１５ａの底面には断面が凹状の第四の穴部１５ｂが設けられている。   In FIG. 1, a power semiconductor device 100 includes a circuit board 8, and the circuit board 8 is bonded to a metal radiator 1 for radiating heat from the device 100 and one surface of the metal radiator 1. And the wiring pattern 3 provided on the insulating layer 2. On the wiring pattern 3, a power semiconductor element 5 and a cylindrical lead electrode 6 are mounted. Tapers 6a and 6b are formed at both ends of the extraction electrode 6 so that the inner diameter increases toward the end face. Note that this is not necessarily provided. Further, on the wiring pattern 3, a first hole 7a having a concave cross section and a third hole 15a having a concave cross section are provided, and an extraction electrode 6 is provided in the first hole 7a. The power semiconductor elements 5 are respectively fitted and joined to the third holes 15a. The bottom surface of the first hole portion 7a is provided with a second hole portion 7b having a concave cross section, and the bottom surface of the third hole portion 15a is provided with a fourth hole portion 15b having a concave cross section. Yes.

第一の穴部７ａの穴径は、図２に示すように、引出し用電極６の外径と略同寸法であり、引出し用電極６が第一の穴部７ａ内にほぼ隙間なく嵌合されて半田４により接合されている。一方、第二の穴部７ｂは、その穴径が第一の穴部７ａの穴径よりも小さく、その中心が第一の穴部７ａの中心と一致するように設けられている。この第二の穴部７ｂの内部、引出し用電極６の孔部の下部および該電極６の端部の直下部には、半田４が存在している。また、第三の穴部１５ａの穴径は、図３に示すように、電力用半導体素子５の外径と略同寸法であり、電力用半導体素子５が第三の穴部１５ａ内にほぼ隙間なく嵌合されて半田４により接合されている。一方、第四の穴部１５ｂは、その穴径が第三の穴部１５ａの穴径よりも小さく、その中心が第三の穴部１５ａの中心と一致するように設けられている。この第四の穴部１５ｂの内部には、半田４が存在している。   As shown in FIG. 2, the hole diameter of the first hole portion 7a is substantially the same as the outer diameter of the extraction electrode 6, and the extraction electrode 6 is fitted into the first hole portion 7a with almost no gap. And are joined by solder 4. On the other hand, the second hole portion 7b is provided such that the hole diameter is smaller than the hole diameter of the first hole portion 7a and the center thereof coincides with the center of the first hole portion 7a. Solder 4 is present inside the second hole 7 b, below the hole of the extraction electrode 6, and directly below the end of the electrode 6. Further, as shown in FIG. 3, the hole diameter of the third hole portion 15a is substantially the same as the outer diameter of the power semiconductor element 5, and the power semiconductor element 5 is substantially within the third hole portion 15a. They are fitted with no gap and joined by solder 4. On the other hand, the fourth hole portion 15b is provided such that its hole diameter is smaller than the hole diameter of the third hole portion 15a and the center thereof coincides with the center of the third hole portion 15a. The solder 4 is present inside the fourth hole 15b.

また、配線パターン３と配線パターン３との間、配線パターン３と電力用半導体素子５との間および電力用半導体素子５と電力用半導体素子５との間は、それぞれワイヤーボンド１０ａ、１０ｂ、１０ｃにより接続されている。そして、配線パターン３、電力用半導体素子５、ワイヤーボンド１０ａ、１０ｂ、１０ｃおよび引出し用電極６の側面は、トランスファーモールド法によりモールド樹脂９で絶縁封止されている。ただし、モールド樹脂９は、引出し用電極６の孔部には充填されていない。   Wire bonds 10a, 10b, 10c are provided between the wiring pattern 3 and the wiring pattern 3, between the wiring pattern 3 and the power semiconductor element 5, and between the power semiconductor element 5 and the power semiconductor element 5, respectively. Connected by. The side surfaces of the wiring pattern 3, the power semiconductor element 5, the wire bonds 10a, 10b, and 10c and the extraction electrode 6 are insulated and sealed with a mold resin 9 by a transfer molding method. However, the mold resin 9 is not filled in the hole portion of the extraction electrode 6.

また、引出し用電極６には、図４に示すように、外部電極１１が挿入されている。この外部端子１１は、引出し用電極６の内壁に接し、該電極６と電気的に接続されている。なお、この外部端子１１の形状は、引出し用電極６との電気的な接続が得られれば棒状に限定されるものではない。   Further, as shown in FIG. 4, an external electrode 11 is inserted into the extraction electrode 6. The external terminal 11 is in contact with the inner wall of the extraction electrode 6 and is electrically connected to the electrode 6. The shape of the external terminal 11 is not limited to a rod shape as long as electrical connection with the extraction electrode 6 is obtained.

また、本実施の形態における、引出し用電極６の材質としては、優れた熱伝導性と電気伝導性とを有し、且つ配線パターン３と半田４で接合可能な金属が好ましい。具体的には、銅および銅合金、アルミニウムおよびアルミニウム合金等のめっき品などを用いることができる。また、この引出し用電極６の肉厚は、トランスファーモールドによるモールド樹脂９での絶縁封止工程において、封止時の成形圧力によって変形または破壊されない厚みであれば良い。その内径は、外部端子１１の挿入部の外径から決定され、この外部端子１１が挿入・保持可能であればよい。また、引出し用電極６の高さは、外部端子１１が十分に接続可能である高さであればよい。この引出し用電極６と外部端子１１との接続方法としては、はんだ付け、金属間接合であるプレスフィットに代表される圧入接続、ネジ接続等が挙げられるが、低コストで接続部の信頼性が高く、工程が容易なプレスフィットに代表される圧入接続が好ましい。   In addition, the material of the extraction electrode 6 in the present embodiment is preferably a metal that has excellent thermal conductivity and electrical conductivity and can be joined to the wiring pattern 3 and the solder 4. Specifically, plated products such as copper and copper alloys, aluminum and aluminum alloys, and the like can be used. In addition, the thickness of the extraction electrode 6 may be a thickness that is not deformed or destroyed by the molding pressure during sealing in the insulating sealing process with the mold resin 9 by transfer molding. The inner diameter is determined from the outer diameter of the insertion portion of the external terminal 11, as long as the external terminal 11 can be inserted and held. Moreover, the height of the electrode 6 for extraction should just be the height which the external terminal 11 can fully connect. Examples of the connection method between the lead electrode 6 and the external terminal 11 include soldering, press-fit connection represented by press-fit, which is metal-to-metal bonding, screw connection, and the like. A press-fit connection represented by a press-fit that is high and easy in process is preferable.

配線パターン３としては、例えば、銅箔や銅板が用いられる。この配線パターン３の厚みは、回路基板８に設置する電力用半導体素子５の電気容量により適宜決定される。また、ワイヤーボンド１０ａ、１０ｂ、１０ｃとしてはアルミニウム線や銅線が用いられる。このワイヤーボンド１０ａ、１０ｂ、１０ｃの線径も電力用半導体素子５の電気容量により適宜決定される。   As the wiring pattern 3, for example, a copper foil or a copper plate is used. The thickness of the wiring pattern 3 is appropriately determined by the electric capacity of the power semiconductor element 5 installed on the circuit board 8. Moreover, an aluminum wire or a copper wire is used as the wire bonds 10a, 10b, and 10c. The wire diameters of the wire bonds 10 a, 10 b, and 10 c are also appropriately determined by the electric capacity of the power semiconductor element 5.

また、金属放熱体１としては、熱伝導性の良好な金属板を用いることができる。このような金属板としては、例えば、アルミニウムおよびアルミニウム合金、銅および銅合金、鉄および鉄合金、あるいは、銅／鉄―ニッケル合金／銅、アルミニウム／鉄―ニッケル合金／アルミニウム等の複合材料を用いることができる。ここで、この金属板の厚さ・長さ・幅は、回路基板８に設置する電力用半導体素子５の電気容量により適宜決定される。例えば、電力用半導体素子５の電流容量が大きい場合、金属板の厚みを厚くし、長さを大きくし、幅を大きくする。   Moreover, as the metal heat radiator 1, a metal plate with good thermal conductivity can be used. As such a metal plate, for example, aluminum and aluminum alloy, copper and copper alloy, iron and iron alloy, or a composite material such as copper / iron-nickel alloy / copper, aluminum / iron-nickel alloy / aluminum is used. be able to. Here, the thickness, length, and width of the metal plate are appropriately determined by the electric capacity of the power semiconductor element 5 installed on the circuit board 8. For example, when the current capacity of the power semiconductor element 5 is large, the thickness of the metal plate is increased, the length is increased, and the width is increased.

また、絶縁層２としては、例えば、樹脂絶縁層を用いることができる。この樹脂絶縁層としては、優れた熱伝導性を有するものが好ましい。具体的には、各種セラミックスや無機粉末を含有する樹脂絶縁シート、ガラス繊維を含有する樹脂絶縁シートなどを用いることができる。ここで、樹脂絶縁層に含有される無機粉末としては、アルミナ、ボロンナイトライド、シリカ、窒化ケイ素、窒化アルミニウムなどが挙げられる。また、この樹脂絶縁層の厚みは、例えば２０〜４００ミクロンである。   Moreover, as the insulating layer 2, for example, a resin insulating layer can be used. As this resin insulation layer, what has the outstanding heat conductivity is preferable. Specifically, resin insulating sheets containing various ceramics and inorganic powders, resin insulating sheets containing glass fibers, and the like can be used. Here, examples of the inorganic powder contained in the resin insulating layer include alumina, boron nitride, silica, silicon nitride, and aluminum nitride. The thickness of the resin insulation layer is, for example, 20 to 400 microns.

また、本発明におけるモールド樹脂９としては、例えば、シリカ粉末をフィラーとして充填したエポキシ樹脂を用いることができる。このシリカ粉末の含有量は、電力用半導体装置に用いられる部材の熱膨張係数などを考慮して最適量が決定される。例えば、配線パターン３と金属板１とに銅を用いた場合、モールド樹９の熱膨張係数を、銅の熱膨張係数である１６ｐｐｍ／℃に合わせるように、シリカ粉末の含有量を設定する。このようにすることで反りのない電力用半導体装置が得られる。   Moreover, as the mold resin 9 in the present invention, for example, an epoxy resin filled with silica powder as a filler can be used. The content of the silica powder is determined in consideration of the coefficient of thermal expansion of a member used in the power semiconductor device. For example, when copper is used for the wiring pattern 3 and the metal plate 1, the content of the silica powder is set so that the thermal expansion coefficient of the mold tree 9 matches the thermal expansion coefficient of 16 ppm / ° C. of copper. By doing so, a power semiconductor device without warping can be obtained.

本実施の形態によれば、引出し用電極６は、その穴径が該電極６の外径と略同寸法である第一の穴部７ａにほぼ隙間なく嵌合されているので、引出し用電極６を半田接合する際に、加熱により流動化した半田４は、第二の穴部７ｂ、引出し用電極６の孔部および該電極６の端部の直下部に流れ込むことになる。つまり、引出し用電極６の外側においては、引出し用電極６が第一の穴部７ａにほぼ隙間なく嵌合されており、該電極６の外側面と第一の穴部７ａとの間の隙間は狭小であるので、半田４が該電極６の外側に漏れ出ることはない。一方、引出し用電極６の内側においては、該電極６の内側が第一の穴部７a、第二の穴部７ｂおよび該電極６の円筒の孔部により開放されているため、流動化した半田４は、第二の穴部７ｂ、引出し用電極６の孔部および該電極６の端部の直下部に流れ込むことになる。そのために、半田４は配線パターン３上に濡れ広がることはない。また、電力用半導体素子５は、その穴径が該素子５の外径と略同寸法である第三の穴部１５ａにほぼ隙間なく嵌合されているので、電力用半導体素子５を半田接合する際に加熱により流動化した半田４は、第四の穴部１５ｂに流れ込み配線パターン３上に濡れ広がることはない。   According to the present embodiment, the extraction electrode 6 is fitted in the first hole portion 7a whose hole diameter is approximately the same as the outer diameter of the electrode 6 with almost no gap. When soldering 6, the solder 4 fluidized by heating flows into the second hole 7 b, the hole of the lead-out electrode 6, and immediately below the end of the electrode 6. That is, on the outside of the extraction electrode 6, the extraction electrode 6 is fitted into the first hole 7a with almost no gap, and the gap between the outer surface of the electrode 6 and the first hole 7a. Is narrow, the solder 4 does not leak out of the electrode 6. On the other hand, inside the extraction electrode 6, since the inside of the electrode 6 is opened by the first hole 7a, the second hole 7b, and the cylindrical hole of the electrode 6, the fluidized solder 4 flows into the second hole portion 7 b, the hole portion of the extraction electrode 6, and the portion immediately below the end portion of the electrode 6. Therefore, the solder 4 does not spread over the wiring pattern 3. Further, since the power semiconductor element 5 is fitted in the third hole portion 15a whose hole diameter is approximately the same as the outer diameter of the element 5 with almost no gap, the power semiconductor element 5 is soldered. In this case, the solder 4 fluidized by heating does not flow into the fourth hole 15b and spread over the wiring pattern 3.

したがって、引出し用電極搭載部および電力用半導体素子搭載部においてモールド樹脂９は半田４との接触が無くなるので、モールド樹脂９の剥離を防止して、信頼性の高い電力用半導体装置を得ることができる。   Therefore, since the mold resin 9 is not in contact with the solder 4 in the lead electrode mounting portion and the power semiconductor element mounting portion, it is possible to prevent the mold resin 9 from being peeled off and to obtain a highly reliable power semiconductor device. it can.

また、配線パターン３上に引出し用電極搭載用の第一の穴部７ａを設け、この第一の穴部７ａに引出し用電極６を嵌合して半田接合しているので、引出し用電極６の接合位置精度と垂直精度が良好となり、引出し用電極６の接合位置ずれを防止することができ、該電極６と外部端子１１との接続信頼性を向上させることができる。さらに、本発明の電力用半導体装置１０１とその外部端子１１を介して接続される外部の基板との間の接続信頼性も向上させることができる。   Further, since the first hole portion 7a for mounting the lead electrode is provided on the wiring pattern 3, and the lead electrode 6 is fitted and soldered to the first hole portion 7a, the lead electrode 6 is provided. The joining position accuracy and the vertical accuracy of the lead electrode 6 become good, the joining position shift of the lead electrode 6 can be prevented, and the connection reliability between the electrode 6 and the external terminal 11 can be improved. Furthermore, the connection reliability between the power semiconductor device 101 of the present invention and an external substrate connected via the external terminal 11 can be improved.

次に、本実施の形態に係る電力用半導体装置の製造方法を説明する。まず、金属放熱体１として厚み２ｍｍの銅板と、配線パターン３を作製するための金属箔３ａとして厚みが０．５ｍｍの銅箔と、絶縁層２として例えばアルミナ粉末を含有するＢステージ状態のエポキシ樹脂シートとを用意する。そして、金属放熱体１と金属箔３ａとの間に絶縁層２を挟み込むように積層し、これらを加熱・加圧手段により接合することにより回路基板８を得る。   Next, a method for manufacturing the power semiconductor device according to the present embodiment will be described. First, a copper plate having a thickness of 2 mm as the metal radiator 1, a copper foil having a thickness of 0.5 mm as the metal foil 3a for producing the wiring pattern 3, and an epoxy in a B stage state containing, for example, alumina powder as the insulating layer 2 Prepare a resin sheet. And it laminates | stacks so that the insulating layer 2 may be inserted | pinched between the metal thermal radiation body 1 and the metal foil 3a, and these are joined by a heating and pressurizing means, and the circuit board 8 is obtained.

次に、金属箔３ａ上にレジストを塗布しエッチングすることで、所望の配線パターン３を形成する。そしてこの配線パターン３上に、その穴径が後述する引出し用電極６の外径と略同寸法である第一の穴部７ａおよび該穴部７aの底面に位置しその穴径が該穴部７aの穴径よりも小さい第二の穴部７ｂと、その穴径が後述する電力半導体素子５の外径と略同寸法である第三の穴部１５ａおよび該穴部１５aの底面に位置しその穴径が該穴部１５aの穴径よりも小さい第二の穴部１５ｂとを例えばエッチングにより形成する。次いで、図５に示すように、配線パターン３の引出し用電極６の搭載部である第一の穴部７ａおよび第二の穴部７ｂに、所定量に切断した板状半田４ａを供給する。また、同様に電力用半導体素子５の搭載部である第三の穴部１５ａおよび第四の穴部１５ｂにも所定量に切断した板状半田４ａを供給する。   Next, a desired wiring pattern 3 is formed by applying and etching a resist on the metal foil 3a. And on this wiring pattern 3, the hole diameter is located in the bottom surface of the 1st hole part 7a and the hole part 7a whose diameter is substantially the same as the outer diameter of the electrode 6 for the below-mentioned, and the hole diameter is this hole part. A second hole 7b smaller than the hole diameter of 7a, a third hole 15a whose hole diameter is substantially the same as the outer diameter of the power semiconductor element 5 described later, and the bottom surface of the hole 15a. The second hole 15b whose hole diameter is smaller than the hole diameter of the hole 15a is formed by, for example, etching. Next, as shown in FIG. 5, the plate-like solder 4 a cut into a predetermined amount is supplied to the first hole 7 a and the second hole 7 b which are the mounting portions of the lead electrodes 6 of the wiring pattern 3. Similarly, the plate-like solder 4a cut into a predetermined amount is also supplied to the third hole portion 15a and the fourth hole portion 15b, which are the mounting portions of the power semiconductor element 5.

そして、円筒状の引き出し電極６を第一の穴部７ａに、電力用半導体素子５を第三の穴部１５ａにそれぞれ嵌合し、加熱炉により加熱する。これにより半田の流動化が起こり、引出し用電極搭載部に供給した半田は、図２に示すように、第二の穴部７ｂ、引出し用電極６の孔部および該電極６の端部の直下部に流れ込み、引出し用電極６は第一の穴部７ａに接合される。また、電力用半導体素子搭載部に供給した半田は、図３に示すように、第四の穴部１５ｂに流れ込み、電力用半導体素子５は第三の穴部１５ａに接合される。次に、配線パターン３と配線パターン３との間、配線パターン３とこのパターン３上に設置された電力用半導体素子５との間および電力用半導体素子５と電力用半導体素子５との間をそれぞれワイヤーボンド１０ａ、１０ｂ、１０ｃにより接続する。   Then, the cylindrical lead electrode 6 is fitted into the first hole 7a and the power semiconductor element 5 is fitted into the third hole 15a, respectively, and heated by a heating furnace. As a result, fluidization of the solder occurs, and the solder supplied to the lead electrode mounting portion is directly below the second hole portion 7b, the hole portion of the lead electrode 6 and the end portion of the electrode 6, as shown in FIG. The extraction electrode 6 is joined to the first hole 7a. Further, as shown in FIG. 3, the solder supplied to the power semiconductor element mounting portion flows into the fourth hole 15b, and the power semiconductor element 5 is joined to the third hole 15a. Next, between the wiring pattern 3 and the wiring pattern 3, between the wiring pattern 3 and the power semiconductor element 5 installed on the pattern 3, and between the power semiconductor element 5 and the power semiconductor element 5. They are connected by wire bonds 10a, 10b and 10c, respectively.

最後に、ワイヤーボンド１０ａ、１０ｂ、１０ｃにより必要個所が電気的に接続された電力用半導体素子５と、引出し用電極６とが搭載された回路基板８を、金型にセットし、トランスファーモールド法によりモールド樹脂９で絶縁封止する。これにより、本発明における電力用半導体装置１００が完成する。ここで、引出し用電極６は、その側面がモールド樹脂９により封止されており、その内部にはモールド樹脂９は充填されていない。   Finally, the circuit board 8 on which the power semiconductor element 5 electrically connected to the necessary portions by the wire bonds 10a, 10b, and 10c and the extraction electrode 6 is mounted is set in a mold, and a transfer molding method is performed. Insulating and sealing with mold resin 9. Thereby, the power semiconductor device 100 according to the present invention is completed. Here, the side surface of the extraction electrode 6 is sealed with the mold resin 9, and the mold resin 9 is not filled therein.

上記のような製造方法における半田供給工程において、図５に示すように、所定量に切断した板状半田４ａを用いているので、半田供給量を一定に保持することが可能となり、半田の配線パターン３上への濡れ広がりをより確実に防止することができる。   In the solder supply process in the manufacturing method as described above, as shown in FIG. 5, since the plate-like solder 4a cut into a predetermined amount is used, it becomes possible to keep the solder supply amount constant, and the solder wiring It is possible to more reliably prevent wetting and spreading on the pattern 3.

実施の形態２．
図６は、この発明を実施するための実施の形態２に係る電力用半導体装置２００の引出し用電極設置部分を示す断面図である。実施の形態１では、引出し用電極６の搭載部に断面が凹状の第一の穴部７ａおよび第二の穴部７ｂを設ける構成を示したが、図６に示すように、円筒状の引出し用電極６の搭載部を第一の穴部７ａのみにする構成にしてもよい。その他の構成部分は実施の形態１と同様である。 Embodiment 2. FIG.
FIG. 6 is a cross-sectional view showing an extraction electrode installation portion of power semiconductor device 200 according to Embodiment 2 for carrying out the present invention. In the first embodiment, the configuration in which the first hole portion 7a and the second hole portion 7b having a concave cross section are provided in the mounting portion of the extraction electrode 6 is shown. However, as shown in FIG. The mounting portion for the electrode 6 may be configured to have only the first hole 7a. Other components are the same as those in the first embodiment.

本実施の形態によれば、引出し用電極６は、その穴径が該電極６の外径と略同寸法である第一の穴部７ａにほぼ隙間なく嵌合されているので、半田接合の際の加熱により流動化した半田４は、引出し用電極６の円筒の孔部および該電極６の端部の直下部に流れ込むことになる。このため、半田４は配線パターン３上に濡れ広がることはない。   According to the present embodiment, the lead-out electrode 6 is fitted in the first hole 7a having a hole diameter substantially the same as the outer diameter of the electrode 6 with almost no gap. The solder 4 fluidized by the heating at that time flows into the cylindrical hole of the extraction electrode 6 and directly below the end of the electrode 6. For this reason, the solder 4 does not spread over the wiring pattern 3.

したがって、実施の形態１と同様にモールド樹脂９は半田４との接触が無くなるので、モールド樹脂９の剥離を防止して、信頼性の高い電力用半導体装置を得ることができる。   Accordingly, since the mold resin 9 does not come into contact with the solder 4 as in the first embodiment, the mold resin 9 can be prevented from being peeled off, and a highly reliable power semiconductor device can be obtained.

実施の形態３．
図７および８は、実施の形態３に係る電力用半導体装置を示すものであって、図７はその断面図、図８は該装置に外部端子が接続された状態を示す断面図である。実施の形態１では、円筒状引出し用電極６を用いる構成を示したが、図７に示す電力用半導体装置３００のように、円筒状引出し用電極６の代わりに円柱状引出し用電極１２を用いる構成にしてもよい。この円柱状引出し用電極１２には、図８に示す電力用半導体装置３０１のように、その上面に外部端子１３が接合される。この接続方法としては、半田による接合や超音波接合などが挙げられる。 Embodiment 3 FIG.
7 and 8 show a power semiconductor device according to the third embodiment. FIG. 7 is a cross-sectional view thereof, and FIG. 8 is a cross-sectional view showing a state in which external terminals are connected to the device. In the first embodiment, the configuration using the cylindrical extraction electrode 6 is shown. However, the columnar extraction electrode 12 is used instead of the cylindrical extraction electrode 6 as in the power semiconductor device 300 shown in FIG. It may be configured. An external terminal 13 is joined to the upper surface of the cylindrical lead-out electrode 12 as in the power semiconductor device 301 shown in FIG. Examples of this connection method include solder bonding and ultrasonic bonding.

本実施の形態によれば、円柱状の引出し用電極１２を用いているので、実施の形態１に述べた効果に加えて、引出し用電極に流す電流量を増加させることができる。   According to the present embodiment, since the columnar extraction electrode 12 is used, in addition to the effects described in the first embodiment, the amount of current flowing through the extraction electrode can be increased.

実施の形態４．
図９および１０は、実施の形態４に係る電力用半導体装置４００を示すものであって、図９は該装置４００の引出し用電極設置部分の断面図、図１０は該装置４００の電力用半導体素子設置部分の断面図を示すものである。実施の形態１では、引出し用電極の搭載部に断面が凹状の第一の穴部７ａ設け、この第一の穴部７ａの底面に断面が凹状の第二の穴部７ｂを設ける構成を示したが、図９に示すように、第一の穴部７ａは、その断面が開口面から底面に向かって幅広のテーパである第一の穴部７ｃとしてもよい。この第一の穴部７ｃの開口面の穴径は、引出し用電極６の外径と略同寸法であり、引き出し用電極６が第一の穴部７ｃにほぼ隙間なく嵌合されて半田４により接合されている。また、実施の形態１では、電力用半導体素子の搭載部に断面が凹状の第三の穴部１５ａ設け、この第三の穴部１５ａの底面に断面が凹状の第四の穴部１５ｂを設ける構成を示したが、図１０に示すように、第三の穴部１５ａは、その断面が開口面から底面に向かって幅広のテーパである第三の穴部１５ｃとしてもよい。この第三の穴部１５ｃの開口面の穴径は、電力用半導体素子５の外径と略同寸法であり、電力用半導体素子５が第三の穴部１５ｃにほぼ隙間なく嵌合されて半田４により接合されている。その他の構成は実施の形態１と同様である。 Embodiment 4 FIG.
9 and 10 show a power semiconductor device 400 according to the fourth embodiment. FIG. 9 is a cross-sectional view of a portion where an extraction electrode is installed in the device 400, and FIG. 10 shows a power semiconductor device of the device 400. A sectional view of an element installation portion is shown. In the first embodiment, a configuration is shown in which a first hole 7a having a concave cross section is provided in the mounting portion of the extraction electrode, and a second hole 7b having a concave cross section is provided on the bottom surface of the first hole 7a. However, as shown in FIG. 9, the first hole 7a may be a first hole 7c whose cross section is a taper wide from the opening surface toward the bottom surface. The hole diameter of the opening surface of the first hole portion 7c is substantially the same as the outer diameter of the extraction electrode 6, and the extraction electrode 6 is fitted into the first hole portion 7c with almost no gap so that the solder 4 It is joined by. In the first embodiment, the third hole 15a having a concave cross section is provided in the mounting portion of the power semiconductor element, and the fourth hole 15b having a concave cross section is provided in the bottom surface of the third hole 15a. As shown in FIG. 10, the third hole portion 15a may be a third hole portion 15c whose cross section is a taper that is wide from the opening surface toward the bottom surface. The hole diameter of the opening surface of the third hole 15c is substantially the same as the outer diameter of the power semiconductor element 5, and the power semiconductor element 5 is fitted into the third hole 15c with almost no gap. Joined by solder 4. Other configurations are the same as those of the first embodiment.

本実施の形態によれば、引出し用電極６は、開口面の穴径が該電極６の外径と略同寸法で断面が開口面から底面に向かって幅広のテーパである第一の穴部７ｃにほぼ隙間なく嵌合されているため、半田接合の際の加熱時に流動化した半田４は、第二の穴部７ｂの内部、引出し用電極６の孔部および該電極６の端部の直下部に加えて、第一の穴部７ｃの側面と引出し用電極６の側面との間の空間に流れ込むことになる。また、電力用半導体素子５は、開口面の穴径が該素子５の外径と略同寸法で断面が開口面から底面に向かって幅広のテーパである第三の穴部１５ｃにほぼ隙間なく嵌合されているため、半田接合の加熱時に流動化した半田４は、第四の穴部１５ｂに加えて、第三の穴部１５ｃの側面と電力用半導体素子５の側面との間の空間に流れ込むことになる。これらにより、過剰な半田が供給されても確実に濡れ広がりを防止することができ、実施の形態１に述べた効果に加えて、過剰な半田の供給に起因するモールド樹脂の剥離を防止できる。   According to the present embodiment, the extraction electrode 6 has a first hole portion in which the hole diameter of the opening surface is substantially the same as the outer diameter of the electrode 6 and the cross section is a taper wide from the opening surface toward the bottom surface. Since the solder 4 that has been fluidized during heating at the time of soldering joins the inside of the second hole 7b, the hole of the lead electrode 6 and the end of the electrode 6 In addition to the direct lower part, the air flows into the space between the side surface of the first hole 7c and the side surface of the extraction electrode 6. Further, the power semiconductor element 5 has almost no gap in the third hole portion 15c having a hole diameter on the opening surface that is substantially the same as the outer diameter of the element 5 and a cross-section that is a taper wide from the opening surface toward the bottom surface. Since the solder 4 that has been fluidized at the time of heating of the solder joint is fitted in the space between the side surface of the third hole 15c and the side surface of the power semiconductor element 5 in addition to the fourth hole 15b. Will flow into. Accordingly, even if excessive solder is supplied, wetting and spreading can be reliably prevented, and in addition to the effects described in the first embodiment, peeling of the mold resin due to excessive supply of solder can be prevented.

実施の形態５．
図１１は、実施の形態５に係る電力用半導体装置５００の引出し用電極設置部分の断面図を示すものである。実施の形態２では、引出し用電極の搭載部に断面が凹状の第一の穴部７ａを設ける構成を示したが、図１１に示すように、その断面が開口面から底面に向かって幅広のテーパでる第一の穴部７ｃを設ける構成としてもよい。その他の構成は実施の形態２と同様である。 Embodiment 5 FIG.
FIG. 11 is a cross-sectional view of a portion where an extraction electrode is installed in the power semiconductor device 500 according to the fifth embodiment. In the second embodiment, the configuration in which the first hole portion 7a having a concave cross section is provided in the mounting portion of the extraction electrode is shown. However, as shown in FIG. 11, the cross section is wide from the opening surface toward the bottom surface. It is good also as a structure which provides the 1st hole part 7c which is a taper. Other configurations are the same as those of the second embodiment.

本実施の形態によれば、引出し用電極６は、開口面の穴径が該電極６の外径と略同寸法で断面が開口面から底面に向かって幅広のテーパである第一の穴部７ｃにほぼ隙間なく嵌合されているため、半田接合の際の加熱時に流動化した半田４は、引出し用電極６の孔部および該電極６の端部の直下部に加えて、第一の穴部７ｃの側面と引出し用電極６の側面との間の空間に流れ込むことになる。これにより、過剰な半田が供給されても確実に濡れ広がりを防止することができ、実施の形態２に述べた効果に加えて、過剰な半田の供給に起因するモールド樹脂の剥離を防止できる。   According to the present embodiment, the extraction electrode 6 has a first hole portion in which the hole diameter of the opening surface is substantially the same as the outer diameter of the electrode 6 and the cross section is a taper wide from the opening surface toward the bottom surface. Since the solder 4 that has been fluidized during heating at the time of soldering joins the first electrode 7 c in addition to the hole portion of the extraction electrode 6 and the portion immediately below the end portion of the electrode 6. It flows into the space between the side surface of the hole 7c and the side surface of the extraction electrode 6. Thereby, even when excessive solder is supplied, wetting and spreading can be prevented with certainty, and in addition to the effects described in the second embodiment, peeling of the mold resin due to excessive supply of solder can be prevented.

実施の形態６．
図１２は、実施の形態６に係る電力用半導体装置６００の電力用半導体素子設置部分の断面図を示すものである。実施の形態１では、電力用半導体素子の搭載部に断面が凹状の第三の穴部１５ａおよび第四の穴部１５ｂを設ける構成を示したが、図１２に示すように、電力用半導体素子の搭載部に開口面の穴径が該素子５の外径と略同寸法で断面が開口面から底面に向かって幅広のテーパである第三の穴部１５ｃのみを設ける構成としてもよい。その他の構成は実施の形態１と同様である。 Embodiment 6 FIG.
FIG. 12 shows a cross-sectional view of a power semiconductor element installation portion of the power semiconductor device 600 according to the sixth embodiment. In the first embodiment, the configuration in which the third hole portion 15a and the fourth hole portion 15b having a concave cross section are provided in the mounting portion of the power semiconductor element. However, as illustrated in FIG. The mounting portion may be provided with only the third hole portion 15c in which the hole diameter of the opening surface is substantially the same as the outer diameter of the element 5 and the cross section is a taper that is wide from the opening surface toward the bottom surface. Other configurations are the same as those of the first embodiment.

本実施の形態によれば、電力用半導体素子５は、開口面の穴径が該素子５の外径と略同寸法で断面が開口面から底面に向かって幅広のテーパである第三の穴部１５ｃにほぼ隙間なく嵌合されているため、半田接合の際の加熱時に流動化した半田４は、第三の穴部１５ｃの側面と電力用半導体素子５の側面との間の空間に流れ込み配線パターン３上に濡れ広がることはない。したがって、実施の形態１と同様にモールド樹脂９は半田４との接触が無くなるので、モールド樹脂９の剥離を防止して、信頼性の高い電力用半導体装置を得ることができる。   According to the present embodiment, the power semiconductor element 5 has a third hole whose opening surface has a hole diameter substantially the same as the outer diameter of the element 5 and whose cross section is a taper wide from the opening surface to the bottom surface. Since it is fitted to the portion 15c with almost no gap, the solder 4 fluidized during heating at the time of soldering flows into the space between the side surface of the third hole portion 15c and the side surface of the power semiconductor element 5. There is no wet spread on the wiring pattern 3. Accordingly, since the mold resin 9 does not come into contact with the solder 4 as in the first embodiment, the mold resin 9 can be prevented from being peeled off, and a highly reliable power semiconductor device can be obtained.

実施の形態７．
図１３は、この発明の電力用半導体装置の製造方法における他の半田供給工程を示す断面図である。実施の形態１の電力用半導体装置の製造方法では、図５に示した半田供給工程において、所定量に切断した板状半田４ａを用いたが、図１３に示すように、板状半田４ａに代えて所定数量供給した球状半田４ｂを用いてもよい。その他の製造方法は実施の形態１と同様である。 Embodiment 7 FIG.
FIG. 13 is a cross-sectional view showing another solder supplying step in the method for manufacturing the power semiconductor device of the present invention. In the method of manufacturing the power semiconductor device according to the first embodiment, the plate-like solder 4a cut into a predetermined amount is used in the solder supplying step shown in FIG. 5, but the plate-like solder 4a is used as shown in FIG. Instead, spherical solder 4b supplied in a predetermined quantity may be used. Other manufacturing methods are the same as those in the first embodiment.

本実施の形態の半田供給工程によれば、半田供給工程に所定数量の球状半田４ｂを用いているため、半田供給量を一定に保持することが可能となり、半田の配線パターン３上への濡れ広がりをより確実に防止することができる。また、球状半田４ｂを用いたことにより、半田切断の作業が不要となり、生産性が向上する。   According to the solder supply process of the present embodiment, since a predetermined quantity of spherical solder 4b is used in the solder supply process, it is possible to keep the amount of solder supplied constant, and wet the solder onto the wiring pattern 3. Spreading can be prevented more reliably. In addition, the use of the spherical solder 4b eliminates the need for solder cutting and improves productivity.

１ 金属放熱体
２ 絶縁層
３ 配線パターン
４ 半田
４ａ 板状半田
４ｂ 球状半田
５ 電力用半導体素子
６、１２ 引出し用電極
７ａ、７ｃ 第一の穴部
７ｂ 第二の穴部
８ 回路基板
９ モールド樹脂
１５ａ、１５ｃ 第三の穴部
１５ｂ 第四の穴部 DESCRIPTION OF SYMBOLS 1 Metal heat sink 2 Insulation layer 3 Wiring pattern 4 Solder 4a Plate-like solder 4b Spherical solder 5 Power semiconductor element 6, 12 Lead electrode 7a, 7c First hole 7b Second hole 8 Circuit board 9 Mold resin 15a, 15c 3rd hole 15b 4th hole

Claims (5)

一方の面に金属放熱体が接合され、他方の面に配線パターンが形成された絶縁層を有する回路基板と、
前記配線パターンの素子搭載部に接合された電力用半導体素子と、
前記配線パターンに設けられ、且つ外部端子と接続可能な円柱または円筒状をなした引出し用電極とを備え、
前記回路基板、前記電力用半導体素子および前記引出し用電極の側面をモールド樹脂で封止した電力用半導体装置であって、
前記引出し用電極の外径と略同寸法の引出し用電極搭載用であり、開口面から底面に向かって幅広のテーパを有する第一の穴部を前記配線パターン上に設け、この第一の穴部に前記引出し用電極を嵌合して半田接合したことを特徴とする電力用半導体装置。 A circuit board having an insulating layer in which a metal radiator is bonded to one surface and a wiring pattern is formed on the other surface;
A power semiconductor element bonded to the element mounting portion of the wiring pattern;
A drawing electrode provided in the wiring pattern and having a columnar or cylindrical shape connectable to an external terminal;
A power semiconductor device in which side surfaces of the circuit board, the power semiconductor element and the extraction electrode are sealed with a mold resin,
A first hole having a taper that is wide from the opening surface toward the bottom surface is provided on the wiring pattern , and is used for mounting the extraction electrode having substantially the same size as the outer diameter of the extraction electrode. A power semiconductor device, wherein the lead-out electrode is fitted and soldered to a portion. 前記第一の穴部は、その底面に第二の穴部を有することを特徴とする請求項１に記載の電力用半導体装置。   The power semiconductor device according to claim 1, wherein the first hole has a second hole on a bottom surface thereof. 前記第一の穴部は、その断面が凹状であることを特徴とする請求項１または２に記載の電力用半導体装置。   The power semiconductor device according to claim 1, wherein the first hole has a concave cross section. 前記引出し用電極は、板状半田で接合したことを特徴とする請求項１ないし３のいずれか一項に記載の電力用半導体装置。 The power semiconductor device according to any one of claims 1 to 3 , wherein the lead-out electrode is joined with a plate-like solder. 前記引出し用電極は、球状半田で接合したことを特徴とする請求項１ないし３のいずれか一項に記載の電力用半導体装置。 The extraction electrode is a power semiconductor device according to any one of claims 1 to 3, characterized in that joined spherical solder.
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