JP5417622B2 - Analog / digital stacked variable phase shifter - Google Patents

Description

  The present invention relates to a phase shifter that is used in electronic circuit components, semiconductor technology, microwave circuits, radar sensor technology, communication broadcasting antenna devices, and the like, and mainly shifts the phase of a high frequency by a desired amount.

  Phased array antennas are used in advanced technology fields that require particularly strict directivity control, such as space radio communication technology, military defense technology, and mobile communication technology.

  In general, a phased array antenna is a one-dimensional or two-dimensional array of a large number of antenna elements having a predetermined amount of phase difference from each other using a phase shifter. This antenna has a feature that the radiation direction can be changed without mechanically rotating the antenna itself by individually controlling the phase of each antenna element.

JP 2004-215110 A

  However, at present, it is difficult to say that phased array antennas are widely used. The reason is that the phased array antenna is expensive as compared with other antennas, and the increase in size is inevitable.

  In other words, in order to configure a phased array antenna, a large number of phase shifters (generally the same number as the antenna elements) are required to adjust the phase of each antenna element. In this case, each phase shifter becomes expensive and large, and thus the whole antenna is inevitably expensive and large.

  There are two types of phase adjustment means in phase shifters: digital control by switching switches and analog control by controlling elements that can change reactance with voltage. Then, since a large number of elements or large elements are required, if a conventional planar circuit configuration is adopted, an increase in the size of the phase shifter is inevitable.

  Especially for digitally controlled phase shifters, there is a problem that the quantization error of the amount of phase shift in each phase shift circuit (bit) that constitutes the phase shifter is accumulated in the output of the entire phase shifter, and implementation of switches, etc. After that, since there is a problem that fine adjustment of the phase error is difficult, it is necessary to design with attention to adjustment of the band and reduction of insertion loss. Furthermore, even if designed with great care, the accuracy of phase adjustment will be inadequate due to slight manufacturing errors caused by soldering or the like.

  On the other hand, if an analog-controlled phase shifter is used, it is possible to precisely control the phase angle. In such a case, an element capable of a large reactance change, that is, a large reactance element is provided in each phase shifter. The antenna becomes large and expensive.

  Therefore, there is a demand for a phase shifter that enables fine phase adjustment and is smaller and less expensive than conventional ones.

  In order to solve the above-described problems, the present invention provides a first phase shift circuit formed on or on the surface of a dielectric multilayer substrate formed by laminating a plurality of dielectric substrates, the first signal path switching means and Two or more signal paths switched by the first signal path switching means, and including a signal path branched from at least one of the two or more signal paths switched by the first signal path switching means The signal path includes a first phase shift circuit that is electrically connected to a reactance element on the surface of the dielectric multilayer substrate through a via, and a second phase shift circuit formed in or on the surface of the dielectric multilayer substrate. A second signal path switching unit and two or more signal paths switched by the second signal path switching unit, each formed on two or more different layers in the dielectric laminated substrate. A signal path formed by electrically connecting the interlayer via a signal path, and two or more signal paths, providing a second phase-shift circuit, a phase shifter comprising including.

  The present invention also relates to a phase shift circuit formed on or on the surface of a dielectric multilayer substrate formed by laminating a plurality of dielectric substrates, wherein two or more signals are switched by the signal path switching means and the signal path switching means. 2 or more signal paths including signal paths formed by electrically connecting signal paths respectively formed on two or more different layers in the dielectric laminated substrate by interlayer vias, It further includes a signal path branched from at least one of the two or more signal paths switched by the path switching means, and the branched signal path is electrically connected to the reactance element on the surface of the dielectric multilayer substrate through the via. A phase shifter including a phase shift circuit is provided.

  In the phase shifter, each signal path is formed inside or on the surface of the dielectric laminated substrate. Conventionally, the signal path is formed as a circuit having a simple planar structure that is not laminated. Therefore, it has been unavoidable that the circuit scale becomes large, but in the present invention, this is made into a three-dimensional structure. The entire phase shifter is miniaturized.

  Specifically, interlayer vias play a role in electrically connecting signal paths between layers in such a three-dimensional structure. That is, a through hole is formed in a dielectric substrate, a via is formed by filling or attaching an electrode material such as metal into the through hole, and the upper end and the lower end of the via are connected to the signal path of each layer. This enables signal transmission between layers.

  Further, according to the phase shifter, stepwise phase adjustment can be strictly performed by combining digital phase adjustment by switching the signal path and analog phase adjustment by controlling the reactance element. That is, in each signal path formed to handle digital phase adjustment, even if the phase shift of the output signal deviates from the design value due to errors such as path length and inductance, the phase shifter use stage In such a case, it is possible to eliminate such a deviation by adjusting the voltage applied to the reactance element as needed.

  Further, since the reactance element is formed on the surface of the dielectric laminated substrate, adjustment and replacement are relatively easy. For example, if continuous phase adjustment needs to be performed over a wide range, the purpose is to arrange a large reactance element, or to perform pure phase adjustment, and there is little error in each signal path. If it is found out, it is possible to arrange a small reactance element. That is, it is possible to reduce the size as much as possible according to the purpose.

  As the reactance element, a variable capacitance diode, a field effect transistor (FET), a metal oxide semiconductor (MOS) capacitor, a photodiode, a phototransistor, or the like can be used.

Typically, it is configured by applying a DC reverse voltage to a diode to form a depletion layer between the p-type semiconductor side and the n-side semiconductor side, and controlling the reverse voltage to be applied to the diode. A variable-capacitance diode (varactor diode) that can have a desired capacitance is used.
However, the reactance element to be used in the phase shifter of the present invention is not limited to this, and a field effect transistor (FET) whose characteristics change depending on a voltage applied to the gate, a metal oxide semiconductor (MOS) capacitor, Alternatively, any element that can adjust the reactance effect given to a signal according to an external input, such as a photodetector such as a photodiode or a phototransistor whose characteristics change depending on the intensity of irradiation light. Also good.

The dielectric substrate used in the phase shifter of the present invention is an LTCC substrate, and the dielectric laminated substrate is preferably an LTCC multilayer substrate. When a circuit board is formed using LTCC (Low Temperature Co-fired Ceramics), that is, low-temperature co-fired ceramics, a circuit is formed on each green sheet, laminated, and then fired. Are compressed in both the area direction and the stacking direction. Therefore, LTCC is a relatively excellent material in that the increase in thickness due to the laminated structure can be minimized while keeping the area small.
Moreover, since LTCC can be fired at a lower temperature than conventional alumina ceramic substrates, by adopting this LTCC as a circuit substrate, a metal with low conductor resistance that was difficult to use in the past due to fire resistance problems. (Gold, silver, copper, etc.) can be used for the circuit.

  The signal path switching means used in the phase shifter of the present invention is preferably a high frequency MEMS switch. When using a micro electro mechanical system (MEMS), that is, a switch based on a micro electro mechanical system, a loss reduction due to insertion of a phase shifter and a phase shifter compared to the case where a conventional semiconductor switch or mechanical switch is used. This is because further downsizing as a whole becomes possible, and it leads to reduction in development and production costs. However, other switches can naturally be employed depending on the degree of loss and size allowed in the phase shifter.

  In the phase shifter of the present invention, it is preferable that the signal paths respectively formed on two or more different layers in the dielectric laminated substrate are formed so as to intersect substantially perpendicularly in the projection plane through the layers. This is because if the signal paths on each layer are formed in parallel through the layers, the function of the phase shifter may be affected by the interaction between the parallel currents. In order to avoid such interaction, it is preferable to perform wiring in consideration of circuit patterns in other layers when forming a circuit in each layer.

  In the phase shifter of the present invention, the signal path in each of the phase shift circuits is preferably formed in a layer other than the uppermost layer in the dielectric laminated substrate. If a phase shift circuit is formed in the inner layer of the dielectric laminated substrate, it is not necessary to arrange circuit elements other than the signal path switching switch and the reactance element on the surface of the uppermost layer, that is, the surface of the phase shifter. This is because the area can be used for other purposes.

  In the phase shifter of the present invention, the branched signal path can be two adjustment stubs branched on the branch source signal path through a distance of approximately 1/4 of the input signal wavelength. With such a configuration, the insertion loss can be suppressed by canceling the reflected waves caused by the two adjustment stubs.

  The present invention also provides a first phase shift circuit formed on or on the surface of a dielectric laminated substrate formed by laminating a plurality of dielectric substrates, the first signal path switching means, the first signal Two or more signal paths switched by the path switching means, including a signal path branched from at least one of the two or more signal paths switched by the first signal path switching means, and the branched signal path is: A first phase shift circuit electrically connected to vias leading to the surface of the dielectric multilayer substrate, and a second phase shift circuit formed in or on the surface of the dielectric multilayer substrate, wherein the second signal Two or more signal paths that are switched by the path switching means and the second signal path switching means, and the signal paths formed on two or more different layers in the dielectric laminated substrate are electrically connected by interlayer vias. And comprising a signal path formed by the two or more signal paths, providing a second phase-shift circuit, a phase shifter comprising including.

  Furthermore, the present invention is a phase shift circuit formed inside or on the surface of a dielectric multilayer substrate formed by laminating a plurality of dielectric substrates, and is switched by a signal path switching means and a signal path switching means. Two or more signal paths including signal paths formed by electrically connecting signal paths respectively formed on two or more different layers in the dielectric laminated substrate by interlayer vias, A signal path branched from at least one of two or more signal paths switched by the signal path switching means, and the branched signal path is electrically connected to a via that leads to the surface of the dielectric laminated substrate; A phase shifter including a circuit.

  Since the branched signal path is electrically connected to the surface of the dielectric multilayer substrate through vias, any phase adjustment means such as a phase adjustment circuit or the like is placed on the surface after a reactance element is arranged on the surface. Once formed, they can be electrically connected to the vias to allow further fine tuning of the phase. These phase adjusting means do not necessarily have to be formed on the surface of the dielectric laminated substrate, and are configured in advance separately from the phase shifter of the present invention and electrically connected to each other. It is also possible to finely adjust the phase.

  According to the present invention, a compact, thin, multifunctional and inexpensive analog / digital hybrid phase shifter that is convenient as a phase shifter for adjusting the phase of each antenna element constituting a phased array antenna, for example, is provided. .

  The phase shifter according to the present invention combines coarse phase adjustment by digital control and fine phase adjustment by analog control, so that a large reactance element is not used more than necessary (and therefore at low cost). Enables fine phase adjustment.

  In addition, the phase shifter according to the present invention uses an embedded adjustment stub, and analog fine adjustment is performed by controlling the reactance element with voltage, light, etc., so the stub is adjusted with solder or the like before measurement as in the past. There is no need to do. Such analog fine adjustment can be electronically controlled by programming as described later.

  Furthermore, by using a dielectric laminated substrate such as an LTCC multilayer substrate as a circuit substrate, the signal path has a three-dimensional structure extending over a plurality of layers. As a result, the area occupied by the phase shifter has been greatly reduced, and a significant reduction in size compared to the prior art has been achieved. In addition, although the size in the thickness direction is increased by adopting a three-dimensional structure, for example, when the LTCC substrate is used, the thickness per layer is about 10 to 100 μm, so there is almost no practical disadvantage. I can say no.

  By using the phase shifter of the present invention having such advantages, an electronically controlled phased array antenna with low cost and high phase control accuracy can be realized.

It is the top view which looked at the phase shifter which concerns on one Embodiment of this invention from the top. It is the perspective view which showed one of the phase shift circuits which comprise the phase shifter shown by FIG. It is the figure which showed the phase shift circuit shown by FIG. 2 including the dielectric laminated substrate which is the circuit board. FIG. 4 is a circuit diagram showing a circuit configuration of a phase shift circuit shown in FIGS. 2 and 3. It is the top view which showed one of the phase shift circuits which comprise the phase shifter shown by FIG. FIG. 6 is a perspective view of the phase shift circuit shown in FIG. 5. It is the figure which showed the phase shift circuit shown by FIG.5 and FIG.6 also including the dielectric laminated substrate which is the circuit board.

  From this, one Embodiment of the phase shifter which concerns on this invention is described in detail using drawing. The signal path pattern and the arrangement and configuration of elements shown in the drawing are merely examples, and those skilled in the art can make various design changes within the scope of the present invention.

  FIG. 1 is a plan view of a phase shifter 1 according to an embodiment of the present invention as viewed from above. The phase shifter 1 includes four phase shift circuits 2, 3, 4, and 5, which are electrically connected by a signal line to form a 4-bit configuration.

  Each signal line in each phase shift circuit is distributed on different layers of the dielectric substrate, and the signal path has a three-dimensional structure as a whole. The dielectric laminated substrate is composed of a dielectric substrate such as an LTCC substrate. This three-dimensional structure is formed in a dielectric laminated substrate having a total of five layers, as will be described later in detail with reference to FIGS.

The signal path is formed by pattern printing of metal particles on the dielectric substrate of each layer constituting the dielectric laminated substrate. When an LTCC substrate is specifically used, for example, a CaO—Al ₂ O ₃ —B ₂ O ₃ —SiO ₂ glass material and an Al ₂ O ₃ ceramic material are mixed, and an organic binder and a solvent are mixed into the mixed powder. And kneading to prepare a slurry, and forming a green sheet by molding it into a sheet shape. On this green sheet, a circuit pattern made of metal particles such as gold, silver, and copper is printed or thin film method is used. Form.

  A through hole is formed in the green sheet by a laser method or the like, and a via is formed by filling or adhering the same metal material as the signal path. Also, metal conductor pads are formed on both ends of the vias by the printing method or the like as with the signal lines. On the bottom surface of the lowermost green sheet, a grounding conductor layer is also formed by the printing method or the like. Thus, after forming each layer as a circuit on a green sheet, the layers are connected by pressure and then fired to produce a phase shifter 1 having a phase shift circuit as a circuit in a dielectric laminated substrate. Is done.

  Of the four phase shift circuits, the first phase shift circuit 2 is a signal (typical) input from the input unit 8 by an SPDT (Single Pole Double Throw) switch (or single pole double throw switch) 6 and 7. Is a high-frequency signal (but is not limited to this), the path along which the signal travels is switched to either the reference line 9 or the delay line 10. By this path switching, the phase of the signal input from the input unit 8 can be digitally adjusted.

  As the SPDT switch, any switch such as a high-frequency MEMS switch, a semiconductor switch, or a mechanical switch can be used. However, considering the suppression of loss due to the insertion of the phase shifter and the miniaturization of the entire phase shifter, It is preferable to use a MEMS switch.

  In the case of using a high-frequency MEMS switch, a DC voltage is applied between the electrodes inside the switch to make one of the reference line 9 and the delay line 10 conductive to select a path.

  Route selection by applying voltage to the switch, for example, at the time of circuit formation on the green sheet, after connecting the conductors from both electrodes inside the switch to the outside of the phase shifter (not shown), when using the phase shifter This can also be done by adjusting the applied voltage.

  Here, the adjustment signal path 11 is branched from the reference line 9 and the adjustment signal paths 12 and 13 are branched from the delay line 10. These are signal paths used to correct errors in digital phase adjustment by the phase shift circuits 2, 3, 4, and 5, and are typically adjustment stubs.

  The adjustment signal paths 11, 12, and 13 are connected to conductor pads 17, 18, and 19 on the surface of the phase shifter through vias 14, 15, and 16, respectively. A reactance element such as a variable capacitance diode is electrically connected to each of the conductor pads 17, 18, and 19 (only the variable capacitance diode 20 connected to the conductor pad 17 is shown), and a direct current power source. (Only the DC power supply 21 corresponding to the variable capacitance diode 20 is shown.) Applying a voltage to the reactance element or irradiating light, and adjusting the magnitude of the voltage or the irradiation intensity. Thus, the phase can be adjusted in an analog manner.

  The reactance element includes a field effect transistor (FET) whose characteristics change depending on the voltage applied to the gate, a metal oxide semiconductor (MOS) capacitor, or a photodiode or phototransistor whose characteristics change depending on the intensity of irradiation light. Any element can be used as long as it can adjust the reactance effect given to the signal according to an external input, such as a photodetector.

  The second to fourth phase shift circuits 3 to 5 are also configured to switch the signal path by the SPDT switches 22 to 27, thereby enabling digital adjustment of the phase.

  Here, unlike the first phase shift circuit 2, the adjustment signal path is not branched from the signal paths constituting the second to fourth phase shift circuits 3 to 5. Since the signal input from the input unit 8 and output from the output unit 28 always passes through either the reference line 9 or the delay line 10 constituting the first phase shift circuit 2, the signal branches from either of them. This is because the phase error generated in the second to fourth phase shift circuits 3 to 5 can be corrected by performing the analog phase adjustment by the reactance element connected through the adjustment signal path.

  The adjustment signal path can be formed by branching from either the reference line constituting the second to fourth phase shift circuits 3 to 5 or the delay lines 29 to 34. It is not essential to connect the phase adjusting means to the first phase shift circuit 2 in particular.

  The vias 35 to 37 of the second to fourth phase shift circuits 3 to 5 are different from the vias 14, 15, and 16 of the first phase shift circuit 2, and the signal lines of the respective phase shift circuits are different. Used to connect between layers. However, these vias 35 to 37 are used as signal paths in the same manner as the vias 14 to 16.

  A via in the case of producing a circuit with an LTCC multilayer substrate is conventionally used as a grounding means for connecting the circuit to a ground conductor in the lowermost layer, and the use of such a via as a signal transmission path is the present invention. Is one of the features of

  Next, the first phase shift circuit 2 will be described in more detail with reference to FIGS. 2 and 3.

  FIG. 2 is a perspective view showing the phase shift circuit 2. However, the variable capacitance diodes 20, 57, and 58 connected to the conductor pads 17, 18, and 19 and the DC power sources 21, 62, and 63 for applying a DC voltage to each variable capacitance diode are not shown. .

  As can be seen from FIG. 2, the reference line 9 is formed by connecting the stubs 38 and 39 with signal lines, and the delay line 10 is formed by connecting the stubs 40 to 42 with signal lines. . Similarly, the adjustment signal paths 11 to 13 are formed by adjustment stubs 43 to 45, respectively (the vias 46 to 49 are the signal lines from the SPDT switches 6 and 7, the reference line 9 and the delay line). 10 is a via for connecting 10).

  Since the present embodiment is a 4-bit phase shifter, each stub and each stub have a phase difference of 22.5 ° between the case where the signal passes through the reference line 9 and the case where the signal passes through the delay line 10. The size of the signal line is appropriately selected according to the wavelength of the input signal. Similarly, in the second to fourth phase shift circuits 3 to 5, each phase difference is 45 °, 90 °, and 180 ° when the signal passes through each of the reference line and the delay line. The size of the stub and signal line is selected.

Of course, the phase shifter according to the present invention can be configured to have a configuration other than 4 bits. (For example, in the case of a 5-bit configuration, phase differences caused by path switching in each phase shift circuit are 11.25 °, 22.5 °, 45 °, 90 °, and 180 °. 5 phase shift circuits can be designed.) In general, when an n-bit configuration is adopted, digital phase adjustment in increments of (360/2 ⁿ ) ° is possible.

  FIG. 3 is a diagram showing the phase shift circuit 2 including the dielectric multilayer substrate that is the circuit board when viewed from the direction A in FIG. 2. As can be seen from FIG. 3, the phase shift circuit 2 is formed on the surface of the third layer 54 except for the SPDT switches 6 and 7, and the vias 14 to 16, 46, 48 to the fifth layer 56 which is the uppermost layer. (And 47, 49 (not shown)).

  The signal input from the input unit 8 on the surface of the fifth layer 56 proceeds to the first phase shift circuit 2, and proceeds from the SPDT switch 6 to the surface of the third layer 54 via the via 47 or 46. Is also input to the variable capacitance diode 20 on the surface of the fifth layer, or 57 and 58 via the via 14 or vias 15 and 16, and the input signal is subjected to analog phase adjustment by reactance of the variable capacitance diode generated according to the applied voltage. The

  Reference numeral 59 denotes a grounding conductor pad, which is electrically connected to the grounding conductor 95 formed on the bottom surface of the first layer 52 via the grounding via 60. The input of the signal from the input unit 8 is performed by applying a high frequency voltage from a high frequency power source connected between the conductor pad 50 and the grounding conductor pad 59 in the input unit 8. The pad 59 is required.

  When the output signal is taken out from the output unit 28 in FIG. 1, the voltage signal is actually taken out between the conductor pad of the output unit 28 and the grounding pad paired with the conductor pad. Conductor pads are required (these grounding conductor pads are not shown in FIG. 1).

  FIG. 4 is a circuit diagram showing a circuit configuration of the first phase shift circuit 2. A variable capacitance diode 20 is connected to the adjustment signal path 11 branched from the reference line 9, and variable capacitance diodes 57 and 58 are connected to the adjustment signal paths 12 and 13 branched from the delay line 10, respectively. Yes. The adjustment signal paths 12 and 13 are connected to the delay line 10 via a distance corresponding to the phase of the input signal of 90 °. With such a configuration, the reflected waves caused by the two adjustment signal paths 12 and 13 cancel each other, and the insertion loss can be suppressed.

  By switching the SPDT switches 6 and 7, the input signal passes through only one of the reference line 9 and the delay line 10. Therefore, analog adjustment when using the phase shifter may be performed only for the variable capacitance diode 20 or only for the variable capacitance diodes 57 and 58.

  A signal that has undergone the digital phase adjustment by path selection and the analog phase adjustment by the variable capacitance diode is input to the second transfer circuit 3 via the connection unit 51.

  Next, the second phase shift circuit 3 will be described in detail with reference to FIG. 5, FIG. 6, and FIG.

  FIG. 5 is a plan view showing the second phase shift circuit 3 in FIG. 1 in more detail. The reference line 29 is formed by a stub 68, and the delay line 30 is formed by connecting the stubs 69 to 75 with signal lines and vias 76 to 81. That is, when the delay line 30 is selected by switching, the signal input to the phase shift circuit 3 propagates through the vias 76 to 81 as well as the stubs 69 to 75.

  As already described, although microwave components using the LTCC technology have conventionally existed, vias in the case of producing a circuit with such an LTCC multilayer substrate are usually used as a connection means for grounding. On the other hand, the phase shifter according to the present embodiment uses a via in the LTCC multilayer substrate as a signal path, particularly as a part of the delay line here, and this point is different from the conventional configuration.

In FIG. 5, the stubs 70 and 73 appear to intersect, but as shown in FIGS. 6 and 7, since these stubs are in different layers, they do not contact each other.
As described above, the adjustment signal path is not branched from the reference line 29 and the delay line 30, but the adjustment signal path is branched from the reference line 9 and the delay line 10 in the first phase shift circuit 2. Instead, it is possible to branch from the reference line 29 and the delay line 30.

  As already described, in the second phase shift circuit 3, the stubs 69 to 75 and the vias 76 to the phase difference of 45 ° when the signal passes through the reference line 29 and the delay line 30. Although the size of 81 is adjusted, the manufacturing accuracy of each stub 69 to 75 and each via 76 to 81 is ideal, and the length of the signal path is set to a theoretically required value. Even if they can be matched, there is still an error due to the skin effect of the via in the phase difference when passing through each path.

  That is, since the via is typically formed as a conductor having a cylindrical shape, the electromagnetic wave cannot penetrate into the via and propagates only near the surface (skin effect). Due to this, a phase shift occurs. Therefore, when a signal path is formed as a three-dimensional structure via, an error due to the parasitic inductance component of the via must also be taken into consideration.

  In this case, the phase shifter 1 as a laminated structure is manufactured, and after actually inputting a high-frequency signal and measuring an error from the phase design value in the output signal, an adjustment stub for correcting the error is formed on the surface layer. It is also possible to add a new one and connect it with solder etc. to adjust the phase shift (the size of the adjustment stub needs to be accurately determined in advance by computer simulation etc.), but the surface stub is This occupies a certain area on the surface of the phase shifter, which is a problem in reducing the area of the phase shifter.

  Therefore, in the phase shifter 1 according to the present embodiment, the embedded phase adjustment stubs 43 to 45 are formed in the first phase shift circuit 2 in advance, so that the error can be reduced without impairing the area saving of the surface of the phase shifter. It has been corrected. In this case, the manufacturing accuracy of the embedded adjustment stubs 43 to 45 becomes a problem. If the manufacturing accuracy is not sufficient, it is difficult to adjust the stubs 43 to 45 again after fixing the layers of the LTCC multilayer substrate by sintering.

  In the present invention, in order to solve the error due to the skin effect and the problem due to the manufacturing accuracy of the embedded adjustment stub, the adjustment stubs 43 to 45 formed in the first phase shift circuit 2 are provided. In addition, variable capacitance diodes 20, 57, 58 electrically connected to the adjustment stubs are used. That is, the stub 43 for adjustment branched from the reference line 9 or the delay line 10 by appropriately adjusting the capacitance of the variable capacitance diode 20 or 57 and 58 by controlling the applied voltage from the DC power source 21 or 62 and 63. Alternatively, the phase shift (due to reflection) due to 44 and 45 is analog controlled.

  Strictly speaking, the relationship between the voltage applied to the variable capacitance diode and the remaining phase shifter error also depends on the size error in the embedded stub and the manufacturing error in the internal circuit elements. Therefore, the voltage to be applied to the variable capacitance diode for error correction is generally determined empirically by actually inputting a high frequency signal to the phase shifter while acquiring the phase error data while changing the applied voltage. Is done.

  However, once the applied voltage for such error correction is determined, further applied voltage control for finer phase adjustment can be programmed. This is because the relationship between applied voltage and capacitance in a variable capacitance diode can be determined theoretically or experimentally, and the amount of phase delay relative to the capacitance value of the variable capacitance diode can also be determined theoretically or experimentally. . That is, once an error in digital phase control is corrected, a desired analog phase can be adjusted by program control thereafter.

  The steps of acquiring the phase error data while changing the applied voltage and searching for the optimum applied voltage for error correction, and the step of adjusting the applied voltage to the optimum voltage are also programmed by an appropriate programming technique. Is possible.

  Reference numeral 88 denotes a connection portion between the second phase shift circuit 3 and the third phase shift circuit 4, and a signal that has passed through the reference line 29 or the delay line 30 is transmitted to the third phase shift circuit at the connection portion 88. 4 is input.

  FIG. 6 is a perspective view of the second phase shift circuit 3 and shows the three-dimensional structure of the signal path in an easy-to-understand manner.

  The signal lines and the stubs 68 constituting the reference line 29 are formed on the surface of the third layer 54 as shown in FIG.

  On the other hand, the signal lines constituting the delay line 30 and the stubs 69 to 75 are three-dimensionally distributed on the surface of the first layer 52, the second layer 53, or the third layer 54, and these stubs are ( The delay line 30 is formed by connecting via the interlayer vias 76-81 (via signal lines and conductor pads). The vias 64 to 67 are vias for connecting the signal lines from the SPDT switches 22 and 23 to the reference line 29 and the delay line 30.

  Specifically, a stub 69 is first formed on the surface of the third layer 54 from the SPDT switch 22 on the surface of the fifth layer 56 via the via 64. The stub 69 is connected to the via 76 through the conductor pad 82 through the signal line. The via 76 leads to the surface of the second layer 53 and is connected to the stub 70 via the conductor pad 89 and the signal line.

  The stub 70 formed on the surface of the second layer 53 is connected to the via 77 through the conductor pad 83 through the signal line. The via 77 leads to the surface of the first layer 52 and is connected to the stub 71 via the conductor pad 90 and the signal line.

  The stub 71 formed on the surface of the first layer 52 is connected to the via 78 through the conductor pad 91 through the signal line. The via 78 leads to the surface of the third layer 54 and is connected to the stub 72 via the conductor pad 84 and the signal line.

  The stub 72 formed on the surface of the third layer 54 is connected to the via 79 through the conductor pad 85 through the signal line. The via 79 leads to the surface of the first layer 52 and is connected to the stub 73 through the conductor pad 92 and the signal line.

  The stub 73 formed on the surface of the first layer 52 is connected to the via 80 through the conductor pad 93 through the signal line. The via 80 leads to the surface of the second layer 53 and is connected to the stub 74 through the conductor pad 86 and the signal line.

  The stub 74 formed on the surface of the second layer 53 is connected to the via 81 through the conductor pad 94 through the signal line. The via 81 communicates with the surface of the third layer 54 and is connected to the stub 75 via the conductor pad 87 and the signal line.

  The stub 75 is connected to the SPDT switch 23 on the surface of the fifth layer 56 through the signal line and the via 66.

  As described above, the via 64 is from the fifth layer to the third layer, the via 76 is from the third layer to the second layer, the via 77 is from the second layer to the first layer, and the via 78 is from the first layer to the third layer. The via 79 is from the third layer to the first layer, the via 80 is from the first layer to the second layer, the via 81 is from the second layer to the third layer, and the via 66 is from the third layer to the fifth layer. , And the length of each of them corresponds to the thickness of the layer through which each via penetrates. Accordingly, in FIG. 5, the stubs 70 and 73 seem to intersect, but the stub 70 is formed on the surface of the second layer 53, while the stub 73 is formed on the surface of the first layer 52. In addition, they only cross through the second layer 53 and there is no contact problem.

  In addition, when the stubs on different layers intersect with each other through a layer existing between both stubs, it is preferable that the stubs intersect substantially perpendicularly in the projection plane. If the stubs are formed in parallel through the layers, a phase error may occur due to the interaction between the parallel currents in both stubs when a signal is input.

  FIG. 7 is a diagram showing the second phase shift circuit 3 including the dielectric multilayer substrate that is the circuit substrate when viewed from the B direction in FIG. 6. As described with reference to FIG. 6, the second phase shift circuit 3 is three-dimensionally formed across the first layer 52, the second layer 53, and the third layer 54 except for the SPDT switches 22 and 23. I understand that. In addition, although not shown in figure before the connection parts 51 and 88, these are connected to the 1st phase shift circuit 2 and the 3rd phase shift circuit 4, respectively.

  Similarly to the second phase shift circuit 3, the third phase shift circuit 4 and the fourth phase shift circuit 5 are also formed in three dimensions by connecting stubs through vias in the dielectric laminated substrate. Yes. When a circuit with a long delay line path, such as the third and fourth phase shift circuits, is configured as a conventional planar type, a particularly large circuit area is required. If this is formed, the area can be greatly reduced.

  The phase difference when passing through each of the reference line 31 and the delay line 32 is 90 °, and the phase difference when passing through each of the reference line 33 and the delay line 34 is 180 °. Although the sizes of the stub and the signal line are selected, since the vias used as these signal paths have parasitic inductance components as well as the vias in the second phase shift circuit 3, the first phase shift circuit 2. It is necessary to correct the error by using the adjustment stubs 43 to 45 formed in the above and the variable capacitance diodes 20, 57, 58 connected thereto.

  Subsequently, the operation of the phase shifter 1 will be described. First, a signal is input to the phase shifter 1 by applying a high frequency voltage from a high frequency power source connected between the conductor pad 50 and the grounding conductor pad 59 in the input unit 8.

  The signal passes through the reference line 9 or the delay line 10 by switching the SPDT switches 6 and 7 in the first circuit 2. When passing through the delay line 10, a phase delay of about 22.5 ° is generated as compared with passing through the reference line 9 (or the DC voltage applied to the variable capacitance diodes 20, 57, and 58). Adjustment can also be made to produce any other value of analog phase delay.)

  The phase error due to the above-described via skin effect occurs in each of the first to fourth phase shift circuits 2 to 5, and the adjustment stubs 43 to 45 and the variable capacitance diodes 20, 57, 58 The errors accumulated in each of these phase shift circuits are corrected together. Therefore, after correction, the phase difference caused by switching in the first phase shift circuit 2 may be strictly different from 22.5 ° (for correcting errors in the second to fourth phase shift circuits). Since the adjustment is also applied to the first phase shift circuit 2), the expression “approximately 22.5 °” takes this into consideration. In any case, the digital adjustment quantization error is corrected as an output of the entire phase shifter 1 by analog adjustment by the reactance element.

  The signal that has passed through the first phase shift circuit 2 is input to the second phase shift circuit 3. Depending on which path the SPDT switch 22, 23 is switched to, the signal passes through the reference line 29 or the delay line 30. When passing through the delay line 30, a phase delay of about 45 ° is generated as compared with passing through the reference line 29.

  The signal that has passed through the second phase shift circuit 3 is input to the third phase shift circuit 4. Depending on which path the SPDT switches 24 and 25 are switched to, the signal passes through the reference line 31 or the delay line 32. When passing through the delay line 32, a phase delay of about 90 ° is generated as compared with passing through the reference line 31.

  The signal that has passed through the third phase shift circuit 4 is input to the fourth phase shift circuit 5. Depending on which path the SPDT switches 26 and 27 are switched to, the signal passes through the reference line 33 or the delay line 34. When passing through the delay line 34, a phase delay of about 180 ° is generated as compared with passing through the reference line 33.

  The signal that has passed through the fourth phase shift circuit 5 is output from the output unit 28. Specifically, a conductor pad on the surface layer connected from the SPDT switch 27 via a signal line and a conductor pad grounded by being connected to a ground conductor 95 paired with the conductor pad through a via. An output signal is taken out as a potential difference between them.

  If an arbitrary amplifier is connected from the output unit, it is possible to amplify the phase-adjusted signal, and it is also possible to directly connect to the antenna element and to feed the element with the output signal.

  The phase shifter according to the present invention has been described above using the so-called path length switching type (transmission type) phase shifter 1 as an example. However, the phase shifter according to the present invention can be configured as an arbitrary reflection type phase shifter. Even in the reflection type phase shifter, the signal path is configured in three dimensions, and at the same time, an adjustment stub is branched in the signal path, and a reactance element is connected and controlled by voltage and light. Correction, and analog adjustment of the phase exceeding that can be performed.

  The phase shifter according to the present invention is optimal for adjusting the phase of each antenna element in the phased array antenna. For example, it can be used as an element for configuring a communication / sensor antenna device, a ground / mobile station active phased array radar, a communication broadcast antenna device, and the like.

DESCRIPTION OF SYMBOLS 1 Phase shifter 2-5 Phase shift circuit 6-7 SPDT switch 8 Input part 9 Reference line 10 Delay line 11-13 Adjustment signal path 14-16 Via 17-19 Conductor pad 20 Variable capacity diode 21 DC power supply 22-27 SPDT switch 28 Output unit 29 Reference line 30 Delay line 31 Reference line 32 Delay line 33 Reference line 34 Delay line 35 to 37 Via 38 to 42 Stubs 43 to 45 Adjustment stubs 46 to 49 Stub 50 Conductor pad 51 Connection unit 52 First Layer 53 Second layer 54 Third layer 55 Fourth layer 56 Fifth layer 57-58 Variable capacitance diode 59 Grounding conductor pad 60 Grounding via 61 Conductor pads 62-63 DC power supply 64-67 Via 68-75 Stub 76- 81 Via 82 to 87 Conductor pad 88 Connection portion 89 to 94 Conductor pad 95 Grounding conductor

Claims (7)

A first phase shift circuit formed on or on the surface of a dielectric multilayer substrate formed by laminating a plurality of dielectric substrates,
First signal path switching means;
Two or more signal paths switched by the first signal path switching means;
Including
Including a signal path branched from at least one of two or more signal paths switched by the first signal path switching means, and the branched signal path includes a reactance element on the surface of the dielectric multilayer substrate via a via Electrically connected,
A first phase shift circuit;
A second phase shift circuit formed on or on the surface of the dielectric laminated substrate,
Second signal path switching means;
Two or more signal paths switched by the second signal path switching means, wherein signal paths respectively formed on two or more different layers in the dielectric laminated substrate are electrically connected by interlayer vias. Two or more signal paths, including signal paths;
A second phase shift circuit including:
Only including,
The first and second signal path switching means are high-frequency MEMS (Micro Electro Mechanical Systems) switches disposed on the surface of the dielectric multilayer substrate, and the high-frequency MEMS switch on the dielectric multilayer substrate is further disposed. A phase shifter in which a grounding conductor is formed only on the surface opposite to the opposite side . A phase shift circuit formed inside or on the surface of a dielectric multilayer substrate formed by laminating a plurality of dielectric substrates,
Signal path switching means;
Two or more signal paths switched by the signal path switching means, wherein the signal paths are formed by electrically connecting signal paths respectively formed on two or more different layers in the dielectric laminated substrate by interlayer vias. Including two or more signal paths;
Including
The signal path switching unit further includes a signal path branched from at least one of two or more signal paths switched by the signal path switching unit, and the branched signal path is electrically connected to a reactance element on the surface of the dielectric multilayer substrate through a via. Connected to the
Phase shift circuit,
Including
The signal path switching means is a high-frequency MEMS (Micro Electro Mechanical Systems) switch disposed on the surface of the dielectric multilayer substrate, and is further opposite to the side where the high-frequency MEMS switch is disposed on the dielectric multilayer substrate. A phase shifter in which a grounding conductor is formed only on the side surface .   The phase shift according to claim 1, wherein the reactance element is one of a variable capacitance diode, a field effect transistor (FET), a metal oxide semiconductor (MOS) capacitor, a photodiode, and a phototransistor. vessel.   4. The phase shifter according to claim 1, wherein the dielectric substrate is an LTCC substrate, and the dielectric multilayer substrate is an LTCC multilayer substrate. 5. The dielectric stack two or more signal paths which are formed respectively on a layer different in the substrate is formed so as to intersect the vertically approximately projection plane through the layer, in any one of claims 1 to 4 The phase shifter described. Signal path in each of the phase shift circuit, the formed in a layer other than the uppermost layer of the dielectric multilayer in the substrate, the phase shifter according to any one of claims 1 to 5. The branched signal path is a two adjustment stub branches through almost a quarter distance of the input signal wavelength on branch origin signal path, according to any one of claims 1 to 6 Phase shifter.

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