JPH10163703A - Multilayer dielectric circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the integration and miniaturization of microwave circuit for a switched line type phase shifter or the like. SOLUTION: This multilayered microwave circuit is composed of a 1st layer 1 mounting electric circuit parts on a microstrip line formed on a dielectric, 3rd layer 3 having a bias circuit on the stripline circuit formed in the dielectric between 2nd and 4th layers being ground electrode, and 5th layer 5 having a reference phase circuit and a phase shift line circuit on the strip line circuit formed in the dielectric between 4th and 6th layers being ground electrode. Thus, the microwave circuit is integrated and this circuit can be miniaturized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer dielectric circuit, and more particularly to a high-frequency multilayer dielectric circuit having a multilayer structure.

[Prior art]

[0002] In the case of a hybrid integrated circuit in which an electric circuit has a multi-layer structure using a dielectric, only electric wiring is multi-layered, so that there is a limit in terms of integration and miniaturization. Japanese Patent Laid-Open Publication No. Hei 6-291521 discloses a structure that solves this limitation, enables higher density, and avoids deterioration of high frequency characteristics due to electromagnetic field coupling. FIG. 7 shows a multilayer dielectric circuit disclosed in the publication.

FIG. 8 is a schematic cross-sectional view of the high-frequency multilayer integrated circuit structure shown in FIG. 7 with the object of providing a high-frequency multilayer integrated circuit capable of miniaturizing the circuit and avoiding deterioration of high-frequency characteristics due to electromagnetic field coupling. Dielectric 2 having
2, a strip line circuit portion 21 is buried, an electric circuit portion 27 is formed on the dielectric 25 on the ground electrode 23, and the strip line circuit portion 21 is And the electric circuit section 27 are electrically connected. Further, individual electronic components 28 are mounted on the electric circuit portion 27 on the front surface, and transistors 29 are mounted on exposed portions of the strip line circuit portion 21.

[0004]

The above arrangement is effective when the circuit scale is small and the circuit area is small.
As the circuit scale increases and the circuit area increases, there is a limit in terms of miniaturization.

For example, when a switched line type phase shifter is constructed, a large number of bias circuits and a large area phase shift circuit for extracting the amount of phase shift are required according to the number of bits. When configuring a phaser or the like, there is a limit in realizing miniaturization. In addition, when a circuit having a relatively low frequency (for example, near the L band) is configured, it is difficult to reduce the size. For example, assuming that the frequency is 1 GHZ, even if the dielectric constant is assumed to be 10, it is 24 at a quarter wavelength.
This is because a length of about mm is required.

An object of the present invention is to provide a multilayer dielectric circuit which is advantageous for miniaturization at a relatively low microwave frequency.

A specific object of the present invention is to provide a highly integrated microwave circuit having a large circuit area, such as a switched line type phase shifter, at a relatively low microwave frequency, and to realize a multilayered circuit for realizing miniaturization of the microwave circuit. It is to provide a dielectric circuit.

[0008]

In order to solve the above-mentioned problems, a multilayer dielectric circuit according to the present invention has a dielectric having a multilayer structure, and a ground electrode is formed at least between each dielectric layer. An electric circuit component is mounted together with a circuit pattern formed on the dielectric layer of the strip line, a bias circuit for supplying a bias signal in the second dielectric layer is formed on the strip line, and at least one other dielectric is formed. A phase shift circuit in which a phase shift amount is controlled by the bias signal in a layer is formed as a strip line, and the circuit pattern,
Predetermined portions of the bias circuit and the phase shift circuit are connected by through holes formed in the thickness direction of the dielectric.

Here, the bias circuit and the circuit pattern, and the phase shift circuit and the circuit pattern are connected via a through hole.

A multilayer dielectric circuit according to another aspect of the present invention comprises a first layer in which electric circuit components are mounted on a microstrip line circuit formed on a dielectric, and a second layer and a fourth layer which are ground electrodes. A third layer having a bias circuit on a strip line circuit formed in the dielectric between the layers, and a reference phase circuit and a phase on the strip line circuit formed in the dielectric between the fourth and sixth layers as ground electrodes. And a fifth layer having a line circuit.

Further, a seventh layer having a reference phase circuit and a phase shift line circuit is provided on a strip line circuit formed in a dielectric between a sixth layer and an eighth layer which are ground electrodes.
Further, the reference phase circuit and the phase shift line circuit formed on the strip line circuit have the same bit in the same layer.

With the above configuration, a bias circuit and a phase shift circuit requiring a large area in a switched line type phase shifter or the like can be highly integrated.
The size of the microwave circuit can be reduced.

Further, the reference phase circuit and the phase shift line circuit
By means of configuring the same bit in the same layer, the obtained amplitude error becomes the loss of the line length difference, and there is an effect that the amplitude error can be reduced.

[0014]

Next, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a sectional view showing one embodiment of a multilayer dielectric circuit according to the present invention. Referring to FIG. 1, the present embodiment includes dielectrics 10, 11, 1
2 are laminated, an electric component mounting circuit 1 as a first layer on which an electric component 9 is mounted is formed on an upper surface of a dielectric 10, and a ground electrode as a second layer is provided between the dielectrics 10 and 11. 2
However, the bias circuit 3 as a third layer is provided in the dielectric 11.
However, a ground electrode 4 as a fourth layer is provided between the dielectrics 11 and 12.
However, a phase shift circuit 5 as a fifth layer is formed in the dielectric 12, and a ground electrode 6 is formed on the lower surface of the dielectric 12. A dielectric 10 is provided between the electric component mounting circuit 1 and the phase shift circuit 5,
12 are connected through a through hole 7 passing through the ground electrode 2.
And 6 are connected by a through hole 8.

FIG. 2 is a plan view of the electric component mounting circuit 1 of the first layer, the bias circuit 3 of the third layer, and the phase shift circuit 5 of the fifth layer in FIG.

In FIG. 2, the electric component mounting circuit 1 of the first layer is formed by strip lines, input terminals 91, output terminals 92, and control signal terminals 93 are similarly formed by strip lines, and the electric components 9 are mounted. It is connected. Also,
The bias circuit 3 in the third layer is formed as a strip line, and a high-impedance quarter-wave line 31 and a low-impedance open-ended quarter-wave line 32 are formed as strip lines. Further, there is a through hole 7 connected to another layer and a through hole 8 connected to a ground electrode. The fifth layer phase shift circuit 5 is also formed as a strip line,
It is composed of a reference phase line 51 and phase shift lines 52 and 53 for producing a desired amount of phase shift, and is connected to another layer via a through hole 7.

FIG. 3 shows a circuit example of the embodiment having the above-described configuration.
This will be described with reference to FIG. FIG. 3 shows a phase shifter using a diode as illustrated as an electric component, and an input terminal 91.
The microwave signal input from the controller 9 controls ON / OFF of the diode 9 as an electric component by the bias signal supplied from the control signal terminal 93, and passes either the reference phase line 51 or the phase shift line 52. At this time, the line length of the phase shift line 52 is set so as to be delayed from the reference phase line 51 by a desired phase shift amount. Similarly, by setting the phase shift line 53 so as to be delayed by a desired phase shift amount different from the reference phase line 51, the operation of the 2-bit phase shifter becomes possible, and the desired phase shift amount is output from the output terminal 92. Microwave signal can be output.

In FIG. 3, quarter-wavelength lines 31 and 32 connected to a microwave signal passing line operate to be short-circuited with respect to a microwave signal, and have a DC voltage with respect to a bias signal. The operation of returning or supplying a control signal is performed.

The operation of the embodiment of the present invention will be further described. In FIG. 3, assuming a 2-bit phase shifter of 22.5 ° and 45 °, the microwave signal input from the input terminal 91 turns on / off the diode 9 by the bias signal supplied from the control signal terminal 93. In the reference phase state, the diode on the side of the reference phase line 51 is turned on, the diodes on the side of the phase shift lines 52 and 53 are turned off, and the input signal passes through the two reference phase lines and passes through the output terminal 92. Output from

In the case of performing the 22.5 ° phase shift control, the microwave signal input from the input terminal 91 turns off the diode on the reference phase line 51 side of the first bit, and turns off the diode on the phase shift line 52 side. Is turned on, the diode on the side of the reference phase line 51 of the second bit is turned on, and the diode on the side of the phase shift line 53 is turned off.
From the reference phase state with a phase shift of 22.5 °.

Similarly, when performing 45 ° phase shift control, 1
Turn on the diode on the reference phase line 51 side of the bit,
By turning off the diode on the side of the phase shift line 52 and turning off the diode on the side of the reference phase line 51 for the second bit and turning on the diode on the side of the phase shift line 53, the microwave signal input from the input terminal 91 becomes 45 Output with a phase delay of °.

When performing the phase shift control of 22.5 ° + 45 °, the diodes on the side of the reference phase line 51 of the first and second bits are turned off, and the diodes on the side of the phase shift lines 52 and 53 are turned on. Thus, the microwave signal input from the input terminal 91 is output from the output terminal 92 with a phase shift of 67.5 °.

Referring to FIG. 1, the present embodiment will be described more specifically.
Assuming that the dielectric constant of the dielectric is 7.1 and the thickness of the dielectric is 0.4 mm, the width of the microstrip line having the impedance of 50Ω is 0.51 mm. In addition, electric parts 9
Is, for example, a pin diode with a lead or a pin diode chip. In the bias circuit 3 of the third layer, a high-impedance quarter-wave line 31 and a low-impedance open-end quarter-wave line 32 are formed as strip lines. For example, if the permittivity of the dielectric is 7.1 and the thickness of the dielectric is 0.8 mm, the high impedance line width of about 74Ω is about 50 μm, and the low impedance line width of about 30Ω is about 0.5 mm. Become. Also, 1/4
The wavelength is about 28 mm, assuming a frequency of 1 GHZ. The phase shift circuit 5 of the fifth layer includes a reference phase line 51 having 50Ω impedance and strip lines of phase shift lines 52 and 53. Assuming that the dielectric constant of the dielectric is 7.1 and the thickness of the dielectric is 0.8 mm, the line width is about 0.5 mm.
19 mm. Further, the phase shift amount is 22.5 ° and 45 °.
Then, the phase shift line length needs to be about 7 mm at 22.5 ° and about 14 mm or more at 45 ° as the operating frequency 1 GHZ. The amount of phase shift is the difference between the length of the reference phase line 51 and the length of the phase shift lines 52 and 53. Specifically, if the reference phase shift line is 5 mm, 22.5 °
Is about 12 mm, and the phase line length at 45 ° is about 19 mm. Thus, according to the present embodiment,
Obviously, it is advantageous in terms of miniaturization.

Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 4 is a plan view showing a second embodiment of the present invention, which has a configuration in which a 1-bit circuit is added to the first embodiment. The electrical component mounting circuit 1 of the first layer is formed as a microstrip line, and an electrical component 9, a through hole 7, and a control signal terminal 13 are added for one bit. The bias circuit 3 of the third layer is also formed as a strip line, and is connected to the high impedance quarter-wave line 31 and the low impedance open end quarter-wave line 32, the through hole 7 connected to another layer, and the ground electrode. A through hole 8 is added for one bit. Further, a fifth-layer phase shift circuit 5 formed with strip lines
The reference phase line 51, the phase shift line 54 for obtaining a desired phase shift amount, and the through hole 7 connected to another layer
This is a configuration in which bits are added. With this configuration, 3
A bit switched line type phase shift circuit can be realized. Furthermore, an N-bit switched line type phase shift circuit can be realized by adding a circuit configuration in the same manner.

FIGS. 5 and 6 are a sectional view and a plan view, respectively, showing a modification of the first embodiment of the present invention. The embodiment shown in FIG. 5 is different from the first embodiment of the present invention in that a strip line formed in a dielectric 21 between a ground electrode 6 as a sixth layer and an eighth layer shown as a ground electrode 23. Phase shift circuit 22
As a seventh layer.

The embodiment shown in FIG. 6 shows a pattern diagram of the phase shift circuit 5 of the fifth layer and the phase shift circuit 22 of the seventh layer. When the phase shift amount is large, it is necessary to form a long phase line, and the phase shift circuits 5 and 22 of the fifth layer and the seventh layer can realize miniaturization. Furthermore, a layer structure can be added in the same manner.

[0027]

As described above, the multilayer dielectric circuit of the present invention is integrated by forming the structure of the multilayer substrate as a layer of the bias circuit, a layer of the phase shift circuit, and a layer of the electric component mounting circuit. When a switched line type phase shifter or the like is configured, a large number of bias circuits and a large area phase shift circuit for extracting a phase shift amount can be integrated,
Microwave circuit can be downsized. In addition, since a circuit having a long phase shift line can be multilayered into a plurality of layers, when a circuit is configured at a relatively low frequency, a circuit having a long phase shift line is multilayered and configured on another layer. Integration becomes possible.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing one embodiment of a multilayer dielectric circuit of the present invention.

FIG. 2 is a layer pattern diagram showing the embodiment shown in FIG.

FIG. 3 is a circuit diagram showing the multilayer dielectric circuit shown in FIG. 1;

FIG. 4 is a layer pattern diagram showing another embodiment of the present invention.

FIG. 5 is a schematic sectional view showing still another embodiment of the present invention.

FIG. 6 is a pattern diagram of a fifth layer and a seventh layer of the embodiment shown in FIG.

FIG. 7 is a schematic sectional view showing the structure of a conventional high-frequency multilayer integrated circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Electric component mounting circuit 2, 4, 6, 23 Ground electrode 3 Bias circuit 5, 22 Phase shift circuit 7, 8 Through hole 9 Electric component 10 Dielectric 11 Electric component mounting circuit 12 Ground electrode 31 1/4 wavelength of high impedance Line 32 Low impedance open end 1/4 wavelength line 51 Reference phase line 52, 53, 54 Phase shift line 91 Input terminal 92 Output terminal 93 Control signal terminal

Claims (5)

[Claims] An electric circuit component is mounted on a first dielectric layer together with a circuit pattern formed by a strip line, wherein a ground electrode is formed at least between each dielectric layer. A bias circuit for supplying a bias signal is formed in the second dielectric layer as a strip line, and a phase shift circuit whose phase shift amount is controlled by the bias signal in another at least one dielectric layer is formed as a strip line. A multilayer dielectric circuit, wherein predetermined portions of the circuit pattern, the bias circuit, and the phase shift circuit are connected by through holes formed in the thickness direction of the dielectric. 2. The multilayer dielectric circuit according to claim 1, wherein said bias circuit and said circuit pattern, and said phase shift circuit and said circuit pattern are connected via through holes. 3. A strip line circuit formed in a dielectric between a first layer in which electric circuit components are mounted on a microstrip line circuit formed on a dielectric and a second layer and a fourth layer which are ground electrodes. A third layer having a bias circuit thereon and a fifth layer having a reference phase circuit and a phase line circuit on a strip line circuit formed in a dielectric between the fourth and sixth layers serving as ground electrodes. A multilayer dielectric circuit characterized by: 4. The semiconductor device according to claim 1, further comprising a seventh layer having a reference phase circuit and a phase shift line circuit on a strip line circuit formed in a dielectric between a sixth layer and an eighth layer which are ground electrodes. The multilayer dielectric circuit according to claim 3. 5. The multilayer dielectric circuit according to claim 3, wherein the reference phase circuit and the phase shift line circuit formed on the strip line circuit have the same bit in the same layer.