JP5395566B2 - Display device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a display device and a manufacturing method thereof.

  It is known that a plurality of display panels are manufactured integrally using a mother substrate and then cut into individual display panels (Patent Documents 1 and 2). In the example of the liquid crystal display panel, a pair of mother glass substrates is used, one of which is cut out on a TFT (Thin Film Transistor) substrate and the other is cut out on a color filter substrate.

  Each display panel is provided with a large number of wirings. Wirings between adjacent display panels are formed in an electrically conductive state in advance, and the mother substrate is cut after inspection. Thereby, since a plurality of display panels can be inspected simultaneously, the inspection process can be made more efficient.

JP-A-9-138418 Japanese Patent Laid-Open No. 10-20288

  In the process described above, the wiring is cut along with the cutting of the mother substrate, so that the cross section of the wiring is exposed at the end face of each display panel. When the cross section of the wiring is exposed, problems due to static electricity and electrolytic corrosion occur. If the mother substrate is cut after the wiring is removed in the vicinity of the cutting line of the mother substrate, exposure of the cross section of the wiring can be avoided, but in this case, there is a problem that the number of wiring removing steps increases.

  An object of the present invention is to prevent the influence caused by the exposure of wiring without increasing the number of steps.

  (1) A method of manufacturing a display device according to the present invention includes (a) a step of forming a semiconductor layer on a substrate, (b) a step of forming a metal layer on the semiconductor layer, and (c) on the metal layer. Forming an etching resist having a thick first portion and a thin second portion; and (d) patterning the semiconductor layer and the metal layer by etching through the etching resist, and wiring from the metal layer. And (e) conducting an electrical inspection of the wiring, and (f) removing the second portion by thinning the etching resist. And (g) selective etching to leave the semiconductor layer through the remaining first portion so that the wiring is separated into a drain electrode and a source electrode. And (h) cutting the substrate, and in the step (g) of patterning the wiring, at the position in the cutting line direction of the substrate rather than the drain electrode and the source electrode, Etching is performed to cut the wiring so as to leave a semiconductor layer. According to the present invention, since the wiring is cut together in the originally performed process, the influence of the exposure of the wiring can be prevented without increasing the number of processes.

  (2) In the method of manufacturing a display device described in (1), (i) the wiring is performed after the step (g) of patterning the wiring and before the step (h) of cutting the substrate. Forming a passivation film thereon; and (j) etching the passivation film to form a through hole in the passivation film for electrical connection with the wiring, the passivation film further comprising: In the step (j) of etching the film, a through hole or a notch is formed in the passivation film at the position in the cutting line direction of the substrate rather than the drain electrode and the source electrode, and the wiring is cut. Etching may be performed so as to cut the remaining semiconductor layer.

  (3) A display device according to the present invention includes a substrate, a semiconductor layer formed on the substrate, a wiring formed to have a portion located on the semiconductor layer, the semiconductor layer, and the wiring The semiconductor layer includes: a first portion located under the wiring; and a second portion protruding from the wiring along the length direction of the wiring from the first portion. The passivation film has a through hole or a notch, and the tip surface of the second portion of the semiconductor layer is flush with the surface of the through hole or the notch. To do.

  (4) A method for manufacturing a display device according to the present invention includes: (a) a step of forming a first oxide conductive film made of an oxide semiconductor on a substrate; and (b) a first metal on the first oxide conductive film. Forming a layer; (c) forming an etching resist having a thick first portion and a thin second portion on the first metal layer; and (d) the first via the etching resist. The oxide conductive film and the first metal layer are patterned by etching, a common electrode is formed from the first oxide conductive film, a gate wiring is formed from the first metal layer, and the common electrode of the first metal layer A step of leaving an upper portion and leaving a portion of the first oxide conductive film under the gate wiring; (e) an electrical inspection of the gate wiring; and (f) thinning the etching resist. Removing the second part The step of leaving the first portion, and (g) selective etching of leaving the first oxide conductive film through the remaining first portion, the portion on the common electrode of the first metal layer. Removing, (h) forming a gate insulating film on the gate wiring, and (i) forming a patterned semiconductor layer and a signal wiring on the semiconductor layer on the gate insulating film; (J) a step of forming a passivation film made of an insulating semiconductor compound on the signal wiring; and (k) a through for etching the passivation film to make electrical connection with the signal wiring. Forming a hole in the passivation film; and (l) a second acid made of the oxide semiconductor on the passivation film and on a portion of the signal wiring in the through hole. Forming a conductive film; (m) etching the second oxide conductive film to form a pixel electrode; and (n) cutting the substrate after forming the pixel electrode. In the step (g) of removing the portion of the first metal layer on the common electrode, the second position of the gate wiring in the cutting line direction of the substrate rather than the first position where the semiconductor layer is formed. Etching to cut the gate wiring, leaving the first oxide conductive film under the etched portion of the gate wiring at the second position, and etching the passivation film in step (k), A through hole or a notch having a size including the width of the first oxide conductive film left in the second position is formed in the passivation film and the gate insulating film to form the second oxide conductive film. (L) In the step, the second oxide conductive film is formed also on the through hole or the notch in the first oxide conductive film, and the second oxide conductive film is etched (m). The first oxide conductive film is cut by etching the through hole or the portion in the cutout of the first oxide conductive film. According to the present invention, since the gate wiring and the first oxide conductive film therebelow are cut together in the originally performed process, the influence of these exposures can be prevented without increasing the number of processes.

  (5) A display device according to the present invention includes a substrate, a first oxide conductive film, a gate wiring made of a metal layer, a gate insulating film covering the gate wiring, and a semiconductor layer formed on the gate insulating film. A signal wiring formed so as to have a portion located on the semiconductor layer, a passivation film covering the semiconductor layer and the signal wiring and having a through hole located on the signal wiring, and the through hole And a pixel electrode made of a second oxide conductive film formed on the passivation film so as to be electrically connected to the signal wiring through a part of the first oxide conductive film, A common electrode facing the pixel electrode is formed, and another part of the first oxide conductive film is located under the gate wiring, and the gate insulating film and the passivation film are connected through holes or Ri lack has an end face and the through-hole or the notch surface of the portion under the gate wiring of the gate line and the first oxide conductive film is characterized in that are flush with each other.

It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 1st Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 1st Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 1st Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 1st Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 1st Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 1st Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 1st Embodiment of this invention. It is a top view which shows some display apparatuses to which this invention is applied. It is the IX-IX sectional view taken on the line of the display apparatus shown in FIG. It is XX sectional drawing of the display apparatus shown in FIG. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 2nd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 2nd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 2nd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 3rd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 3rd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 3rd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 3rd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 3rd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 3rd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 3rd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 3rd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 3rd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 3rd Embodiment of this invention. It is a figure for demonstrating the manufacturing method of the display apparatus which concerns on the 3rd Embodiment of this invention. It is a top view which shows some display apparatuses to which this invention is applied. FIG. 26 is a cross-sectional view of the display device shown in FIG. 25 taken along the line XXVI-XXVI. It is the XXVII-XXVII sectional view taken on the line of the display device shown in FIG.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[First Embodiment]
FIG. 1A to FIG. 7B are views for explaining a method for manufacturing a display device according to the first embodiment of the present invention.

  In this embodiment mode, a substrate 10 is prepared as shown in FIGS. 1 (A) and 1 (B). FIG. 1B is a cross-sectional view taken along the line IB-IB of the structure shown in FIG. The board | substrate 10 consists of glass, for example, and a light transmittance may be requested | required. The substrate 10 is a mother substrate for integrally manufacturing a plurality of display devices. One substrate 10 has a plurality of product regions 12 (regions used as parts of a display device), and each product region 12 has an effective display region 14 (region for image display).

  Taking a liquid crystal display panel as an example of the display device, the substrate 10 is a thin film transistor (TFT) substrate (or array substrate) including a field effect transistor made of a thin film, pixel electrodes, wirings, and the like. The driving method of the liquid crystal display panel may be any method such as an IPS (In Plane Switching) method, a TN (Twisted Nematic) method or a VA (Vertical Alignment) method, and electrodes and wirings corresponding to the method are formed. Is done. The display device according to the present invention is not limited to a liquid crystal display panel, and may be an electroluminescence display device.

  A gate wiring 16 is formed on the substrate 10. A part of the gate wiring 16 is a gate electrode of a field effect transistor. That is, a bottom gate type in which the gate electrode is positioned below will be described in this embodiment mode. A gate insulating film 18 made of, for example, silicon nitride is formed on the gate wiring 16.

  A semiconductor layer 20 is formed on the substrate 10 (on the gate insulating film 18) from, for example, amorphous silicon. The semiconductor layer 20 is integrally formed over the plurality of product regions 12. A source region, a drain region, and a channel region of the field effect transistor are formed from the semiconductor layer 20 through a process described later. The semiconductor layer 20 and the gate wiring 16 are electrically insulated by a gate insulating film 18.

  A metal layer 22 is formed on the semiconductor layer 20. The metal layer 22 is also formed integrally over the plurality of product regions 12. The source electrode 34 and the drain electrode 32 of the field effect transistor are formed from the metal layer 22 through a process (FIG. 5) described later.

  As shown in FIGS. 2A and 2B, an etching having a thick first portion 24 and a thin second portion 26 (the first portion 24 is thicker than the second portion 26) on the metal layer 22. A resist 28 is formed. FIG. 2B is a cross-sectional view taken along the line IIB-IIB of the structure shown in FIG.

  The etching resist 28 is formed by patterning a photoresist by photolithography. In particular, the difference in thickness between the first portion 24 and the second portion 26 can be formed by performing halftone exposure by photolithography exposure. FIG. 2A shows only a part of the etching resist 28, and the other parts are not shown.

  The entire portion including the first portion 24 and the second portion 26 of the etching resist 28 is disposed across the plurality of product regions 12. The first portion 24 of the etching resist 28 is located on the portion of the metal layer 22 that is to be a wiring. The thin second portion 26 is located on the region (channel region) between the source electrode 34 and the drain electrode 32 (FIG. 5) of the field effect transistor and on the end portion of the product region 12, respectively.

  As shown in FIG. 3, the semiconductor layer 20 and the metal layer 22 are patterned by etching through the etching resist 28. The two-layer etching may be performed simultaneously (in one time) or separately (in two times) depending on the type of etching. The wiring 30 is formed from the metal layer 22 by etching, and the portion under the wiring 30 of the semiconductor layer 20 is left.

  Then, an electrical inspection of the wiring 30 (for example, inspection for disconnection or short circuit) is performed. When performing an electrical inspection, the wiring 30 continuously extends across the plurality of product regions 12. Therefore, the electrical inspection for the plurality of product regions 12 can be performed collectively.

  As shown in FIG. 4, the etching resist 28 is thinned by ashing or the like to remove the thin second portion 26 and leave the first portion 24. This step may be performed after the electrical inspection or may be performed before the electrical inspection.

  The first portion 24 is located at least in a region for forming the source electrode 34 and the drain electrode 32 (FIG. 5) of the field effect transistor. By removing the thin second portion 26, a portion of the wiring 30 on the channel region of the field effect transistor is exposed from the etching resist 28.

  In the example shown in FIG. 4, the portion of the wiring 30 on the end of the product region 12 (FIG. 3) is also exposed from the etching resist 28. Specifically, a part of the wiring 30 is exposed from the etching resist 28 continuously from the inside to the outside of the end of the product region 12 (the cutting line of the substrate 10; see FIG. 7A). A part of the wiring 30 is exposed from the etching resist 28 at a position in the cutting line direction of the substrate 10 rather than a portion to be the drain electrode 32 and the source electrode 34 (FIG. 5).

  As shown in FIG. 5, the wiring 30 is patterned. Patterning is performed through the first portion 24 of the etching resist 28. The patterning is performed by selective etching that etches the wiring 30 but leaves the semiconductor layer 20. The wiring 30 is separated into the drain electrode 32 and the source electrode 34 by patterning. At the same time, the wiring 30 is cut at a position in the cutting line direction of the substrate 10 relative to the drain electrode 32 and the source electrode 34. In the example of FIG. 5, the portion of the wiring 30 located at the end of the product region 12 is removed by etching. However, although the wiring 30 is etched, the underlying semiconductor layer 20 remains. Then, the etching resist 28 is removed.

As shown in FIGS. 6A and 6B, a passivation film 36 made of silicon oxide or silicon nitride is formed on the wiring 30. FIG. 6B is a cross-sectional view taken along the line VIB-VIB of the structure shown in FIG. The passivation film 36 is made of an insulating semiconductor compound (for example, SiO ₂ or SiN).

  As shown in FIGS. 7A and 7B, the substrate 10 is cut. FIG. 7B is a cross-sectional view taken along the line VIIB-VIIB of the structure shown in FIG. Simultaneously with the cutting of the substrate 10, the passivation film 36, the wiring 30, the semiconductor layer 20, and the gate insulating film 18 are also cut. In this way, individual TFT substrates can be obtained. The substrate 10 may be cut after disposing a counter substrate (color filter substrate) (not shown) at a distance from the substrate 10 and sealing liquid crystal between the substrate 10 and the counter substrate. A display device is obtained.

  According to the present embodiment, since the wiring 30 is cut together in the process originally performed (the formation process of the drain electrode 32 and the source electrode 34) (see FIG. 5), the wiring 30 is exposed without increasing the number of processes. The effect can be prevented. For example, in the example of FIG. 7, the cut surface of the wiring 30 is recessed inside the cutting line of the substrate 10, so that the cut surface can be easily sealed.

  In the present embodiment, in each cut substrate 10, a part of the wiring 30 (on the right side in FIG. 7B) is cut so as to be retracted inward from the cut surface of the substrate 10. Is covered with a passivation film 36. Therefore, the drain electrode 32 and the source electrode 34 are not directly affected by static electricity or electrolytic corrosion that occurs when the cut surface of the wiring 30 is exposed.

  In the example shown in FIG. 7B, the wiring 30 has an end portion to which the present invention is not applied in addition to the end portion to which the present invention is applied. Specifically, in each cut substrate 10, a part of the wiring 30 (left side in FIG. 7B) has a cut surface that is flush with the cut surface of the substrate 10, and the present invention is applied. It has not been. This portion is covered with a sealing member (not shown). As a modification (not shown), the present invention may be applied to all portions of the wiring 30, and the cut surface of the wiring 30 may be disposed inside the cut surface of the substrate 10.

  In the above description, an example in which a part of the structure is simplified is used for convenience of description. However, it is assumed that the structure of the display device to which the present invention is actually applied is further complicated.

  FIG. 8 is a plan view showing a part of a display device to which the present invention is applied. 9 is a cross-sectional view of the display device shown in FIG. 8 taken along the line IX-IX. FIG. 10 is a cross-sectional view of the display device shown in FIG.

  In this example, the wiring 130 is separated into a drain electrode 132 and a source electrode 134. The drain electrode 132 is U-shaped, and a linear source electrode 134 enters the U-shape. Although one drain electrode 132 is shown in FIG. 8, a plurality of drain electrodes 132 are electrically connected by a wiring line 138. When the wiring 130 is electrically inspected, the wiring line 138 continuously extends across a plurality of product areas.

  A semiconductor layer 120 is provided below the drain electrode 132 and the source electrode 134, a gate insulating film 118 is provided below the semiconductor layer 120, and a gate wiring 116 is provided below the gate insulating film 118. The drain electrode 132 and the source electrode 134 are covered with a passivation film 136, and the pixel electrode 140 is provided on the passivation film 136. The pixel electrode 140 is electrically connected to the source electrode 134 through a through hole 142 formed in the passivation film 136.

[Second Embodiment]
FIG. 11A to FIG. 13B are views for explaining a method for manufacturing a display device according to the second embodiment of the present invention. The process of the present embodiment is the same as that of the first embodiment until halfway. Specifically, the steps described in the first embodiment with reference to FIG. 1A to FIG. 6B (until patterning the wiring 30 and forming the passivation film 36 on the wiring 30) Step). Thereafter, the passivation film 36 is etched before the step of cutting the substrate 10 (see FIGS. 7A and 7B).

  As shown in FIGS. 11A and 11B, an etching resist 228 is formed to etch the passivation film 36. FIG. 11B is a cross-sectional view taken along the line XIB-XIB of the structure illustrated in FIG. The etching resist 228 has a first opening 38 and a second opening 40 through which the passivation film 36 is exposed. The first opening 38 is formed on a portion for obtaining the electrical connection of the wiring 30. The second opening 40 is formed at a position that intersects the end (cutting line) of the product region 12.

  As shown in FIG. 12, the passivation film 36 is etched to form a through hole 42 in the passivation film 36 for electrical connection with the wiring 30. This etching is performed through the first opening 38 of the etching resist 228. At the same time, a through hole (or notch) 44 is formed in the passivation film 36 by etching at a position closer to the cutting line direction of the substrate 10 than the drain electrode 32 and the source electrode 34. This etching is performed through the second opening 40 of the etching resist 228. Further, the underlying semiconductor layer 20 is etched continuously with the etching of the passivation film 36. The semiconductor layer 20 is the semiconductor layer 20 left when the wiring 30 is cut (see FIG. 5), and this is cut by etching. Thereafter, the etching resist 228 is removed.

  As shown in FIGS. 13A and 13B, the substrate 10 is cut. FIG. 13B is a cross-sectional view taken along line XIIIB-XIIIB of the structure illustrated in FIG. Simultaneously with the cutting of the substrate 10, the passivation film 36, the wiring 30, the semiconductor layer 20, and the gate insulating film 18 are also cut. In this way, individual TFT substrates can be obtained. The substrate 10 may be cut after disposing a counter substrate (color filter substrate) (not shown) at a distance from the substrate 10 and sealing liquid crystal between the substrate 10 and the counter substrate. A display device is obtained.

  In the present embodiment, in addition to the effects described in the first embodiment, the semiconductor layer 20 is also cut so as to be retracted inward from the cut surface of the substrate 10. Furthermore, it is hard to receive. The other details of the manufacturing method according to the present embodiment correspond to the contents described in the first embodiment.

  The display device according to the present embodiment includes a substrate 10, a semiconductor layer 20 formed on the substrate 10, a wiring 30 formed to have a portion located on the semiconductor layer 20, the semiconductor layer 20, And a passivation film 36 covering the wiring 30. The semiconductor layer 20 includes a first portion 224 positioned below the wiring 30 and a second portion 226 protruding from the wiring 30 along the length direction of the wiring 30 from the first portion 224. The passivation film 36 has a notch (or a through hole) 46. The front end surface of the second portion 226 of the semiconductor layer 20 and the surface of the notch (or through hole) 46 are flush with each other. Other details of the display device according to the present embodiment include a structure that is obvious from the manufacturing method described above.

[Third Embodiment]
FIG. 14 to FIG. 24B are views for explaining a method for manufacturing a display device according to the third embodiment of the present invention. The display device manufactured in this embodiment is a liquid crystal display device using two oxide semiconductor layers, such as an IPS (In Plane Switching) liquid crystal display device.

  As shown in FIG. 14, a first oxide conductive film 552 is formed on the substrate 510. The first oxide conductive film 552 is made of a conductive oxide semiconductor (for example, Indium Tin Oxide or Indium Zinc Oxide). The first oxide conductive film 552 is a transparent conductive film. A first metal layer 522 is formed on the first oxide conductive film 552.

  FIGS. 15A and 15B are cross-sectional views of different cutting positions in the same process. Similarly, FIG. 16A and FIG. 16B, FIG. 17A and FIG. 17B, FIG. 18A and FIG. 18B, FIG. 21A and FIG. 22A, 22B, 23A, and 23B have the same relationship.

  As shown in FIGS. 15A and 15B, a thick first portion 524 and a thin second portion 526 (the first portion 524 is thicker than the second portion 526) are formed on the first metal layer 522. An etching resist 528 is formed. The first portion 524 of the etching resist 528 is located on a portion of the first metal layer 522 that is used as the gate wiring 516 (see FIG. 16B). The thin second portion 526 is located on the portion of the first oxide conductive film 552 that is used as the common electrode 554 (see FIG. 16A). The second portion 526 is further a portion to be the gate wiring 516 of the first metal layer 522 and is also located on the end portion of the product region 512.

  As shown in FIGS. 16A and 16B, the first oxide conductive film 552 and the first metal layer 522 are patterned by etching with the etching resist 528 interposed therebetween. Then, a common electrode 554 is formed from the first oxide conductive film 552. A gate wiring 516 is formed from the first metal layer 522. A portion of the first metal layer 522 on the common electrode 554 is left. The portion below the gate wiring 516 of the first oxide conductive film 552 is left.

  Then, an electrical inspection of the gate wiring 516 is performed. The gate wiring 516 continuously extends so as to cross the plurality of product regions 512. Accordingly, electrical inspections for a plurality of product regions 512 can be performed collectively.

  As shown in FIGS. 17A and 17B, the etching resist 528 is thinned by ashing or the like, whereby the thin second portion 526 is removed and the first portion 524 is left. This step may be performed after the electrical inspection or may be performed before the electrical inspection.

As shown in FIGS. 18A and 18B, a portion of the first metal layer 522 on the common electrode 554 is selectively etched by leaving the first oxide conductive film 552 through the first portion 524. Remove. As a result, the layer that prevents light transmission through the transparent common electrode 554 is removed. At the same time, the gate wiring 516 is etched so as to cut the gate wiring 516 at the second position P ₂ in the cutting line direction of the substrate 510 from the first position P ₁ (see FIG. 20) where the semiconductor layer 520 is three-dimensionally intersected. . However, in the second position P _2, the first conductive oxide film 552 below the etched portions of the gate wiring 516 remains. According to this embodiment, since the gate wiring 516 is cut together in the process originally performed, the influence of the exposure of the gate wiring 516 can be prevented without increasing the number of processes.

  As shown in FIG. 19, a gate insulating film 518 is formed over the gate wiring 516.

As shown in FIG. 20, a patterned semiconductor layer 520 and a signal wiring 550 on the semiconductor layer 520 are formed over the gate insulating film 518. In addition, a passivation film 536 is formed over the signal wiring 550. The passivation film 536 is made of an insulating semiconductor compound (for example, SiO ₂ or SiN).

As shown in FIGS. 21A and 21B, the passivation film 536 is etched to form a through hole 542 in the passivation film 536 for electrical connection with the signal wiring 550. At the same time, a through hole (or notch) 544 having a size including the width of the first oxide conductive film 552 left at the second position P ₂ is formed so as to communicate with the passivation film 536 and the gate insulating film 518. To do.

  As shown in FIGS. 22A and 22B, a second oxide conductive film 556 is formed over the passivation film 536 and over the portion of the signal wiring 550 in the through hole 542. At the same time, the second oxide conductive film 556 is also formed on a portion in the through hole (or notch) 544 of the first oxide conductive film 552. Similarly to the first oxide conductive film 552, the second oxide conductive film 556 is also made of an oxide semiconductor having conductivity (for example, Indium Tin Oxide or Indium Zinc Oxide).

  As shown in FIGS. 23A and 23B, the second oxide conductive film 556 is etched to form a pixel electrode 548. At the same time, the portion in the through hole (or notch) 544 of the first oxide conductive film 552 is also etched to cut the first oxide conductive film 552. According to this embodiment mode, the first oxide conductive film 552 under the gate wiring 516 is cut together with the originally performed process, so that the gate wiring 516 and the first oxide conductive film 552 are exposed without increasing the number of processes. Can prevent the influence.

  After the pixel electrode 548 is formed, the substrate 510 is cut as shown in FIGS. 24 (A) and 24 (B). Note that FIG. 24B is a cross-sectional view taken along line XXIVB-XXIVB of the structure illustrated in FIG. In this manner, individual TFT substrates can be obtained, and a display device can be obtained by disposing a counter substrate (color filter substrate) (not shown) and then cutting the substrate 510 and the counter substrate. The other details of the present embodiment correspond to the contents described in the first embodiment.

  The display device according to this embodiment includes a substrate 510, a first oxide conductive film 552, a gate wiring 516 including a first metal layer 522, a gate insulating film 518 covering the gate wiring 516, and the gate insulating film 518. And a signal wiring 550 formed so as to have a portion located on the semiconductor layer 520 (see FIG. 23A). The passivation film 536 covers the semiconductor layer 520 and the signal wiring 550 and has a through hole 542 located on the signal wiring 550. A pixel electrode 548 made of the second oxide conductive film 556 is formed on the passivation film 536 so as to be electrically connected to the signal wiring 550 through the through hole 542.

  A common electrode 554 (see FIG. 18A) facing the pixel electrode 548 is formed from the first oxide conductive film 552. As shown in FIGS. 24A and 24B, the gate insulating film 518 and the passivation film 536 have a notch (or a through hole) 546 that communicates with the gate insulating film 518 and the passivation film 536. The end surfaces of the gate wiring 516 and the first oxide conductive film 552 below the gate wiring 516 are flush with the surface of the notch (or through hole) 546.

  In the above description, an example in which a part of the structure is simplified is used for convenience of description. However, it is assumed that the structure of the display device to which the present invention is actually applied is further complicated.

  FIG. 25 is a plan view showing a part of a display device to which the present invention is applied. 26 is a cross-sectional view of the display device shown in FIG. 25 taken along the line XXVI-XXVI. 27 is a cross-sectional view of the display device shown in FIG. 25 taken along line XXVII-XXVII.

  In this example, the wiring 330 is separated into a drain electrode 332 and a source electrode 334. The drain electrode 332 has a U shape, and a linear source electrode 334 enters the inside of the U shape. Although one drain electrode 332 is shown in FIG. 25, a plurality of drain electrodes 332 are electrically connected by a wiring line 338.

  A semiconductor layer 320 is provided below the drain electrode 332 and the source electrode 334, a gate insulating film 318 is provided below the semiconductor layer 320, and a gate wiring 316 is provided below the gate insulating film 318. A first oxide conductive film 352 is provided under the gate wiring 316. A common electrode 354 is provided in the same layer as the first oxide conductive film 352 (see FIG. 25).

  The drain electrode 332 and the source electrode 334 are covered with a passivation film 336, and a pixel electrode 340 is provided on the passivation film 336. The pixel electrode 340 is electrically connected to the source electrode 334 through a through hole 342 formed in the passivation film 336.

  The present invention is not limited to the embodiment described above, and various modifications are possible. For example, the configuration described in the embodiment can be replaced with a substantially the same configuration, a configuration that exhibits the same operational effects, or a configuration that can achieve the same purpose.

  10 substrate, 12 product area, 14 effective display area, 16 gate wiring, 18 gate insulating film, 20 semiconductor layer, 22 metal layer, 24 first part, 26 second part, 28 etching resist, 30 wiring, 32 drain electrode, 34 source electrode, 36 passivation film, 38 1st opening, 40 2nd opening, 42 through hole, 44 through hole (notch), 46 notch (through hole), 116 gate wiring, 118 gate insulating film, 120 semiconductor layer , 130 wiring, 132 drain electrode, 134 source electrode, 136 passivation film, 138 wiring line, 140 pixel electrode, 142 through hole, 224 first part, 226 second part, 228 etching resist, 316 gate wiring, 318 gate insulating film 320 Semiconductor layer 330 Line, 332 drain electrode, 334 source electrode, 336 passivation film, 338 wiring line, 340 pixel electrode, 342 through hole, 352 first oxide conductive film, 354 common electrode, 510 substrate, 512 product region, 516 gate wiring, 518 gate Insulating film, 518 Gate insulating film, 520 Semiconductor layer, 522 First metal layer, 524 First part, 526 Second part, 528 Etching resist, 536 Passivation film, 542 Through hole, 544 Through hole (notch), 546 Cut Notch (through hole), 548 pixel electrode, 550 signal wiring, 552 first oxide conductive film, 554 common electrode, 556 second oxide conductive film.

Claims (3)

(A) forming a semiconductor layer on the substrate;
(B) forming a metal layer on the semiconductor layer;
(C) forming an etching resist having a thick first portion and a thin second portion on the metal layer;
(D) patterning the semiconductor layer and the metal layer by etching through the etching resist to form a wiring from the metal layer, leaving a portion of the semiconductor layer under the wiring;
(E) performing an electrical inspection of the wiring;
(F) thinning the etching resist to remove the second portion and leave the first portion;
(G) patterning the wiring so as to be separated into a drain electrode and a source electrode by selective etching that leaves the semiconductor layer through the remaining first portion;
(H) cutting the substrate;
Including
In the step (g) of patterning the wiring, etching is performed so as to cut the wiring so as to leave the semiconductor layer at a cut surface that is recessed inward from the cutting line of the substrate. Manufacturing method. In the manufacturing method of the display device according to claim 1,
(I) a step of forming a passivation film on the wiring after the step (g) of patterning the wiring and before the step of (h) cutting the substrate;
(J) etching the passivation film to form a through hole in the passivation film for electrical connection with the wiring;
Further including
In the step (j) of etching the passivation film, a through-hole or a notch is formed in the passivation film at a cutting surface that is retracted inward from the cutting line of the substrate, and remains when the wiring is cut. Etching so as to cut the semiconductor layer formed. A method for manufacturing a display device. (A) forming a first oxide conductive film made of an oxide semiconductor on a substrate;
(B) forming a first metal layer on the first oxide conductive film;
(C) forming an etching resist having a thick first portion and a thin second portion on the first metal layer;
(D) The first oxide conductive film and the first metal layer are patterned by etching through the etching resist to form a common electrode from the first oxide conductive film, and from the first metal layer to the gate wiring Forming a portion of the first metal layer on the common electrode, and leaving a portion of the first oxide conductive film under the gate wiring;
(E) performing an electrical inspection of the gate wiring;
(F) thinning the etching resist to remove the second portion and leave the first portion;
(G) removing the portion on the common electrode of the first metal layer by selective etching to leave the first oxide conductive film through the remaining first portion;
(H) forming a gate insulating film on the gate wiring;
(I) forming a patterned semiconductor layer and a signal wiring on the semiconductor layer on the gate insulating film;
(J) forming a passivation film made of an insulating semiconductor compound on the signal wiring;
(K) etching the passivation film to form a through hole in the passivation film for electrical connection with the signal wiring;
(L) forming a second oxide conductive film made of the oxide semiconductor on the passivation film and on a portion of the signal wiring in the through hole;
(M) etching the second oxide conductive film to form a pixel electrode;
(N) cutting the substrate after forming the pixel electrode;
Including
In the step (g) of removing the portion of the first metal layer on the common electrode, the gate wiring is recessed inside the cutting line of the substrate from the first position where the semiconductor layer is formed. Etching so as to cut the gate wiring at a second position having an appropriate cut surface, leaving the first oxide conductive film under the etched portion of the gate wiring at the second position,
In the step (k) of etching the passivation film, a through hole or a notch having a size including the width of the first oxide conductive film left in the second position is formed in the passivation film and the gate insulating film. Formed into
In the step (l) of forming the second oxide conductive film, the second oxide conductive film is also formed on the through hole or the notch in the first oxide conductive film,
In the step (m) of etching the second oxide conductive film, the first oxide conductive film is cut by etching the through hole or the portion in the notch of the first oxide conductive film. Manufacturing method of display device.

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