JP5376797B2 - 電気めっき方法 - Google Patents

電気めっき方法 Download PDF

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Publication number
JP5376797B2
JP5376797B2 JP2007326548A JP2007326548A JP5376797B2 JP 5376797 B2 JP5376797 B2 JP 5376797B2 JP 2007326548 A JP2007326548 A JP 2007326548A JP 2007326548 A JP2007326548 A JP 2007326548A JP 5376797 B2 JP5376797 B2 JP 5376797B2
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JP
Japan
Prior art keywords
electroplating
layer
ground plane
led
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007326548A
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English (en)
Japanese (ja)
Other versions
JP2008160117A (ja
JP2008160117A5 (https=
Inventor
エフ． ノーレンバーグ クリフォード
アール． ティープ マーク
エル． シュア クリストファー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Palo Alto Research Center Inc
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Palo Alto Research Center Inc
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Filing date
Publication date
Application filed by Palo Alto Research Center Inc filed Critical Palo Alto Research Center Inc
Publication of JP2008160117A publication Critical patent/JP2008160117A/ja
Publication of JP2008160117A5 publication Critical patent/JP2008160117A5/ja
Application granted granted Critical
Publication of JP5376797B2 publication Critical patent/JP5376797B2/ja
Expired - Fee Related legal-status Critical Current
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/857—Interconnections, e.g. lead-frames, bond wires or solder balls
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01231—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition
    • H10W72/01233—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • H10W72/01235—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H10W72/227—Multiple bumps having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads

Landscapes

  • Led Device Packages (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2007326548A 2006-12-21 2007-12-18 電気めっき方法 Expired - Fee Related JP5376797B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/614,267 2006-12-21
US11/614,267 US7858521B2 (en) 2006-12-21 2006-12-21 Fabrication for electroplating thick metal pads

Publications (3)

Publication Number Publication Date
JP2008160117A JP2008160117A (ja) 2008-07-10
JP2008160117A5 JP2008160117A5 (https=) 2011-03-10
JP5376797B2 true JP5376797B2 (ja) 2013-12-25

Family

ID=39543475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007326548A Expired - Fee Related JP5376797B2 (ja) 2006-12-21 2007-12-18 電気めっき方法

Country Status (2)

Country Link
US (2) US7858521B2 (https=)
JP (1) JP5376797B2 (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8850965B2 (en) 2005-08-08 2014-10-07 Ronald M. Popeil Device to efficiently cook food
US20180049590A1 (en) * 2016-04-29 2018-02-22 Alan Backus Devices and methods for supporting and preparing foods
US8186265B2 (en) 2005-08-08 2012-05-29 Ron's Enterprises, Inc. Device to efficiently cook food
US8707857B2 (en) 2005-08-08 2014-04-29 Ronald M. Popeil Cooking device to deep fat fry foods
US9543262B1 (en) * 2009-08-18 2017-01-10 Cypress Semiconductor Corporation Self aligned bump passivation
JP5664392B2 (ja) * 2011-03-23 2015-02-04 ソニー株式会社 半導体装置、半導体装置の製造方法、及び配線基板の製造方法
CN103236490B (zh) * 2013-04-03 2016-01-13 大连德豪光电科技有限公司 Led倒装芯片封装器件、其制造方法及使用其的封装结构
CN104319346A (zh) * 2014-10-15 2015-01-28 厦门英诺尔电子科技股份有限公司 一种高导热结构led芯片及其制备方法
US10412981B2 (en) 2017-02-27 2019-09-17 Ronald M. Popeil System and method for deep frying poultry while avoiding skin damage
CN113725723B (zh) * 2021-07-21 2023-03-03 华芯半导体研究院(北京)有限公司 基于SiN钝化层保护的VCSEL芯片电镀种子层金属刻蚀方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3370663B2 (ja) * 1989-07-29 2003-01-27 株式会社島津製作所 半導体放射線検出素子アレイおよびはんだバンプの作成方法
US5072520A (en) * 1990-10-23 1991-12-17 Rogers Corporation Method of manufacturing an interconnect device having coplanar contact bumps
US5482897A (en) * 1994-07-19 1996-01-09 Lsi Logic Corporation Integrated circuit with on-chip ground plane
US5897368A (en) * 1997-11-10 1999-04-27 General Electric Company Method of fabricating metallized vias with steep walls
JP3610779B2 (ja) * 1998-06-30 2005-01-19 セイコーエプソン株式会社 半導体装置
US6573537B1 (en) * 1999-12-22 2003-06-03 Lumileds Lighting, U.S., Llc Highly reflective ohmic contacts to III-nitride flip-chip LEDs
JP3990962B2 (ja) * 2002-09-17 2007-10-17 新光電気工業株式会社 配線基板の製造方法
KR100581279B1 (ko) * 2003-06-02 2006-05-17 삼성전자주식회사 포토레지스트 제거용 조성물 및 이를 이용한 반도체소자의 범프 형성방법
EP1649514B1 (en) * 2003-07-30 2014-01-01 Panasonic Corporation Semiconductor light emitting device, light emitting module, and lighting apparatus
JP4246134B2 (ja) * 2003-10-07 2009-04-02 パナソニック株式会社 半導体素子の実装方法、及び半導体素子実装基板
TWI230425B (en) * 2004-02-06 2005-04-01 South Epitaxy Corp Bumping process for light emitting diode
WO2006035664A1 (ja) * 2004-09-27 2006-04-06 Matsushita Electric Industrial Co., Ltd. 半導体発光素子、その製造方法及びその実装方法、並びに発光装置
TWI257714B (en) * 2004-10-20 2006-07-01 Arima Optoelectronics Corp Light-emitting device using multilayer composite metal plated layer as flip-chip electrode
JP2006147631A (ja) * 2004-11-16 2006-06-08 Matsushita Electric Works Ltd 半導体装置およびその評価方法
TW200644261A (en) * 2005-06-06 2006-12-16 Megica Corp Chip-package structure and manufacturing process thereof
TWI257722B (en) * 2005-07-15 2006-07-01 Ind Tech Res Inst Package structure of light-emitting diode with electrothermal component

Also Published As

Publication number Publication date
US7858521B2 (en) 2010-12-28
US20080153281A1 (en) 2008-06-26
US20110062486A1 (en) 2011-03-17
US9099344B2 (en) 2015-08-04
JP2008160117A (ja) 2008-07-10

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