JP5284669B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

Info

Publication number
JP5284669B2
JP5284669B2 JP2008102089A JP2008102089A JP5284669B2 JP 5284669 B2 JP5284669 B2 JP 5284669B2 JP 2008102089 A JP2008102089 A JP 2008102089A JP 2008102089 A JP2008102089 A JP 2008102089A JP 5284669 B2 JP5284669 B2 JP 5284669B2
Authority
JP
Japan
Prior art keywords
insulating film
single crystal
substrate
forming
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008102089A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009253180A5 (enrdf_load_stackoverflow
JP2009253180A (ja
Inventor
達也 本田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2008102089A priority Critical patent/JP5284669B2/ja
Publication of JP2009253180A publication Critical patent/JP2009253180A/ja
Publication of JP2009253180A5 publication Critical patent/JP2009253180A5/ja
Application granted granted Critical
Publication of JP5284669B2 publication Critical patent/JP5284669B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
JP2008102089A 2008-04-10 2008-04-10 半導体装置の作製方法 Expired - Fee Related JP5284669B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008102089A JP5284669B2 (ja) 2008-04-10 2008-04-10 半導体装置の作製方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008102089A JP5284669B2 (ja) 2008-04-10 2008-04-10 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2009253180A JP2009253180A (ja) 2009-10-29
JP2009253180A5 JP2009253180A5 (enrdf_load_stackoverflow) 2011-04-14
JP5284669B2 true JP5284669B2 (ja) 2013-09-11

Family

ID=41313561

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008102089A Expired - Fee Related JP5284669B2 (ja) 2008-04-10 2008-04-10 半導体装置の作製方法

Country Status (1)

Country Link
JP (1) JP5284669B2 (enrdf_load_stackoverflow)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104992962B (zh) 2009-12-04 2018-12-25 株式会社半导体能源研究所 半导体器件及其制造方法
US8431994B2 (en) * 2010-03-16 2013-04-30 International Business Machines Corporation Thin-BOX metal backgate extremely thin SOI device
JP5731369B2 (ja) * 2010-12-28 2015-06-10 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2019032557A (ja) * 2018-11-06 2019-02-28 株式会社ジャパンディスプレイ 表示装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1145862A (ja) * 1997-07-24 1999-02-16 Denso Corp 半導体基板の製造方法
JP2000106333A (ja) * 1998-09-29 2000-04-11 Sony Corp Soi構造を有する半導体基板の製造方法及び半導体装置の製造方法
JP2002057309A (ja) * 2000-08-08 2002-02-22 Sony Corp Soi基板の作製方法
JP4837240B2 (ja) * 2002-09-25 2011-12-14 シャープ株式会社 半導体装置
KR100879047B1 (ko) * 2005-03-25 2009-01-15 샤프 가부시키가이샤 반도체 장치 및 그 제조방법

Also Published As

Publication number Publication date
JP2009253180A (ja) 2009-10-29

Similar Documents

Publication Publication Date Title
JP5553523B2 (ja) 半導体装置の作製方法
JP5500914B2 (ja) レーザ照射装置
KR101594335B1 (ko) 반도체 장치 및 그 제조 방법
JP5586912B2 (ja) 半導体基板の作製方法
KR101554470B1 (ko) 반도체 기판의 제작 방법
JP5586906B2 (ja) 半導体装置の作製方法
JP5583916B2 (ja) 半導体基板の作製方法及び半導体装置の作製方法
JP5284669B2 (ja) 半導体装置の作製方法
JP5925440B2 (ja) Soi基板の作製方法及び半導体装置の作製方法
JP5279260B2 (ja) 半導体層の評価方法
JP5576617B2 (ja) 単結晶半導体層の結晶性評価方法
KR101641499B1 (ko) Soi 기판의 제작 방법

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110223

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20110223

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20130425

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130514

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130530

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees