JP5272331B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device .

  Conventionally, as a semiconductor device manufacturing method and a semiconductor device manufactured by the manufacturing method, for example, techniques disclosed in Patent Documents 1 and 2 are known. Hereinafter, conventional techniques including those described in Patent Documents 1 and 2 will be described.

In the conventional semiconductor device, the semiconductor chip is electrically connected to the wiring substrate through conductive bumps formed on the package substrate or the metal pads of the semiconductor chip. Here, the metal pad has a conical or hemispherical depression formed on the surface of the metal pad. As a result, the area of the contact interface between the conductive bump, which often has a spherical shape, and the metal pad is increased, and the mechanical strength at the contact interface is improved.
JP-A-9-162240 Japanese Patent Laid-Open No. 10-50768

  By the way, such conical or hemispherical depressions are formed as follows. Specifically, first, a metal film is deposited and formed on the surface of the package substrate or semiconductor chip with a constant film thickness, for example, through CVD (chemical vapor deposition). Next, the metal film formed with a constant film thickness is shaped into, for example, a rectangular shape in plan view, and a flat metal pad is formed. Then, a conical or hemispherical depression is formed by grinding the surface of the metal pad. As described above, when a conical or hemispherical depression is formed on the surface of the metal pad, the processing process is generally complicated.

  Further, as the number of metal pads formed on the surface of the package substrate or the semiconductor chip increases, and as the size of the semiconductor device becomes smaller (the metal pads become finer), such a conventional structure is improved. It becomes difficult to manufacture a semiconductor device having the same.

The present invention has been made in view of such circumstances, and its object is to manufacture a semiconductor device having suitable mechanical strength at a contact interface between a conductive bump and a metal pad by a simpler process. An object of the present invention is to provide a semiconductor device that can perform the above-described process.

In order to achieve the above object, according to the first aspect of the present invention, a metal pad formed with a predetermined thickness on a surface of a semiconductor substrate on which a semiconductor element is manufactured, the semiconductor substrate and a peripheral portion of the metal pad, A first interlayer film formed between the metal pad and the conductive bump, whereby the metal pad and the conductive bump are bonded to each other to electrically connect to another semiconductor device or a circuit board via the metal pad and the conductive bump. The semiconductor device to be connected further includes a second interlayer film formed between the semiconductor substrate and a central portion of the metal pad, and the first interlayer film, the second interlayer film, and each surface of the semiconductor substrate The side sectional view shape of the conductive bump is transferred to the side sectional view shape of the surface of the metal pad, and the conductive bump of the conductive bump is encased in the metal pad so that the peripheral portion of the surface of the metal pad wraps around the conductive bump. A central portion of the surface of the metal pad that is inclined along the surface and has a concave shape in a side cross-sectional view shape in which the central portion of the surface of the metal pad is convex toward the conductive bump. However, it was set as the position away from the said semiconductor substrate in the thickness direction of the said semiconductor substrate rather than the peripheral part of the surface of the said metal pad .

In the semiconductor device having such a configuration, a first interlayer film is formed on a portion of the surface of the semiconductor substrate where the peripheral portion of the metal pad is formed, and a predetermined film thickness is formed on the surface of the semiconductor substrate including the surface of the first interlayer film. Then, the metal film is formed, and the shape of the metal film in plan view is shaped into a predetermined shape, thereby completing the metal pad. Thereby, the side cross-sectional view shape of the metal pad is transferred from the side cross-sectional view shape of each surface of the first interlayer film and the semiconductor substrate. Here, since the first interlayer film is formed on the surface of the semiconductor substrate, which often has a flat surface, the side cross-sectional shape of each surface of the first interlayer film and the semiconductor substrate is uneven. Since such irregularities are transferred to the side cross-sectional shape of the metal pad, the area of the contact interface between the metal pad and the conductive bump increases as in the prior art described in the background section, and the mechanical strength at the contact interface is increased. Is improving. However, unlike the prior art, since the surface of the metal pad is not ground to form irregularities on the surface of the metal pad, the processing process is not complicated. That is, a metal pad can be formed by a simpler process, and thus a semiconductor device can be manufactured.

Further, the metal pad is inclined along the surface of the conductive bump so that a peripheral portion of the surface of the metal pad wraps the conductive bump, and a central portion of the surface of the metal pad is the conductive bump. The conductive bumps are housed in such dents that are convex in the shape of a side sectional view. Therefore, when the conductive bump is bonded to the metal pad, the conductive bump comes into contact with the inclined surface of the metal pad, and the contact area between the conductive bump and the metal pad is increased. In the semiconductor device having such a configuration, the surface of the semiconductor substrate includes the surface of the first interlayer film and the second interlayer film, the second interlayer film being formed in a portion corresponding to the convex central portion of the surface of the semiconductor substrate. A metal film is formed with a predetermined film thickness, and the shape of the metal film in plan view is shaped into a predetermined shape, thereby completing the metal pad. As a result, the side sectional view shape of the surface of the metal pad is transferred from the first interlayer film, the second interlayer film, and the side sectional view shape of each surface of the semiconductor substrate. Here, since the first interlayer film and the second interlayer film are formed on the surface of the semiconductor substrate that often has a flat surface, the first interlayer film, the second interlayer film, and each surface of the surface of the semiconductor substrate are viewed in a side sectional view. The shape is a shape having more unevenness. Therefore, the area of the contact interface between the metal pad and the conductive bump is further increased, and the mechanical strength at the contact interface is further improved. When the mechanical strength at the contact interface is improved in this way, even if the semiconductor device manufactured by the manufacturing method is mounted on, for example, an automobile and vibrations generated during the operation of the automobile are applied, the conductive bump and the metal pad Are not able to withstand vibrations and deviate from each other.

In addition, if moisture enters the contact interface between the conductive bump and the metal pad, for example, corrosion of the contact interface may be caused, which in turn may reduce the mechanical strength of the contact interface. . In that respect, in the semiconductor device, since the conductive bump is also in contact with the inclined surface of the metal pad, it is possible to prevent moisture from entering the contact interface between the conductive bump and the central portion of the metal pad. Yes. Therefore, corrosion of the contact interface between the conductive bump and the metal pad can be prevented, and even if moisture enters the contact interface between the conductive bump and the metal pad, The mechanical strength of the contact interface between the conductive bump and the central portion of the metal pad can be maintained. Further, in the above semiconductor device, even when the conductive bump is not accurately placed at a desired position of the metal pad when the metal pad and the conductive bump are bonded, the conductive bump is Induced by the inclination, the metal pad itself fits in a recess formed in the central portion (desired position) of the metal pad. That is, a self-alignment correction effect can be obtained. Since it becomes difficult to place the conductive bumps at a desired position as the size of the semiconductor device becomes smaller, such a self-alignment correction effect becomes more useful when the size of the semiconductor device is reduced.

In the configuration according to claim 1, for example, in the invention according to claim 2 , the second interlayer film includes a LOCOS oxide film formed by thermally oxidizing the surface of the semiconductor substrate. did. The LOCOS oxide film is a generally known technique and can be formed through a general semiconductor process. Therefore, the second interlayer film can be easily formed through a general semiconductor process without newly adding a special semiconductor process for forming the second interlayer film. Further, since the second interlayer film has a hardness higher than that of the constituent material of the semiconductor substrate, the hardness of the semiconductor device as a whole is improved. Therefore, for example, even if an external force is applied to the semiconductor device, the semiconductor element manufactured on the semiconductor substrate can maintain a predetermined function.

In the configuration described in claim 1 or 2 , in the invention described in claim 3 , for example, the second interlayer film includes a polycrystalline silicon film. Similar to the LOCOS oxide film, since the polycrystalline silicon film is a generally known technique, the second interlayer film can be formed through a general semiconductor process.

In the structure according to any one of the first to third aspects, an insulating film is formed between the metal pad and the second interlayer film , for example , as in the invention according to the fourth aspect. For example, a semiconductor substrate that is often conductive can be electrically insulated from the electrode pads (and thus conductive bumps).

Further, in the configuration according to claim 4 , the insulating film is also formed between the metal pad and the first interlayer film as in the invention according to claim 5 , for example. For example, a semiconductor substrate that is often conductive can be electrically insulated from the electrode pads (and thus conductive bumps).

In the configuration according to any one of claims 1 to 5, for example, in the invention of claim 6, the first interlayer film, LOCOS oxide film formed by thermally oxidizing the surface of said semiconductor substrate In addition, the inclination of the metal pad is formed at a predetermined angle by a bird's beak portion of the LOCOS oxide film. Since the LOCOS oxide film is a generally known technique and can be formed through a general semiconductor process, a general semiconductor can be used without newly adding a special semiconductor process for forming the first interlayer film. The first interlayer film can be easily formed through the process. Further, since the LOCOS oxide film has a hardness higher than that of the constituent material of the semiconductor substrate, the hardness of the entire semiconductor device is improved. Therefore, for example, even if an external force is applied to the semiconductor device, the semiconductor element manufactured on the semiconductor substrate can maintain a predetermined function.

In the configuration described in claim 6, in the invention described e.g. in claim 7, wherein the first interlayer film includes a polycrystalline silicon film formed on a surface of the LOCOS oxide film, said metal pad The inclination is formed at a predetermined angle depending on the thickness of the polycrystalline silicon film. Similar to the LOCOS oxide film, since the polycrystalline silicon film is a generally known technique, the first interlayer film can be easily formed through a general semiconductor process.

In the configuration according to any one of the first to seventh aspects, for example, in the invention according to the eighth aspect , the first interlayer film is formed on a peripheral edge of the semiconductor substrate. According to such a configuration as the semiconductor device, the first interlayer film having a large hardness formed on the peripheral portion of the semiconductor substrate functions as a frame. For example, even if an external force is applied to the semiconductor device, the semiconductor substrate The manufactured semiconductor element can be suitably protected.

For example, as in the invention described in claim 9 , the semiconductor device includes two semiconductor devices described in any one of claims 1 to 8 , and these two semiconductor devices include: The electrode pads included in each semiconductor device and the conductive bumps may be joined to be electrically connected to each other.

  Hereinafter, a semiconductor device manufacturing method and a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. 1A to 1D are side cross-sectional views showing a manufacturing process of an embodiment of a method for manufacturing a semiconductor device according to the present invention. FIGS. 2A and 2B are FIGS. FIG. 2 is a side sectional view showing a manufacturing process subsequent to the manufacturing process shown in FIGS. FIG. 3 is a side sectional view showing a sectional structure of an embodiment of the semiconductor device according to the present invention from the side.

  First, an embodiment of a method of manufacturing a semiconductor device according to the present invention will be described with reference to FIGS. By using this manufacturing method, a semiconductor device described later whose side cross-sectional structure is shown in FIG. 3 is manufactured.

  First, in manufacturing a semiconductor device, a semiconductor substrate 10 having a predetermined thickness made of, for example, single crystal silicon (Si) is prepared as a preparation process.

  When the semiconductor substrate 10 is prepared, as a thermal oxidation mask formation step, for example, a silicon nitride film (SiN) 40 having oxidation resistance is formed on the entire surface RS of the semiconductor substrate 10 through, for example, CVD (chemical vapor deposition). It is formed with a predetermined film thickness. Then, the silicon nitride film 40 formed on the entire surface RS of the semiconductor substrate 10 is removed by etching leaving a desired position (substantially the center in the present embodiment) as shown in FIG. The silicon nitride film 40 thus formed functions as a thermal oxidation mask in the subsequent thermal oxidation process.

  When the thermal oxidation mask formation process is finished, as a subsequent thermal oxidation process, the semiconductor substrate 10 on which the silicon nitride film 40 is formed is exposed to an oxidizing atmosphere, thereby causing silicon and oxygen or silicon and moisture to chemically react. By such thermal oxidation, as shown in FIG. 1B, a LOCOS oxide film (SiO 2) 12 is formed in a portion of the surface RS of the semiconductor substrate 10 that is not covered with the silicon nitride film 40. Incidentally, the portion covered with the silicon nitride film 40 in the surface RS of the semiconductor substrate 10 is basically not thermally oxidized. However, although the oxide film is covered with the silicon nitride film 40, the oxidizing atmosphere enters between the silicon nitride film 40 and the surface RS of the semiconductor substrate 10 immediately below the end of the silicon nitride film 40. Silicon constituting the semiconductor substrate 10 is thermally oxidized. Due to the formation process of the LOCOS oxide film 12, the film thickness gradually decreases from the center portion to the end portion of the LOCOS oxide film 12 so as to be surrounded by a one-dot chain line in FIG. Bird's beak part 12a will be formed. In this thermal oxidation step, after the LOCOS oxide film 12 is formed, the silicon nitride film 40 formed at the approximate center of the surface RS of the semiconductor substrate 10 is removed by etching. In this way, the LOCOS oxide film 12 opening at a desired position is formed on the upper surface of the semiconductor substrate 10. The first interlayer film forming step described in the claims is constituted by the thermal oxidation mask forming step and the thermal oxidation step shown in FIGS. 1 (a) and 1 (b), respectively.

  When the LOCOS oxide film 12 is formed on the surface RS of the semiconductor substrate 10, as shown in FIG. 1C, a predetermined amount is formed on the surface RS of the semiconductor substrate 10 including the surface of the LOCOS oxide film 12, as shown in FIG. An insulating film is formed with a film thickness. Specifically, the upper surface of the LOCOS oxide film 12 and the portion of the surface RS of the semiconductor substrate 10 exposed through the holes formed in the LOCOS oxide film 12 are subjected to, for example, CVD (chemical vapor deposition). For example, a silicon oxide film (SiO2) 20 having electrical insulation is formed with a predetermined film thickness. The silicon oxide film 20 thus formed covers the upper surface of the LOCOS oxide film 12 and the surface RS of the semiconductor substrate 10 with a uniform film thickness, as shown in FIG.

  Incidentally, the silicon oxide film 20 is set to a film thickness that can maintain the electrical insulation between the metal pad formed through the metal pad forming process described later and the semiconductor substrate 10 even during the operation of the semiconductor device. ing. Further, the silicon oxide film 20 has such a film thickness that the LOCOS oxide film 12, the bird's beak part 12 a, and the side sectional view of the upper surface of the semiconductor substrate 10 are transferred to the side sectional view of the upper surface of the silicon oxide film 20. Is set to

  When the insulating film forming step is finished in this manner, as a metal film forming step, the upper surface of the LOCOS oxide film 12 and the portion of the surface RS of the semiconductor substrate 10 exposed through the opening of the LOCOS oxide film 12 (more precisely, For example, an aluminum film is formed to a predetermined film thickness on the entire surface of the silicon oxide film 20 by, for example, CVD (chemical vapor deposition). Then, as a subsequent shaping process, as shown in FIG. 1 (d), the aluminum film formed on the entire surface of the silicon oxide film 20 is shaped into a predetermined shape (square in plan view in the present embodiment). Complete the metal pad (shaping process). The first interlayer film forming step shown in FIGS. 1A and 1B, the insulating film forming step shown in FIG. 1C, and the metal film forming step and the shaping step shown in FIG. The metal pad forming process described in the claims is configured.

  Incidentally, the metal film formed in the metal film forming step is also a cross-sectional side view shape of each upper surface of the LOCOS oxide film 12, the bird's beak portion 12a, and the semiconductor substrate 10 (more precisely, the upper surface of the silicon oxide film 20). Is set to a film thickness that can be transferred to the side sectional shape of the upper surface of the metal film.

  Accordingly, as shown in FIG. 1 (d), at the center of the metal pad 30, there are a first flat surface FS1 parallel to the surface RS of the semiconductor substrate 10 and an inclined surface SS that is inclined with respect to the first flat surface FS1. Is formed in a mesa-shaped depression 30a in a side sectional view. Further, a second flat surface FS2 parallel to the surface of the semiconductor substrate 10 is formed at the peripheral edge portion of the metal pad 30, and between the first flat surface FS1 at the center portion and the second flat surface FS2 at the peripheral portion. As a result, a step D occurs in the thickness direction of the semiconductor substrate 10.

  Next, as shown in FIG. 2A, the spherical conductive bump 50 is placed in the recess 30 a of the metal pad 30 as a conductive bump placement step. Here, in the present embodiment, even if the conductive bump 50 is not accurately placed at the desired position of the metal pad 30 and the placement position may slightly deviate from the desired position, the metal bump 30 Since the step D (precisely, the inclined surface SS) is formed on the pad 30, the conductive bump 50 is guided by the inclined surface SS and fits in the recess 30 a of the metal pad 30. That is, the metal pad 30 has a self-alignment correction effect.

  When the conductive bumps 50 are thus placed at desired positions on the metal pads 30, a bonding process is performed next. In the bonding step, as shown in FIG. 2B, the semiconductor substrate 10 having the same structure as that of the semiconductor substrate 10 shown in FIG. Then, the semiconductor substrate 10 on which the conductive bumps 50 are placed is made to approach from the lower side to the upper side as indicated by arrows in the drawing, and the conductive bumps 50 and the metal pads 30 are brought into contact with each other, so that these conductive The bump 50 and the metal pad 30 are joined. Note that when the conductive bump 50 is brought into contact with the metal pad 30 of the held semiconductor substrate 10, the metal pad 30 is also formed with a recess 30a. The bump 50 is guided by the inclined surface SS and fits in the recess 30a of the metal pad 30 itself. That is, the metal pad 30 also exhibits a self-alignment correction effect here. Incidentally, as the size of the semiconductor device becomes smaller, it becomes difficult to accurately place the conductive bumps at a desired position and to bring the conductive bumps and the metal pads into contact at the desired position accurately. Such a self-alignment correction effect is more useful in reducing the size of the semiconductor device.

  In this embodiment, an element manufacturing process for manufacturing a semiconductor element having a predetermined function on a semiconductor substrate is also actually performed. In such an element manufacturing process, for example, impurities are introduced into the semiconductor substrate 10. In order to create an element through a well-known technique such as a well formation process, a detailed description is omitted here.

  The semiconductor device of the present embodiment manufactured by the semiconductor device manufacturing method described above has the structure shown in FIG.

  Specifically, as shown in FIG. 3, the semiconductor device 1 basically includes a semiconductor substrate 10 having a predetermined thickness made of, for example, single crystal silicon (Si). Through the element manufacturing process, a plurality of semiconductor elements (not shown) having a predetermined function are manufactured.

  Further, as shown in FIG. 3, a first flat surface FS1 parallel to the surface RS of the semiconductor substrate 10 and an inclined surface SS inclined with respect to the first flat surface FS1 are combined in the central portion of the metal pad 30. A side-view sectional mesa-shaped depression 30a is formed. Furthermore, a second flat surface FS2 parallel to the surface of the semiconductor substrate 10 is formed at the peripheral edge of the metal pad 30.

  As a result, when the conductive bump 50 is bonded to the metal pad 30, the conductive bump 50 comes into contact with not only the first flat surface FS1 but also the inclined surface SS, and the contact area between the conductive bump 50 and the metal pad 30 is large. Become. Therefore, the mechanical strength at the contact interface between the conductive bump 50 and the metal pad 30 is improved. Therefore, even when the semiconductor device 1 is mounted on, for example, an automobile, the conductive bumps 50 and the metal pads 30 are prevented from being separated from each other without being able to withstand vibrations generated during the operation of the automobile. .

  In addition, if a foreign substance such as moisture enters the contact interface between the conductive bump 50 and the metal pad 30, corrosion of the contact interface may be caused, thereby reducing the mechanical strength of the contact interface. However, in the semiconductor device 1 of the present embodiment, the entry of such moisture into the contact interface between the conductive bump 50 and the first flat surface FS1 of the metal pad 30 is suppressed in the first place. Accordingly, at least corrosion of the contact interface between the conductive bump 50 and the first flat surface FS1 of the metal pad 30 can be prevented, and moisture enters the contact interface between the conductive bump 50 and the metal pad 30. Even if this happens, the mechanical strength of the contact interface between the conductive bump 50 and the first flat surface FS1 of the metal pad 30 can be maintained.

  As shown in FIG. 3, in the semiconductor device 1, the LOCOS oxide film 12 used for forming the depression 30 a in the metal pad 30 is left between the peripheral portion of the metal pad 30 and the semiconductor substrate 10. ing. The LOCOS oxide film 12 is harder than single crystal silicon (Si), which is a material constituting the semiconductor substrate 10. Since the LOCOS oxide film 12 having such a high hardness is left on the semiconductor substrate 10, the hardness of the semiconductor device 1 as a whole is improved. Therefore, for example, even if an external force is applied to the semiconductor device 1, the semiconductor element manufactured on the semiconductor substrate 10 can maintain a predetermined function.

  In the present embodiment, the semiconductor device 1 having such an effect is manufactured by the manufacturing method described above. That is, unlike the prior art described in the background section, the mesa-shaped depression 30a is formed on the surface of the metal pad through a complicated processing process of grinding the surface of the metal film formed in the metal film forming step. However, the LOCOS oxide film 12 is formed in advance on the surface RS of the semiconductor substrate 10, and in the metal film forming step, the surface RS of the semiconductor substrate 10 and the surface on the LOCOS oxide film 12 are formed with a constant film thickness. Through a simple process of forming a metal film, a recess 30a having a mesa cross section is formed on the surface of the metal pad 30. In other words, the semiconductor device having the above effects can be manufactured by a simpler process.

  Note that the semiconductor device manufacturing method and the semiconductor device according to the present invention are not limited to the method and configuration illustrated in the above embodiment, and may be executed as the following embodiment, which is appropriately modified from the present embodiment. it can.

  In the above embodiment, as shown in FIG. 1C, the silicon oxide film (insulating film) 20 is formed with a predetermined thickness on the surface RS of the semiconductor substrate 10 including the surface of the LOCOS oxide film 12. However, the silicon oxide film 20 may be formed or omitted as necessary. For example, if the semiconductor substrate 10 and the metal pad 30 are desired to have the same potential, the insulating film forming step for forming the silicon oxide film 20 may be omitted. The semiconductor device manufactured by such a manufacturing method has a configuration in which the silicon oxide film 20 is omitted.

  In the above embodiment, since the silicon oxide film 20 is formed to have a substantially uniform thickness as shown in FIG. 1D, the level difference between the first flat surface FS1 and the second flat surface FS2. D was determined to be constant depending mainly on the thickness of the LOCOS oxide film 12. However, the step D may be reduced or increased as necessary. Specifically, as shown in FIG. 4A as a diagram corresponding to FIG. 1D, for example, a polycrystalline silicon film (first interlayer film) 60 is formed on the upper surface of the LOCOS oxide film 12. Thus, the step D1 may be adjusted. Incidentally, as the thickness of the polycrystalline silicon film 60 is increased, the step D1 is increased, and the inclination angle of the inclined surface SS with respect to the first flat surface FS1 is increased. On the other hand, as the thickness of the polycrystalline silicon film 60 is reduced, the step D1 is reduced, so that the inclination angle of the inclined surface SS with respect to the first flat surface FS1 is reduced. Thus, the film thickness of the polycrystalline silicon film 60 may be adjusted so that the inclination angle becomes a desired angle. The semiconductor device manufactured by such a manufacturing method has a structure in which the inclination angle of the inclined surface SS with respect to the first flat surface FS1 is formed at a desired angle.

  In the above embodiment, for example, as shown in FIG. 4B, the through electrode forming step of forming the through electrode 35 extending from the front surface RS to the back surface BS of the semiconductor substrate 10 so as to be integrated with the metal pad 30. May be further provided. Specifically, after forming the metal pad 30 on the front surface RS of the semiconductor substrate 10, the through hole 10 a is formed from the back surface BS of the semiconductor substrate 10 toward the metal pad 30 through, for example, dry etching. Then, a through electrode 35 is formed so as to be integrated with the metal pad 30 by embedding a conductive material such as aluminum (Al) in the through hole 10a through sputtering. The semiconductor device manufactured by such a manufacturing method has the through electrode 35 formed integrally with the metal pad 30.

  In the above embodiment, for example, as shown in FIG. 5A, the LOCOS oxide film 13 is formed on a portion of the surface RS of the semiconductor substrate 10 where the central portion of the metal pad 31 is formed. A part of the first flat surface FS1 may be raised toward the conductive bump 50 to form the third flat surface FS3. As described above, the conductive bump 50 is deformed along the surface of the metal pad 31 when being joined to the metal pad 31. Therefore, in the semiconductor device manufactured by such a manufacturing method, the area of the contact interface between the conductive bump 50 and the metal pad 31 can be further increased.

  In such a modification, as shown in FIG. 5A, since the silicon oxide film 20 is formed to have a substantially uniform thickness, the first flat surface FS1 and a part of the first flat surface FS1 are raised. The difference in height from the third flat surface FS3 is determined to be constant depending mainly on the thickness of the LOCOS oxide film 13. However, the raised height may be increased or decreased as necessary. That is, for example, the rising height may be adjusted by forming a polycrystalline silicon (second interlayer film) film on the upper surface of the LOCOS oxide film 13. Incidentally, since the rising height increases as the thickness of the polycrystalline silicon film is increased, the area of the contact interface between the conductive bump 50 and the metal pad 31 can be further increased. On the other hand, as the thickness of the polycrystalline silicon film is reduced, the rising height is reduced, so that the area of the contact interface between the conductive bump 50 and the metal pad 31 can be further reduced. In this way, the thickness of the polycrystalline silicon film may be adjusted so that the raised height becomes a desired height. The semiconductor device manufactured by such a manufacturing method has a structure in which a part of the first flat surface is raised toward the conductive bump 50.

  In the above modification, for example, a polycrystalline silicon film is formed on the surface of the LOCOS oxide film 13, but it is not always necessary to use the LOCOS oxide film 13 and the silicon film in combination. That is, as shown in FIG. 5B, for example, only the polycrystalline silicon film 14 is formed on a portion of the surface RS of the semiconductor substrate 10 where the central portion of the metal pad 31 is formed, whereby the first flat A part of the surface FS1 may be raised toward the conductive bump 50 to form the third flat surface FS3. Also by this, an effect equivalent to the case where the LOCOS oxide film 13 and the polycrystalline silicon film are used together can be obtained. The LOCOS oxide film 13 and the polycrystalline silicon film correspond to the second interlayer film described in the claims.

  Furthermore, in the above modification, as shown in FIGS. 5A and 5B, a predetermined amount is provided between the metal pad 31 and the second interlayer film (LOCOS oxide film 13 or polycrystalline silicon film 14). For example, the silicon oxide film 20 (insulating film) is formed with a thickness of 5 nm. However, as described above, the silicon oxide film 20 may be formed or omitted as necessary.

  Furthermore, in the above modification, the first flat surface FS1 parallel to the surface RS of the semiconductor substrate 10 and the inclined surface SS inclined with respect to the first flat surface FS1 are combined, and a part of the flat surface FS1 is formed. Although the depression is formed in a side sectional view raised toward the conductive bump 50, the first flat surface FS1 and the third flat surface FS3 may not be flat. In short, the peripheral portion of the surface of the metal pad is inclined along the surface of the conductive bump so as to wrap the conductive bump, and the central portion of the surface of the metal pad is convex toward the conductive bump. If the depression has a side sectional view shape, the intended purpose can be achieved.

  In the above embodiment, the LOCOS oxide film 12 is formed only on the peripheral edge of the metal pad 30 or 31, but the present invention is not limited to this. For example, when it is necessary to form a plurality of metal pads 30 or 31 on the periphery of the semiconductor substrate 10, a LOCOS oxide film is formed along a pair of opposite sides of the semiconductor substrate 10 as shown in a perspective view of FIG. 12 may be a semiconductor device. As described above, the LOCOS oxide film 12 is harder than the semiconductor substrate 10. Therefore, by employing the above structure, the LOCOS oxide film 12 formed on the semiconductor substrate 10 functions as a frame. For example, even if an external force is applied to the semiconductor device, the semiconductor element manufactured on the semiconductor substrate 10 is It can be suitably protected. Note that the LOCOS oxide film 12 is not limited to being formed only along one pair of opposite sides of the semiconductor substrate 10, and the LOCOS oxide film 12 may be formed along two pairs of opposite sides of the semiconductor substrate 10. . Conversely, the LOCOS oxide film 12 may be formed only along one side of the semiconductor substrate 10. In short, if the LOCOS oxide film 12 is formed on the peripheral edge of the semiconductor substrate 10, an effect similar to the above effect can be obtained.

  In the above embodiment, as shown in FIG. 3, the semiconductor device 1 has two semiconductor substrates 10 shown in FIG. 1D, and the metal pads each of these semiconductor substrates have. 30 and the conductive bump 50 are joined to each other to be electrically connected, but the structure of the semiconductor device is not limited to this. In addition, for example, as shown in FIG. 6 as a diagram corresponding to FIG. 3, the semiconductor substrate having a structure in which the central portion of the metal pad 31 is raised as shown in FIG. Two semiconductor substrates each having the metal pad 30 integrated with the through electrode 35 shown in (b) are bonded, and the metal pads 31 and 30 and the conductive bump 50 respectively included in the semiconductor substrate are bonded. Thus, the semiconductor devices 1a that are electrically connected to each other may be used. In short, the combination of these two semiconductor substrates is arbitrary, and the semiconductor device may be manufactured using two semiconductor substrates appropriately modified as described above.

  In the above embodiment, in the shaping step, the portion of the metal film that becomes the peripheral portion of the metal pad 30 or 31 is left without being removed, so that the peripheral portion of the metal pad 30 or 31 is the surface RS of the semiconductor substrate 10. However, the second flat surface FS2 need not be formed. In other words, only the first flat surface FS1 and the inclined surface SS may be formed on the metal pad 30 or 31. This also achieves the intended purpose.

  In the above embodiment, the LOCOS oxide film 12 is formed on the surface RS of the semiconductor substrate 10 as the first interlayer film, but the present invention is not limited to this. In addition, for example, a TEOS film or the like may be formed and a depression may be formed in the metal pad using the TEOS film. This also achieves the intended purpose.

BRIEF DESCRIPTION OF THE DRAWINGS (a)-(d) is side sectional drawing which shows the manufacturing process about one Embodiment of the manufacturing method of the semiconductor device which concerns on this invention. (A) And (b) is side surface sectional drawing which shows the manufacturing process following FIG. 1 about the manufacturing method of the semiconductor device of the embodiment. 1 is a side cross-sectional view showing a cross-sectional structure of an embodiment of a semiconductor device according to the present invention from a side surface direction; (A) And (b) is side surface sectional drawing shown from the cross-section structure side surface direction about the modification of the semiconductor device of the embodiment. (A) And (b) is side surface sectional drawing which shows the cross-sectional structure from the side surface direction about the other modification of the semiconductor device of the embodiment. Side surface sectional drawing which shows the cross-section from the side surface direction about the further another modification of the semiconductor device of the embodiment. The perspective view which shows the perspective structure about the further another modification of the semiconductor device of the embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Semiconductor device, 10 ... Semiconductor substrate, 10a ... Through-hole, 12 ... LOCOS oxide film (1st interlayer film), 12a ... Bird's beak part, 13 ... LOCOS oxide film (2nd interlayer film), 14 ... Polycrystalline silicon film (Second interlayer film), 20 ... silicon oxide film (insulating film), 30, 31 ... metal pad, 30a ... depression, 35 ... penetrating electrode, 40 ... silicon nitride film, 50 ... conductive bump, 60 ... polycrystalline silicon Film (first interlayer film).

Claims (9)

A metal pad formed with a predetermined thickness on a surface of a semiconductor substrate on which a semiconductor element is manufactured; and a first interlayer film formed between the semiconductor substrate and a peripheral portion of the metal pad, A semiconductor device that is electrically connected to another semiconductor device or a circuit board via the metal pad and the conductive bump by bonding the pad and the conductive bump,
A second interlayer film formed between the semiconductor substrate and a central portion of the metal pad;
The side sectional view shape of each surface of the first interlayer film and the second interlayer film and the semiconductor substrate is transferred to the side sectional view shape of the surface of the metal pad,
The metal pad is inclined along the surface of the conductive bump so that the peripheral edge of the surface of the metal pad wraps the conductive bump, and the central portion of the surface of the metal pad is the conductive bump. A depression in the shape of a side sectional view that is convex toward the
A semiconductor device characterized in that a central portion of the convex surface of the metal pad is located farther from the semiconductor substrate in a thickness direction of the semiconductor substrate than a peripheral portion of the surface of the metal pad. . The second interlayer film, the semiconductor device according to claim 1, characterized in that it includes a LOCOS oxide film formed surface of the semiconductor substrate by thermal oxidation. The second interlayer film, the semiconductor device according to claim 1 or 2, characterized in that it includes a polycrystalline silicon film. The semiconductor device according to claim 1 , wherein an insulating film is formed between the metal pad and the second interlayer film. The semiconductor device according to claim 4 , wherein the insulating film is also formed between the metal pad and the first interlayer film. The first interlayer film includes a LOCOS oxide film formed by thermally oxidizing the surface of the semiconductor substrate,
6. The semiconductor device according to claim 1 , wherein the inclination of the metal pad is formed at a predetermined angle by a bird's beak portion of the LOCOS oxide film. The first interlayer film includes a polycrystalline silicon film formed on the upper surface of the LOCOS oxide film,
The semiconductor device according to claim 6 , wherein the inclination of the metal pad is formed at a predetermined angle depending on the thickness of the polycrystalline silicon film. The semiconductor device according to claim 1, wherein the first interlayer film is formed on a peripheral portion of the semiconductor substrate. The said semiconductor device has two semiconductor devices as described in any one of the said Claims 1-8 , and these two semiconductor devices are the electrode pad which each semiconductor device has, and the said electroconductive bump. A semiconductor device which is electrically connected to each other by being joined.

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