JP5265438B2 - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
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- JP5265438B2 JP5265438B2 JP2009089229A JP2009089229A JP5265438B2 JP 5265438 B2 JP5265438 B2 JP 5265438B2 JP 2009089229 A JP2009089229 A JP 2009089229A JP 2009089229 A JP2009089229 A JP 2009089229A JP 5265438 B2 JP5265438 B2 JP 5265438B2
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- underfill agent
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- 239000004065 semiconductor Substances 0.000 title claims description 102
- 230000002093 peripheral effect Effects 0.000 claims description 19
- 229910000679 solder Inorganic materials 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 7
- 239000003795 chemical substances by application Substances 0.000 description 68
- 239000000758 substrate Substances 0.000 description 16
- 239000007788 liquid Substances 0.000 description 13
- ORQBXQOJMQIAOY-UHFFFAOYSA-N nobelium Chemical compound [No] ORQBXQOJMQIAOY-UHFFFAOYSA-N 0.000 description 6
- 230000001154 acute effect Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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Description
本発明は半導体装置としての半導体パッケージに関する。 The present invention relates to a semiconductor package as a semiconductor device .
半導体装置には、図6に示す様に、配線基板上に半導体素子が搭載された半導体パッケージ上に、他の半導体素子又は半導体装置等の電子部品が三次元実装された半導体装置が提案されている。図6(a)に示す半導体装置は、配線基板100の一面側にフリップチップ方式によって搭載された半導体素子102上に積層された半導体素子104が、配線基板100の一面側にワイヤ106,106・・によって電気的に接続されている。
また、図6(b)に示すPOP構造の半導体装置も提案されている。図6(b)に示す半導体装置は、配線基板200の一面側にフリップチップ方式によって搭載された半導体素子202から成る第1半導体装置上に積層された第2半導体装置204が、配線基板200の一面側に接続端子206,206・・によって電気的に接続されている。
As shown in FIG. 6, a semiconductor device is proposed in which electronic components such as other semiconductor elements or semiconductor devices are three-dimensionally mounted on a semiconductor package in which semiconductor elements are mounted on a wiring board. Yes. In the semiconductor device shown in FIG. 6A, the
A semiconductor device having a POP structure shown in FIG. 6B has also been proposed. In the semiconductor device shown in FIG. 6B, the
かかる図6に示す半導体装置では、いずれも配線基板100(200)と半導体素子102(202)との隙間にはアンダーフィル剤108(208)が充填されている。
かかるアンダーフィル剤108(208)は、液状のアンダーフィル剤を搭載された半導体素子102(202)の近傍にノズル(図示せず)から滴下して、半導体素子102(202)と配線基板100(200)との隙間に充填する。
しかし、図6に示す半導体装置においても、その薄層化の要望に応えるべく、搭載された半導体素子と配線基板との隙間が狭くなり、滴下された液状のアンダーフィル剤が半導体素子と配線基板との隙間に進入し難くなる。このため、滴下された液状のアンダーフィル剤が、配線基板の外周縁方向に広がり易くなって、図6に示す配線基板100(200)の外周縁近傍に設けられている、ワイヤ106の端部が接続されるパッドや接続端子206が装着されるパッドがアンダーフィル剤によって部分的又は全面が被覆され易くなる。
In any of the semiconductor devices shown in FIG. 6, the underfill agent 108 (208) is filled in the gap between the wiring board 100 (200) and the semiconductor element 102 (202).
The underfill agent 108 (208) is dropped from a nozzle (not shown) near the semiconductor element 102 (202) on which the liquid underfill agent is mounted, and the semiconductor element 102 (202) and the wiring board 100 ( 200).
However, in the semiconductor device shown in FIG. 6 as well, in order to meet the demand for a thinner layer, the gap between the mounted semiconductor element and the wiring board is narrowed, and the dropped liquid underfill agent is used for the semiconductor element and the wiring board. It becomes difficult to enter the gap. For this reason, the dropped liquid underfill agent easily spreads in the direction of the outer peripheral edge of the wiring board, and the end portion of the
かかる液状のアンダーフィル剤によってパッドの部分的又は全面が被覆される事態を防止しすべく、下記特許文献1には、図7(a)に示す半導体パッケージが提案されている。
図7に示す半導体パッケージでは、配線基板300の一面側を被覆するソルダーレジスト302に、フリップチップ方式で搭載された半導体素子304と配線基板300の外周縁との間に、半導体素子304とソルダーレジスト302との間の隙間に充填されなかった余剰のアンダーフィル剤308が配線基板300の外周縁方向に広がることを防止する凹溝306が形成されている。
In order to prevent a situation in which the partial or entire surface of the thus pads underfill agent such liquid is coated, the following
In the semiconductor package shown in FIG. 7, the
図7(a)に示す半導体パッケージによれば、図7(b)に示す様に、余剰のアンダーフィル剤308の配線基板300の外周縁方向への広がりは、凹溝306によって妨げられる。このため、配線基板300の外周縁近傍に設けられているパッド310等の部材が、アンダーフィル剤によって部分的又は全面的に被覆されることを防止できる。
しかしながら、半導体パッケージには、薄層化の要請と共に小型化の要請があり、図7に示す半導体パッケージの如く、搭載された半導体素子304と配線基板300の外周縁との間に、凹溝306を形成する隙間がなくなりつつある。
そこで、本発明は、配線基板の外周縁近傍に形成された部材が余剰のアンダーフィル剤によって被覆されないように、余剰のアンダーフィル剤の配線基板の外周縁方向への広がりを防止する凹溝を、搭載された半導体素子と配線基板との間に形成することを要し、小型化が困難な従来の半導体パッケージの課題を解決し、配線基板の外周縁近傍に形成された部材が余剰のアンダーフィル剤によって被覆されることがなく、且つ小型化が可能な半導体パッケージを提供することを目的とする。
According to the semiconductor package shown in FIG. 7A, as shown in FIG. 7B, the
However, the semiconductor package is required to be reduced in size as well as to be thinned, and the
Therefore, the present invention provides a groove for preventing the excess underfill agent from spreading in the direction of the outer peripheral edge of the wiring board so that the member formed in the vicinity of the outer peripheral edge of the wiring board is not covered with the excess underfill agent. Solves the problems of conventional semiconductor packages that require formation between the mounted semiconductor element and the wiring board, which is difficult to reduce in size, and the members formed near the outer periphery of the wiring board are excessive It is an object of the present invention to provide a semiconductor package that is not covered with a filler and can be miniaturized.
本発明者等は、前記課題を解決すべく、図8に示す半導体パッケージを試作した。図8に示す半導体パッケージは、配線基板400の一面側を覆うソルダーレジスト402に、長方形状の溝部406を形成し、溝部406の底面にパッド408,408・・から成るパッド群を形成した。このパッド408,408・・は、配線基板400にフリップチップ方式によって搭載された半導体素子404上に積層される半導体素子とワイヤボンディングされるパッドである。
しかし、半導体素子404と溝部406との間のA位置に、ノズルから液状のアンダーフィル剤410の滴下を開始し、矢印の方向にノズルを移動させて、アンダーフィル剤410を半導体素子404と配線基板400との隙間に充填したところ、図8に示す如く、余剰のアンダーフィル剤410が溝部406内に進入し、アンダーフィル剤410によって部分的又は全面が被覆されたパッド408が発生した。
ところで、溝部406にアンダーフィル剤410が進入開始した箇所について調査すると、ノズルから液状のアンダーフィル剤410の滴下を開始した箇所に近い溝部406の角部縁(図8に○印で示す角部縁)であることが判明した。
このため、本発明者等は、液状のアンダーフィル剤410の滴下を開始したA位置に近い溝部406の角部を鈍角にしたところ、溝部406内へのアンダーフィル剤410の進入を防止できることを見出し、本発明に到達した。
In order to solve the above-mentioned problems, the inventors have made a prototype of the semiconductor package shown in FIG. In the semiconductor package shown in FIG. 8, a
However, the liquid underfill agent 410 starts to be dropped from the nozzle to the position A between the semiconductor element 404 and the
By the way, when the portion where the underfill agent 410 starts to enter the
For this reason, the present inventors made it possible to prevent the underfill agent 410 from entering the
すなわち、本発明は、配線基板の一面側に形成されたフリップチップ搭載用パッドに半導体素子がフリップチップ方式で搭載され、前記半導体素子と前記配線基板との間にアンダーフィル剤が滴下されて充填された半導体装置であって、前記配線基板の一面側を被覆するソルダーレジストに溝部が形成され、前記溝部の底部には複数のパッドが形成され、前記溝部は、前記半導体素子の周縁部と前記配線基板の周縁部との間に、前記配線基板の周縁部に沿って配置され、前記アンダーフィル剤の滴下開始部は、前記半導体素子の周縁部と前記溝部との間であり、前記アンダーフィル剤の滴下開始部近傍の前記溝部の角部縁が、滴下されたアンダーフィル剤の溝部内への進入を防止できるように、鈍角又は円弧状に形成されていることを特徴とする半導体装置にある。
かかる本発明において、アンダーフィル剤の滴下開始部近傍の溝部の角部縁を鈍角とし、前記アンダーフィル剤の滴下開始近傍の複数の溝部同士を、前記溝部よりも幅狭の細幅溝部によって連結することによって、アンダーフィル剤の滴下開始近傍の溝部の角部よりも配線基板の外周縁側に位置する角部縁からのアンダーフィル剤の進入を防止できる。
また、前記溝部の底部に形成された複数のパッドは、前記半導体素子の上方に配置される電子部品と電気的に接続される。これによって、例えば、多数のワイヤボンディング用パッドが形成された溝部内に、アンダーフィル剤の進入を防止できる。
That is, the present invention relates to a semiconductor element is mounted in a flip-chip method to the flip chip mounting pads formed on one surface of the wiring substrate, filling underfill material is dropped between the wiring board and the semiconductor element a semiconductor device, the groove in the solder resist covering the one surface of the wiring substrate is formed, wherein the bottom of the groove is formed with a plurality of pads, said groove, said the peripheral portion of the semiconductor element The underfill agent dropping start portion is disposed between the peripheral portion of the semiconductor element and the groove portion between the peripheral portion of the semiconductor substrate and the underfill agent. The corner edge of the groove part near the dripping start part of the agent is formed in an obtuse angle or an arc shape so as to prevent the dropped underfill agent from entering the groove part. In the semiconductor device that.
In the present invention, the corner edge of the groove portion near the underfill agent dropping start portion is an obtuse angle, and a plurality of groove portions near the underfill agent dropping start portion are connected by a narrow groove portion narrower than the groove portion. By doing so, it is possible to prevent the underfill agent from entering from the corner edge located on the outer peripheral edge side of the wiring board from the corner of the groove near the start of dropping of the underfill agent.
The plurality of pads formed at the bottom of the groove are electrically connected to an electronic component disposed above the semiconductor element. Thereby , for example, the underfill agent can be prevented from entering into the groove where a large number of wire bonding pads are formed.
図8に示す半導体パッケージの如く、底面にパッド408,408・・から成るパッド群を形成した長方形状の溝部406では、液状のアンダーフィル剤の滴下を開始したA位置に近い溝部406の角部縁から内部にアンダーフィル剤410が進入し易い。
この現象は、滴下されたアンダーフィル剤410は、その滴下開始部に近い溝部406の角部縁に最初に接触する。この最初にアンダーフィル剤410が接触した角部縁の角度が直角である場合、角部縁の交点部にアンダーフィル剤410の表面張力が集中して、交点部に接触するアンダーフィル剤量が増加し、遂には交点部から溝部406内にアンダーフィル剤410が進入するものと考えられる。
この点、本発明では、底面にパッド群を形成した溝部のうち、アンダーフィル剤の滴下開始部近傍の溝部の角部縁を鈍角又は円弧状に形成することによって、溝部内にアンダーフィル剤が進入することを防止できる。
この現象は、液状のアンダーフィル剤の滴下を開始した滴下開始部に近い溝部の角部縁にアンダーフィル剤が接触しても、アンダーフィル剤の表面張力が分散され、角部縁に接触するアンダーフィル剤量を平均化できることによるものと推察される。
この様に、溝部内にアンダーフィル剤が進入することを防止できる結果、溝部内に進入したアンダーフィル剤によってパッドが部分的又は全面的に被覆されることによる不良率の低下を図ることができる。
As in the semiconductor package shown in FIG. 8, in the
In this phenomenon, the dropped underfill agent 410 first comes into contact with the corner edge of the
In this regard, in the present invention, among the groove portions in which the pad group is formed on the bottom surface, the underfill agent is formed in the groove portion by forming the corner edge of the groove portion near the dripping start portion of the underfill agent in an obtuse angle or an arc shape. It is possible to prevent entry.
This phenomenon is caused by the surface tension of the underfill agent being dispersed and contacting the corner edge even when the underfill agent contacts the corner edge of the groove near the dripping start portion where the dropping of the liquid underfill agent has started. This is presumably due to the ability to average the amount of underfill agent.
As described above, the underfill agent can be prevented from entering the groove, and as a result, the defective rate can be reduced by covering the pad partially or entirely with the underfill agent that has entered the groove. .
本発明に係る半導体パッケージの一例を図1に示す。図1に示す半導体パッケージ10は、配線基板12の一面側を覆うソルダーレジスト14に、溝部16を形成し、溝部16の底面にパッド18,18・・から成るパッド群を形成した。このパッド18,18・・は、配線基板12にフリップチップ方式によって搭載された半導体素子20上に積層される半導体素子とワイヤボンディングされるパッドである。かかる溝部16は、搭載された半導体素子20の各辺に対応して形成した。
この溝部16,16・・は、図1に示す様に、台形形状であって、短辺側が半導体素子20側に位置するように形成されている。このため、溝部16の角部縁の角度θは、図2に示すように鈍角に形成されている。
An example of a semiconductor package according to the present invention is shown in FIG. In the
As shown in FIG. 1, the
かかる図1に示す配線基板12に搭載した半導体素子20と配線基板12との間の隙間にアンダーフィル剤22を充填する際には、半導体素子20と溝部16との間であって、半導体素子20の角部近傍、例えば図1に示すA位置でノズル(図示せず)から液状のアンダーフィル剤22の滴下を開始し、ノズルからアンダーフィル剤22を滴下しつつ、半導体素子20の外周縁に沿って矢印方向にノズルを移動する。
この際に、ノズルからアンダーフィル剤22の滴下を開始したA位置(滴下開始部)に近い溝部16の角部縁に接触するアンダーフィル剤22は、角部縁の交点部に集中せず分散し、角部縁の交点部からアンダーフィル剤22が溝部16内に進入することを防止できる。
この現象は、A位置で滴下開始されたアンダーフィル剤22は、A位置に近い溝部16の角部縁に接触する。この溝部16の角部縁の角度θが鈍角であるため、角部縁の全体にアンダーフィル剤22の表面張力が分散され、角部縁の交点部にアンダーフィル剤22が集中することを防止できるためであると推察される。
When the
At this time, the
In this phenomenon, the
この様にして、半導体素子20と配線基板12との間の隙間にアンダーフィル剤22を充填することによって、図3(a)に示す様に、半導体素子20と溝部16との間のソルダーレジスト14上に流出したアンダーフィル剤22は、ソルダーレジスト14上に留まっている。従って、溝部16の底面には、パッド18,18・・の各上面が露出している。
かかるパッド18,18・・の各上面には、例えば図3(a)に示す様に、半導体素子20上に搭載される半導体素子30の電極端子に一端部が接続されたワイヤ32の他端部が接続される。
或いは、パッド18,18・・の各上面は、図3(b)に示す様に、半導体素子20の上方に搭載される半導体装置40と一端部が接続された接続端子42の他端部が接続される。
In this way, by filling the gap between the
On the upper surface of each of the
Alternatively, as shown in FIG. 3B, the upper surfaces of the
図1及び図2に示す半導体パッケージの様に、溝部16が台形形状であるため、図2に示す様に、液状のアンダーフィル剤22が溝部16の長辺側に回り込む場合がある。この場合、長辺側の角部縁の角度θ′が鋭角であるため、この角部縁の交点部からアンダーフィル剤22が溝部16内に進入するおそれがある。
この場合、図4に示す様に、アンダーフィル剤22の滴下開始部であるA位置に近い、溝部16,16が、溝部16よりも幅狭の細幅溝部24、24によって連結することによって、長辺側の角部縁の角度θ′を鈍角とすることができる。
尚、図4に示す細幅溝部24、24が直角に交差しているが、この交差部に到達するアンダーフィル剤22の量は少なく、この交差部から細幅溝部24、24内にアンダーフィル剤22が進入するおそれはない。
Since the
In this case, as shown in FIG. 4, the
Although the
図1〜図4に示す半導体パッケージでは、溝部16を台形形状としたが、図5に示す半導体パッケージの様に、溝部16の端部形状を円弧状に形成することによって、ノズルから滴下した液状のアンダーフィル剤が溝部16内に進入することを更に一層防止できる。この端部が円弧状に形成された溝部16によれば、図2に示す様に、配線基板12の周縁側に回り込んでくるアンダーフィル剤22に対しても、溝部16の角部縁を弧状に形成できる。このため、図4に示す細幅溝部24、24によって、溝部16,16を連結することを要しない。
また、図1〜図5に示す半導体パッケージでは、配線基板12に搭載した半導体素子20の各辺に対応して台形形状の溝部16や端部が円弧状に形成された溝部16を形成しているが、ノズルから液状のアンダーフィル剤22の滴下を開始するA位置(滴下開始部)に近い溝部16,16を、台形形状の溝部16や端部が円弧状に形成された溝部16に形成することによって、溝部16内へのアンダーフィル剤の進入を防止できる。
更に、図1〜図5に示す半導体パッケージでは、配線基板12に搭載した半導体素子20の各辺に対応して溝部16が形成されているが、図7に示す様に、配線基板12の一方側に片寄って半導体素子20を搭載し、半導体素子20の一方側のみに溝部16を形成してもよい。
また、図1〜図5に示す半導体パッケージの溝部16の角部縁に、鈍角に形成された複数の屈曲部が設けられていてもよい。
尚、半導体パッケージ10上に三次元実装する電子部品としては、半導体素子、半導体装置の他に、チップコンデンサーやチップ抵抗等を用いることができる。
In the semiconductor package shown in FIG. 1 to FIG. 4, the
In addition, in the semiconductor package shown in FIGS. 1 to 5, a
Furthermore, in the semiconductor package shown in FIGS. 1 to 5, the
Moreover, the some bending part formed in the obtuse angle may be provided in the corner | angular edge of the
Note that as an electronic component to be three-dimensionally mounted on the
10 半導体パッケージ
12 配線基板
14 ソルダーレジスト
16 溝部
18 パッド
20,30 半導体素子
22 アンダーフィル剤
24 細幅溝部
32 ワイヤ
40 半導体装置
42 接続端子
DESCRIPTION OF
Claims (3)
前記配線基板の一面側を被覆するソルダーレジストに溝部が形成され、
前記溝部の底部には複数のパッドが形成され、
前記溝部は、前記半導体素子の周縁部と前記配線基板の周縁部との間に、前記配線基板の周縁部に沿って配置され、
前記アンダーフィル剤の滴下開始部は、前記半導体素子の周縁部と前記溝部との間であり、
前記アンダーフィル剤の滴下開始部近傍の前記溝部の角部縁が、滴下されたアンダーフィル剤の溝部内への進入を防止できるように、鈍角又は円弧状に形成されていることを特徴とする半導体装置。 Semiconductor element is mounted in a flip-chip method to the flip chip mounting pads formed on one surface of the wiring board, a semiconductor device underfill agent is filled is dropped between the wiring board and the semiconductor element And
Grooves are formed in the solder resist covering one side of the wiring board ,
A plurality of pads are formed at the bottom of the groove,
The groove is disposed along the peripheral edge of the wiring board between the peripheral edge of the semiconductor element and the peripheral edge of the wiring board.
The underfill agent dripping start part is between the peripheral part of the semiconductor element and the groove part,
The corner edge of the groove near the dripping start portion of the underfill agent is formed in an obtuse angle or an arc shape so as to prevent the dropped underfill agent from entering the groove. Semiconductor device .
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