JP5201688B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5201688B2 JP5201688B2 JP2009190554A JP2009190554A JP5201688B2 JP 5201688 B2 JP5201688 B2 JP 5201688B2 JP 2009190554 A JP2009190554 A JP 2009190554A JP 2009190554 A JP2009190554 A JP 2009190554A JP 5201688 B2 JP5201688 B2 JP 5201688B2
- Authority
- JP
- Japan
- Prior art keywords
- electrolytic capacitor
- solid electrolytic
- semiconductor chip
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
実施例1の半導体装置の外装樹脂内部を透視した平面図は、既に説明した図1と同様であり、実施例1の半導体装置内部の図1におけるA−A線に対応する模式断面構造は実施の形態で説明した図2と同様である。実施例1について図1、図2を参照して説明する。
実施例2について図3、図4および図5を参照して説明する。固体電解コンデンサ26の製造工程は上記実施例1に示したものと同様である。
比較例1について図6、図7を参照して説明する。固体電解コンデンサ26の製造工程は、実施例1と同様である。
2 レジスト帯
3 誘電体酸化皮膜層
4 導電性高分子層
5 グラファイト層
6 銀ペースト層
7 陽極板
8 絶縁樹脂
8a ポリイミドテープ
9 導電性接着銀
10 金属箔
11 非導電性接着剤
12 半導体チップ
13 アイランド
14 リードフレーム
15 ボンディングワイヤ
16 外装樹脂
17 陽極ビア
18 陰極ビア
19 陽極搭載部
20 陰極搭載部
21 基板
22 陽極パッド
23 陰極パッド
24 電源リード
25 GNDリード
26 固体電解コンデンサ
27 半導体装置
28 チップコンデンサ
29 固体電解コンデンサ
30 ソルダーレジスト
Claims (3)
- アイランドと電源リードとGNDリードとを有するリードフレームと、前記アイランドに搭載されたシート状の固体電解コンデンサと、前記固体電解コンデンサ上に搭載された平面積が前記固体電解コンデンサより小さい半導体チップと、前記半導体チップと前記固体電解コンデンサ、及び前記固体電解コンデンサと前記電源リードまたは前記GNDリードと接続するボンディングワイヤとを有し、前記固体電解コンデンサ上の、少なくとも前記半導体チップのボンディングワイヤ接続部の垂直方向投影部に金属箔を有することを特徴とする半導体装置。
- 前記金属箔は、母材が銅を主成分とすることを特徴とする請求項1に記載の半導体装置。
- 前記金属箔がプリント基板上に形成されたことを特徴とする請求項1または2に記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009190554A JP5201688B2 (ja) | 2009-08-20 | 2009-08-20 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009190554A JP5201688B2 (ja) | 2009-08-20 | 2009-08-20 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011044510A JP2011044510A (ja) | 2011-03-03 |
JP5201688B2 true JP5201688B2 (ja) | 2013-06-05 |
Family
ID=43831731
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009190554A Expired - Fee Related JP5201688B2 (ja) | 2009-08-20 | 2009-08-20 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP5201688B2 (ja) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005072548A (ja) * | 2003-08-05 | 2005-03-17 | Matsushita Electric Ind Co Ltd | 電子回路装置及びこれを用いた電子機器 |
JP2005294291A (ja) * | 2004-03-31 | 2005-10-20 | Nec Tokin Corp | 固体電解コンデンサ、その製造方法、および複合電子部品 |
JP2006019596A (ja) * | 2004-07-02 | 2006-01-19 | Sony Corp | 半導体装置およびその製造方法 |
JP4736451B2 (ja) * | 2005-02-03 | 2011-07-27 | パナソニック株式会社 | 多層配線基板とその製造方法、および多層配線基板を用いた半導体パッケージと電子機器 |
-
2009
- 2009-08-20 JP JP2009190554A patent/JP5201688B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2011044510A (ja) | 2011-03-03 |
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