JP5179055B2 - Group III nitride semiconductor manufacturing method, group III nitride semiconductor light emitting device manufacturing method, group III nitride semiconductor light emitting device, and lamp - Google Patents

Description

The present invention is a light emitting diode (LED), a laser diode (LD), a electronic device, etc., suitably used, formula _{Al a Ga b In c N (} 0 ≦ a ≦ 1,0 ≦ b ≦ 1,0 ≦ In particular, the present invention relates to a method for manufacturing a group III nitride semiconductor light-emitting device represented by c ≦ 1, a + b + c = 1). In particular, a p-type group III nitride semiconductor layer formed by adding an acceptor impurity such as magnesium (Mg) is formed. The present invention relates to a Group III nitride semiconductor manufacturing method, a Group III nitride semiconductor light emitting device manufacturing method, a Group III nitride semiconductor light emitting device, and a lamp.

  Group III nitride semiconductors have a direct transition type band gap of energy corresponding to the range from visible light to ultraviolet light, and are excellent in luminous efficiency. Therefore, light emitting diodes (LEDs) and laser diodes (LDs) It is commercialized as a semiconductor light emitting device such as, and is used in various applications. Even when used in an electronic device, the group III nitride semiconductor has a potential for obtaining superior characteristics as compared with the case of using a conventional group III-V compound semiconductor.

  Such group III nitride semiconductors are generally manufactured by metal organic chemical vapor deposition (MOCVD) using trimethylgallium, trimethylaluminum and ammonia as raw materials. The MOCVD method is a method in which a vapor of a raw material is contained in a carrier gas and transported to the substrate surface, and the raw material is decomposed by reaction with a heated substrate to grow crystals.

Conventionally, group III nitride semiconductor single crystal wafers are not commercially available, and group III nitride semiconductors are generally obtained by growing crystals on single crystal wafers of different materials. There is a large lattice mismatch between such a heterogeneous substrate and a group III nitride semiconductor crystal epitaxially grown thereon. For example, when gallium nitride (GaN) is grown on a sapphire (Al ₂ O ₃ ) substrate, there is a 16% lattice mismatch between the two, and when gallium nitride is grown on a SiC substrate. There is a 6% lattice mismatch between the two. In general, when there is a large lattice mismatch as described above, it is difficult to epitaxially grow a crystal directly on a substrate, and a crystal with good crystallinity cannot be obtained even when grown. There is.

  Therefore, when a group III nitride semiconductor crystal is epitaxially grown on a sapphire single crystal substrate or SiC single crystal substrate by metal organic chemical vapor deposition (MOCVD), first, aluminum nitride (AlN) or nitride is formed on the substrate. A method of laminating a layer called a low temperature buffer layer made of aluminum gallium (AlGaN) and epitaxially growing a group III nitride semiconductor crystal on the layer at a high temperature has been proposed and is generally performed.

The present invention also relates to a method of forming a layer such as AlN as a buffer layer on a substrate by a method other than MOCVD and forming a layer formed thereon by MOCVD, for example, a buffer layer formed by high-frequency sputtering. In addition, a method of growing crystals having the same composition by MOCVD has been proposed (for example, Patent Document 1).
However, the method described in Patent Document 1 has a problem that good crystals cannot be stably obtained.

  Therefore, in order to stably obtain good crystals, for example, a method of annealing in a mixed gas composed of ammonia and hydrogen after the growth of the buffer layer (for example, Patent Document 2) or DC sputtering at a temperature of 400 ° C. or higher. A method of forming a film by the above (for example, Patent Document 3) has been proposed.

On the other hand, research for producing a group III nitride semiconductor crystal by sputtering has also been conducted. For example, a method of directly forming a GaN film on a sapphire substrate by a sputtering method for the purpose of stacking high-resistance GaN. It has been proposed (for example, Patent Document 4). In the method described in Patent Document 4, as the GaN film formation conditions by sputtering, the ultimate vacuum is in the range of 5 × 10 ⁻⁷ to 10 ⁻⁸ Torr, the flow gases in the chamber are Ar and N _2, and sputtering is performed. The gas pressure is 3 to 5 × 10 ⁻² Torr, the RF voltage is 0.7 to 0.9 kV (20 to 40 W in terms of power), the distance between the substrate and the target is 20 to 50 mm, and the substrate temperature is 150 to 450. It is said to be ℃.

In addition, a method of forming a GaN layer on a Si (100) plane and an Al ₂ O ₃ (0001) plane by high-frequency magnetron sputtering using N ₂ gas has been proposed (for example, non-patent literature). 1). In the method described in Non-Patent Document 1, as the GaN film formation conditions by sputtering, the total gas pressure is 2 mTorr, the input power is 100 W, the substrate temperature is changed from room temperature to 900 ° C., and the target and substrate It is said that sputtering is performed with the two facing each other.

Further, a method has been proposed in which a GaN layer is formed using an apparatus in which a cathode and a solid target face each other and a mesh is placed between the substrate and the target (for example, Non-Patent Document 2). In the method described in Non-Patent Document 2, as the GaN film forming conditions, the gas atmosphere in the chamber is N ₂ gas, the pressure is 0.67 Pa, the substrate temperature is in the range of 84 to 600 ° C., and the input power is The distance between the substrate and the target is 80 mm.

In addition, the main component is Ga, the main component of which is a cooled target, and the gas includes nitrogen, such as sputtering gas and N ₂ gas, NH ₃ , N ₂ H ₄ , and the partial pressure of impurity gas other than H ₂ is 10 A material other than GaN is formed by a reactive sputtering method in which a discharge gas of ⁻⁸ torr or less is used and the energy of high-frequency plasma ions in the sputtering gas is controlled to perform crystal growth while irradiating the crystal growth surface with ions. There has been proposed a method of growing a single crystal containing GaN as a main component on a substrate made of (for example, Patent Document 5).

  A method of growing a gallium nitride thin film by sputtering using gallium cooled to 29 ° C. or lower as a target has been proposed (for example, Patent Document 6).

Further, nitriding with excellent crystallinity is performed on a substrate facing the target by a reactive sputtering method in which at least the surface region of the target is heated to the melting point or higher and the surface of the target is sputtered while forming a molten layer having a thickness of 1 μm or more. A method for growing a gallium film has been proposed (for example, Patent Document 7).
Japanese Patent Publication No. 5-86646 Japanese Patent No. 3440873 Japanese Patent No. 3700492 Japanese Patent Laid-Open No. 60-039819 Japanese Patent Laid-Open No. 8-181073 JP-A-11-172424 JP 2005-272894 A Yukiko Ushibuchi (Y. USHIKU) et al., “Proceedings of the 21st Century Union Symposium”, Vol. 2nd, p295 (2003), T. Kikuma et al., “Vacuum”, Vol. 66, P233 (2002)

  However, when a group III nitride semiconductor such as GaN is stacked on the substrate by the sputtering methods described in Patent Documents 2 to 7 and Non-Patent Documents 1 and 2, a group III nitride semiconductor with good crystallinity is obtained. However, there is a problem that even if an acceptor impurity is added to the group III nitride semiconductor, a p-type semiconductor having a sufficiently high carrier concentration cannot be obtained.

  The present invention has been made in view of the above problems, and improves the crystallinity of a group III nitride semiconductor stacked on a substrate by a sputtering method, and adds a acceptor impurity to have a sufficiently high carrier concentration. Provided are a method for manufacturing a group III nitride semiconductor capable of stacking group III nitride semiconductors, a method for manufacturing a group III nitride semiconductor light emitting device, a group III nitride semiconductor light emitting device and a lamp having excellent light emission characteristics. For the purpose.

As a result of intensive studies to solve the above problems, the present inventors have sufficiently increased the film forming conditions when stacking single crystal group III nitride semiconductors to which acceptor impurities are added. The inventors have found that it is possible to form a p-type group III nitride semiconductor having a carrier concentration, thereby completing the present invention.
That is, the present invention relates to the following.

[1] A group III nitride provided with a sputtering process in which a substrate and a target are placed in a chamber and a single crystal group III nitride semiconductor to which an acceptor impurity is added is formed on the substrate by a reactive sputtering method. In the method of manufacturing a semiconductor, the sputtering step is performed by setting the temperature of the substrate in a range of 600 ° C. to 1050 ° C., using a metal target containing a group III metal as the target, and changing the gas atmosphere in the chamber to nitrogen. atom-containing gas is 20% to 80%, hydrogen gas _{(H 2)} is the percentage 0.2-50% by the ratio 2% or more the balance being an inert gas, the III-nitride A method for producing a group III nitride semiconductor, wherein a carrier concentration in a semiconductor is 5 × 10 ¹⁶ atoms / cm ³ or more .
[2] The method for producing a group III nitride semiconductor according to [1], wherein the sputtering step uses a mixed target containing the III metal and an acceptor impurity as the target.
[3] The nitrogen atom-containing gas present in the gas atmosphere in the chamber is nitrogen gas (N ₂ ), and the inert gas is argon gas (Ar) [1] or [2] ] The manufacturing method of the group III nitride semiconductor of description.
[4] The method for producing a group III nitride semiconductor according to any one of [1] to [3], wherein the acceptor impurity is magnesium (Mg).
[5] The method according to any one of [1] to [4], wherein a step of forming a base layer made of a single crystal group III nitride semiconductor on the substrate is provided at least before the sputtering step. The manufacturing method of the group III nitride semiconductor in any one.
[6] The method for producing a group III nitride semiconductor according to [5], wherein the underlayer is formed using a metal organic chemical vapor deposition method (MOCVD method).

[7] A semiconductor layer in which an n-type semiconductor layer made of a group III nitride semiconductor, a light emitting layer, and a p-type semiconductor layer are sequentially stacked, and at least a part of the p-type semiconductor layer is added with an acceptor impurity. A method for producing a group III nitride semiconductor light-emitting device comprising a crystal group III nitride semiconductor, wherein at least a part of the p-type semiconductor layer is a group III according to any one of the above [1] to [6] A method for producing a group III nitride semiconductor light-emitting device, comprising forming a nitride semiconductor by a method for producing a nitride semiconductor.
[8] A group III nitride semiconductor light-emitting device obtained by the production method according to the above [7].
[9] A lamp comprising the group III nitride semiconductor light-emitting device according to [8].

According to the method for producing a group III nitride semiconductor of the present invention, when a single crystal group III nitride semiconductor to which an acceptor impurity is added is formed by reactive sputtering, the gas atmosphere in the chamber contains nitrogen atoms. Since the gas is 20 to 80%, the hydrogen gas (H ₂ ) is a ratio of 0.2 to 50%, the balance is an inert gas, and the ratio is set to 2% or more. Group III nitride semiconductors can be grown in an atmosphere rich in raw materials, and migration of reactive species on the surface of the group III nitride semiconductor during the semiconductor stacking process can be achieved by using a gas atmosphere containing hydrogen gas. Therefore, a group III nitride semiconductor with good crystallinity can be grown.
In addition, when the substrate temperature during sputtering is in the range of 600 ° C. to 1050 ° C., migration of reactive species on the surface of the group III nitride semiconductor layer during the semiconductor lamination process is more likely to occur. Better group III nitride semiconductors can be grown.
Thereby, an acceptor impurity is added to the group III nitride semiconductor, and the conductivity of the group III nitride semiconductor is controlled to be p-type, whereby a high carrier concentration of 5 × 10 ¹⁶ / cm ³ or more can be obtained. It becomes possible.

  Further, by forming a base layer made of a single crystal group III nitride semiconductor on the substrate and forming a group III nitride semiconductor on the base layer by sputtering, a single crystal group III having good crystallinity A nitride semiconductor layer can be stacked, and the conductivity can be further easily controlled by adding an acceptor impurity.

  According to the method for manufacturing a group III nitride semiconductor light emitting device of the present invention, at least a part of the p-type semiconductor layer is formed from a single crystal group III nitride semiconductor to which an acceptor impurity is added by the above manufacturing method. Therefore, a group III nitride semiconductor light-emitting device having a p-type semiconductor layer made of a group III nitride semiconductor with controlled conductivity and good crystallinity and having excellent light emission characteristics can be obtained.

  FIG. 1 to FIG. 5 are appropriately described below for a group III nitride semiconductor manufacturing method, a group III nitride semiconductor light emitting device manufacturing method, a group III nitride semiconductor light emitting device, and a lamp according to an embodiment of the present invention. The description will be given with reference.

[Method for Producing Group III Nitride Semiconductor]
In the method for manufacturing a group III nitride semiconductor according to this embodiment, a substrate 11 (see FIGS. 1 to 3) and a target 47 (see FIG. 5) are placed in a chamber 41 (see FIG. 5). The manufacturing method includes a sputtering process for forming a single crystal group III nitride semiconductor doped with an acceptor impurity by a reactive sputtering method, and the sputtering process is performed at a temperature of the substrate 11 of 600 ° C. to 1050 ° C. And using a metal target containing a Group III metal as the target 47, the gas atmosphere in the chamber 47 is 20 to 80% nitrogen-containing gas and 0.2 to 50% hydrogen gas (H ₂ ). This is a method in which the balance is an inert gas and the ratio is 2% or more.

<Semiconductor laminated structure>
FIG. 1 is a diagram for explaining an example of a method for producing a group III nitride semiconductor according to the present invention, and is a schematic cross-sectional view showing an example of a stacked semiconductor in which a group III nitride semiconductor is formed on a substrate. . In the laminated semiconductor 10 shown in FIG. 1, a buffer layer 12 made of a group III nitride compound is laminated on a substrate 11, and an n-type semiconductor layer 14, a light emitting layer 15, and a p-type semiconductor layer 16 are formed on the buffer layer 12. A semiconductor layer 20 is sequentially formed.
The p-type semiconductor layer 16 of the present embodiment is made of a single crystal group III nitride semiconductor to which an acceptor impurity is added, and is formed by the group III nitride semiconductor manufacturing method of the present invention, which will be described in detail later. .
Hereinafter, the laminated structure of the group III nitride semiconductor of this embodiment will be described in detail.

"substrate"
In the present embodiment, the material that can be used for the substrate 11 is not particularly limited as long as it is a substrate material on which a group III nitride semiconductor crystal is epitaxially grown on the surface, and various materials can be selected and used. For example, sapphire, SiC, silicon, zinc oxide, magnesium oxide, manganese oxide, zirconium oxide, manganese zinc iron, magnesium aluminum oxide, zirconium boride, gallium oxide, indium oxide, lithium gallium oxide, lithium aluminum oxide, neodymium gallium oxide Lanthanum strontium oxide aluminum tantalum, strontium titanium oxide, titanium oxide, hafnium, tungsten, molybdenum and the like. Among these, it is preferable to use a material having a hexagonal crystal structure such as sapphire or SiC for the substrate because a group III nitride semiconductor having good crystallinity can be stacked.
In addition, as the size of the substrate, a substrate having a diameter of about 2 inches is usually used. However, in the group III nitride semiconductor of the present invention, a substrate having a diameter of 4 to 6 inches can be used.

  In addition, while forming a buffer layer without using ammonia, a base layer constituting an n-type semiconductor layer to be described later is formed by a method using ammonia. When an oxide substrate or a metal substrate that is known to cause chemical modification by contact is used, the buffer layer of this embodiment functions as a coating layer, so that chemical modification of the substrate is performed. It is effective in preventing. In general, since the sputtering method can keep the substrate temperature low, even when a substrate made of a material that decomposes at a high temperature is used, the substrate 11 is not damaged. These layers can be formed.

"Buffer layer"
In the laminated semiconductor 10 of this embodiment, a buffer layer 12 made of a group III nitride compound is formed on a substrate 11 by reacting a metal raw material and a gas containing a group V element by being activated by plasma. Has been. A film formed by a method using a plasma metal raw material as in this embodiment has an effect that alignment is easily obtained.

  Group III nitride semiconductor crystals have a hexagonal crystal structure and are easy to form a texture based on hexagonal columns. In particular, a film formed by a film forming method using a metal material that has been converted to plasma tends to be columnar crystals. Here, the columnar crystal described in the present invention refers to a crystal that is separated by forming a crystal grain boundary between adjacent crystal grains, and is itself a columnar shape as a longitudinal sectional shape. .

The buffer layer 12 is preferably made of an aggregate of columnar crystals from the viewpoint of the buffer function. Group III nitride semiconductor crystals have a hexagonal crystal structure and are easy to form a texture based on hexagonal columns. In particular, a film formed by a film forming method using a metal material that has been converted to plasma tends to be columnar crystals.
When the buffer layer 12 made of columnar crystals is formed on the substrate 11, the buffer function of the buffer layer 12 works effectively, so that the group III nitride semiconductor film formed thereon is good. It becomes a crystalline film having crystallinity.

The thickness of the buffer layer 12 is preferably in the range of 20 to 80 nm. By setting the thickness of the buffer layer 12 within this range, it has good crystallinity, and functions effectively as a coating layer when forming each layer made of a group III nitride semiconductor on the buffer layer 12. The buffer layer 12 is obtained.
If the thickness of the buffer layer 12 is less than 20 nm, the above-described function as a coat layer may not be sufficient. In addition, when the buffer layer 12 is formed with a film thickness exceeding 80 nm, the film forming process time becomes long although the function as the coat layer is not changed, and the productivity may be lowered.

The buffer layer 12 preferably has a composition containing Al, and particularly preferably has a configuration made of AlN. As a material constituting the buffer layer 12, any material can be used as long as it is a group III nitride semiconductor represented by the general formula AlGaInN. Furthermore, as V group, it is good also as a structure containing As and P.
Further, when the buffer layer 12 has a composition containing Al, it is preferable to use GaAlN. In this case, the composition of Al is preferably set to 50% or more. In addition, the buffer layer 12 is more preferably made of AlN because a columnar crystal aggregate can be efficiently formed.

  Any material can be used for the buffer layer 12 as long as it has the same crystal structure as that of the group III nitride semiconductor. However, the length of the lattice constitutes the underlayer described later. A group close to a group III nitride semiconductor is preferable, and a nitride of a group 13 element in the periodic table is particularly preferable.

"Semiconductor layer"
As shown in FIG. 1, the laminated semiconductor 10 of the present embodiment is made of a group III nitride semiconductor on a substrate 11 via the buffer layer 12 as described above, and includes an n-type semiconductor layer 14 and a light emitting layer 15. And the semiconductor layer 20 comprised from the p-type semiconductor layer 16 is laminated | stacked. Further, in the illustrated stacked semiconductor 10, the base layer 14 a provided in the n-type semiconductor layer 14 is stacked on the buffer layer 12.

The group III nitride semiconductor, for example, and by the general formula _{Al X Ga Y In Z N 1} -A M A (0 ≦ X ≦ 1,0 ≦ Y ≦ 1,0 ≦ Z ≦ 1, X + Y + Z = 1. Symbol M represents a group V element different from nitrogen (N), and 0 ≦ A <1.) Many gallium nitride-based compound semiconductors are known. and the general formula _{Al X Ga Y in Z N 1} -a M a (0 ≦ X ≦ 1,0 ≦ Y ≦ 1,0 ≦ Z ≦ 1 , including the gallium compound semiconductor, X + Y + Z = 1 . symbol M nitrogen A gallium nitride-based compound semiconductor represented by (V) represents another group V element and 0 ≦ A <1) can be used without any limitation.

  The gallium nitride-based compound semiconductor can contain other group III elements in addition to Al, Ga, and In, and elements such as Ge, Si, Mg, Ca, Zn, Be, P, As, and B can be used as necessary. Can also be contained. Furthermore, it is not limited to the element added intentionally, but may include impurities that are inevitably included depending on the film forming conditions and the like, as well as trace impurities that are included in the raw materials and reaction tube materials.

"N-type semiconductor layer"
The n-type semiconductor layer 14 is usually laminated on the buffer layer 12, and is composed of a base layer 14a, an n-type contact layer 14b, and an n-type cladding layer 14c. The n-type contact layer can also serve as an underlayer and / or an n-type cladding layer, but the underlayer can also serve as an n-type contact layer and / or an n-type cladding layer. It is.

{Underlayer}
The underlayer 14a of this embodiment is made of a group III nitride semiconductor, and is deposited on the buffer layer 12 by a conventionally known MOCVD method.
The material of the underlayer 14a is not necessarily the same as that of the buffer layer 12 formed on the substrate 11, and a different material may be used, but an Al _y Ga _1-y N layer (0 ≦ y ≦ 1, preferably 0 ≦ y ≦ 0.5, more preferably 0 ≦ y ≦ 0.1).

  When forming each layer made of a group III nitride semiconductor on a substrate, for example, directly forming a group III nitride semiconductor single crystal by sputtering on the (0001) C surface of a substrate made of sapphire, This is difficult due to the difference in lattice constant between the substrate and the group III nitride semiconductor. Therefore, in the present invention, the base layer 14 a made of a single crystal group III nitride semiconductor is formed in advance on the substrate 11. Since a single crystal layer of a group III nitride semiconductor with good crystallinity can be easily formed on the single crystal base layer 14a by sputtering, the acceptor impurity is doped to make the conductivity p-type. It becomes easy to obtain a controlled group III nitride semiconductor.

As a result of experiments by the present inventors, it was found that a group III nitride compound containing Ga, that is, a GaN-based compound semiconductor is preferable as a material used for the underlayer 14a.
When the buffer layer 12 is made of AlN, the underlying layer 14a needs to loop dislocations by migration so that the crystallinity of the buffer layer 12 that is an aggregate of columnar crystals is not inherited as it is. Examples of the material that easily causes dislocation looping include a GaN-based compound semiconductor containing Ga, and AlGaN or GaN is particularly preferable.

  The film thickness of the underlayer 14a is preferably in the range of 0.1 to 8 μm from the viewpoint of obtaining an underlayer with good crystallinity, and in the range of 0.1 to 2 μm is required for film formation. It is more preferable in that the process time can be shortened and productivity is improved.

The underlayer 14a may have a configuration in which n-type impurities are doped in the range of 1 × 10 ¹⁷ to 1 × 10 ¹⁹ / cm ³ as necessary, but is undoped (<1 × 10 ¹⁷ / cm ³ ). The undoped structure is preferable in that good crystallinity can be maintained.
In the case where the substrate 11 is conductive, electrodes can be formed above and below the light emitting element by doping the base layer 14a with a dopant to make it conductive. On the other hand, when an insulating material is used for the substrate 11, a chip structure is provided in which the positive electrode and the negative electrode are provided on the same surface of the light emitting element. The crystallinity is better when it is done. Although it does not specifically limit as an n-type impurity, For example, Si, Ge, Sn, etc. are mentioned, Preferably Si and Ge are mentioned.

{N-type contact layer}
The n-type contact layer 14b of the present embodiment is made of a group III nitride semiconductor, and is deposited on the base layer 14a by sputtering.
As the n-type contact layer 14b, an Al _X Ga _1-X N layer (0 ≦ x ≦ 1, preferably 0 ≦ x ≦ 0.5, and more preferably 0 ≦ x ≦ 0.1) as in the base layer 14a. It is preferable that it is comprised. Further, the n-type impurity is preferably doped, and the n-type impurity is contained at a concentration of 1 × 10 ¹⁷ to 1 × 10 ¹⁹ / cm ³ , preferably 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ^3. In view of maintaining good ohmic contact with the negative electrode, suppressing crack generation, and maintaining good crystallinity. Although it does not specifically limit as an n-type impurity, For example, Si, Ge, Sn, etc. are mentioned, Preferably it is Si and Ge. The growth temperature is the same as that of the underlayer. Further, as described above, the n-type contact layer 14b can also be configured to serve also as a base layer.

  The gallium nitride-based compound semiconductor constituting the underlayer 14a and the n-type contact layer 14b preferably has the same composition, and the total film thickness thereof is 0.1 to 20 μm, preferably 0.5 to 15 μm, more preferably It is preferable to set in the range of 1 to 12 μm. When the film thickness is within this range, the crystallinity of the semiconductor is maintained satisfactorily.

{N-type cladding layer}
It is preferable to provide an n-type cladding layer 14c between the above-described n-type contact layer 14b and the light emitting layer 15 whose details will be described later. By providing the n-type cladding layer 14c, it is possible to fill the deterioration of flatness generated on the outermost surface of the n-type contact layer 14b. The n-type cladding layer 14c can be formed of AlGaN, GaN, GaInN, or the like using a sputtering method or the like. Alternatively, a heterojunction of these structures or a superlattice structure in which a plurality of layers are stacked may be used. Needless to say, in the case of using GaInN, it is desirable to make it larger than the band gap of GaInN of the light emitting layer 15.

The film thickness of the n-type cladding layer 14c is not particularly limited, but is preferably in the range of 5 to 500 nm, more preferably in the range of 5 to 100 nm.
Further, the n-type doping concentration of the n-type cladding layer 14c is preferably in the range of 1 × 10 ¹⁷ to 1 × 10 ²⁰ / cm ³ , more preferably 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ^3. Range. A doping concentration within this range is preferable in terms of maintaining good crystallinity and reducing the operating voltage of the light emitting element.

"P-type semiconductor layer"
The p-type semiconductor layer 16 is generally composed of a p-type cladding layer 16a and a p-type contact layer 16b, and is formed using a reactive sputtering method. Further, the p-type contact layer can also serve as the p-type cladding layer.

The p-type semiconductor layer 16 of this embodiment is added with an acceptor impurity for controlling the conductivity to be p-type.
Although it does not specifically limit as an acceptor impurity, For example, it is preferable to use Mg, and it is also possible to use Zn similarly.

{P-type cladding layer}
The p-type cladding layer 16a is not particularly limited as long as it has a composition larger than the band gap energy of the light-emitting layer 15 described later in detail, and can confine carriers in the light-emitting layer 15, but preferably Al _d Examples include Ga _1-d N (0 <d ≦ 0.4, preferably 0.1 ≦ d ≦ 0.3). When the p-type cladding layer 16a is made of such AlGaN, it is preferable in terms of confining carriers in the light emitting layer 15.
The thickness of the p-type cladding layer 16a is not particularly limited, but is preferably 1 to 400 nm, and more preferably 5 to 100 nm.

The p-type doping concentration obtained by adding an acceptor impurity to the p-type cladding layer 16a is preferably in the range of 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ , more preferably 1 × 10 ^19. ˜1 × 10 ²⁰ / cm ³ . When the p-type dope concentration is in the above range, a good p-type crystal can be obtained without reducing the crystallinity.

{P-type contact layer}
The p-type contact layer 16b includes at least Al _e Ga _1-e N (0 ≦ e <0.5, preferably 0 ≦ e ≦ 0.2, more preferably 0 ≦ e ≦ 0.1). This is a gallium nitride compound semiconductor layer. When the Al composition is in the above range, it is preferable in terms of maintaining good crystallinity and good ohmic contact with a p-ohmic electrode (see translucent electrode 17 described later).
Although the film thickness of the p-type contact layer 16b is not specifically limited, 10-500 nm is preferable, More preferably, it is 50-200 nm. When the film thickness is within this range, it is preferable in terms of light emission output.

Further, when the p-type dope concentration obtained by adding an acceptor impurity to the p-type contact layer 16b is in the range of 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ , good ohmic contact can be maintained, It is preferable in terms of prevention of generation of cracks and maintenance of good crystallinity, and more preferably in the range of 5 × 10 ^{19 to} 5 × 10 ²⁰ / cm ³ .

"Light emitting layer"
The light emitting layer 15 is a layer on which the p-type semiconductor layer 16 is stacked on the n-type semiconductor layer 14 and can be formed by using a conventionally known MOCVD method or the like. Further, as shown in FIG. 1, the light emitting layer 15 is formed by alternately and alternately stacking a barrier layer 15a made of a gallium nitride compound semiconductor and a well layer 15b made of a gallium nitride compound semiconductor containing indium. In the illustrated example, the barrier layers 15a are stacked in the order in which they are arranged on the n-type semiconductor layer 14 side and the p-type semiconductor layer 16 side.

As the barrier layer 15a, for example, a gallium nitride-based material such as Al _c Ga _1-c N (0 ≦ c <0.3) having a larger band gap energy than the well layer 15b made of a gallium nitride-based compound semiconductor containing indium. A compound semiconductor can be suitably used.
Furthermore, the well layer 15b can be formed using indium as the semiconductor gallium nitride-based compound containing, for _example, can be used _{Ga 1-s In s N (} 0 <s <0.4) GaN such as indium.

  Further, the film thickness of the entire light emitting layer 15 is not particularly limited, but a film thickness that can obtain a quantum effect, that is, a critical film thickness is preferable. For example, the thickness of the light emitting layer 15 is preferably in the range of 1 to 500 nm, and more preferably about 100 nm. When the film thickness is in the above range, it contributes to the improvement of the light emission output.

<Manufacturing method>
In the method of manufacturing a group III nitride semiconductor according to this embodiment, as described above, a single crystal group III nitride in which the substrate 11 and the target 47 are placed in the chamber 41 and an acceptor impurity is added to the substrate 11. A sputtering process for forming a semiconductor by a reactive sputtering method is provided, wherein the sputtering process is performed by setting a temperature of the substrate 11 in a range of 600 ° C. to 1050 ° C., and a metal target containing a group III metal as a target 47. The gas atmosphere in the chamber 47 is used, the nitrogen atom-containing gas is 20 to 80%, the hydrogen gas (H ₂ ) is 0.2 to 50%, the remainder is an inert gas, and the ratio is 2 % Or more.

  In the manufacturing method of this embodiment, when a group III nitride semiconductor crystal is epitaxially grown on the substrate 11 to form the laminated semiconductor 10 as shown in FIG. 1, the buffer layer 12 is formed on the substrate 11, The semiconductor layer 20 is formed. In the present embodiment, the buffer layer 12 is formed by sputtering, and the underlying layer 14a of the n-type semiconductor layer 14 is formed thereon by MOCVD, and then the n-type contact layer 14b is formed by sputtering. In this method, the n-type cladding layer 14c and the light-emitting layer 15 are formed by MOCVD, and the p-type semiconductor layer 16 is formed by sputtering.

"Formation of buffer layer"
When the buffer layer 12 is formed on the substrate 11, it is desirable to perform wet pretreatment on the substrate 11. For example, with respect to the substrate 11 made of silicon, a well-known RCA cleaning method or the like is performed and the surface is hydrogen-terminated to stabilize the film forming process.
In addition, after the substrate 11 is introduced into the reactor and before the buffer layer 12 is formed, pretreatment can be performed using a method such as sputtering. Specifically, the surface can be prepared by exposing the substrate 11 to Ar or N ₂ plasma. For example, by applying plasma such as Ar gas or N ₂ gas to the surface of the substrate 11, organic substances and oxides attached to the surface of the substrate 11 can be removed. In this case, if a voltage is applied between the substrate 11 and the chamber, the plasma particles efficiently act on the substrate 11. By applying such pretreatment to the substrate 11, the buffer layer 12 can be formed over the entire surface 11a of the substrate 11, and the crystallinity of the film formed thereon can be improved.

  After pretreatment of the surface of the substrate 11, argon and nitrogen gas are introduced into the sputtering apparatus, and the temperature of the substrate 11 is lowered to about 500 ° C. Then, a high frequency bias is applied to the substrate 11 side, power is applied to the Al target side made of metal Al, and a buffer layer 12 made of AlN is formed on the substrate 11 while keeping the pressure in the furnace constant. .

  As a method for forming the buffer layer 12 on the substrate 11, besides the sputtering method, for example, an MOCVD method, a PLD method, a PED method, and the like can be used. It is a suitable method because it is suitable for mass production. Note that when DC sputtering is used, the target surface may be charged up, and the deposition rate may not be stable. Therefore, it is desirable to use pulse DC sputtering or RF sputtering.

"Semiconductor layer formation"
On the buffer layer 12, the n-type semiconductor layer 14, the light emitting layer 15, and the p-type semiconductor layer 16 are laminated | stacked in this order, and the semiconductor layer 20 is formed. In the manufacturing method of the present embodiment, as described above, after the base layer 14a of the n-type semiconductor layer 14 is formed by the MOCVD method, the n-type contact layer 14b is formed by the sputtering method, and the n-type cladding layer 14c thereon is formed. The light emitting layer 15 and the light emitting layer 15 are formed by MOCVD, and the p-type semiconductor layer 16 is formed by sputtering.

In this embodiment, the growth method of the gallium nitride-based compound semiconductor when forming the semiconductor layer 20 is not particularly limited. In addition to the sputtering method described above, MOCVD (metal organic chemical vapor deposition), HVPE (halide vapor phase). All methods known to grow nitride semiconductors such as a growth method) and MBE (molecular beam epitaxy method) can be applied. Among these methods, in MOCVD, hydrogen (H ₂ ) or nitrogen (N ₂ ) is used as a carrier gas, trimethyl gallium (TMG) or triethyl gallium (TEG) is used as a Ga source which is a group III material, and trimethyl aluminum is used as an Al source. (TMA) or triethylaluminum (TEA), trimethylindium (TMI) or triethylindium (TEI) as the In source, ammonia (NH ₃ ), hydrazine (N ₂ H ₄ ) or the like as the N source which is a group V material. . In addition, as a dopant, for n-type, monosilane (SiH ₄ ) or disilane (Si ₂ H ₆ ) is used as a Si raw material, germanium gas (GeH ₄ ) or tetramethyl germanium ((CH ₃ ) ₄ Ge) is used as a Ge raw material. And organic germanium compounds such as tetraethylgermanium ((C ₂ H ₅ ) ₄ Ge) can be used. In the MBE method, elemental germanium can also be used as a doping source. For the p-type, for example, biscyclopentadienyl magnesium (Cp ₂ Mg) or bisethylcyclopentadienyl magnesium (EtCp ₂ Mg) is used as the Mg raw material.

  The gallium nitride-based compound semiconductor as described above can contain other group III elements in addition to Al, Ga, and In. If necessary, Ge, Si, Mg, Ca, Zn, Be, P, As, and Elements such as B can be contained. Furthermore, it is not limited to the element added intentionally, but may include impurities that are inevitably included depending on the film forming conditions and the like, as well as trace impurities that are included in the raw materials and reaction tube materials.

“Formation of n-type semiconductor layer”
When forming the semiconductor layer 20 of the present embodiment, first, the base layer 14a of the n-type semiconductor layer 14 is deposited on the buffer layer 12 by a conventionally known MOCVD method. Next, an n-type contact layer 14b is formed on the base layer 14a by sputtering, and then an n-type cladding layer 14c is formed by MOCVD. At this time, the underlayer 14a and the n-type cladding layer 14c can be formed using the same MOCVD furnace.

As a method of forming the base layer 14a made of a single crystal group III nitride semiconductor on the substrate 11, a low temperature buffer layer made of the above-mentioned Al _y Ga _1-y N (0 ≦ y ≦ 1) by, for example, MOCVD. Is formed on the substrate 11 and a single crystal GaN layer is formed thereon by MOCVD at a temperature higher than the temperature at which the low temperature buffer layer is formed. Further, instead of the low temperature buffer layer by MOCVD, a polycrystalline buffer layer made of Al _y Ga _1-y N (0 ≦ y ≦ 1) is formed by sputtering, and a single crystal is formed thereon by MOCVD. A GaN layer may be formed. Alternatively, a single crystal GaN layer may be grown using a sputtering method.

`` Formation of light emitting layer ''
On the n-type cladding layer 14c, the light emitting layer 15 is formed by a conventionally known MOCVD method.
The light emitting layer 15 illustrated in FIG. 1 formed in this embodiment has a laminated structure that starts with a GaN barrier layer and ends with the GaN barrier layer, and includes six barrier layers 15a made of GaN, and a non-doped layer. The five well layers 15b made of In _0.2 Ga _0.8 N are alternately stacked.
In the manufacturing method of this embodiment, the light emitting layer 15 can be formed by a conventionally known MOCVD method by using the same MOCVD furnace used for forming the n-type cladding layer 14c.

“Formation of p-type semiconductor layer”
A p-type semiconductor layer 16 including a p-type cladding layer 16a and a p-type contact layer 16b is formed on the light-emitting layer 15, that is, on the barrier layer 15a that is the uppermost layer of the light-emitting layer 15, by a sputtering method.
In the present embodiment, first, a p-type cladding layer 16a made of Mg-doped Al _0.1 Ga _0.9 N is formed on the light emitting layer 15 (the uppermost barrier layer 15a), and further, Mg A p-type contact layer 16b made of Al _0.02 Ga _0.98 N doped with is formed. At this time, the same sputtering apparatus can be used for stacking the p-type cladding layer 16a and the p-type contact layer 16b.

{Sputtering process}
Hereinafter, the sputtering process provided in the manufacturing method of the present embodiment will be described in detail with reference to the sputtering apparatus 40 illustrated in FIG. 5 as appropriate.
In the sputtering process of this embodiment, at least a part of the p-type semiconductor layer 16 in the semiconductor layer 20 made of a group III nitride semiconductor as shown in FIG. 1 (see also FIG. 3) is reacted under the above conditions. This is a step of forming from a single crystal group III nitride semiconductor to which an acceptor impurity is added using a reactive sputtering method.

(Sputtering equipment)
When a semiconductor layer made of a group III nitride semiconductor is formed by sputtering, generally a group III metal is used as a target, and a nitrogen atom-containing gas (nitrogen gas: N ₂ , ammonia: NH ₃ or the like) is placed in the chamber of the sputtering apparatus. Is used, and a reactive sputtering method (reactive reactive sputtering method) in which a group III metal and nitrogen are reacted in a gas phase is used. As sputtering methods, there are RF sputtering and DC sputtering. When reactive sputtering is used as in the manufacturing method of the present invention, DC sputtering with continuous discharge is intensely charged, and film formation speed is controlled. Is difficult. For this reason, in the manufacturing method of the present invention, it is preferable to use pulsed DC sputtering that can be biased in a pulse manner among RF sputtering and DC sputtering.

When RF sputtering is used, it is preferable to move the position of the magnet within the target as a method for avoiding charging. A specific motion method can be selected depending on a sputtering apparatus to be used, and can be swung or rotated.
In the sputtering apparatus 40 illustrated in FIG. 5, a magnet 42 is provided below the target 47, and the magnet 42 is configured to be able to rotate under the target 47.

  When forming a semiconductor layer made of a group III nitride semiconductor by sputtering, it is preferable to supply reactive species having higher energy to the substrate. For this reason, it is preferable that the substrate 11 is configured to be positioned in the plasma in the sputtering apparatus, and that the target 47 and the substrate 11 face each other. In addition, the distance between the substrate 11 and the target 47 is preferably in the range of 10 to 100 mm.

Moreover, since it is preferable that impurities are not left in the chamber 41 as much as possible, the ultimate vacuum of the sputtering apparatus 40 is preferably 1.0 × 10 ⁻³ Pa or less.

(Gas atmosphere in the chamber)
Other parameters that are important when forming a semiconductor layer made of a group III nitride semiconductor by sputtering include the partial pressure of the nitrogen atom-containing gas, the film formation rate, the substrate temperature, the bias, and the power.
First, the gas atmosphere in the chamber 41 of the sputtering apparatus 40 is an atmosphere containing a nitrogen atom-containing gas (nitrogen: N ₂ gas, NH ₃ gas, etc.). Such a nitrogen atom-containing gas is turned into plasma by sputtering and decomposed into nitrogen atoms to be a raw material for crystal growth. Further, in order to efficiently sputter the target 47, the atmosphere is further mixed with an inert gas having a large weight and low reactivity such as argon (Ar). Furthermore, in order to facilitate the migration of reactive species on the surface of the group III nitride semiconductor during the semiconductor lamination process, a gas atmosphere containing hydrogen gas is used.

The ratio of the nitrogen atom-containing gas in the gas atmosphere in the chamber 41, for example, the ratio of the nitrogen gas flow rate to the total flow rate of nitrogen gas (N ₂ ) and argon (Ar) can be 20% to 98%. . If the flow rate ratio of nitrogen gas is less than 20%, the sputtering raw material may adhere as metal, and if the flow rate ratio of nitrogen gas exceeds 98%, the amount of argon is too small and the sputtering rate decreases.

  In addition, in order to stack a group III nitride semiconductor having particularly good crystallinity, it is necessary to set the ratio of the nitrogen atom-containing gas in the atmosphere in the chamber 41 to a range of 20 to 80%. By setting the ratio of the nitrogen atom-containing gas to 80% or less, a group III nitride semiconductor can be grown in an atmosphere rich in group III raw materials, so that a group III nitride semiconductor with better crystallinity can be obtained. It becomes possible to grow.

  The proportion of hydrogen gas in the gas atmosphere is in the range of 0.2 to 50%. If the proportion of hydrogen gas is less than 0.2%, the action of activating migration of reactive species on the substrate cannot be obtained sufficiently, and it becomes difficult to stack a group III nitride semiconductor with good crystallinity. . On the other hand, when the proportion of hydrogen gas exceeds 50%, too much hydrogen is taken into the formed group III nitride semiconductor, which becomes a factor that inhibits activation of acceptor impurities.

In the gas atmosphere, the remainder excluding the nitrogen atom-containing gas and hydrogen gas is an inert gas. Since the inert gas is used for the purpose of efficiently sputtering the target, it is preferable to use Ar having a large weight and low reactivity.
In order to secure a certain sputtering rate or more, the ratio of the inert gas needs to be 2% or more. In addition, other gas components can be added to the gas atmosphere as long as the functions of the nitrogen atom-containing gas, hydrogen gas, and inert gas are not impaired.

(Deposition rate)
The deposition rate of the semiconductor layer made of a group III nitride semiconductor by sputtering is preferably 0.01 to 10 nm / second. If the deposition rate exceeds 10 nm / second, the stacked group III nitride semiconductor does not become crystalline but becomes amorphous, and if it is less than 0.01 nm / second, the process becomes uselessly long and is used for industrial production. It becomes difficult.

(Substrate temperature)
As a result of diligent experiments by the present inventors, in general, in order to form a semiconductor layer made of a group III nitride semiconductor having good crystallinity by sputtering, the temperature of the substrate 11 is set to a range of 600 to 1200 ° C. It became clear that it was preferable. When the substrate temperature is lower than 600 ° C., migration of reactive species on the substrate surface is suppressed, and it is difficult to form a group III nitride semiconductor with good crystallinity. Further, when the substrate temperature exceeds 1200 ° C., the formed group III nitride semiconductor may be decomposed again.

  In order to control the conductivity to be p-type by adding acceptor impurities, the substrate temperature needs to be in the range of 600 to 1050 ° C. By setting the substrate temperature in the range of 600 to 1050 ° C., a group III nitride semiconductor with low defect density such as point defects and good crystallinity can be grown. This makes it possible to control the conductivity to be p-type by adding an acceptor impurity to the group III nitride semiconductor.

(Bias and power)
Further, in order to activate the migration of reactive species on the surface of the substrate 11 during crystal growth, it is preferable that the bias applied to the substrate 11 side and the power applied to the target 47 side are large. For example, the bias applied to the substrate 11 during film formation is preferably 1.5 W / cm ² or more, and the power applied to the target 47 during film formation is in the range of 1.5 W / cm ^{2 to 5} kW / cm ^2. Is preferred.

(Target composition)
The composition of the semiconductor layer made of a group III nitride semiconductor can be controlled by adjusting the composition of the group III metal used for the target to a desired value. For example, when forming a layer made of GaN, Ga metal may be used for the target, and when forming an AlGaN layer, an AlGa alloy may be used for the target. Further, when forming InGaN, an InGa alloy may be used. Since the composition of the group III nitride semiconductor varies depending on the composition of the group III metal of the target 47, a semiconductor layer made of a group III nitride semiconductor having a desired composition can be obtained by experimentally determining the composition of the target 47. It becomes possible to form.

  Alternatively, for example, when an AlGaN layer is stacked, both Ga metal and Al metal may be juxtaposed as targets. In this case, it is possible to control the composition of the laminated AlGaN layer by changing the ratio of the surface areas of the Ga metal target and the Al metal target. Similarly, when laminating an InGaN layer, both a Ga metal target and an In metal target may be juxtaposed.

(Addition of acceptor impurities)
The doping of the acceptor impurity into the group III nitride semiconductor can be performed using a mixed target in which a group III metal and an acceptor impurity are mixed. For example, when forming GaN doped with Mg by sputtering, a mixed target containing Ga metal and Mg is used. In this case, Mg is doped in solid Ga metal, and Mg metal is used as a target, so that GaN doped with Mg can be formed. It is also possible to use Ga metal and Mg small pieces separately for the target.

At this time, GaN having a desired impurity concentration can be formed by experimentally determining the ratio of Ga and Mg serving as a target. For example, when Mg is dissolved in solid Ga and used as a target, the ratio of the weight of Mg to the weight of Ga is set to 0.02 to 0.2%, thereby 5 × 10 ^{16 to} 5 × 10 ¹⁷ pieces. A p-type GaN single crystal layer (p-type semiconductor layer) having a carrier concentration of / cm ³ can be formed.
As described above, as the acceptor impurity, not only Mg but also zinc (Zn) or the like can be used in the same manner.

According to the group III nitride semiconductor manufacturing method of the present embodiment as described above, when a single crystal group III nitride semiconductor to which an acceptor impurity is added is formed by a reactive sputtering method, Sputtering is performed in a gas atmosphere in which the nitrogen atom-containing gas is 20 to 80%, the hydrogen gas (H ₂ ) is 0.2 to 50%, the remainder is an inert gas, and the ratio is 2% or more. As a method, a group III nitride semiconductor can be grown in an atmosphere rich in group III raw materials, and a group III nitride semiconductor in a semiconductor stacking process can be obtained by using a gas atmosphere containing hydrogen gas. As a result, migration of reactive species on the surface of the surface of the semiconductor layer is likely to occur, so that a group III nitride semiconductor with good crystallinity can be grown.
In addition, since the substrate temperature during sputtering is in the range of 600 to 1050 ° C., migration of reactive species on the surface of the group III nitride semiconductor layer during the semiconductor lamination process is more likely to occur. A better group III nitride semiconductor can be grown.
Thereby, an acceptor impurity is added to the group III nitride semiconductor, and the conductivity of the group III nitride semiconductor is controlled to be p-type, whereby a high carrier concentration of 5 × 10 ¹⁶ / cm ³ or more can be obtained. It becomes possible.

  Further, by forming a base layer made of a single crystal group III nitride semiconductor on the substrate and forming a group III nitride semiconductor on the base layer by sputtering, a single crystal group III having good crystallinity A nitride semiconductor layer can be stacked, and the conductivity can be further easily controlled by adding an acceptor impurity.

  The group III nitride semiconductor of which conductivity is controlled to be p-type by adding an acceptor impurity according to the present invention is a p-type provided in a light-emitting element such as a light-emitting diode (LED) or a laser disk (LD) described in detail later It can be used for various semiconductor elements such as contact layers and electronic devices such as transistors.

[Method for Producing Group III Nitride Semiconductor Light-Emitting Device]
The method for manufacturing a group III nitride semiconductor light emitting device according to the present invention includes an n-type semiconductor layer 14, a light emitting layer 15 and a p-type semiconductor each made of a group III nitride semiconductor as illustrated in FIG. 3 (see also FIG. 1). The method includes a semiconductor layer 20 in which layers 16 are sequentially stacked, and at least a part of the p-type semiconductor layer 16 is made of a single crystal group III nitride semiconductor to which an acceptor impurity is added. This is a method in which a part is formed by the method of manufacturing a group III nitride semiconductor as described above.

<Laminated structure of light emitting element>
2 and 3 are views for explaining an example of the method for manufacturing the light emitting device of the present embodiment, in which a laminated semiconductor 10 in which each layer made of a group III nitride semiconductor is formed on a substrate (see FIG. 1). FIG. 2 is a schematic view illustrating an example in which the light-emitting element 1 is configured by using FIG. 2, FIG. 2 is a plan view, and FIG.
In the light emitting device 1 of the present embodiment, a translucent positive electrode 17 is laminated on a p-type semiconductor layer 16 of a laminated semiconductor 10 manufactured by the above manufacturing method, a positive electrode bonding pad 18 is formed thereon, and n The negative electrode 19 is roughly laminated on the exposed region 14d formed in the n-type contact layer 14b of the type semiconductor layer 14.
The p-type semiconductor layer 16 of the present embodiment is made of a single crystal group III nitride semiconductor to which an acceptor impurity is added, and is formed by the above manufacturing method.

"Translucent positive electrode"
The translucent positive electrode 17 is a translucent electrode formed on the p-type semiconductor layer 16 (p-type contact layer 16b) of the laminated semiconductor 10 described above.
The material of the translucent positive electrode 17 is not particularly limited, but ITO (In ₂ O ₃ —SnO ₂ ), AZO (ZnO—Al ₂ O ₃ ), IZO (In ₂ O ₃ —ZnO), GZO (ZnO— Materials such as GeO ₂ ) can be provided by conventional means well known in the art. In addition, any structure including a conventionally known structure can be used without any limitation.
The translucent positive electrode 17 may be formed so as to cover almost the entire surface of the p-type semiconductor layer 16 doped with Mg, or may be formed in a lattice shape or a tree shape with a gap.

“Positive electrode bonding pad and negative electrode”
The positive electrode bonding pad 18 is an electrode formed on the translucent positive electrode 17 described above.
As the material of the positive electrode bonding pad 18, various structures using Au, Al, Ni, Cu, and the like are well known, and these well-known materials and structures can be used without any limitation.
The thickness of the positive electrode bonding pad 18 is preferably in the range of 100 to 1000 nm. Further, in view of the characteristics of the bonding pad, the larger the thickness, the higher the bondability. Therefore, the thickness of the positive electrode bonding pad 18 is more preferably 300 nm or more. Furthermore, it is preferable to set it as 500 nm or less from a viewpoint of manufacturing cost.

The negative electrode 19 is formed to be in contact with the n-type contact layer 14 b of the n-type semiconductor layer 14 in the semiconductor layer in which the n-type semiconductor layer 14, the light emitting layer 15, and the p-type semiconductor layer 16 are sequentially stacked on the substrate 11. The
For this reason, when the negative electrode 19 is provided, an exposed region 14d of the n-type contact layer 14b is formed by removing a part of the p-type semiconductor layer 16, the light emitting layer 15 and the n-type semiconductor layer 14, and on this, A negative electrode 19 is formed.
As the material of the negative electrode 19, negative electrodes having various compositions and structures are well known, and these known negative electrodes can be used without any limitation, and can be provided by conventional means well known in this technical field.

<Method for manufacturing light-emitting element>
Below, an example of the manufacturing method of the light emitting element 1 as shown in FIG.2 and FIG.3 is demonstrated.
The manufacturing method of the light-emitting element 1 of the present embodiment uses the laminated semiconductor 10 obtained by the above-described manufacturing method, and a transparent positive electrode 17 is laminated on the p-type semiconductor layer 16 of the laminated semiconductor 10 and the positive electrode is formed thereon. In this method, the bonding pad 18 is formed, and the negative electrode 19 is laminated on the exposed region 14 d formed in the n-type contact layer 14 b of the n-type semiconductor layer 14.

"Formation of translucent positive electrode"
By the method as described above, the translucent positive electrode 17 made of ITO is formed on the substrate 11 on the p-type contact layer 16b of the laminated semiconductor 10 in which the buffer layer 12 and the semiconductor layer are laminated.
The method for forming the translucent positive electrode 17 is not particularly limited, and can be provided by conventional means well known in this technical field. In addition, any structure including a conventionally known structure can be used without any limitation.

Further, as described above, the material of the translucent positive electrode 17 is not limited to ITO, and can be formed using materials such as AZO, IZO, and GZO.
Further, after forming the translucent positive electrode 17, thermal annealing may be performed for the purpose of alloying or transparency, but it may not be performed.

“Formation of positive and negative electrodes”
A positive electrode bonding pad 18 is further formed on the translucent positive electrode 17 formed on the laminated semiconductor 10.
The positive electrode bonding pad 18 can be formed, for example, by laminating Ti, Al, and Au materials in order from the surface side of the translucent positive electrode 17 by a conventionally known method.

  Further, when forming the negative electrode 19, first, a part of the light emitting layer 15, the p-type semiconductor layer 16, and the n-type semiconductor layer 14 formed on the substrate 11 is removed by a method such as dry etching. An exposed region 14d of the n-type contact layer 14b is formed (see FIGS. 2 and 3). Then, on the exposed region 14d, for example, each material of Ni, Al, Ti, and Au is laminated in order from the surface side of the exposed region 14d by a conventionally known method to form the negative electrode 19 having a four-layer structure. can do.

  Then, as described above, after the wafer provided with the translucent positive electrode 17, the positive electrode bonding pad 18 and the negative electrode 19 on the laminated semiconductor 10 is ground and polished to form a mirror-like surface. For example, a light emitting element chip (light emitting element 1) can be obtained by cutting into a square of 350 μm square.

  According to the manufacturing method of the group III nitride semiconductor light emitting device of this embodiment as described above, at least a part of the p-type semiconductor layer 16 is a single crystal III to which an acceptor impurity is added by the manufacturing method. Group III nitride having p-type semiconductor layer 16 made of group III nitride semiconductor with controlled conductivity and good crystallinity and having excellent light emission characteristics A semiconductor light emitting device is obtained.

[lamp]
By combining the group III nitride semiconductor light emitting device according to the present invention and the phosphor as described above, a lamp can be configured by means well known to those skilled in the art. Conventionally, a technique for changing the emission color by combining a light emitting element and a phosphor is known, and such a technique can be adopted without any limitation.
For example, it is possible to obtain light having a longer wavelength than that of the light emitting element by appropriately selecting the phosphor, and it is possible to obtain white light emission by mixing the light emitting wavelength of the light emitting element itself with the wavelength converted by the phosphor. It can also be set as the lamp which exhibits.
Further, the lamp can be used for any purpose such as a general bullet type, a side view type for a portable backlight, and a top view type used for a display.

  For example, as in the example shown in FIG. 4, when mounting the same-surface electrode type group III nitride semiconductor light emitting device 1 in a shell type, one of the two frames (frame 31 in FIG. 4) The light emitting element 1 is bonded, the negative electrode of the light emitting element 1 (see reference numeral 19 shown in FIG. 3) is bonded to the frame 32 with a wire 34, and the positive electrode bonding pad of the light emitting element 1 (see reference numeral 18 shown in FIG. 3) is attached. The wire 33 is joined to the frame 31. And the bullet-type lamp 3 as shown in FIG. 4 can be produced by molding the periphery of the light emitting element 1 with a mold 35 made of a transparent resin.

  In addition, the group III nitride semiconductor according to the present invention, in which acceptor impurities are added to control conductivity to p-type, includes a light-emitting element as described above, a photoelectric conversion element such as a laser element or a light-receiving element, or It can also be used for electronic devices such as HBT and HEMT. Many of these semiconductor elements have various structures, and the element structure of the group III nitride semiconductor multilayer structure according to the present invention is not limited at all including these known element structures.

  Next, the method for producing a group III nitride semiconductor and the method for producing a group III nitride semiconductor light-emitting device of the present invention will be described in more detail with reference to examples. However, the present invention is limited only to these examples. It is not a thing.

[Example 1]
In this embodiment, a buffer layer made of AlN is laminated on a substrate made of sapphire using a sputtering method, and a base layer made of single-crystal GaN is laminated thereon using a MOCVD method. In addition, a p-type GaN layer doped with an acceptor was laminated by sputtering to produce a laminated semiconductor sample.

"Formation of buffer layer"
First, a (0001) c-plane sapphire substrate having a diameter of 2 inches whose surface was mirror-polished was washed with hydrofluoric acid and an organic solvent, and then introduced into a chamber of a sputtering apparatus (see FIG. 5). At this time, as the sputtering apparatus, an apparatus including a high-frequency power supply unit and a mechanism capable of moving a position where a magnetic field is applied by rotating a magnet in the target was used.

  Then, the substrate is heated to 750 ° C. in the chamber of the sputtering apparatus, nitrogen gas is introduced at a flow rate of 15 sccm, the pressure in the chamber is kept at 0.08 Pa, and nitrogen is applied while applying a high frequency bias of 50 W to the substrate. The substrate surface was cleaned by exposure to plasma.

  Next, after introducing argon and nitrogen gas into the chamber, the temperature of the substrate was lowered to 500 ° C. Then, a high frequency bias of 2000 W was applied to the metal Al target side, the pressure in the furnace was maintained at 0.5 Pa, Ar gas was circulated at a flow rate of 15 sccm, and nitrogen gas was flowed at a flow rate of 5 sccm (the ratio of nitrogen to the total gas 25%), a buffer layer made of AlN was formed on the sapphire substrate. The growth rate at this time was 0.12 nm / s.

  The magnet in the target was rotated during both substrate cleaning and buffer layer deposition. After forming a buffer layer made of 50 nm of AlN as described above, the generation of plasma was stopped. Through the above procedure, a buffer layer made of polycrystalline AlN having a thickness of 50 nm was formed on the substrate.

"Formation of underlayer"
Next, the substrate on which the buffer layer was formed was transferred into the chamber of the MOCVD apparatus in order to grow an underlayer made of GaN by MOCVD. Then, the temperature of the substrate was raised to 1050 ° C. with hydrogen gas flowing in the chamber, and the dirt adhering to the surface of the buffer layer was sublimated and removed. At this time, ammonia was circulated in the furnace when the temperature of the substrate reached 830 ° C. or higher.

  Next, after the temperature of the substrate is lowered to 1020 ° C., the vapor of trimethylgallium (TMG) generated by bubbling is circulated into the furnace while ammonia is directly circulated in the chamber. The formation was formed with a film thickness of 2 μm. Thereafter, the supply of TMG was stopped, the growth of GaN was stopped, and the temperature was lowered.

  And the X-ray rocking curve (XRC) measurement of the base layer which consists of GaN produced by the said method was performed. This XRC measurement was performed on a (0002) plane that is a symmetric plane and a (10-10) plane that is an asymmetric plane, using a Cu β-ray X-ray generation source as a light source. As a result of this measurement, the underlayer of GaN produced by the manufacturing method of the present invention showed a half width of 80 arcsec in the (0002) plane measurement and a half width of 250 arcsec in the (10-10) plane. In this example, since the base layer was not doped with impurities, the base layer had a high resistance.

“Formation of p-type GaN layer”
Next, the substrate on which the underlayer was formed by the above method was transferred into a chamber of a sputtering apparatus in order to grow a GaN layer by sputtering. At this time, a sputtering apparatus having a high-frequency power source and a mechanism capable of moving the position where the magnetic field is applied by sweeping the magnet inside the square Ga target was used. In addition, a pipe for circulating the refrigerant was installed in the Ga target, and the refrigerant cooled to 20 ° C. was circulated in the pipe to prevent melting of Ga due to heat.
In addition, as the Ga target, a metal obtained by dissolving Mg in Ga metal was used. The ratio of the weight of Mg to the weight of Ga metal was about 0.15%.

  Next, after introducing argon and nitrogen gas into the chamber of the sputtering apparatus, the temperature of the substrate was raised to 1050 ° C. Then, a 2000 W high frequency bias was applied to the target side, and the pressure in the furnace was maintained at 0.5 Pa, while nitrogen gas was supplied at 12 sccm, hydrogen gas was supplied at 9 sccm, and Ar gas was supplied at a flow rate of 9 sccm (nitrogen gas). The ratio of hydrogen was 40%, the ratio of hydrogen gas was 30%, the balance was inert gas Ar, and the ratio was 30%. The growth rate at this time was approximately 2 nm / second. Then, after depositing Mg-doped GaN with a film thickness of 0.2 μm, the generation of plasma was stopped.

When the GaN layer taken out from the sputtering apparatus was visually confirmed, the surface was a mirror surface and was transparent. Further, when the hole measurement of this GaN layer was performed, it showed p-type conductivity without performing annealing treatment for activating the p-type carrier, and the carrier concentration was 4 × 10 ¹⁷ / cm ^3. It was.

[Example 2]
In this example, an Mg-doped single crystal GaN layer is formed under the same film formation conditions as in Example 1 except that the temperature of the substrate when the Mg-doped GaN layer is laminated by sputtering is 600 ° C. Laminated samples were made.

When the obtained sample was visually confirmed, the surface of the laminated Mg-doped GaN layer was a mirror surface and transparent. Further, when the hole of the Mg-doped GaN layer was measured, p-type conductivity was exhibited even without annealing for activating the p-type carrier, and the carrier concentration was 5 × 10 ¹⁶ atoms / cm 3. ³ .

[Examples 3 to 7]
In Examples 3 to 7, the gas atmosphere when laminating the Mg-doped GaN layer by the sputtering method was set to the composition conditions shown in Table 1 below, and the gas flow rate of each component was set to 30 sccm. A sample in which an Mg-doped single crystal GaN layer was laminated under the same film forming conditions as in Example 1 was prepared.

  When the obtained sample was visually confirmed, the surface of the laminated Mg-doped GaN layer was mirror-like and transparent. Further, when the hole measurement of this Mg-doped GaN layer was performed, p-type conductivity was exhibited without performing an annealing treatment for activating the p-type carrier, and the carrier concentration shown in Table 1 below was obtained. Indicated.

[Comparative Example 1]
In this comparative example, an Mg-doped single-crystal GaN layer is formed under the same film formation conditions as in Example 1 except that the substrate temperature when the Mg-doped GaN layer is stacked by sputtering is 500 ° C. Laminated samples were made.

  When the obtained sample was visually confirmed, the surface of the Mg-doped GaN layer was a mirror surface and transparent. However, when measurements were made on holes in the Mg-doped GaN layer, electrical measurements could not be made. This is presumably because the conductivity of the GaN layer is difficult to control by Mg doping because the crystallinity of the GaN layer is low.

[Comparative Examples 2 to 5]
In Comparative Examples 2 to 5, the gas atmosphere when laminating the Mg-doped GaN layer by the sputtering method was the composition condition shown in Table 2 below, and the operation was performed except that the total flow rate of each component gas was 30 sccm. A sample in which an Mg-doped single crystal GaN layer was laminated under the same film forming conditions as in Example 1 was prepared.

When the obtained sample was visually confirmed, the surface of the laminated GaN layer was a mirror surface and transparent. However, when hole measurement of this Mg-doped GaN layer was performed, p-type conductivity was exhibited without performing annealing treatment for activating p-type carriers, as shown in Table 2 below. The carrier concentration of all the samples was a value less than 4 × 10 ¹⁶ pieces / cm ³ . This is presumably because the crystallinity of the GaN layer is not sufficiently high.

[Example 8]
In this example, a sample of a light emitting diode (LED) as shown in FIGS. 2 and 3 was fabricated using Mg-doped p-type AlGaN laminated by sputtering. In this example, first, the laminated semiconductor 10 as shown in FIG. 1 is formed, the buffer layer 12 is sputtered, the base layer 14a is MOCVD, the n-type contact layer 14b is sputtered, the n-clad layer 14c and the light emitting layer 15 are MOCVD. The p-type semiconductor layer 16 (p-type contact layer 16b) thereon was formed by a sputtering method.

“Formation of buffer layer and underlayer”
First, using a first sputtering apparatus, a plasma pretreatment is performed on a c-plane sapphire substrate (substrate 11), and then a buffer layer 12 made of an AlN polycrystalline layer is formed using an RF sputtering method. On top of this, a base layer 14a made of GaN was formed in an MOCVD apparatus. At this time, the buffer layer 12 made of AlN and the base layer 14a made of GaN were formed on the substrate 11 in the same manner as in Example 1.

“Formation of n-type contact layer”
Next, the substrate 11 on which the base layer 14a was formed was transported into a second sputtering apparatus, and an n-type contact layer 14b made of GaN was formed using an RF sputtering method. At this time, the n-type contact layer 14b was doped with Si.

  Here, as the second sputtering apparatus used for GaN film formation, there is a mechanism that has a high-frequency power supply unit and can move the position where the magnetic field is applied by sweeping the magnet inside the square Ga target. We used what we had. At this time, a pipe for circulating the refrigerant was installed in the Ga target, and the refrigerant cooled to 20 ° C. was circulated in the pipe to prevent melting of Ga due to heat.

Next, after introducing argon and nitrogen gas into the chamber, the temperature of the substrate was raised to 1000 ° C. Then, a high-frequency bias of 2000 W was applied to the metal Ga target side, and Ar gas was circulated at a flow rate of 5 sccm and nitrogen gas at a flow rate of 15 sccm while maintaining the pressure in the furnace at 0.5 Pa (ratio of nitrogen to the total gas). 75%), an n-type contact layer 14b made of GaN was formed on the underlayer 14a. At this time, a Si target was placed in the chamber and simultaneously sputtered to take out Si into the gas phase, and the GaN crystal forming the n-type contact layer 14b was doped with Si. The growth rate at this time was approximately 1 nm / s. Then, after forming the n-type contact layer 14b made of GaN, the generation of plasma was stopped.
By the above procedure, an n-type contact layer 14b made of Si-doped GaN having an electron concentration of 1 × 10 ¹⁹ cm ⁻³ and a thickness of 2 μm was formed.

Through the steps described above, an AlN buffer layer 12 having a columnar structure is formed on a sapphire substrate (substrate 11), and an undoped GaN layer (n-type underlayer 14a) having a thickness of 2 μm is formed thereon. A 2 μm Si-doped GaN layer (n-type contact layer 14b) having a carrier concentration of 1 × 10 ¹⁹ cm ⁻³ was formed. The substrate taken out of the chamber after film formation was colorless and transparent, and the surface of the GaN layer (here, n-type contact layer 14b) was a mirror surface.

“Formation of n-type cladding layer and light-emitting layer”
On the n-type contact layer 14b of the sample produced by the above procedure, the n-type cladding layer 14c and the light emitting layer 15 were laminated using the MOCVD method.

“Formation of n-type cladding layer”
First, the substrate on which the n-type contact layer 14b made of Si-doped GaN was grown was transferred into the chamber of the MOCVD apparatus. Then, the substrate temperature was raised to 1000 ° C. with the inside of the chamber replaced with nitrogen, and the dirt adhering to the outermost surface of the n-type contact layer 14b was sublimated and removed. At this time, ammonia was circulated in the furnace when the temperature of the substrate reached 830 ° C. or higher.

Next, after the temperature of the substrate was lowered to 740 ° C., SiH ₄ gas and vapors of TMI and TEG generated by bubbling were circulated into the furnace while ammonia was circulated as it was in the chamber. And an n-type cladding layer 14c made of Si-doped In _0.1 Ga _0.9 N was formed. Then, TMI, switching the valve of the TEG and SiH _4, and stop the supply of these raw materials.

`` Formation of light emitting layer ''
Next, a light emitting layer 15 composed of a barrier layer 15a made of GaN and a well layer 15b made of In _0.2 Ga _0.8 N and having a multiple quantum well structure was formed. In forming the light emitting layer 15, a barrier layer 15a is first formed on the n-type cladding layer 14c made of Si-doped In _0.1 Ga _0.9 N, and an In _0. forming a well layer 15b composed of ₂ Ga _0.8 N. After repeating such a stacking procedure five times, a sixth barrier layer 15a is formed on the fifth stacked well layer 15b, and the barrier layers 15a are arranged on both sides of the light emitting layer 15 having a multiple quantum well structure. (See the laminated semiconductor 10 in FIG. 1).

That is, after the growth of the n-type cladding layer 14c made of Si-doped In _0.1 Ga _0.9 N is completed, the substrate temperature, the pressure in the furnace, the flow rate and the type of the carrier gas are kept as they are, and the TEG valve is switched, By supplying TEG inward, the barrier layer 15a made of GaN was grown. Thereby, the barrier layer 15a having a thickness of 150 mm was formed.

Next, after the growth of the barrier layer 15a is completed, the temperature of the substrate 11, the pressure in the furnace, the flow rate and type of the carrier gas remain unchanged, and the TEG and TMI valves are switched to supply TEG and TMI into the furnace. , it was grown the well layer 15b composed of _In 0.2 _{Ga 0.8} N. As a result, a well layer 15b having a thickness of 20 mm was formed.

  After the growth of the well layer 15b was completed, the barrier layer 15a was grown again. Then, by repeating such a procedure five times, five barrier layers 15a and five well layers 15b were formed. Further, a barrier layer 15 a is formed on the well layer 15 b that is finally stacked, thereby forming the light emitting layer 15.

“Formation of p-type semiconductor layer (p-type contact layer)”
The wafer obtained by each process described above was transferred to a third sputtering apparatus, and a p-type semiconductor layer 16 (p-type contact layer 16b) was formed.
Here, as a sputtering apparatus used for forming the p-type semiconductor layer 16, an apparatus having a high-frequency power source and having a rotary Ga target and Al target in the chamber was used. In addition, a pipe for circulating the refrigerant was installed in the Ga target, and the refrigerant cooled to 20 ° C. was circulated in the pipe to prevent melting of Ga due to heat. Moreover, the Al target used the surface area made into the ratio of about 1/10 compared with the Ga target. Thus, the composition of the AlGaN layer to be grown was adjusted to be Al _0.08 Ga _0.92 N.
The Ga target used was a solid solution of Mg, and the ratio of the weight of Mg to the weight of Ga metal was about 0.12%.

Next, after introducing argon and nitrogen gas into the chamber, the substrate temperature was raised to 1000 ° C. Next, a 2000 W high frequency bias is applied to the metal Ga target side, a 500 W high frequency bias is applied to the Al target, and while maintaining the pressure in the furnace at 0.5 Pa, nitrogen gas is 10 sccm, hydrogen gas is 10 sccm, and Ar gas is 10 sccm. P-type semiconductors made of Mg-doped AlGaN under the conditions of flowing at each flow rate (the ratio of nitrogen gas is 33%, the ratio of hydrogen gas is 33%, the balance of inert gas: Ar is 33%) Layer 16 was deposited. The growth rate at this time was approximately 1 nm / s.
Then, after forming a p-type semiconductor layer 16 made of Mg-doped AlGaN to a thickness of 0.2 μm, the generation of plasma was stopped, and the wafer was transferred out of the sputtering apparatus together with the wafer tray through the load lock chamber.

The p-type semiconductor layer 16 (p-type contact layer 16b) made of Mg-doped AlGaN obtained in the above-described process exhibits p-type without an annealing process for activating p-type carriers, and the carrier concentration is It was 1 × 10 ¹⁷ pieces / cm ³ .

The epitaxial wafer for LED produced as described above has an AlN layer (buffer layer 12) having a columnar structure on a substrate 11 made of sapphire having a c-plane as in the laminated semiconductor 10 shown in FIG. After forming, in order from the substrate 11 side, a 2 μm undoped GaN layer (underlayer 14 a), a 2 μm Si doped GaN layer (n-type contact layer 14 b) having an electron concentration of 1 × 10 ¹⁹ cm ⁻³ , 1 × 10 ¹⁸⁰ cm In _0.1 Ga _0.9 N clad layer (n-type clad layer 14c) having an electron concentration of ¹⁸ cm ⁻³ , starting from the GaN barrier layer and ending at the GaN barrier layer, the layer thickness was set to 150 mm 6 A multi-quantum well comprising a GaN barrier layer (barrier layer 15a) and five non-doped In _0.2 Ga _0.8 N well layers (well layer 15b) having a thickness of 20 mm The structure (light emitting layer 15) has a structure in which a Mg-doped Al _0.08 Ga _0.92 N layer (p-type semiconductor layer 16) having a thickness of 0.2 μm is stacked.

  In the group III nitride semiconductor according to the present invention, as described above, the p-type contact layer can also serve as the p-type cladding layer. Although an example in which only one layer of the type contact layer 16b is formed is described, as shown in FIG. 1, a p-type cladding layer 16a is formed on the light emitting layer 15, and a p-type contact layer is formed thereon. Needless to say, 16b may be formed.

"Production of LED"
Subsequently, LED was produced using the said epitaxial wafer (laminated semiconductor 10).
That is, the transparent electrode 17 made of ITO is formed on the surface of the Mg-doped AlGaN layer (p-type semiconductor layer 16b) of the epitaxial wafer by a known photolithography technique, and titanium, aluminum, and gold are sequentially formed thereon. A positive electrode bonding pad 18 (p-electrode bonding pad) having a laminated structure was formed as a p-side electrode. Further, dry etching is performed on the wafer to expose a region for forming the n-side electrode (negative electrode) of the n-type contact layer 14b, and four layers of Ni, Al, Ti, and Au are sequentially laminated on the exposed region 14d. A negative electrode 19 (n-side electrode) was formed. By such a procedure, each electrode having a shape as shown in FIG. 2 was formed on the wafer (see the laminated semiconductor 10 in FIG. 1).

And about the wafer in which each electrode of p side and n side was formed in the above-mentioned procedure, the back surface of the board | substrate 11 which consists of sapphire was ground and grind | polished, and it was set as the mirror-shaped surface. Then, this wafer was cut into a 350 μm square chip, placed on the lead frame so that each electrode was on top, and connected to the lead frame with a gold wire to form a light emitting element (lamp 3 in FIG. 4). See).
When a forward current was passed between the p-side and n-side electrodes of the light emitting diode fabricated as described above, the forward voltage at a current of 20 mA was 3.2V. Moreover, when the light emission state was observed through the p side translucent electrode 17, the light emission wavelength was 470 nm and the light emission output showed 12 mW. Such characteristics of the light-emitting diode were obtained with no variation for light-emitting diodes manufactured from almost the entire surface of the manufactured wafer.

  From the above results, it is clear that the group III nitride semiconductor according to the present invention has excellent device characteristics, and that the group III nitride semiconductor light emitting device according to the present invention has excellent light emission characteristics.

  The method for producing a group III nitride semiconductor of the present invention can produce a group III nitride semiconductor in which conductivity is controlled to be p-type by adding an acceptor impurity by a sputtering method, so that a light emitting diode (LED) or laser can be manufactured. It can be used for manufacturing various semiconductor elements such as a p-type contact layer of a diode (LD) and an electronic device such as an FET.

It is a figure which illustrates typically an example of the group III nitride semiconductor concerning the present invention, and is a schematic diagram showing the section structure of a lamination semiconductor. It is a figure which illustrates typically an example of the group III nitride semiconductor concerning the present invention, and is a schematic diagram showing the plane structure of the light emitting element constituted by the group III nitride semiconductor. It is a figure which explains typically an example of the group III nitride semiconductor concerning the present invention, and is a schematic diagram showing the section structure of the light emitting element constituted by the group III nitride semiconductor. It is the schematic explaining typically the lamp | ramp comprised using the group III nitride semiconductor light-emitting device based on this invention. It is a figure which illustrates typically an example of the manufacturing method of the group III nitride semiconductor light-emitting device based on this invention, and is the schematic which shows the structure of the sputtering device with which the target was provided in the chamber.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Group III nitride semiconductor light-emitting device, 10 ... Laminated semiconductor (Group III nitride semiconductor), 11 ... Substrate, 11a ... Surface, 12 ... Buffer layer, 14 ... N-type semiconductor layer, 15 ... Light emitting layer, 16 ... p Type semiconductor layer (group III nitride semiconductor), 16a ... p-type cladding layer, 16b ... p-type contact layer, 3 ... lamp, 40 ... sputter apparatus, 41 ... chamber, 47 ... target

Claims (9)

Manufacture of a group III nitride semiconductor comprising a sputtering step of placing a substrate and a target in a chamber and forming a single crystal group III nitride semiconductor doped with an acceptor impurity on the substrate by a reactive sputtering method A method,
In the sputtering step, the temperature of the substrate is set in a range of 600 ° C. to 1050 ° C., a metal target containing a group III metal is used as the target, and the gas atmosphere in the chamber is 20 to 80% of nitrogen atom-containing gas. , hydrogen gas _{(H 2)} is the percentage 0.2-50% by the ratio 2% or more the balance being an inert gas, the group III of the carrier concentration in the nitride semiconductor 5 × 10 ^A method for producing a group III nitride semiconductor, characterized in that the number is ¹⁶ / cm ³ or more .   2. The method for producing a group III nitride semiconductor according to claim 1, wherein the sputtering step uses a mixed target containing the III metal and an acceptor impurity as the target. 3. The III according to claim 1, wherein the nitrogen atom-containing gas present in the gas atmosphere in the chamber is nitrogen gas (N ₂ ), and the inert gas is argon gas (Ar). A method for producing a group nitride semiconductor.   The group III nitride semiconductor manufacturing method according to claim 1, wherein the acceptor impurity is magnesium (Mg).   5. The method according to claim 1, further comprising a step of forming a base layer made of a single crystal group III nitride semiconductor on the substrate before at least the sputtering step. The manufacturing method of the group III nitride semiconductor of description.   6. The method for producing a group III nitride semiconductor according to claim 5, wherein the underlayer is formed using a metal organic chemical vapor deposition method (MOCVD method). A single-crystal III comprising a semiconductor layer in which an n-type semiconductor layer, a light-emitting layer, and a p-type semiconductor layer each made of a group III nitride semiconductor are sequentially stacked, and at least a part of the p-type semiconductor layer is doped with an acceptor impurity A method for producing a group III nitride semiconductor light-emitting device comprising a group nitride semiconductor,
A method for manufacturing a group III nitride semiconductor light-emitting device, wherein at least a part of the p-type semiconductor layer is formed by the method for manufacturing a group III nitride semiconductor according to any one of claims 1 to 6. .   A group III nitride semiconductor light-emitting device obtained by the manufacturing method according to claim 7.   A lamp comprising the group III nitride semiconductor light-emitting device according to claim 8.

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