JP5178619B2 - 半導体装置用基板および半導体装置 - Google Patents
半導体装置用基板および半導体装置 Download PDFInfo
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- JP5178619B2 JP5178619B2 JP2009107907A JP2009107907A JP5178619B2 JP 5178619 B2 JP5178619 B2 JP 5178619B2 JP 2009107907 A JP2009107907 A JP 2009107907A JP 2009107907 A JP2009107907 A JP 2009107907A JP 5178619 B2 JP5178619 B2 JP 5178619B2
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- layer
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- light emitting
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3201—Structure
- H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
- H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
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- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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Description
発光モジュールは、基板1および複数の半導体装置2を含んでいる。本実施形態において、半導体装置2を発光装置として説明する。基板1は、複数の端子12を有している。複数の発光装置2は、基板1に実装されており、複数の端子12に電気的に接続されている。
22 基体
221 絶縁層
222 第1導体パターン
223 第2導体パターン
224 第3導体パターン
225 第4導体パターン
24 半導体素子
26封入層
Claims (9)
- 絶縁層と、
前記絶縁層の上に形成された半導体素子実装用の導体パターンと、を備えており、
前記導体パターンの端部と前記絶縁層との間に連続的な傾斜面を有しているとともに、前記導体パターンが、前記傾斜面の内側領域に設けられた溝部を有していることを特徴とする半導体装置用基板。 - 前記傾斜面が曲面であることを特徴とする請求項1記載の半導体装置用基板。
- 前記傾斜面が粗面化されていることを特徴とする請求項1記載の半導体装置用基板。
- 前記絶縁層がセラミック材料を含んでいることを特徴とする請求項1記載の半導体装置用基板。
- 前記導体パターンが、前記絶縁層の上に形成されたメタライズ層と、前記メタライズ層の上に形成されためっき層とを含んでいることを特徴とする請求項4記載の半導体装置用基板。
- 前記めっき層が銅を含んでいることを特徴とする請求項5記載の半導体装置用基板。
- 請求項1ないし請求項6のいずれかに記載の半導体装置用基板と、
前記導体パターンに実装された半導体素子と、
を備えた半導体装置。 - 前記半導体素子が発光ダイオードであることを特徴とする請求項7記載の半導体装置。
- 前記半導体素子が、トランジスタ素子であることを特徴とする請求項7記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009107907A JP5178619B2 (ja) | 2008-10-30 | 2009-04-27 | 半導体装置用基板および半導体装置 |
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JP2008279015 | 2008-10-30 | ||
JP2008279015 | 2008-10-30 | ||
JP2009107907A JP5178619B2 (ja) | 2008-10-30 | 2009-04-27 | 半導体装置用基板および半導体装置 |
Publications (2)
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JP2010135725A JP2010135725A (ja) | 2010-06-17 |
JP5178619B2 true JP5178619B2 (ja) | 2013-04-10 |
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JP2009107907A Expired - Fee Related JP5178619B2 (ja) | 2008-10-30 | 2009-04-27 | 半導体装置用基板および半導体装置 |
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Families Citing this family (2)
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JP6030419B2 (ja) * | 2012-11-22 | 2016-11-24 | 京セラ株式会社 | 配線基板および電子装置 |
JP6538641B2 (ja) * | 2016-12-16 | 2019-07-03 | 日本特殊陶業株式会社 | 配線基板及び配線基板の製造方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
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WO1998054761A1 (fr) * | 1997-05-26 | 1998-12-03 | Sumitomo Electric Industries, Ltd. | Substrat jonction de circuit en cuivre et procede de production de ce substrat |
JP4467171B2 (ja) * | 2000-11-30 | 2010-05-26 | 京セラ株式会社 | セラミック配線基板の製造方法 |
JP4479531B2 (ja) * | 2005-02-17 | 2010-06-09 | 日立金属株式会社 | セラミックス回路基板およびそれを用いた半導体モジュール |
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