JP5178343B2 - Built-in capacitor board - Google Patents

Description

  The present invention relates to a capacitor-embedded substrate in which a capacitor electrode is formed on an insulating substrate formed by laminating a plurality of insulating layers so as to face each other with a part of the insulating layer interposed therebetween. The present invention relates to a capacitor-embedded substrate on which capacitor electrodes facing each other with an insulating layer interposed therebetween are formed.

  Conventionally, a substrate used for mounting electronic components such as semiconductor elements and piezoelectric elements is a rectangular parallelepiped insulating substrate in which a plurality of insulating layers made of an insulating material such as an aluminum oxide sintered body are stacked vertically. It is the structure which provided the mounting part of the electronic component in the upper surface and lower surface of this.

  A wiring conductor that is electrically connected to the electronic component is formed inside or on the surface of the insulating substrate. The electrical connection between the electronic components or between the electronic component and the external electric circuit is established via the wiring conductor. The electrical connection is made.

  In a substrate on which such an electronic component is mounted, in recent years, a capacitor electrode that is vertically opposed to each other with a part of the insulating layer interposed between the insulating layers is formed. 2. Description of the Related Art Substrates with built-in capacitors that have built-in capacitors by forming a capacitive element with an insulating layer therebetween have been increasingly used. Note that the capacitor electrode is not limited to the interlayer between the insulating layers, and may be formed on the upper surface or the lower surface of the insulating substrate.

The substrate with a built-in capacitor is, for example, a metal paste (a metal powder such as tungsten, an organic solvent, a binder) on the surface of a ceramic green sheet (a material powder such as aluminum oxide formed into a sheet with an organic solvent and a binder). Are added and kneaded), and thereafter, a plurality of ceramic green sheets are laminated and fired.
Japanese Patent Laid-Open No. 2004-180035 JP 2004-356264 A JP 2004-363425 A

  However, in such a conventional capacitor-embedded substrate, there is a possibility that a positional deviation occurs between the upper and lower capacitor electrodes, and the capacitance generated between the capacitor electrodes varies. For example, when laminating ceramic green sheets, there is a possibility that problems such as misalignment of the lamination positions of the ceramic green sheets may occur. In such a case, the outer edge portion of one of the capacitive electrodes is the other of the capacitive electrodes. The outer peripheral portion of the capacitor electrode and the insulating layer are arranged in between so that they do not face each other, and the area where the capacitor electrodes face each other may change. As the area where the capacitive electrodes face each other is changed, there is a problem that the capacitance generated between the capacitive electrodes varies with respect to a predetermined value.

  The present invention has been devised in view of such conventional problems, and an object thereof is to interpose a part of the insulating layer between a plurality of insulating layers constituting the insulating substrate or between the upper and lower surfaces of the insulating substrate. It is an object of the present invention to provide a capacitor-embedded substrate in which the capacitance variation generated between the capacitor electrodes is effectively suppressed in the capacitor-embedded substrate in which the capacitor electrodes arranged in opposition to each other are formed.

A capacitor-embedded substrate of the present invention is a substrate with a built-in capacitor in which a plurality of insulating layers are stacked, and a capacitor electrode is formed with a portion of the insulating layer interposed therebetween and facing vertically. The capacitor electrodes are opposed to each other with two or more insulating layers interposed therebetween, and an outer edge portion of the capacitor electrodes in a plan view between the insulating layers positioned between the capacitor electrodes facing each other. and the ground conductor layer is formed to overlap, in which the potential of the capacitor electrodes facing each other is characterized Rukoto different from each other.

According to the substrate with a built-in capacitor according to the present invention, two or more insulating layers are opposed to each other, and have capacitive electrodes having different potentials, and the insulating layer positioned between the opposed capacitive electrodes is arranged. Since the ground conductor layer is formed between the layers so as to overlap with the outer edge portion of the capacitor electrode in plan view, the outer edge portion of the capacitor electrode is blocked by the ground conductor layer and does not generate capacitance. Therefore, the electrostatic capacitance generated between the opposing capacitive electrodes is an electrostatic capacitance according to the area of the opposing portion inside the portion overlapping the ground conductor layer in plan view. In addition, even if a displacement occurs between the insulating layers and the facing area changes at the outer edge portion of the capacitive electrode, a portion of the capacitive electrode that is actually opposed to each other with an insulating layer interposed therebetween to generate capacitance The change of the area is suppressed.

  The ground conductor layer has a frame shape such as a quadrangular frame shape that overlaps the outer edge portion of the rectangular capacitor electrode, for example, and is the same printing plate making layer between the same insulating layers, that is, on the surface of the same ceramic green sheet. Can be used. Therefore, the ground conductor layer itself is not affected by the laminating deviation of the insulating layer, and for example, it is easy to control the area of the opening inside the frame shape to a predetermined value.

  Therefore, even if a positional deviation occurs when the ceramic green sheets serving as the insulating layers are stacked, the opposing area between the pair of capacitor electrodes is equal to the ground conductor layer (for example, frame-shaped) that overlaps the outer edge portion of the capacitor electrode in plan view. The predetermined value can be set according to the area of the opening inside the ground conductor layer. In addition, it is possible to provide a substrate with a built-in capacitor in which the influence of misalignment of the insulating layer is suppressed, and the capacitance generated between the capacitor electrodes is effectively suppressed from varying from a predetermined value.

  A substrate with a built-in capacitor according to the present invention will be described with reference to the accompanying drawings.

  FIG. 1 is a sectional view showing an example of an embodiment of a capacitor built-in substrate according to the present invention, and FIG. 2 is an exploded perspective view showing a main part of the capacitor built-in substrate shown in FIG. 1 and 2, reference numeral 1 denotes an insulating substrate formed by laminating a plurality of insulating layers 11, 2a and 2b are capacitive electrodes, and 3 is a ground conductor layer. The insulating substrate 1, the capacitor electrodes 2a and 2b, and the ground conductor layer 3 basically constitute a capacitor built-in substrate 9.

  The insulating layer 11 is formed of an insulating material such as a ceramic material such as an aluminum oxide sintered body, a glass ceramic sintered body, or an aluminum nitride sintered body. A plurality of insulating layers 11 are laminated to constitute an insulating substrate 1. In the example of this embodiment, the number of laminated insulating layers 11 is five. However, the number of the insulating layers 11 is not limited to this, and can be set as appropriate according to the use of the capacitor-embedded substrate 9 and the required functions.

  The insulating substrate 1 functions as a substrate for mounting an electronic component 4 such as a semiconductor element or a piezoelectric element. The insulating substrate 1 also functions as a dielectric for generating a capacitance between the capacitive electrodes 2a and 2b. In the example of this embodiment, a mounting portion (no symbol) for mounting the electronic component 4 is provided on the upper surface of the insulating substrate 1, and the electronic component 4 is mounted on this mounting portion.

  For example, when the plurality of insulating layers 11 are made of an aluminum oxide sintered body, the insulating layer 11 and the insulating substrate 1 are formed by forming a raw material powder such as alumina into a sheet shape together with an organic solvent and a binder. Producing multiple green sheets, stamping these green sheets into appropriate square shapes, etc., then stacking the formed green sheets and firing at about 1300-1600 ° C It is manufactured by.

  The electronic component 4 mounted on the mounting portion is electrically connected to another electronic component (not shown) via, for example, a wiring conductor (not shown) formed on the surface of the insulating substrate 1 or inside, It can be electrically connected to an external electric circuit. Examples of the electronic component 4 include semiconductor elements such as semiconductor integrated circuit elements, piezoelectric elements such as crystal resonators and surface acoustic wave elements, and sensor elements.

  For example, a wiring conductor is formed from the mounting portion on the upper surface of the insulating substrate 1 to the lower surface, and an electrode (not shown) of the electronic component 4 is electrically connected to a portion of the wiring conductor formed on the mounting portion, By electrically connecting the portion formed on the lower surface of the insulating substrate 1 to an external electric circuit, the electrode of the electronic component 4 and the external electric circuit are electrically connected via the wiring conductor. Note that the wiring conductor in this case includes a portion formed as a through conductor that penetrates the insulating layer 11 in the thickness direction.

  The electrical connection between the wiring conductor and the electrode of the electronic component 4 or an external electric circuit is performed via a conductive connecting material (not shown) such as a bonding wire, solder, or conductive adhesive.

  In addition, capacitive electrodes 2a and 2b are formed on the insulating substrate 1 so as to face each other with two or more insulating layers 11 interposed therebetween. In the example of this embodiment, the capacitor electrodes 2a and 2b are formed between the insulating layers 11 (not indicated), but one or both of the capacitor electrodes 2a and 2b are formed on the upper and lower surfaces of the insulating substrate 1. It may be formed.

  Capacitance electrodes 2a and 2b have an area facing each other with a portion of insulating layer 11 functioning as a dielectric interposed therebetween, and the thickness and dielectric constant of insulating layer 11 disposed between the facing portions. Depending on the, capacitance is generated. In this case, the insulating layer 11 disposed between the capacitive electrodes 2a and 2b functions as a dielectric in a so-called parallel plate capacitor.

  In order to obtain a larger electrostatic capacity, it is desirable that the capacitive electrodes 2a and 2b have as large a facing area as possible. Therefore, for example, as in the example shown in FIG. 1, the insulating layer 11 is formed in a square shape with a large area at the center between the layers.

  For example, the capacitance generated between the capacitive electrodes 2a and 2b stabilizes the potential supplied to the semiconductor element mounted as the electronic component 4 on the mounting portion, and the power supply to the electronic component 4 such as a piezoelectric element. Supply etc. are performed.

  The electrical connection between the capacitive electrodes 2a, 2b and the electronic component 4 is performed, for example, via a wiring conductor. In this case, for example, a wiring conductor is formed so that one end is connected to the capacitive electrode 2a (or the capacitive electrode 2b) and the other end is exposed to the mounting portion, and the electrode of the electronic component 4 is bonded to the other end of the wiring conductor. The capacitor electrode 2a (or the capacitor electrode 2b) and the electronic component 4 are electrically connected by being electrically connected via a wire, solder, or the like.

  The capacitive electrodes 2a and 2b are, for example, rectangular shapes having the same shape and dimensions, and the area, the number of insulating layers 11 disposed between them, and the like are generated between the capacitive electrodes 2a and 2b. It is appropriately set according to the size of the capacitance to be performed, the relative dielectric constant of the insulating layer 11, and the like.

  For example, in the capacitor built-in substrate 9 on which a semiconductor element (IC) is mounted as the electronic component 4, if the insulating layer 11 is made of an aluminum oxide sintered body (relative dielectric constant is about 10), the capacitor electrodes 2a and 2b Is formed in a quadrangular shape having a side length of about 0.5 mm to 1.0 mm. In this case, the capacitance generated between the capacitive electrodes 2a and 2b is about 1 to 4 pF.

  Further, if the insulating layer 11 is made of a glass ceramic sintered body (about 5 to 6 or the like) having a lower relative dielectric constant, in order to obtain the same capacitance, the insulation of the capacitive electrodes 2a and 2b. The area facing each other with the layer 11 interposed therebetween is increased, or the thickness of the insulating layer 11 interposed between the capacitor electrodes 2a and 2b is reduced.

  Further, the capacitance electrodes 2a and 2b are not limited to a rectangular shape (square shape) as shown in FIG. 1 and FIG. 2, but a square shape, a long and narrow rectangular shape, a circular shape, an elliptical shape, or a combination thereof. But you can. The capacitive electrodes 2a and 2b have, for example, a quadrangular shape, and there are irregularities in a part of the sides, or portions that are not formed to ensure electrical insulation between the wiring conductors described above. You may have.

  In addition, it is necessary to form the grounding conductor layer 3 which overlaps each outer edge part by planar view between capacitive electrode 2a, 2b between both, and this grounding conductor layer 3 is formed between the layers of the insulating layer 11 Therefore, two or more insulating layers 11 are arranged to face each other.

  Further, in this capacitor-embedded substrate 9, between the insulating layers 11 located between the opposing capacitor electrodes 2a and 2b, for example, as shown in FIG. 3, the outer edge portions of the capacitor electrodes 2a and 2b are seen in a plan view. An overlapping ground conductor layer 3 is formed. The ground conductor layer 3 is for suppressing the generation of capacitance between the capacitive electrodes 2a and 2b in the outer edge portion by overlapping with the outer edge portions of the pair of opposing capacitive electrodes 2a and 2b in plan view. It is. FIG. 3 is a plan view showing a main part of the capacitor built-in substrate 9 shown in FIGS. In FIG. 3, the same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals.

  This is because, when a stacking position shift occurs between the two insulating layers 11 on which the capacitive electrodes 2a and 2b are formed, portions that do not face each other at the outer edge portions of the capacitive electrodes 2a and 2b are generated. This is because the areas where the capacitive electrodes 2a and 2b face each other change in response to this, and the capacitance varies with a predetermined value.

  That is, according to the substrate 9 with a built-in capacitor, since the ground conductor layer 3 is provided, the outer edge portions of the capacitor electrodes 2a and 2b are blocked by the ground conductor layer 3 and no capacitance is generated. Therefore, the electrostatic capacitance generated between the opposing capacitive electrodes 2a and 2b becomes an electrostatic capacitance according to the area of the opposing portion inside the portion overlapping the ground conductor layer 3 in plan view. Further, even if a displacement occurs between the insulating layers 11 and the opposing areas change in the outer edge portions of the capacitive electrodes 2a and 2b, the insulating layer 11 is actually disposed between the capacitive electrodes 2a and 2b. It is suppressed that the area of the part which opposes and produces an electrostatic capacitance changes.

  The ground conductor layer 3 has a frame shape such as a quadrangular frame shape that overlaps the outer edge portions of the square-shaped capacitive electrodes 2a and 2b, for example, between the same insulating layers 11, that is, on the surface of the same ceramic green sheet. It can be formed using the same printing plate making. Therefore, it is effectively suppressed that the ground conductor layer 3 itself is affected by the misalignment or the like of the insulating layer 11, and for example, it is easy to control the area of the inner opening of the frame shape to a predetermined value. .

  Therefore, even if a displacement occurs when the ceramic green sheets to be the insulating layer 11 are laminated, the opposing area between the pair of capacitor electrodes 2a and 2b is overlapped with the outer edge portion of the capacitor electrodes 2a and 2b in plan view. It can be controlled by the conductor layer 3 (for example, the area of the opening inside the frame-like ground conductor layer 3). Therefore, it is possible to provide a substrate 9 with a built-in capacitor in which the influence of the misalignment of the insulating layer 11 is suppressed and the capacitance generated between the capacitor electrodes 2a and 2b is effectively suppressed from varying from a predetermined value. it can.

  The width W of the ground conductor layer 3 overlapping the outer edge portions of the capacitive electrodes 2a and 2b in plan view is appropriately set according to conditions such as the outer dimensions and thickness of the insulating layer 11 (thickness of the laminated ceramic green sheets). do it. These conditions may affect the size of misalignment when the ceramic green sheets are stacked.

  If the width W is too large, the proportion of the capacitance electrodes 2a and 2b that actually generate capacitance decreases, which may hinder downsizing the planar area of the capacitor-embedded substrate 9. There is sex. For example, when the external dimensions of the capacitive electrodes 2a and 2b are a square shape of about 0.5 mm, if the overlapping width W of the ground conductor layer 3 is increased by 0.01 mm on each side, the capacitive electrode 2a is secured in order to ensure capacitance. , 2b needs to be lengthened by 0.02 mm (about 4%), and the size of the insulating substrate 1 may need to be increased accordingly.

  For example, if the insulating layer 11 is made of an aluminum oxide sintered body, the thickness is about 0.2 to 1.0 mm, the outer dimension is about 2.0 to 25 mm, and the number of layers is about 5 to 20 layers. The width W of the ground conductor layer 3 that overlaps the capacitive electrodes 2a, 2b in plan view may be set to about 0.01 to 0.04 mm.

  The ground conductor layer 3 needs to have a shape and dimensions that overlap with the outer edge portions of the capacitive electrodes 2a and 2b in plan view. For example, if the capacitive electrodes 2a and 2b are rectangular as described above, the outer edges thereof It is formed in a square frame pattern that overlaps the part.

  Further, if the capacitive electrodes 2a and 2b are, for example, a combination of two rectangular patterns as shown in FIG. 4 (so-called “L” shape or the like), the ground conductor layer 3 has an opening portion “ It is formed in a frame shape such as an “L” shape. FIG. 4 is an exploded perspective view showing an essential part of another example of the embodiment of the capacitor-embedded substrate 9 according to the present invention for each insulating layer 11. 4, parts similar to those in FIGS. 1 and 2 are denoted by the same reference numerals.

  Such “L” -shaped capacitor electrodes 2a and 2b need to secure a space for forming other conductors such as a wiring conductor between the insulating layers 11 on which the capacitor electrodes 2a and 2b are formed. Used when there is.

  Further, for example, as shown in FIG. 5, when the capacitive electrodes 2a and 2b are rectangular, the upper and lower insulating layers 11 are shifted so as to rotate with each other, so as to correspond to a case where a so-called θ shift occurs. The width of the ground conductor layer 3 may be changed. That is, the ground conductor layer 3 has a larger width than the other portions (side portions) in the portions close to the corners of the rectangular capacitor electrodes 2a and 2b, which have a large positional shift amount due to θ shift, and the capacitor electrodes 2a and 2b. It may be made to overlap. FIG. 5 is a plan view showing a main part of another example of the embodiment of the capacitor built-in substrate 9 of the present invention. 5, parts similar to those in FIGS. 1 and 2 are denoted by the same reference numerals.

  Further, in the example shown in FIG. 5, the width of the rectangular frame-shaped ground conductor layer 3 is made wider toward the portion closer to the corner of the ground conductor layer 3. In this way, the ground conductor layer 3 is connected to the capacitance electrodes 2a and 2b in plan view in response to the θ deviation, in which the amount of positional deviation tends to increase as the corners of the rectangular capacitance electrodes 2a and 2b are closer. It is effective in overlapping the outer edge portion. In addition, since it is not necessary to set the overlapping width of the outer edge portion and the ground conductor layer 3 over the entire circumference of the capacitor electrodes 2a and 2b, it is easy to reduce the size of the insulating substrate 1 (capacitor built-in substrate 9). It is.

  In the example of this embodiment, the ground conductor layer 3 is formed to extend outward (with a width wider than the width W) from a portion overlapping the outer edge portions of the capacitive electrodes 2a and 2b in plan view. Show. In such a case, since the width of the ground conductor layer 3 itself is wider than the width W of the outer edge portions of the capacitive electrodes 2a and 2b that need to overlap the ground conductor layer 3 in plan view, The ground conductor layer 3 can be overlapped with the outer edge portions of the capacitive electrodes 2a and 2b in plan view.

  The above wiring conductors, capacitive electrodes 2a and 2b, and ground conductor layer 3 are made of a metal material such as tungsten, molybdenum, manganese, copper, silver, palladium, or gold. These metal materials are formed on the insulating substrate 1 as, for example, a metallized layer formed by simultaneous firing with the insulating substrate 1.

  If the wiring conductor, the capacitive electrodes 2a, 2b and the ground conductor layer 3 are made of, for example, a tungsten metallized layer, a metal paste prepared by kneading tungsten powder with an organic solvent and a binder is used to insulate the insulating substrate 1. It can be formed by printing a predetermined pattern on a ceramic green sheet (not shown) to be the layer 11 by a screen printing method and simultaneously firing with the insulating substrate 1 (laminated body of ceramic green sheets).

  The through conductor as a part of the wiring conductor forms a through-hole penetrating the ceramic green sheet in the thickness direction by applying mechanical processing using a metal pin or laser processing to the ceramic green sheet. It can be formed by filling the through hole with a metal paste. The step of forming the through hole in the ceramic green sheet may be performed before or after the ceramic green sheets are laminated.

  Note that the ground conductor layer 3 formed between the capacitor electrodes 2a and 2b effectively produces an electrostatic capacitance at the outer edge portion of the capacitor electrodes 2a and 2b (the portion overlapping the ground conductor layer 3 in plan view). Grounded to suppress. That is, when a conductor layer (not shown) is simply placed between the capacitor electrodes 2a and 2b so as to overlap the outer edge portions of the capacitor electrodes 2a and 2b in plan view, This conductor layer itself becomes one of the capacitance electrodes, and unnecessary capacitance may occur between the capacitance electrodes 2a and 2b, the wiring conductor, and the like. For this reason, the conductor layer disposed between the capacitive electrodes 2a and 2b so as to overlap the outer edge portions of the capacitive electrodes 2a and 2b in plan view needs to be grounded (grounded conductor layer 3).

  For grounding of the ground conductor layer 3, for example, a wiring conductor is formed from the outer surface such as the lower surface or the side surface of the insulating substrate 1 to the ground conductor layer 3, and a portion of the wiring conductor formed on the outer surface of the insulating substrate 1 is externally connected. This can be done by electrically connecting to a ground terminal (not shown) of the electric circuit.

  Such a built-in capacitor substrate 9 has, for example, an electronic component 4 mounted on the upper surface of the insulating substrate 1 and a semiconductor element mounted thereon, and the electrode of the semiconductor element is electrically connected to the wiring conductor, so that a mobile phone, a computer, The semiconductor device is used as a component in various electronic devices such as a digital camera. Then, power corresponding to the electrostatic capacity is stably supplied to the semiconductor element from the capacitive electrodes 2a and 2b electrically connected to the semiconductor element via the wiring conductor, and various kinds of electronic information are processed.

  Note that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. For example, a plurality of capacitive electrodes 2 a and 2 b may be formed on the insulating substrate 1 (interlayer of the insulating layer 11), and a plurality of capacitive elements may be built in the insulating substrate 1.

  In addition, at least one of the capacitive electrodes 2a and 2b is formed on the upper and lower surfaces of the insulating substrate 1, and the exposed surfaces of the capacitive electrodes 2a and 2b formed on the upper and lower surfaces of the insulating substrate 1 are nickel plating layers or the like. It may be covered with a plating layer.

  Further, the ground conductor layer 3 may have a wide area covering almost the entire surface of the insulating layer 11 except for a range in which the capacitance electrodes 2a and 2b are opposed to generate capacitance. In this case, since the area of the ground conductor layer 3 is large and it is easier to keep the resistance low, it is effective in stabilizing the ground potential.

It is sectional drawing which shows an example of embodiment of the board | substrate with a built-in capacity | capacitance of this invention. It is a disassembled perspective view which shows the principal part of the capacity | capacitance built-in board | substrate shown in FIG. It is a top view which shows the principal part of the board | substrate with a built-in capacity | capacitance shown in FIG. It is a disassembled perspective view which shows the principal part of the other example of embodiment of the board | substrate with a built-in capacity | capacitance of this invention. It is a top view which shows the principal part of the other example of embodiment of the board | substrate with a built-in capacity | capacitance of this invention.

Explanation of symbols

1. Insulating substrate
11 .... Insulating layer 2a, 2b ... Capacitance electrode 3 ... Grounding conductor layer 4 ... Electronic component 9 ... Capacitor built-in substrate

Claims (1)

A capacitor-embedded substrate in which a capacitor electrode is formed on an insulating substrate formed by laminating a plurality of insulating layers, and a portion of the insulating layer is interposed between the capacitor electrodes, and the capacitor electrodes are vertically opposed to each other. A grounding conductor layer that overlaps with the outer edge portion of the capacitive electrode in a plan view is formed between the insulating layers located between the opposing capacitive electrodes. and, capacitor built-in substrate potential of the capacitor electrodes facing each other is characterized Rukoto different from each other.

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