JP5137840B2 - スイッチ装置および試験装置 - Google Patents
スイッチ装置および試験装置 Download PDFInfo
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 229910052710 silicon Inorganic materials 0.000 description 7
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- H01L29/42328—Gate electrodes for transistors with a floating gate with at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate
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Description
1. 特願2006−253846 出願日 2006年9月20日
Claims (7)
- 第1端子と第2端子との間を電気的に接続または切断するスイッチ装置であって、
半導体層と、
前記半導体層に形成され、前記第1端子に接続されたドレイン電極と、
前記半導体層に形成され、前記第2端子に接続されたソース電極と、
前記ドレイン電極と前記ソース電極との間における前記半導体層上に形成されたゲート絶縁膜と、
前記ゲート絶縁膜上に形成され、内部に電荷を保持するフローティングゲートと、
前記フローティングゲート上における互いに異なる領域に形成され、それぞれの前記フローティングゲート上における面積が前記フローティングゲートの前記半導体層上における面積よりも小さく、印加された駆動電圧に応じてトンネル電流を流して前記フローティングゲートを充電または放電する複数のトンネルゲートと
前記駆動電圧を制御することにより前記複数のトンネルゲートの少なくとも一つに前記フローティングゲートを充電または放電させて、前記ドレイン電極と前記ソース電極との間をオンまたはオフする駆動部と、
前記複数のトンネルゲートのうち少なくとも一つのトンネルゲートを選択する選択部と、
選択された前記トンネルゲートに前記駆動部から出力された前記駆動電圧を供給する供給部と、
それぞれの前記トンネルゲートを選択した場合における前記第1端子と前記第2端子との間の接続および切断特性を診断する診断部と、
を備え、
前記選択部は、前記診断部による診断結果に応じて前記トンネルゲートを選択する
スイッチ装置。 - 第1端子と第2端子との間を電気的に接続または切断するスイッチ装置であって、
半導体層と、
前記半導体層に形成され、前記第1端子に接続されたドレイン電極と、
前記半導体層に形成され、前記第2端子に接続されたソース電極と、
前記ドレイン電極と前記ソース電極との間における前記半導体層上に形成されたゲート絶縁膜と、
前記ゲート絶縁膜上に形成され、内部に電荷を保持するフローティングゲートと、
前記フローティングゲート上における互いに異なる領域に形成され、それぞれの前記フローティングゲート上における面積が前記フローティングゲートの前記半導体層上における面積よりも小さく、印加された駆動電圧に応じてトンネル電流を流して前記フローティングゲートを充電または放電する複数のトンネルゲートと、
前記駆動電圧を制御することにより前記複数のトンネルゲートの少なくとも一つに前記フローティングゲートを充電または放電させて、前記ドレイン電極と前記ソース電極との間をオンまたはオフする駆動部と、
前記複数のトンネルゲートのうち少なくとも一つのトンネルゲートを選択する選択部と、
選択された前記トンネルゲートに前記駆動部から出力された前記駆動電圧を供給する供給部と、
第1の前記トンネルゲートを選択した場合における前記第1端子と前記第2端子との間の接続および切断特性を診断する診断部と、
を備え、
前記選択部は、前記第1のトンネルゲートを選択した場合における前記診断部による診断結果が不良の場合、第2の前記トンネルゲートを選択する
スイッチ装置。 - 前記半導体層内に形成され、前記ドレイン電極、前記ソース電極および前記ドレイン電極と前記ソース電極との間のチャネルを少なくとも含む領域を、他の領域から絶縁するチャネル間絶縁部を更に備える
請求項1または2に記載のスイッチ装置。 - 前記チャネル間絶縁部は、半導体基板上に形成された絶縁層上に形成された請求項3に記載のスイッチ装置。
- 前記半導体層上に形成された少なくとも1つの配線層に形成され、信号を伝送する第1伝送線路および第2伝送線路と、
前記配線層の間および前記配線層と前記半導体層との間を絶縁する層間絶縁膜と
を更に備え、
前記第1端子は、前記第1伝送線路の一端と接続し、
前記第2端子は、前記第2伝送線路の一端と接続する
請求項1または2に記載のスイッチ装置。 - 前記第1伝送線路および前記第2伝送線路は、マイクロストリップラインである
請求項5に記載のスイッチ装置。 - 被試験デバイスを試験する試験装置であって、
試験信号を生成する試験信号生成部と、
前記試験信号を前記被試験デバイスに供給するドライバと、
前記被試験デバイスから出力された出力信号を検出するコンパレータと、
前記コンパレータにより検出された出力信号を判定する判定部と、
前記ドライバの出力端または前記コンパレータの入力端の少なくとも一方および前記被試験デバイスの入出力端を第1端子および第2端子とした場合における、前記第1端子と前記第2端子との間を電気的に接続または切断する、請求項1から6の何れか1項に記載のスイッチ装置と
を備える試験装置。
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JP2008535293A JP5137840B2 (ja) | 2006-09-20 | 2007-08-22 | スイッチ装置および試験装置 |
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JP2006253846 | 2006-09-20 | ||
JP2006253846 | 2006-09-20 | ||
JP2008535293A JP5137840B2 (ja) | 2006-09-20 | 2007-08-22 | スイッチ装置および試験装置 |
PCT/JP2007/066267 WO2008035532A1 (en) | 2006-09-20 | 2007-08-22 | Switching device and testing apparatus |
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JPWO2008035532A1 JPWO2008035532A1 (ja) | 2010-01-28 |
JP5137840B2 true JP5137840B2 (ja) | 2013-02-06 |
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US (2) | US8058648B2 (ja) |
JP (1) | JP5137840B2 (ja) |
KR (1) | KR101107988B1 (ja) |
TW (1) | TW200817693A (ja) |
WO (1) | WO2008035532A1 (ja) |
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KR20110042188A (ko) * | 2008-10-24 | 2011-04-25 | 가부시키가이샤 어드밴티스트 | 전자 디바이스 및 제조 방법 |
JP2012013446A (ja) * | 2010-06-29 | 2012-01-19 | Advantest Corp | ピンエレクトロニクス回路およびそれを用いた試験装置 |
CN103064773A (zh) | 2011-10-24 | 2013-04-24 | 鸿富锦精密工业(深圳)有限公司 | 测试负载卡 |
US9912448B2 (en) * | 2012-02-13 | 2018-03-06 | Sentinel Connector Systems, Inc. | Testing apparatus for a high speed communications jack and methods of operating the same |
US9466731B2 (en) | 2014-08-12 | 2016-10-11 | Empire Technology Development Llc | Dual channel memory |
EP3200033B1 (de) * | 2016-01-29 | 2019-07-10 | Siemens Aktiengesellschaft | Anordnung mit zumindest zwei peripherie-einheiten und mit einem sensor |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63184367A (ja) * | 1987-01-26 | 1988-07-29 | Nec Corp | Mos型不揮発性半導体記憶装置 |
JPH03208409A (ja) * | 1990-01-10 | 1991-09-11 | Sharp Corp | 自己保持型半導体装置及び自己保持型半導体リレー装置 |
JPH09237307A (ja) * | 1996-11-18 | 1997-09-09 | Sunao Shibata | 半導体装置 |
JP2004094922A (ja) * | 2002-07-08 | 2004-03-25 | Toshiba Corp | 有効期限付き機能利用装置 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10294488A (ja) | 1997-04-21 | 1998-11-04 | Nec Corp | 半導体装置 |
US20020113268A1 (en) * | 2000-02-01 | 2002-08-22 | Jun Koyama | Nonvolatile memory, semiconductor device and method of manufacturing the same |
JP2004185896A (ja) | 2002-12-02 | 2004-07-02 | Hitachi Ltd | 高周波対応リードリレー |
JP4489366B2 (ja) * | 2003-03-17 | 2010-06-23 | 株式会社日立製作所 | 半導体装置 |
-
2007
- 2007-08-22 US US12/442,500 patent/US8058648B2/en not_active Expired - Fee Related
- 2007-08-22 WO PCT/JP2007/066267 patent/WO2008035532A1/ja active Application Filing
- 2007-08-22 KR KR1020097007697A patent/KR101107988B1/ko not_active IP Right Cessation
- 2007-08-22 JP JP2008535293A patent/JP5137840B2/ja not_active Expired - Fee Related
- 2007-09-19 TW TW096134856A patent/TW200817693A/zh unknown
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2011
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63184367A (ja) * | 1987-01-26 | 1988-07-29 | Nec Corp | Mos型不揮発性半導体記憶装置 |
JPH03208409A (ja) * | 1990-01-10 | 1991-09-11 | Sharp Corp | 自己保持型半導体装置及び自己保持型半導体リレー装置 |
JPH09237307A (ja) * | 1996-11-18 | 1997-09-09 | Sunao Shibata | 半導体装置 |
JP2004094922A (ja) * | 2002-07-08 | 2004-03-25 | Toshiba Corp | 有効期限付き機能利用装置 |
Also Published As
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KR20090073162A (ko) | 2009-07-02 |
US8362544B2 (en) | 2013-01-29 |
WO2008035532A1 (en) | 2008-03-27 |
JPWO2008035532A1 (ja) | 2010-01-28 |
US8058648B2 (en) | 2011-11-15 |
KR101107988B1 (ko) | 2012-01-25 |
US20110309427A1 (en) | 2011-12-22 |
TW200817693A (en) | 2008-04-16 |
US20090302317A1 (en) | 2009-12-10 |
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