JP5124250B2 - Image display device - Google Patents

Description

  The present invention relates to an image display device.

  Conventionally, an image display device including an organic EL (Electroluminescence) element using electroluminescence has been known. In this image display apparatus, a large number of circuits (pixel circuits) that constitute a pixel including an organic EL element are arranged.

  As for this pixel circuit, a device in which the cathode electrode of the organic EL element is electrically connected to a power supply without passing through an electronic circuit such as a transistor has been proposed (for example, Patent Documents 1 and 2). In the pixel circuits proposed in Patent Documents 1 and 2, a gate electrode and a source electrode of a driving transistor (driving transistor) for adjusting a current flowing in an organic EL element are electrically connected via a capacitor. .

  However, for the drive transistor, the gate voltage (potential difference between the gate electrode and the source electrode) Vgs at which current begins to flow between the drain electrode and the source electrode tends to vary among a plurality of pixels, and image display The image displayed on the apparatus is uneven. Therefore, before applying the potential Vd corresponding to the image signal to the gate electrode for all the pixel circuits, the gate voltage Vgs is set to a voltage (threshold voltage) at which current starts to flow between the drain electrode and the source electrode of the driving transistor. It is desirable to adjust to Vth. That is, it is desirable that Vgs = Vth + Vd when the organic EL element emits light.

U.S. Pat. No. 7,071,932 JP 2004-295131 A

  However, in the pixel circuit proposed in Patent Document 1, even if the gate voltage Vgs = Vth is adjusted before applying the potential corresponding to the image signal, the potential corresponding to the image signal is applied to the gate electrode. At the moment, the current can flow between the drain electrode and the source electrode of the driving transistor, and the charge is lost from the capacitor provided between the gate electrode and the source electrode. That is, since the effect adjusted to Vgs = Vth is lost, Vgs = Vth + Vd is not satisfied when the organic EL element emits light.

  Therefore, it is conceivable to provide a switching transistor that is connected in series to the organic EL element and the driving transistor and controls application of a power supply voltage to the organic EL element and the driving transistor. However, if two transistors are provided in series on a wiring for applying a large power supply voltage for light emission to the organic EL element, the power of the pixel circuit is increased due to the increase in size of the pixel circuit and the electrical resistance due to the two transistors. Use efficiency will be reduced.

  Further, in the pixel circuit proposed in Patent Document 2, a switching transistor is directly connected to the gate electrode of the driving transistor, so that the potential applied to the gate electrode of the driving transistor is fluid. There is a risk of becoming. That is, when the organic EL element is caused to emit light, it is likely to deviate from the relationship of Vgs = Vth + Vd.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide an image display device that can suppress the occurrence of unevenness in an image without causing an increase in the size of a pixel circuit and a decrease in power use efficiency as much as possible. And

  In order to solve the above problems, the invention of claim 1 includes a light emitting element and first, second, and third electrodes, and the amount of current between the first electrode and the second electrode is set as follows: A first transistor that is adjusted by a potential applied to the third electrode; and fourth, fifth, and sixth electrodes; and a current amount between the fourth electrode and the fifth electrode A second transistor that is adjusted by a potential applied to the electrode; and seventh, eighth, and ninth electrodes, and a current amount between the seventh electrode and the eighth electrode is applied to the ninth electrode. A first transistor having tenth and eleventh electrodes to be adjusted according to the potential to be applied, and configured to obtain an electric capacity between the tenth electrode and the eleventh electrode; and the light emission When the element emits light, a first potential is applied to one electrode of the light emitting element. A second applying unit that applies a second potential that is relatively lower than the first potential to the other electrode different from the one electrode of the light emitting device when the light emitting device emits light. An application part, wherein the first electrode is electrically connected to the first application part and the seventh electrode, and the second electrode is electrically connected to the one electrode. The amount of current between the first electrode and the second electrode is adjusted to control the amount of current in the light emitting element, and the third electrode is in relation to the eighth and tenth electrodes. Electrically connected, the fourth electrode is electrically connected to the eleventh electrode, the fifth electrode is electrically connected to the second electrode and the one electrode, and 7 electrodes are electrically connected to the first application portion, and the eighth electrode , Characterized in that it is electrically connected to the tenth electrode.

  The invention according to claim 2 is the image display device according to claim 1, further comprising twelfth, thirteenth, and fourteenth electrodes, and a current amount between the twelfth electrode and the thirteenth electrode. Having a fourth transistor that adjusts the voltage according to the potential applied to the fourteenth electrode, and fifteenth and sixteenth electrodes, and is configured to obtain an electric capacity between the fifteenth electrode and the sixteenth electrode. A second capacitor and an image signal line to which a potential corresponding to a pixel data signal is supplied, wherein the twelfth electrode is electrically connected to the image signal line, and the thirteenth electrode is Electrically connected to the fourth, eleventh and fifteenth electrodes, the fifteenth electrode is electrically connected to the fourth and eleventh electrodes, and the sixteenth electrode is the one electrode , Being electrically connected to the second and fifth electrodes. And butterflies.

  The invention according to claim 3 is the image display device according to claim 1, further comprising twelfth, thirteenth, and fourteenth electrodes, and a current amount between the twelfth electrode and the thirteenth electrode. Having a fourth transistor that adjusts the voltage according to the potential applied to the fourteenth electrode, and fifteenth and sixteenth electrodes, and is configured to obtain an electric capacity between the fifteenth electrode and the sixteenth electrode. A second capacitor and an image signal line to which a potential corresponding to a pixel data signal is supplied, wherein the twelfth electrode is electrically connected to the image signal line, and the thirteenth electrode is The fifteenth electrode is electrically connected, and the sixteenth electrode is electrically connected to the fourth and eleventh electrodes.

<Terminology>
In this specification, the term “electrically connected” means that one member and the other member are always connected in a conductive manner via a wiring or the like, and one member and the other member However, it is used in the meaning including not only the wiring etc. which have electroconductivity but the aspect indirectly connected by the other member. In other words, the term “electrically connected” means that one member and the other member are connected to each other depending on the state of other members (for example, a conductive state in which a current can flow between the source and the drain of the transistor). Is used in the meaning including a mode in which the wiring is conductively connected by wiring and other members.

  The “gate voltage” in this specification refers to a potential difference between a source and a gate with respect to the potential of the source with respect to the transistor.

  The “transistor threshold voltage” in this specification refers to a gate voltage that becomes a boundary when a transistor changes from an off state (a state in which a drain current does not flow) to an on state (a state in which a drain current flows). Say.

  According to the first aspect of the present invention, the gate voltage of the first transistor is set to a desired voltage without arranging two transistors on the wiring for applying a voltage for causing the light emitting element to emit light to the light emitting element. be able to. Therefore, the occurrence of unevenness in the image can be suppressed without causing an increase in the size of the pixel circuit and a decrease in power use efficiency as much as possible.

  According to the second aspect of the present invention, the potential of the image signal can be used effectively in setting the gate voltage of the first transistor.

  According to the third aspect of the present invention, the time required for setting the gate voltage of the first transistor for light emission of the light emitting element can be shortened.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<First Embodiment>
<Schematic configuration of image display device>
FIG. 1 is a diagram illustrating a schematic configuration of an image display apparatus 100 according to an embodiment of the present invention.

  The image display device 100 is a portable electronic device such as a mobile phone provided with a main body 110 and a display unit 120, and displays various images such as moving images and still images on the display unit 120.

  The main body 110 includes a communication function, a power supply function such as a battery, and an operation unit.

  The display unit 120 includes, for example, an organic EL display (organic electroluminescence display) having a substantially rectangular outline, and driver means to which various signals supplied from the main body unit 110 are input. Note that the organic EL display is a self-luminous image display device having a self-luminous light emitting element that emits light by flowing current through the organic material.

  The organic EL display includes an image signal line and a scanning signal line. The image signal line supplies each pixel with a potential corresponding to an image signal corresponding to the light emission luminance (for example, pixel data signal for each pixel). The scanning signal line is provided so as to be substantially orthogonal to the image signal line, and supplies a scanning signal to each pixel. The scanning signal is a signal that controls the timing at which charges corresponding to the pixel data signal are accumulated in each pixel via the image signal line.

  The driver means includes an X driver (image signal line driving circuit) and a dedicated driver. The X driver is electrically connected to the image signal line, and controls the timing of supplying a potential corresponding to the pixel data signal to the image signal line. The dedicated driver is electrically connected to the scanning signal line and controls the timing of supplying the scanning signal to the scanning signal line. For example, in the image display apparatus 100, the X driver is disposed along the short side of the organic EL display, and the dedicated driver is disposed along the long side of the organic EL display.

<Functional configuration of image display device>
FIG. 2 is a block diagram illustrating a functional configuration of the image display apparatus 100.

  The image display apparatus 100 includes a control unit 111, an operation unit 112, an X driver Xd, a dedicated driver Sd, and a display panel 121.

  The control unit 111 performs overall control of the operation of the image display apparatus 100. The control unit 111 includes a CPU, a RAM, a ROM, and the like. For example, the CPU 111 reads and executes a program stored in the ROM or the like, thereby realizing various operations and controls. Note that the control unit 111 also has a function of controlling transmission of signals from the X driver Xd and the dedicated driver Sd.

  The operation unit 112 includes various buttons such as a so-called numeric keypad, and sends various signals to the control unit 111 when the various buttons are pressed.

  The display panel 121 includes a large number of pixel circuits 1A arranged in a lattice pattern. Here, the circuit configuration of the pixel circuit 1A will be described.

  FIG. 3 is a diagram illustrating a circuit configuration of the pixel circuit 1A.

  The pixel circuit 1A includes an organic EL element OLED, first to fourth transistors Q1 to Q4, and first and second capacitors C1 and C2.

  The organic EL element OLED is a light-emitting element that has a light-emitting layer made of an organic material or the like, and whose emission luminance varies depending on the amount of current (current amount) flowing through the light-emitting layer. This organic EL element OLED has an anode electrode (corresponding to “one electrode” in the present invention) Ea and a cathode electrode (corresponding to “the other electrode” in the present invention) Ec. The anode electrode Ea is electrically connected to a first power supply line (corresponding to a “first applying unit” of the present invention) Lvd that applies a relatively high first potential when the organic EL element OLED emits light. Is done. On the other hand, the cathode electrode Ec is applied to a second power supply line (corresponding to a “second applying unit” of the present invention) Lvs that applies a second potential that is relatively lower than the first potential when the organic EL element OLED emits light. Electrically connected.

  The first to fourth transistors Q1 to Q4 are thin film transistors (TFT: Thin) which are a type of field effect transistor (FET) that employs a type (n-type) MIS (Metal Insulator Semiconductor) structure in which carriers are electrons. Film Transistor), that is, an n-MISFET TFT.

  The first transistor (referred to as “driving transistor” as appropriate) Q1 has first to third electrodes E1 to E3. Specifically, the first electrode E1 is electrically connected to the first power supply line Lvd and the seventh electrode E7 of the third transistor. The first electrode E1 functions as a drain electrode (hereinafter abbreviated as “drain”) when the organic EL element OLED emits light, that is, when a forward current flows through the organic EL element OLED. The second electrode E2 is electrically connected to the anode electrode Ea of the organic EL element OLED, and when a forward current flows through the organic EL element OLED, the second electrode E2 is abbreviated as a source electrode (hereinafter abbreviated as “source”). ). The third electrode E3 functions as a so-called gate electrode (hereinafter abbreviated as “gate”), and electrically connects the eighth electrode E8 of the third transistor Q3 and the tenth electrode E10 of the first capacitor C1. The wiring is conductively connected. That is, the third electrode E3 is electrically connected to the eighth electrode E8 and the tenth electrode E10.

  In the first transistor Q1, the potential applied to the third electrode E3, more specifically, the voltage value applied between the second electrode E2 and the third electrode E3 (that is, between the source and the gate) is By adjusting, the amount of current flowing between the first electrode E1 and the second electrode E2 (hereinafter also referred to as “between the first and second electrodes”) is adjusted. And with the adjustment of the amount of current between the first and second electrodes, the amount of current in the organic EL element OLED is controlled. Further, the potential applied to the third electrode (gate) E3 causes the first transistor Q1 to have a state in which a current can flow between the first and second electrodes (that is, between the drain and the source) (conducting state), Is selectively set to a state in which the current cannot flow (non-conducting state).

  The lower limit of the gate voltage (specifically, the potential difference between the second electrode E2 and the third electrode E3 with respect to the potential of the second electrode E2) when the first transistor Q1 is in a conductive state. The value (threshold voltage of transistor Q1) Vth exists.

  The second transistor (referred to as “Vth compensation transistor” as appropriate) Q2 has fourth to sixth electrodes E4 to E6. Specifically, the fourth electrode E4 can be electrically conductive to the wiring that electrically connects the eleventh electrode E11 of the first capacitor C1, the thirteenth electrode E13 of the fourth transistor, and the fifteenth electrode of the second capacitor C2. Connected to. That is, the fourth electrode E4 is electrically connected to the eleventh electrode E11, the thirteenth electrode E13, and the fifteenth electrode E15. In addition, the fifth electrode E5 is conductively connected to a wiring that electrically connects the second electrode E2 and the anode electrode Ea of the organic EL element OLED. That is, the fifth electrode E5 is electrically connected to the second electrode E2 and the anode electrode Ea. The sixth electrode E6 is electrically connected to the sense line Lsn and functions as a so-called gate electrode. Note that the sense line Lsn applies a potential to the sixth electrode E6 for controlling the timing of performing a Vth compensation process and the like described later.

  In the second transistor Q2, a potential applied to the sixth electrode E6, more specifically, a voltage value applied between the fifth electrode E5 and the sixth electrode E6 (that is, between the source and the gate). By adjusting, the amount of current flowing between the fourth electrode E4 and the fifth electrode E5 (hereinafter also referred to as “between the fourth and fifth electrodes”) is adjusted. In addition, the second transistor Q2 has a state in which a current can flow between the fourth and fifth electrodes (that is, between the drain and the source) due to the potential applied to the sixth electrode (gate) E6, and the current Is selectively set to a state in which the current cannot flow (non-conducting state).

  Here, since the light emission luminance of the organic EL element OLED is controlled by the current value, the light emission luminance fluctuates sensitively to fluctuations in the gate voltage Vgs of the first transistor Q1 during light emission. In particular, when the first transistor Q1 is configured using amorphous silicon, the threshold voltage Vth tends to be different for each first transistor Q1. Therefore, if a function for compensating a different threshold voltage Vth for each pixel (Vth compensation function) is not provided, there is a slight difference between the desired light emission luminance and the actual light emission luminance, and as a result, light emission luminance between the pixels. Cause unevenness.

  Therefore, in the image display device 100, the process of compensating for variations in the threshold voltage Vth in the first transistor Q1 by setting the gate voltage Vgs of the first transistor Q1 to a value corresponding to the threshold voltage Vth in each pixel before light emission ( The second transistor Q2 is provided to realize (Vth compensation processing). More specifically, the second transistor Q2 compensates for the threshold voltage Vth of the first transistor Q1 by shifting the gate voltage Vgs of the first transistor Q1 by an amount corresponding to the threshold voltage Vth of the first transistor Q1. To do.

  The third transistor (referred to as “reset transistor” as appropriate) Q3 has seventh to ninth electrodes E7 to E9. Specifically, the seventh electrode E7 is electrically connected to a wiring that connects the first electrode E1 and the first power supply line Lvd in a conductive manner. That is, the seventh electrode E7 is electrically connected to the first power supply line Lvd and the first electrode E1 of the first transistor. The eighth electrode E8 is electrically connected to a wiring that electrically connects the third electrode E3 and the tenth electrode E10 of the first capacitor C1. That is, the eighth electrode E8 is electrically connected to the third electrode E3 and the tenth electrode E10. The ninth electrode E9 is electrically connected to the reset line Lrs and functions as a so-called gate electrode. Note that the reset line Lrs applies a potential for controlling the timing of performing a reset process and a Vth compensation process, which will be described later, to the ninth electrode E9.

  In the third transistor Q3, a potential applied to the ninth electrode E9, more specifically, applied between the seventh electrode E7 or the eighth electrode E8 and the ninth electrode E9 (that is, between the source and the gate). By adjusting the voltage value, the amount of current flowing between the seventh electrode E7 and the eighth electrode E8 (hereinafter also referred to as “between the seventh and eighth electrodes”) is adjusted. Further, the third transistor Q3 has a state in which a current can flow between the seventh and eighth electrodes (that is, between the drain and the source) due to the potential applied to the ninth electrode (gate) E9, and the current Is selectively set to a state in which the current cannot flow (non-conducting state).

  The first capacitor C1 includes tenth and eleventh electrodes E10 and E11, and is configured to obtain an electric capacity between the tenth electrode E10 and the eleventh electrode E11. Specifically, the tenth electrode E10 is connected to a wiring that connects the third electrode E3 and the eighth electrode E8 in a conductive manner. That is, the tenth electrode E10 is electrically connected to the third electrode E3 and the eighth electrode E8. The eleventh electrode E11 is connected to a wiring that connects the fourth electrode E4, the thirteenth electrode E13, and the fifteenth electrode E15 so that they can conduct each other. That is, the eleventh electrode E11 is electrically connected to the fourth electrode E4, the thirteenth electrode E13, and the fifteenth electrode E15. Note that the holding capacity of the first capacitor C1 is set to a predetermined value (for example, 1 pF).

  The fourth transistor (referred to as “scanning transistor” as appropriate) Q4 has twelfth to fourteenth electrodes E12 to E14. Specifically, the twelfth electrode E12 is electrically connected to the image signal line Ldata. The thirteenth electrode E13 is electrically connected to the wiring that connects the fourth electrode E4, the eleventh electrode E11, and the fifteenth electrode E15 in a conductive manner. That is, the thirteenth electrode E13 is electrically connected to the fourth electrode E4, the eleventh electrode E11, and the fifteenth electrode E15. The fourteenth electrode E14 is electrically connected to the scanning signal line Lsl and functions as a so-called gate electrode.

  In the fourth transistor Q4, the potential applied to the fourteenth electrode E14, more specifically, applied between the twelfth electrode E12 or the thirteenth electrode E13 and the fourteenth electrode E14 (that is, between the source and the gate). By adjusting the voltage value to be adjusted, the amount of current flowing between the twelfth electrode E12 and the thirteenth electrode E13 (hereinafter also referred to as “between the twelfth and thirteenth electrodes”) is adjusted. Further, the fourth transistor Q4 has a state in which a current can flow between the twelfth and thirteenth and thirteenth electrodes (that is, between the drain and the source) due to the potential applied to the fourteenth electrode (gate) E14, and the current Is selectively set to a state in which the current cannot flow (non-conducting state).

  The second capacitor C2 has fifteenth and sixteenth electrodes E15 and E16, and is configured to obtain an electric capacity between the fifteenth electrode E15 and the sixteenth electrode E16. Specifically, the fifteenth electrode E15 is connected to a wiring that connects the fourth electrode E4, the eleventh electrode E11, and the thirteenth electrode E13 in a conductive manner. That is, the fifteenth electrode E15 is electrically connected to the fourth electrode E4, the eleventh electrode E11, and the thirteenth electrode E13. The sixteenth electrode E16 is connected to a wiring that connects the anode electrode Ea, the second electrode E2, and the fifth electrode E5 so as to be conductive to each other. That is, the sixteenth electrode E16 is electrically connected to the anode electrode Ea, the second electrode E2, and the fifth electrode E5. Note that the holding capacity of the second capacitor C2 is set to a predetermined value (for example, 1 pF).

  In the display panel 121 having such a pixel circuit, as shown in FIG. 2, the common image signal line Ldata is electrically connected to the plurality of pixel circuits 1A arranged in the column direction (vertical direction in FIG. 2). The common scanning signal line Lsl is electrically connected to the plurality of pixel circuits 1A arranged in the row direction (left and right direction in FIG. 2).

  In response to a signal from the control unit 111, the X driver Xd supplies a potential (hereinafter, also referred to as “image signal line potential”) Vdt corresponding to the pixel data signal to the image signal line Ldata. Note that the control unit 111 synchronizes with, for example, image data transmitted from the outside, and outputs a signal for controlling the potential supply timing according to the pixel data signal from the X driver Xd to each image signal line Ldata. Is sent to. In addition, in the potential adjustment stage for causing the organic EL element OLED to emit light, the X driver Xd responds to a signal from the control unit 111 and has a predetermined reference potential GND and a predetermined high potential with respect to the image signal line Ldata. Vvh is selectively given.

  The dedicated driver Sd gives a potential to the scanning signal line Lsl, the first power supply line Lvd, the second power supply line Lvs, the sense line Lsn, and the reset line Lrs with a waveform corresponding to the control signal from the control unit 111. .

  The dedicated driver Sd is configured to include first to fifth shift registers, and specifically, based on data stored in the first to fifth shift registers, the scanning signal line Lsl, the first power supply line Lvd, the second It has a function of applying a potential to the power supply line Lvs, the sense line Lsn, and the reset line Lrs.

  For example, the first shift register holds data of a potential (hereinafter also referred to as “scanning line potential”) Vsl to be applied to the scanning signal line Lsl. Here, as the scanning line potential Vsl, two values of the potentials Vh and Vl are appropriately adopted. The second shift register holds data of a potential Vdd (hereinafter also referred to as “first power line potential”) to be applied to the first power line Lvd. Here, as the first power supply line potential Vdd, two values of a predetermined high potential value Vp (for example, 10 V) and a predetermined reference potential GND (that is, 0 V) are appropriately adopted. The third shift register holds data of a potential (hereinafter also referred to as “second power supply line potential”) Vss to be applied to the second power supply line Lvs. Here, as the second power supply line potential Vss, two values of a predetermined high potential value Vp (for example, 10 V) and a predetermined reference potential GND (that is, 0 V) are appropriately employed. The fourth shift register holds data of a potential Vsn (hereinafter also referred to as “sense line potential”) to be applied to the sense line Lsn. Here, as the sense line potential Vsn, two values of potentials Vh and Vl are appropriately adopted. The fifth shift register holds data of a potential (hereinafter also referred to as “reset line potential”) Vrs to be applied to the reset line Lrs. Here, as the reset line potential Vrs, two values of potentials Vh and Vl are appropriately adopted.

  The scanning line potential Vsl, the first and second power supply line potentials Vdd and Vss, the sense line potential Vsn, and the reset line potential Vrs controlled by the first to fifth shift registers are in accordance with a control signal from the control unit 111. Each waveform is shown.

<Driving of image display device>
FIG. 4 is a timing chart showing signal waveforms (driving waveforms) when the organic EL element OLED emits light, and FIGS. 5 to 7 are flowcharts showing an operation flow of the pixel circuit 1A. 4 to 7 focus on driving for causing one pixel circuit 1A included in the display panel 121 to emit light once, and a plurality of frames constituting a moving image or the like in the image display device 100 are sequentially continuous. In the case of display, the driving waveform shown in FIG. 4 and the operation flow shown in FIGS. 5 to 7 are repeated in time sequence for the number of times corresponding to the number of frames. 4 and the operation flow shown in FIGS. 5 to 7 are realized under the control of the control unit 111.

  In FIG. 4, the horizontal axis indicates time, and in order from the top, (a) a first power supply line potential (hereinafter simply referred to as “potential”) Vdd applied to the first power supply line Lvd, (b) a second power supply. Second power supply line potential (hereinafter simply referred to as “potential”) Vss applied to the line Lvs, (c) Reset line potential applied to the reset line Lrs (hereinafter simply referred to as “potential”) Vrs, (d ) Sense line potential applied to the sense line Lsn (hereinafter simply referred to as “potential”) Vsn, (e) image signal line potential applied to the image signal line Ldata (hereinafter simply referred to as “potential”) Vdt, (F) A waveform of a scanning signal line potential (hereinafter simply referred to as “potential”) Vsl applied to the scanning signal line Lsl is shown.

  Note that the period related to one light emission includes a preparation period Pp (time t1 to t22) for adjusting the light emission luminance and a light emission period Pe (to time t1, time t22 to) in which the organic EL element OLED actually emits light. And is configured.

  Hereinafter, an operation flow of the pixel circuit 1 </ b> A illustrated in FIGS. 5 to 7 will be described with reference to FIG. 4.

  First, in step S1, the potential Vdd applied to the first power supply line Lvd is set from the predetermined high potential Vp to the predetermined reference potential GND (time t1). At this time, the potential Vss applied to the second power supply line Lvs is set to a predetermined reference potential GND. For this reason, a large potential difference does not occur between the electrodes Ea and Ec of the organic EL element OLED, and no current flows between the electrodes Ea and Ec, and the previous light emission ends. In the case of the first light emission, the preparation period Pp is simply started.

  In step S2, the potential Vss applied to the second power supply line Lvs is set from the predetermined reference potential GND to the predetermined high potential Vp (time t2).

  In step S3, the potential Vrs applied to the reset line Lrs is set from the predetermined low potential Vl to the predetermined high potential Vh (time t3). At this time, the third transistor Q3 becomes conductive, and the potential applied to the tenth electrode E10 of the first capacitor C1 becomes the predetermined reference potential GND.

  In step S4, the potential Vsl applied to the scanning signal line Lsl is set from the predetermined low potential Vl to the predetermined high potential Vh (time t4). At this time, the fourth transistor Q4 becomes conductive, and the potential Vdt applied to the image signal line Ldata is set to a predetermined reference potential GND. For this reason, the potential applied to the eleventh electrode E11 of the first capacitor C1 becomes the predetermined reference potential GND. Therefore, the predetermined reference potential GND is applied to both the electrodes E10 and E11 of the first capacitor C1, and the process of resetting the charges accumulated in the both electrodes E10 and E11 of the first capacitor C1 (hereinafter referred to as “reset process”). Is also started).

  In step S5, the potential Vrs applied to the reset line Lrs is set from the predetermined high potential Vh to the predetermined low potential Vl (time t5). At this time, the third transistor Q3 is turned off and the reset process is terminated.

  In step S6, the potential Vdt applied to the image signal line Ldata is set from the predetermined reference potential GND to the predetermined high potential Vvh (time t6). At this time, since the fourth transistor Q4 is in a conductive state, a predetermined high potential Vvh of the potential Vdt is applied to the eleventh electrode E11 of the first capacitor C1. For this reason, the high potential Vvh acts on the third electrode E3 that is the gate of the first transistor Q1 via the first capacitor C1, and the first transistor Q1 becomes conductive. Therefore, a predetermined reference potential GND is applied to the anode electrode Ea of the organic EL element OLED, and a predetermined high potential Vp is applied to the cathode electrode Ec of the organic EL element OLED. That is, a process for accumulating charges corresponding to a predetermined high potential Vp (hereinafter also referred to as “charge process”) is started between both electrodes Ea and Ec of the organic EL element OLED.

  In step S7, the potential Vdt applied to the image signal line Ldata is set from the predetermined high potential Vvh to the predetermined reference potential GND (time t7). At this time, the first transistor Q1 is turned off, the charge process is terminated, and a charge corresponding to a predetermined high potential Vp is accumulated between both electrodes Ea and Ec of the organic EL element OLED.

  In step S8, the potential Vsl applied to the scanning signal line Lsl is set from the predetermined high potential Vh to the predetermined low potential Vl (time t8). At this time, the fourth transistor Q4 is turned off.

  In step S9, the potential Vrs applied to the reset line Lrs is set from the predetermined low potential Vl to the predetermined high potential Vh (time t9). At this time, the third transistor Q3 becomes conductive, and the predetermined reference potential GND of the first power supply line Lvd is applied to the third electrode E3.

  In step S10, the potential Vsn applied to the sense line Lsn is set from the predetermined low potential Vl to the predetermined high potential Vh (time t10). At this time, the second transistor Q2 becomes conductive.

  In step S11 of FIG. 6, the potential Vss applied to the second power supply line Lvs is set from the predetermined high potential Vp to the predetermined reference potential GND (time t11). At this time, the electric charge accumulated between the two electrodes Ea and Ec of the organic EL element OLED acts on the second and eleventh electrodes E2 and E11, and the gate voltage Vgs of the first transistor Q1 becomes the both electrodes of the organic EL element OLED. The voltage corresponds to the electric charge corresponding to a predetermined high potential Vp accumulated between Ea and Ec. Therefore, the first transistor Q1 is turned on, and the third transistor Q3 is also turned on. Therefore, at time t11 to t12, when the gate voltage Vgs of the first transistor Q1 reaches Vth due to the movement of charges through the first, second, eighth, and eighth electrodes E1, E2, E7, and E8, the first transistor Processing (hereinafter also referred to as “Vth compensation processing”) in which Q1 is automatically turned off is performed.

  In step S12, the potential Vrs applied to the reset line Lrs is set from the predetermined high potential Vh to the predetermined low potential Vl (time t12). At this time, the third transistor Q3 is turned off.

  In step S13, the potential Vsn applied to the sense line Lsn is set from the predetermined high potential Vh to the predetermined low potential Vl (time t13). At this time, the second transistor Q2 is turned off, and the first capacitor C1 holds the potential of the tenth electrode E10 higher than the potential of the eleventh electrode E11 by the threshold voltage Vth.

  In step S14, the potential Vsl applied to the scanning signal line Lsl is set from the predetermined low potential Vl to the predetermined high potential Vh (time t14). At this time, the fourth transistor Q4 becomes conductive, the predetermined reference potential GND of the image signal line Ldata is applied to the eleventh electrode E11 of the first capacitor C1, and is applied to the third electrode E3 of the first transistor Q1. The applied potential becomes Vth.

  In step S15, the potential Vdt applied to the image signal line Ldata is set from the predetermined reference potential GND to the predetermined high potential Vvh (time t15). At this time, the potential applied to the third electrode E3 of the first transistor Q1 via the first capacitor C1 becomes higher than Vth, and the first transistor Q1 becomes conductive. Further, since the potentials Vdd and Vss of the first and second power supply lines Lvd and Lvs are respectively set to the predetermined reference potential GND, the electric charge remaining between both electrodes Ea and Ec of the organic EL element OLED is reset. Process (hereinafter also referred to as “element initialization process”) is started.

  In step S16, the potential Vdt applied to the image signal line Ldata is set from the predetermined high potential Vvh to the predetermined reference potential GND (time t16). At this time, the potential applied to the third electrode E3 of the first transistor Q1 returns to Vth via the first capacitor C1, and the first transistor Q1 becomes non-conductive. For this reason, the element initialization process is completed. At this time, the gate voltage Vgs of the first transistor Q1 is Vth.

  In step S17, the potential Vsl applied to the scanning signal line Lsl is set from the predetermined high potential Vh to the predetermined low potential Vl (time t17). At this time, the fourth transistor Q4 is turned off.

  In step S18 of FIG. 7, the potential Vdt applied to the image signal line Ldata is set to the potential Vdata corresponding to the pixel data signal (time t18). In FIG. 4, since the potential Vdata is an arbitrary value, the range that the potential Vdata can take is indicated by hatching.

  In step S19, the potential Vsl applied to the scanning signal line Lsl is set from the predetermined low potential Vl to the predetermined high potential Vh (time t19). At this time, the fourth transistor Q4 becomes conductive, the potential Vdata acts on the eleventh electrode E11 of the first capacitor C1, and the gate voltage Vgs of the first transistor Q1 is set to Vth + Vdata (hereinafter “potential” Also referred to as “setting process”.

  In step S20, the potential Vsl applied to the scanning signal line Lsl is set from the predetermined high potential Vh to the predetermined low potential Vl (time t20). At this time, the second to fourth transistors Q2 to Q4 are all in a non-conductive state, and the gate voltage Vgs of the first transistor Q1 is held in a state of Vth + Vdata.

  In step S21, the potential Vdt applied to the image signal line Ldata is set to a predetermined reference potential GND (time t21).

  In step S22, the potential Vdd applied to the first power supply line Lvd is set to a predetermined high potential Vp (time t22). At this time, the gate voltage Vgs of the first transistor Q1 is set to Vth + Vdata. Therefore, a current corresponding to the pixel data signal flows between the first and second electrodes of the first transistor Q1. Accordingly, a current corresponding to the pixel data signal flows through the organic EL element OLED, and the organic EL element OLED emits light with a luminance corresponding to the pixel data signal. During this light emission, the potential of the second electrode E2 may increase due to a large current flow, but the increase in the potential of the second electrode E2 remains as it is via the first and second capacitors C1 and C2. The potential of the third electrode E3 is increased. That is, when the organic EL element emits light, the gate voltage Vgs of the first transistor Q1 is held as Vth + Vdata.

  By the processing in steps S1 to S22, light emission for one frame is realized in the organic EL element OLED, and light emission for a plurality of frames is performed by sequentially repeating the processing in steps S1 to S22.

  In the above, the description has been given focusing on the driving of one pixel circuit 1A included in the display panel 121, but the same driving is also performed on the plurality of pixel circuits 1A included in the display panel 121. For example, in all the pixel circuits 1A, the potential Vdd applied to the first power supply line Lvd at the time when the potential setting processing is sequentially performed after the Vth compensation processing in the preparation period Pp is performed simultaneously. However, the organic EL element OLED emits light simultaneously in all the pixel circuits 1A by being set to a predetermined high potential Vp.

  As described above, in the image display apparatus 100 according to the first embodiment, the first transistor is not disposed on the wiring that applies the voltage for causing the organic EL element OLED to emit light to the organic EL element OLED. The gate voltage Vgs of the transistor Q1 can be set to a desired voltage (for example, Vth + Vdata). Therefore, it is possible to suppress the occurrence of unevenness in the image without causing an increase in the size of the pixel circuit and a decrease in power use efficiency.

  Further, the cathode electrode Ec of the organic EL element OLED is connected to the second power supply line Lvs so as to be directly conductive. Since all (or a plurality of) pixel circuits 1A can be simultaneously performed up to the Vth compensation process in the preparation period Pp, all (or a plurality) of pixel circuits 1A arranged on the display panel 121 are related. The second power supply line Lvs can be shared. Therefore, the cathode electrodes Ec of all (or a plurality) of pixel circuits 1A arranged on the display panel 121 can be made common. As a result, it becomes possible to simplify the structure of the cathode electrode in the display panel 121, and there are various merits such as improvement in yield, improvement in production efficiency, simplification of manufacturing equipment, and cost reduction due to simplification of the manufacturing process. can get.

Second Embodiment
In the image display device 100 according to the first embodiment, the pixel circuit 1A includes the second capacitor C2 and the fourth transistor Q4 as a circuit configuration that applies the potential Vdata corresponding to the pixel data signal to the first transistor Q1. It was. On the other hand, in the image display device 100A according to the second embodiment, the display panel 121A including the pixel circuit 1B having a different circuit configuration for applying a potential corresponding to the pixel data signal to the first transistor Q1 is employed.

  The image display device 100A according to the second embodiment has the same configuration as the image display device 100 according to the first embodiment except that the configuration of the pixel circuit and the drive of the pixel circuit are different. ing. In addition, the configuration of the pixel circuit is the same as the electrical connection relationship between the first and second power supply lines Lvd and Lvs, the first to third transistors Q1 to Q3, and the first capacitor C1. However, since the driving of the pixel circuits is different, in the image display device 100A according to the second embodiment, the control unit 111 included in the image display device 100 according to the first embodiment has the same configuration but is different. It is replaced with a control unit 111A that enables control.

  Hereinafter, the configuration and driving of the pixel circuit 1B different from the image display device 100 according to the first embodiment in the image display device 100A according to the second embodiment will be mainly described.

  FIG. 8 is a diagram illustrating a circuit configuration of the pixel circuit 1B according to the second embodiment. Here, about the structure similar to the image display apparatus 100 which concerns on 1st Embodiment, the same code | symbol is attached | subjected and description is abbreviate | omitted.

  In the pixel circuit 1B, the fourth transistor Q4 and the second capacitor C2 of the pixel circuit 1A according to the first embodiment are replaced with a fourth A transistor Q4A and a second A capacitor C2A. Note that the fourth A transistor Q4A is configured by an n-MISFET TFT, similarly to the first to third transistors Q3.

  The 4A transistor (referred to as “scanning transistor” as appropriate) Q4A includes 12A to 14A electrodes E12A to E14A. Specifically, the twelfth A electrode E12A is electrically connected to the image signal line Ldata. The 13A electrode E13A is electrically connected to the 15A electrode E15A of the 2A capacitor C2A. The 14A electrode E14A is electrically connected to the scanning signal line Lsl and functions as a so-called gate electrode.

  Further, in the fourth A transistor Q4A, similarly to the fourth transistor Q4 according to the first embodiment, the potential applied to the 14A electrode E14A, more specifically, the 12A electrode E12A or the 13A electrode E13A and the 14A electrode E14A. By adjusting the voltage value applied between the two electrodes (that is, between the source and the gate), the voltage between the twelfth A electrode E12A and the thirteenth electrode A13A (hereinafter also referred to as “between the twelfth electrode A-13A electrodes”). The amount of current flowing in is adjusted. Further, the potential applied to the 14A electrode (gate) E14A causes the 4A transistor Q4A to have a state in which current can flow between the 12A-13A electrodes (that is, between the drain and source) (conducting state), Is selectively set to a state in which the current cannot flow (non-conducting state).

  The second A capacitor C2A includes 15A and 16A electrodes E15A and E16A, and is configured to obtain an electric capacity between the 15A electrode E15A and the 16A electrode E16A. Specifically, the 15A electrode E15A is electrically connected to the 13A electrode E13A. The 16A electrode E16A is connected to the wiring that connects the fourth electrode E4 and the eleventh electrode E11 in a conductive manner. That is, the 16A electrode E16A is electrically connected to the 4th electrode E4 and the 11th electrode E11. The holding capacity of the second A capacitor C2A is set to a predetermined value (for example, 1 pF).

  FIG. 9 is a timing chart showing a signal waveform (driving waveform) when the organic EL element OLED emits light, and FIGS. 10 and 11 are flowcharts showing an operation flow of the pixel circuit 1B. 9 to 11 focus on driving for causing one pixel circuit 1B included in the display panel 121 to emit light once, and a plurality of frames constituting a moving image or the like in the image display device 100A are temporally continuous. In the case of display, the drive waveform shown in FIG. 9 and the operation flow shown in FIGS. 10 and 11 are repeated in time sequence as many times as the number of frames. Note that the drive waveforms shown in FIG. 9 and the operation flows shown in FIGS. 10 and 11 are realized under the control of the control unit 111A.

  In FIG. 9, as in FIG. 4, the horizontal axis indicates time, and in order from the top, (a) the potential Vdd applied to the first power supply line Lvd, (b) the potential Vss applied to the second power supply line Lvs. (C) potential Vrs applied to the reset line Lrs, (d) potential Vsn applied to the sense line Lsn, (e) potential Vdt applied to the image signal line Ldata, (f) applied to the scanning signal line Lsl. The waveform of the applied potential Vsl is shown.

  In addition, in the period concerning one light emission, the preparation period PpA (time T1-T14) for adjusting light emission luminance, and the light emission period PeA (-time T1, time T14-) where the organic EL element OLED actually emits light. And is configured.

  Hereinafter, the operation flow of the pixel circuit 1B shown in FIGS. 10 and 11 will be described with reference to FIG.

  First, in step ST1, the potential Vdd applied to the first power supply line Lvd is set from the predetermined high potential Vp to the predetermined reference potential GND (time T1). At this time, the potential Vss applied to the second power supply line Lvs is set to a predetermined reference potential GND. For this reason, a large potential difference does not occur between the electrodes Ea and Ec of the organic EL element OLED, and no current flows between the electrodes Ea and Ec, and the previous light emission ends. In the case of the first light emission, the preparation period PpA is simply started. At this time, the gate voltage Vgs of the first transistor Q1 is set to a value larger than the threshold voltage Vth due to the previous light emission or the like, and the first transistor Q1 is in a conductive state. Furthermore, the potential Vsn applied to the sense line Lsn is set to a predetermined high potential Vh, and the second transistor Q2 is in a conductive state. For this reason, the potential of the eleventh electrode E11 becomes the predetermined reference potential GND.

  In step ST2, the potential Vss applied to the second power supply line Lvs is set from the predetermined reference potential GND to the predetermined high potential Vp (time T2). At this time, the gate voltage Vgs of the first transistor Q1 is set to a value larger than the threshold voltage Vth due to the previous light emission or the like, and the first transistor Q1 is in a conductive state. Therefore, a predetermined reference potential GND is applied to the anode electrode Ea of the organic EL element OLED, and a predetermined high potential Vp is applied to the cathode electrode Ec of the organic EL element OLED. That is, a charge process is started in which charges corresponding to a predetermined high potential Vp are accumulated between both electrodes Ea and Ec of the organic EL element OLED.

  In step ST3, the potential Vsl applied to the scanning signal line Lsl is set from the predetermined low potential Vl to the predetermined high potential Vh (time T3). At this time, since the fourth A transistor Q4A is in a conductive state and the predetermined reference potential GND is applied to the image signal line Ldata, the potential applied to the 15A electrode E15A of the second A capacitor C2A is equal to the predetermined reference potential GND. Become.

  In step ST4, the potential Vrs applied to the reset line Lrs is set from the predetermined low potential Vl to the predetermined high potential Vh (time T4). At this time, the third transistor Q3 becomes conductive. A predetermined reference potential GND is applied to the first power supply line Lvd. For this reason, the potential applied to the tenth electrode E10 of the first capacitor C1 becomes the predetermined reference potential GND. Further, since the potential applied to the eleventh electrode E11 is also the predetermined reference potential GND, a reset process for resetting the charge accumulated between both electrodes E10 and E11 of the first capacitor C1 is started.

  In step ST5, the potential Vss applied to the second power supply line Lvs is set to a predetermined reference potential GND (time T5). At this time, the charging process is terminated. At this time, since the second and third transistors Q2 and Q3 are in the conductive state, the reset process is ended and the Vth compensation process is started.

  Specifically, the electric charge accumulated between the two electrodes Ea and Ec of the organic EL element OLED acts on the second and eleventh electrodes E2 and E11, and the gate voltage Vgs of the first transistor Q1 is changed to that of the organic EL element OLED. The voltage corresponds to the electric charge corresponding to the predetermined high potential Vp accumulated between the electrodes Ea and Ec. Therefore, the first transistor Q1 is in a conductive state. Therefore, at time T5 to T7, when the gate voltage Vgs of the first transistor Q1 reaches Vth due to the movement of charges through the first, second, eighth and eighth electrodes E1, E2, E7, E8, the first transistor A Vth compensation process for automatically bringing Q1 into a non-conductive state is performed.

  In step ST6, the potential Vsl applied to the scanning signal line Lsl is set from the predetermined high potential Vh to the predetermined low potential Vl (time T6). At this time, the fourth A transistor Q4A is turned off.

  In step ST7, the potential Vsn applied to the sense line Lsn is set from the predetermined high potential Vh to the predetermined low potential Vl (time T7). At this time, the second transistor Q2 is turned off, the Vth compensation process is terminated, and the potential of the tenth electrode E10 is held higher than the potential of the eleventh electrode E11 by the threshold voltage Vth.

  In step ST8, the potential Vdt applied to the image signal line Ldata is set to the potential −Vdata corresponding to the pixel data signal (time T8). In FIG. 9, since the potential −Vdata is an arbitrary value, the range that the potential −Vdata can take is indicated by hatching.

  In step ST9, the potential Vsl applied to the scanning signal line Lsl is set from the predetermined low potential Vl to the predetermined high potential Vh (time T9). At this time, the fourth A transistor Q4A is turned on, the third transistor Q3 is turned on, and the potential Vdd applied to the first power supply line Lvs is set to a predetermined reference potential GND. For this reason, the potential -Vdata acts on the eleventh electrode E11 of the first capacitor C1 via the second A capacitor C2A, while the tenth electrode E10 of the first capacitor C1 is set to the predetermined reference potential GND. . That is, charges corresponding to the potential −Vdata are accumulated between the tenth electrode E10 and the eleventh electrode E11. However, the amount of accumulated electric charge is a ratio α (for example, 1 / pf) determined by the capacitance of the first capacitor C1 (for example, 1 pf) and the capacitance of the second A capacitor C2A (for example, 1 pf) with respect to the potential −Vdata. (1 + 1) = 1/2), which corresponds to a potential −Vdata × α (for example, −Vdata / 2). That is, the potential of the tenth electrode E10 is higher than the potential of the eleventh electrode E11 by Vdata × α.

  In step ST10, the potential Vsl applied to the scanning signal line Lsl is set from the predetermined high potential Vh to the predetermined low potential Vl (time T10). At this time, the fourth A transistor Q4A becomes non-conductive, and the potential of the tenth electrode E10 is held in a state higher by Vdata × α than the potential of the eleventh electrode E11. That is, from time T9 to T10, a potential setting process is performed in which the gate voltage Vgs of the first transistor Q1 becomes Vth + Vdata × α.

  In step ST11 of FIG. 11, the potential Vdt applied to the image signal line Ldata is set to a predetermined reference potential GND (time T11).

  In step ST12, the potential Vrs applied to the reset line Lrs is set from the predetermined high potential Vh to the predetermined low potential Vl (time T12). At this time, the third transistor Q3 is turned off.

  In step ST13, the potential Vsn applied to the sense line Lsn is set from the predetermined low potential Vl to the predetermined high potential Vh (time T13). At this time, the second transistor Q2 becomes conductive, and the potential of the second electrode E2 and the potential of the eleventh electrode E11 are held equivalently. Therefore, the gate voltage Vgs of the first transistor Q1 is held at Vth + Vdata × α.

  In step ST14, the potential Vdd applied to the first power supply line Lvd is set to a predetermined high potential Vp (time T14). At this time, the gate voltage Vgs of the first transistor Q1 is set to Vth + Vdata × α. Therefore, a current corresponding to the pixel data signal flows between the first and second electrodes of the transistor Q1. That is, a current corresponding to the pixel data signal flows through the organic EL element OLED, and the organic EL element OLED emits light with a luminance corresponding to the pixel data signal. During this light emission, the potential of the second electrode E2 may increase due to the flow of a large amount of current. However, since the second electrode E2 and the eleventh electrode are short-circuited, the potential of the second electrode E2 The increased amount increases the potential of the third electrode E3 as it is. That is, when the organic EL element emits light, the gate voltage Vgs of the first transistor Q1 is held as Vth + Vdata × α.

  By the processing in steps ST1 to ST14, light emission for one frame is realized in the organic EL element OLED, and light emission for a plurality of frames is performed by sequentially repeating the processing in steps ST1 to ST14.

  In the above, the description has been given focusing on the driving of one pixel circuit 1B included in the display panel 121, but the same driving is also performed on the plurality of pixel circuits 1B included in the display panel 121. For example, in all the pixel circuits 1B, the potential Vdd applied to the first power supply line Lvd at the time when the potential setting processing is sequentially performed after the Vth compensation processing in the preparation period PpA is performed at the same time. However, by setting the predetermined high potential Vp, the light emission of the organic EL element OLED is simultaneously performed in all the pixel circuits 1B.

  As described above, in the image display device 100A according to the second embodiment, the first and second power supply lines Lvd and Lvs, which are electrically connected in the same manner as the image display device 100 according to the first embodiment, The structure provided with 1-3 transistors Q1-Q3 and the 1st capacitor | condenser C1 is employ | adopted. Therefore, the gate voltage Vgs of the first transistor Q1 is considered in consideration of the threshold voltage Vth without arranging two transistors on the wiring for applying the voltage for causing the organic EL element OLED to emit light to the organic EL element OLED. It can be set to a desired voltage. Therefore, similarly to the first embodiment, it is possible to suppress the occurrence of unevenness in the image without causing an increase in the size of the pixel circuit and a reduction in power use efficiency.

  As in the first embodiment, the cathode electrode Ec of the organic EL element OLED is connected to the second power supply line Lvs so as to be directly conductive. For this reason, the second power supply lines Lvs related to all (or a plurality of) pixel circuits 1B arranged in the display panel 121A can be shared. Therefore, the cathode electrodes Ec of all (or a plurality of) pixel circuits 1B arranged on the display panel 121A can be made common. As a result, it becomes possible to simplify the structure of the cathode electrode in the display panel 121A, and there are various merits such as improvement in yield, improvement in production efficiency, simplification of manufacturing equipment, and cost reduction due to simplification of the manufacturing process. can get.

  Furthermore, in the image display device 100A according to the second embodiment, as compared with the image display device 100 according to the first embodiment, after the Vth compensation process is completed, the element initial stage that resets the charge accumulated in the organic EL element OLED is reset. The conversion process becomes unnecessary. For this reason, it is possible to reduce the time required for the process of setting the gate voltage Vgs of the first transistor Q1 in order to cause the organic EL element OLED to emit light. As a result, the preparation period PpA can be shortened, so that so-called duty can be improved.

  However, in the pixel circuit 1B according to the second embodiment, the first and second A capacitors C1 and C2A are connected in series on the wiring that electrically connects the image signal line Ldata and the third electrode E3 of the first transistor Q1. Is provided. Therefore, in the potential setting process, the potential obtained by multiplying the potential −Vdata applied to the image signal line Ldata by the ratio α obtained by the capacitance of the first capacitor C1 and the capacitance of the second A capacitor C2A is the threshold voltage Vth. As a result, the gate voltage Vgs is set.

  On the other hand, in the pixel circuit 1A according to the first embodiment, as compared with the pixel circuit 1B according to the second embodiment, on the wiring that electrically connects the image signal line Ldata and the third electrode E3 of the first transistor Q1. The number of capacitors provided in is small. Therefore, in the potential setting process, the gate voltage Vgs is set by adding the potential Vdata applied to the image signal line Ldata to the threshold voltage Vth. Accordingly, when setting the gate voltage Vgs of the first transistor Q1, the pixel circuit 1A according to the first embodiment is preferable from the viewpoint of effectively using the potential Vdata of the pixel data signal.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to the thing of the content demonstrated above.

<Modification>
For example, in the above embodiment, a mobile phone has been described as an example of an image display device, but the present invention is not limited to this. For example, even when the present invention is generally applied to an image display device including other image display devices such as a notebook personal computer and a home-use thin television device, the same effects as those in the above embodiment can be obtained.

  In the above embodiment, the image display device using the organic EL display has been described, but the application target of the present invention is not limited to this. For example, the present invention can be generally applied to an image display device in which light-emitting elements of a type whose light emission luminance is adjusted by a current amount (current control type) such as an EL element made of an inorganic material are arranged.

It is a figure which illustrates schematic structure of the image display apparatus which concerns on 1st Embodiment. It is a block diagram which illustrates functional composition of an image display device concerning a 1st embodiment. FIG. 3 is a diagram illustrating a circuit configuration of a pixel circuit according to the first embodiment. It is a timing chart which shows the signal waveform concerning a 1st embodiment. 3 is a flowchart illustrating an operation flow of the pixel circuit according to the first embodiment. 3 is a flowchart illustrating an operation flow of the pixel circuit according to the first embodiment. 3 is a flowchart illustrating an operation flow of the pixel circuit according to the first embodiment. It is a figure which illustrates the circuit structure of the pixel circuit which concerns on 2nd Embodiment. It is a timing chart which shows the signal waveform concerning a 2nd embodiment. It is a flowchart which shows the operation | movement flow of the pixel circuit which concerns on 2nd Embodiment. It is a flowchart which shows the operation | movement flow of the pixel circuit which concerns on 2nd Embodiment.

Explanation of symbols

1A, 1B Pixel Circuit 100, 100A Image Display Device 110 Main Body 111, 111A Control Unit 120 Display Unit 121, 121A Display Panel C1 First Capacitor C2 Second Capacitor C2A Second A Capacitor Ldata Image Signal Line Lrs Reset Line Lsl Scanning Signal Line Lsn Sense line Lvd First power line Lvs Second power line Q1 First transistor Q2 Second transistor Q3 Third transistor Q4 Fourth transistor Q4A Fourth A transistor

Claims (2)

A light emitting element;
A first transistor having first, second, and third electrodes, and adjusting an amount of current between the first electrode and the second electrode by a potential applied to the third electrode;
A second transistor having fourth, fifth, and sixth electrodes, and adjusting a current amount between the fourth electrode and the fifth electrode by a potential applied to the sixth electrode;
A third transistor having seventh, eighth, and ninth electrodes, and adjusting an amount of current between the seventh electrode and the eighth electrode by a potential applied to the ninth electrode;
A first capacitor having tenth and eleventh electrodes and configured to obtain a capacitance between the tenth electrode and the eleventh electrode;
A first applying unit that applies a first potential (Vdd) to one electrode of the light emitting element when the light emitting element emits light;
A second applying unit that applies a second potential (Vss) that is relatively lower than the first potential to the other electrode different from the one electrode of the light emitting device when the light emitting device emits light;
A fourth transistor having twelfth, thirteenth and fourteenth electrodes, and adjusting a current amount between the twelfth electrode and the thirteenth electrode by a potential applied to the fourteenth electrode;
A second capacitor having fifteenth and sixteenth electrodes and configured to obtain a capacitance between the fifteenth electrode and the sixteenth electrode;
An image signal line to which a potential (Vdt) corresponding to the pixel data signal is supplied;
With
The first electrode is electrically connected to the first application portion and the seventh electrode;
The second electrode is electrically connected to the one electrode, and a current amount in the light emitting element is controlled by adjusting a current amount between the first electrode and the second electrode. And
The third electrode is electrically connected to the eighth and tenth electrodes;
The fourth electrode is electrically connected to the eleventh electrode;
The fifth electrode is electrically connected to the second electrode and the one electrode;
The seventh electrode is electrically connected to the first application portion;
The eighth electrode is electrically connected to the tenth electrode;
The twelfth electrode is electrically connected to the image signal line;
The thirteenth electrode is electrically connected to the fourth, eleventh and fifteenth electrodes;
The fifteenth electrode is electrically connected to the fourth and eleventh electrodes;
The sixteenth electrode is electrically connected to the one electrode, the second and fifth electrodes, and
In the preparation period (Pp) for adjusting the light emission luminance of the light emitting element, the image display device
(1) setting the first potential to a reference potential (GND);
(2) setting the second potential to a first high potential (Vp);
(3) bringing the third transistor into a conductive state;
(4) The fourth transistor is turned on, and electric charges accumulated in the tenth and eleventh electrodes of the first capacitor are reset,
(5) turning off the third transistor;
(6) A potential (Vdt) corresponding to the image data signal is set to a second high potential (Vvh), and the first high potential (Vp) is set between one electrode and the other electrode of the light emitting element. The corresponding charge is accumulated,
(7) A potential (Vdt) corresponding to the image data signal is set to the reference potential (GND),
(8) turning off the fourth transistor;
(9) bringing the third transistor into a conductive state;
(10) bringing the second transistor into a conductive state;
(11) When the second potential is set to the reference potential (GND) and the gate voltage (Vgs) of the first transistor reaches a threshold potential (Vth), the first transistor is automatically turned off. Become
(12) turning off the third transistor;
(13) turning off the second transistor;
(14) bringing the fourth transistor into a conductive state;
(15) A potential (Vdt) corresponding to the image data signal is set to the second high potential (Vvh), and the charge remaining between the one electrode and the other electrode of the light emitting element is reset,
(16) A potential (Vdt) corresponding to the image data signal is set to the reference potential (GND),
(17) turning off the fourth transistor;
(18) A potential (Vdt) corresponding to the image data signal is set to a predetermined potential (Vdata),
(19) The fourth transistor is turned on, and the gate voltage (Vgs) of the first transistor is set to a value (Vth + Vdata) obtained by adding the threshold voltage (Vth) and the predetermined potential (Vdata).
(20) turning off the fourth transistor;
(21) A potential (Vdt) corresponding to the image data signal is set to the reference potential (GND),
(22) The first potential (Vdd) is set to the first high potential (Vp).
A liquid crystal display device characterized by the above.
A light emitting element;
A first transistor having first, second, and third electrodes, and adjusting an amount of current between the first electrode and the second electrode by a potential applied to the third electrode;
A second transistor having fourth, fifth, and sixth electrodes, and adjusting a current amount between the fourth electrode and the fifth electrode by a potential applied to the sixth electrode;
A third transistor having seventh, eighth, and ninth electrodes, and adjusting an amount of current between the seventh electrode and the eighth electrode by a potential applied to the ninth electrode;
A first capacitor having tenth and eleventh electrodes and configured to obtain a capacitance between the tenth electrode and the eleventh electrode;
A first applying unit that applies a first potential (Vdd) to one electrode of the light emitting element when the light emitting element emits light;
A second applying unit that applies a second potential (Vss) that is relatively lower than the first potential to the other electrode different from the one electrode of the light emitting device when the light emitting device emits light;
A fourth transistor having twelfth, thirteenth and fourteenth electrodes, and adjusting a current amount between the twelfth electrode and the thirteenth electrode by a potential applied to the fourteenth electrode;
A second capacitor having fifteenth and sixteenth electrodes and configured to obtain a capacitance between the fifteenth electrode and the sixteenth electrode;
An image signal line to which a potential (Vdt) corresponding to the pixel data signal is supplied;
With
The first electrode is electrically connected to the first application portion and the seventh electrode;
The second electrode is electrically connected to the one electrode, and a current amount in the light emitting element is controlled by adjusting a current amount between the first electrode and the second electrode. And
The third electrode is electrically connected to the eighth and tenth electrodes;
The fourth electrode is electrically connected to the eleventh electrode;
The fifth electrode is electrically connected to the second electrode and the one electrode;
The seventh electrode is electrically connected to the first application portion;
The eighth electrode is electrically connected to the tenth electrode;
The twelfth electrode is electrically connected to the image signal line;
The thirteenth electrode is electrically connected to the fifteenth electrode;
The sixteenth electrode is electrically connected to the fourth and eleventh electrodes; and
In the preparation period (PpA) for adjusting the light emission luminance of the light emitting element, the image display device
(1) setting the first potential to a reference potential (GND);
(2) The second potential is set to a first high potential (Vp), and a charge corresponding to the first high potential (Vp) is accumulated between one electrode and the other electrode of the light emitting element,
(3) bringing the fourth transistor into a conductive state;
(4) The third transistor is made conductive, and the charge accumulated between the tenth electrode and the eleventh electrode of the first capacitor is reset,
(5) When the second potential (Vss) is set to the reference potential (GND) and the gate voltage (Vgs) of the first transistor reaches the threshold potential (Vth), the first transistor is automatically turned off. Become conductive,
(6) turning off the fourth transistor;
(7) turning off the second transistor;
(8) A voltage (Vdt) corresponding to the image data signal is set to a predetermined potential (−Vdata),
(9) The fourth transistor is turned on, and a charge (Vdata x α) corresponding to the predetermined potential (−Vdata) is accumulated between the tenth electrode and the eleventh electrode of the first capacitor,
(10) The fourth transistor is turned off, and the gate voltage (Vgs) of the first transistor is a value obtained by adding the threshold potential (Vth) and the charge (Vdata x α) corresponding to the predetermined potential. (Vth + Vdata x α)
(11) A voltage (Vdt) corresponding to the image data signal is set to the reference potential (GND),
(12) turning off the third transistor;
(13) bringing the second transistor into a conductive state;
(14) The first potential (Vdd) is set to the first high potential (Vp).
A liquid crystal display device characterized by the above.

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